Alexander Graf [Thu, 19 Oct 2017 21:23:50 +0000 (23:23 +0200)]
efi_loader: Disable env_save() call on boot
With the introduction of EFI variable support, we also wanted to persist
these EFI variables. However, the way it was implemented we ended up
persisting all U-Boot environment variables on every EFI boot.
That could potentially lead to unexpected side effects because variables
that were not supposed to be written to persisted env get written. It also
means we may end up writing the environment more often than we should.
For this release, let's just disable EFI variable persistence and instead
implement it properly for the next one.
Reported-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Fixes:
ad644e7c182 ("efi_loader: efi variable support")
Signed-off-by: Alexander Graf <agraf@suse.de>
Acked-by: Rob Clark <robdclark@gmail.com>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Tom Rini [Sat, 28 Oct 2017 01:59:10 +0000 (21:59 -0400)]
Merge git://git.denx.de/u-boot-fsl-qoriq
Sumit Garg [Fri, 1 Sep 2017 08:25:01 +0000 (13:55 +0530)]
armv8: sec_firmware: Add support for loadables in FIT
Enable support for loadables in SEC firmware FIT image. Currently
support is added for single loadable image.
Brief description of implementation:
Add two more address pointers (loadable_h, loadable_l) as arguments to
sec_firmware_init() api.
Create new api: sec_firmware_checks_copy_loadable() to check if loadables
node is present in SEC firmware FIT image. If present, verify loadable
image and copies it to secure DDR memory.
Populate address pointers with secure DDR memory addresses where loadable
is copied.
Example use-case could be trusted OS (tee.bin) as loadables node in SEC
firmware FIT image.
Signed-off-by: Sumit Garg <sumit.garg@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Sumit Garg [Fri, 1 Sep 2017 08:25:00 +0000 (13:55 +0530)]
armv8: layerscape: Allocate 66 MB DDR for secure memory
Change DDR allocated for secure memory from 2 MB to 66 MB. This
additional 64 MB secure memory is required for trusted OS running
in Trusted Execution Environment using ARMv8 TrustZone.
Signed-off-by: Sumit Garg <sumit.garg@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Ran Wang [Mon, 23 Oct 2017 02:09:25 +0000 (10:09 +0800)]
armv8: ls1088aqds: Enable USB command on QDS for qspi-boot
Signed-off-by: Amrita Kumari <amrita.kumari@nxp.com>
Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
Signed-off-by: Ran Wang <ran.wang_1@nxp.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Ran Wang [Mon, 23 Oct 2017 02:09:24 +0000 (10:09 +0800)]
armv8: ls1088ardb: Enable USB command RDB qspi-boot
Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
Signed-off-by: Amrita Kumari <amrita.kumari@nxp.com>
Signed-off-by: Ran Wang <ran.wang_1@nxp.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Ran Wang [Mon, 23 Oct 2017 02:09:23 +0000 (10:09 +0800)]
arm: layerscape: Remove CONFIG_USB_MAX_CONTROLLER_COUNT
Because COMFIG_DM_USB has been enabled and will not use it anymore.
Signed-off-by: Ran Wang <ran.wang_1@nxp.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Ran Wang [Mon, 23 Oct 2017 02:09:22 +0000 (10:09 +0800)]
usb: host: Move CONFIG_XHCI_FSL to Kconfig
use Kconfig to select xhci accordingly.
Signed-off-by: Ran Wang <ran.wang_1@nxp.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Ran Wang [Mon, 23 Oct 2017 02:09:21 +0000 (10:09 +0800)]
arm64: layerscape: Move CONFIG_HAS_FSL_XHCI_USB to Kconfig
Use Kconfig to select QE-HDLC and USB pin-mux.
Signed-off-by: Ran Wang <ran.wang_1@nxp.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Ashish Kumar [Thu, 12 Oct 2017 09:51:54 +0000 (15:21 +0530)]
armv8: ls1088aqds: Change phy mode to PHY_INTERFACE_MODE_RGMII_ID
Since TX delay is now enabled only in PHY_INTERFACE_MODE_RGMII_ID
PHY_INTERFACE_MODE_RGMII_TXID.
These change where introduced in phy driver in commit
05b29aa0cb68
("net: phy: realtek: fix enabling of the TX-delay for RTL8211F").
Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Yuantian Tang [Thu, 12 Oct 2017 06:29:26 +0000 (14:29 +0800)]
armv8: configs: ls1012a: correct the generic timer frequency
On ls1012a soc, core clock source frequency is fixed at 100Mhz.
Generic timer frequency is core clock source divided by 4, which
is 25Mhz.
Signed-off-by: Tang Yuantian <andy.tang@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Ashish Kumar [Wed, 11 Oct 2017 13:07:42 +0000 (18:37 +0530)]
armv8: ls1088: Move CONFIG_ENV_IS_IN_SPI_FLASH to defconfig
Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Prabhakar Kushwaha [Wed, 11 Oct 2017 03:21:18 +0000 (08:51 +0530)]
driver: fsl-mc: use calloc instead malloc
Memory allocated via malloc is not guaranteed to be zeroized.
So explicitly use calloc instead of malloc.
Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Masahiro Yamada [Thu, 26 Oct 2017 12:24:31 +0000 (21:24 +0900)]
AT91: remove CONFIG_PMECC_INDEX_TABLE_OFFSET
This macro is defined, but not referenced by anyone.
I did not touch config_whitelist.txt - the CONFIG will be dropped
by the next re-sync.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamada [Thu, 26 Oct 2017 12:24:30 +0000 (21:24 +0900)]
exynos: remove CONFIG_LCD_MENU_BOARD
This macro is defined, but not referenced by anyone.
I did not touch config_whitelist.txt - the CONFIG will be dropped
by the next re-sync.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Minkyu Kang <mk7.kang@samsung.com>
Masahiro Yamada [Thu, 26 Oct 2017 12:24:29 +0000 (21:24 +0900)]
net: remove CONFIG_NET_MULTI
This macro is defined, but not referenced by anyone.
I did not touch config_whitelist.txt - the CONFIG will be dropped
by the next re-sync.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Masahiro Yamada [Thu, 26 Oct 2017 12:24:28 +0000 (21:24 +0900)]
mpc85xx: xpedite550x: remove CONFIG_FDT_FIXUP_PCI_IRQ
This macro is defined, but not referenced by anyone.
I did not touch config_whitelist.txt - the CONFIG will be dropped
by the next re-sync.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamada [Thu, 26 Oct 2017 12:24:27 +0000 (21:24 +0900)]
AM33XX: etamin: remove CONFIG_DFU_MTD
This macro is defined, but not referenced by anyone.
I did not touch config_whitelist.txt - the CONFIG will be dropped
by the next re-sync.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamada [Thu, 26 Oct 2017 12:24:26 +0000 (21:24 +0900)]
MX28: remove CONFIG_DEFAULT_SPI_CS
This macro is defined, but not referenced by anyone.
I did not touch config_whitelist.txt - the CONFIG will be dropped
by the next re-sync.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamada [Thu, 26 Oct 2017 12:24:25 +0000 (21:24 +0900)]
exynos: remove CONFIG_CORE_COUNT
This macro is defined, but not referenced by anyone.
I did not touch config_whitelist.txt - the CONFIG will be dropped
by the next re-sync.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Minkyu Kang <mk7.kang@samsung.com>
Masahiro Yamada [Thu, 26 Oct 2017 12:24:24 +0000 (21:24 +0900)]
omap4: sdp4430: match the #endif comment to #ifdef
This comment creates a wrong entry in config_whitelist.txt.
I did not touch config_whitelist.txt - the CONFIG will be dropped
by the next re-sync.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamada [Thu, 26 Oct 2017 12:24:23 +0000 (21:24 +0900)]
SOCFPGA: remove CONFIG_AUTONEG_TIMEOUT
This macro is defined, but not referenced by anyone.
I did not touch config_whitelist.txt - the CONFIG will be dropped
by the next re-sync.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamada [Thu, 26 Oct 2017 12:24:22 +0000 (21:24 +0900)]
ARC: remove CONFIG_ARC_UART_BASE
This macro is defined, but not referenced by anyone.
I did not touch config_whitelist.txt - the CONFIG will be dropped
by the next re-sync.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamada [Thu, 26 Oct 2017 12:24:21 +0000 (21:24 +0900)]
sh7734: remove CONFIG_553MHZ_MODE
This macro only appears in commented-out lines. It is not referenced
by anyone.
I did not touch config_whitelist.txt - the CONFIG will be dropped
by the next re-sync.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamada [Thu, 26 Oct 2017 12:24:20 +0000 (21:24 +0900)]
mpc85xx: freescale: remove CONFIG_ADDR_STREAMING
This macro is defined, but not referenced by anyone.
I did not touch config_whitelist.txt - the CONFIG will be dropped
by the next re-sync.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Masahiro Yamada [Thu, 26 Oct 2017 12:24:19 +0000 (21:24 +0900)]
omap4: sdp4430: remove CONFIG_4430SDP
This macro is defined, but not referenced by anyone.
I did not touch config_whitelist.txt - the CONFIG will be dropped
by the next re-sync.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamada [Thu, 26 Oct 2017 12:24:18 +0000 (21:24 +0900)]
IMX: novena: remove CONFIG_I2C_MXC
This macro is defined, but not referenced by anyone.
I did not touch config_whitelist.txt - the CONFIG will be dropped
by the next re-sync.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Heiko Schocher<hs@denx.de>
Masahiro Yamada [Thu, 26 Oct 2017 12:24:17 +0000 (21:24 +0900)]
i2c: fti2c010: remove unused/unmaintained driver
CONFIG_SYS_I2C_FTI2C010 is not enabled by anyone.
Commit
2852709676c8 ("dm: i2c: Add a note to I2C drivers which need
conversion") prompted to convert this driver to DM before June 2017,
but not converted yet.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Heiko Schocher <hs@denx.de>
Masahiro Yamada [Thu, 26 Oct 2017 12:24:16 +0000 (21:24 +0900)]
i2c: adi_i2c: remove left-over Blackfin I2C driver
This driver was used by Blackfin boards, but Blackfin support is
gone. There is no user of this driver.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Heiko Schocher <hs@denx.de>
Tom Rini [Fri, 27 Oct 2017 12:50:16 +0000 (08:50 -0400)]
Merge git://git.denx.de/u-boot-x86
Bin Meng [Thu, 19 Oct 2017 01:21:00 +0000 (18:21 -0700)]
x86: acpi: Put sleepstates.asl to the common place
The supported sleep states are generic on Intel processors. Move the
ASL definition to the common place.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Bin Meng [Thu, 19 Oct 2017 01:20:59 +0000 (18:20 -0700)]
x86: fsp: graphics: Add some notes about the graphics info hob
On some platforms (eg: Braswell), the FSP will not produce the
graphics info HOB unless you plug some cables to the display
interface (eg: HDMI) on the board. Add such notes in the FSP
video driver.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Bin Meng [Thu, 19 Oct 2017 01:20:58 +0000 (18:20 -0700)]
x86: braswell: cherryhill: Update dts for SPI lock down
Intel Braswell FSP requires SPI controller settings to be locked down,
let's do this in the chrryhill.dts and remove previous Kconfig option.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Bin Meng [Thu, 19 Oct 2017 01:20:57 +0000 (18:20 -0700)]
spi: ich: Lock down controller settings if required
Some Intel FSP (like Braswell) does SPI lock-down during the call
to fsp_notify(INIT_PHASE_BOOT). But before SPI lock-down is done,
it's bootloader's responsibility to configure the SPI controller's
opcode registers properly otherwise SPI controller driver doesn't
know how to communicate with the SPI flash device.
Rather than passively doing the opcode configuration, let's add a
simple DTS property "intel,spi-lock-down" and let the driver call
the opcode configuration function if required by such FSP.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Bin Meng [Thu, 19 Oct 2017 01:20:56 +0000 (18:20 -0700)]
Revert "x86: fsp: Configure SPI opcode registers before SPI is locked down"
This reverts commit
1e6ebee667da47fd3a87839a239a7574c66f5659.
It's not appropriate to call the Intel SPI driver specific stuff in
the FSP codes. We may add a simple DTS property "intel,spi-lock-down"
and let the Intel SPI driver call these stuff instead.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Bin Meng [Thu, 19 Oct 2017 01:20:55 +0000 (18:20 -0700)]
x86: Fix ACPI resume dependency to MRC cache
In an S3 resume path, MRC cache is mandatory. Enforce the dependency
in the Kconfig.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Bin Meng [Thu, 19 Oct 2017 01:20:54 +0000 (18:20 -0700)]
env: x86: braswell: Set ENV_IS_IN_SPI_FLASH as default
Imply does not work for a Kconfig choice. Update ENV_IS_IN_SPI_FLASH
to be the default one for Intel Braswell.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Bin Meng [Thu, 19 Oct 2017 01:20:53 +0000 (18:20 -0700)]
x86: braswell: Fix unexpected crash during Linux kernel boot
It was observed that when booting Linux kernel on Intel Cherry Hill
board, unexpected crash happens quite randomly. Sometimes kernel
just oops, while sometimes kernel throws MCE errors and hangs:
mce: [Hardware Error]: Machine check events logged
mce: [Hardware Error]: CPU 0: Machine Check: 0 Bank 4:
c400000000010151
mce: [Hardware Error]: TSC 0 ADDR
130f3f2c0
mce: [Hardware Error]: PROCESSOR 0:406c3 TIME
1508160686 SOCKET 0 APIC 0 microcode 363
This looks like a hardware error per mcelog. After debugging, it
seems turning off turbo mode on the processor does not expose this
behavior, although U-Boot runs OK with turbo mode on. Suspect it is
related to an errata of Braswell processor.
To fix this, remove the Braswell cpu driver which does the turbo
mode configuration, and switch to use the generic cpu-x86 driver.
Also there is a configuration option in the FSP that turns on the
turbo mode and that has been turned off too.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Bin Meng [Thu, 19 Oct 2017 01:20:52 +0000 (18:20 -0700)]
x86: galileo: Fix boot failure
With latest codes on mainstream master, Intel Galileo board does not
boot unfortunately. Git biset leads to
b383d6c0 "bootstage: Convert
to use malloc()".
Disable bootstage support to make it boot again. The root cause needs
to be investigated however.
Fixes:
b383d6c0 ("bootstage: Convert to use malloc()")
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Tom Rini [Thu, 26 Oct 2017 15:50:33 +0000 (11:50 -0400)]
Merge branch 'master' of git://git.denx.de/u-boot-sunxi
Maxime Ripard [Thu, 19 Oct 2017 09:36:35 +0000 (11:36 +0200)]
sunxi: binman: Add U-Boot binary size check
The U-Boot binary may trip over its actual allocated size in the storage.
In such a case, the environment will not be readable anymore (because
corrupted when the new image was flashed), and any attempt at using saveenv
to reconstruct the environment will result in a corrupted U-Boot binary.
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Maxime Ripard [Thu, 19 Oct 2017 09:49:29 +0000 (11:49 +0200)]
sunxi: Enable THUMB build for the U-Boot binary
We start to get to the limit of our main U-Boot binary size (with some
boards even crossing it). Enable its build using thumb2 to get some extra
room.
Suggested-by: Siarhei Siamashka <siarhei.siamashka@gmail.com>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Tested-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Maxime Ripard [Thu, 20 Apr 2017 11:16:18 +0000 (13:16 +0200)]
sunxi: Add support for the Banana Pi M2-Magic
The Banana Pi M2-Magic is a small board with an Allwinner A33, an eMMC, a
wifi chip and some pin headers. Enable support for it.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Benjamin Young [Fri, 13 Oct 2017 21:29:20 +0000 (14:29 -0700)]
cmd: fastboot: Enable FASTBOOT_FLASH_NAND for SUNXI_NAND devices
Encountered an issue where fastboot can't write to NAND on a CHIP_pro,
the symbol was neither present in the board's config header, nor the
Kconfig, this patch puts it in the Kconfig and defaults on when
SUNXI_NAND is selected.
Signed-off-by: Ben Young <computermouth@crunchbangplusplus.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Quentin Schulz [Tue, 26 Sep 2017 14:02:47 +0000 (16:02 +0200)]
sunxi: clk: fix N formula for CPUX clocks
As explained in arch/arm/mach-sunxi/clock_sun8i_a83t.c, clk for CPU
clusters is computed as clk = 24*n. However, the current formula is clk
= 24*(n-1).
This results in a clock set to a frequency that isn't specified as
possible for CPUs.
Let's use the correct formula.
Fixes:
f542948b1e8c ("sunxi: clk: add basic clocks for A83T")
Signed-off-by: Quentin Schulz <quentin.schulz@free-electrons.com>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Andre Przywara [Wed, 4 Oct 2017 23:27:21 +0000 (00:27 +0100)]
SPL: SPI: select SPL_SPI_FLASH_SUPPORT on SPL_SPI_SUNXI
The Allwinner SPI flash SPL boot support is guarded by the SPL_SPI_SUNXI
symbol. But despite its generic name, the actual only use case for this
is to provide SPI flash support to the SPL, which requires
CONFIG_SPL_SPI_FLASH_SUPPORT to be defined.
Select this symbol from the SPL_SPI_SUNXI Kconfig definition. This
avoids doing this explicitly in the defconfig, and fixes SPI booting on
the Pine64 SoPine (and -LTS version) and the OrangePi Win board (both with
SPI flash).
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Heinrich Schuchardt [Thu, 19 Oct 2017 21:49:19 +0000 (23:49 +0200)]
Kconfig: add CONFIG_BROKEN
Provide a Kconfig option that we can use as dependency for
features that are broken. This allows to easily disable them
without removing the code.
As no short text is supplied the option will not appear in
menuconfig.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Masahiro Yamada [Thu, 19 Oct 2017 10:37:59 +0000 (19:37 +0900)]
doc: verified-boot: fix crypto algorithm examples
As you see in crypto_algos in common/image-sig.c, the algorithm
should be either "rsa2048" or "rsa4096". "rs2048" is a typo.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Masahiro Yamada [Thu, 19 Oct 2017 10:16:21 +0000 (19:16 +0900)]
tools: image: fix node name of signature node in FIT
Both "conf_name" and "sig_name" point to the name of config node.
The latter should be the name of the signature node.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Masahiro Yamada [Thu, 19 Oct 2017 10:08:52 +0000 (19:08 +0900)]
test/py: fix typos in README.md
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Patrick Delaunay [Wed, 18 Oct 2017 13:11:08 +0000 (15:11 +0200)]
cmd: gpt: solve issue for swap and rename command
don't use prettyprint_part_size() in create_gpt_partitions_list()
that avoid to align offset and size to 1 MiB and increase precision for
start and size.
This patch avoid the risk to change partition size and lost data during
rename or swap.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
Tested-by: Stephen Warren <swarren@nvidia.com>
Patrick Delaunay [Wed, 18 Oct 2017 13:11:07 +0000 (15:11 +0200)]
test/py: gpt: test start LBA for sub-command rename and swap
Add test of first and last LBA in gpt for rename and swap.
Only the name is expected to change, so test 3 columns
for part command
1: first LBA (start)
2: last LBA (end)
3: partition name
After rename, the last LBA change and it is a error in current U-Boot code
+ "first" = 0x7ff : invalid value (<start)
+ "second" = 0x17ff => size increasing !
Acked-by: Stephen Warren <swarren@nvidia.com>
Tested-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Patrick Delaunay [Wed, 18 Oct 2017 13:11:06 +0000 (15:11 +0200)]
test/py: gpt: add test for sub-command write
+ test write for one partition on all the device (size=0)
+ test write with disk uuid and 2 partitions
Acked-by: Stephen Warren <swarren@nvidia.com>
Tested-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Patrick Delaunay [Wed, 18 Oct 2017 13:11:05 +0000 (15:11 +0200)]
disk: efi: correct the overlap check on GPT header and PTE
the partition starting at 0x4400 is refused with overlap error:
$> gpt write mmc 0 "name=test,start=0x4400,size=0"
Writing GPT: Partition overlap
error!
even if the 0x4400 is the first available offset for LBA35 with default
value:
- MBR=LBA1
- GPT header=LBA2
- PTE= 32 LBAs (128 entry), 3 to 34
And the command to have one partition for all the disk failed also :
$> gpt write mmc 0 "name=test,size=0"
After the patch :
$> gpt write mmc 0 "name=test,size=0"
Writing GPT: success!
$> part list mmc 0
Partition Map for MMC device 0 -- Partition Type: EFI
Part Start LBA End LBA Name
Attributes
Type GUID
Partition GUID
1 0x00000022 0x01ce9fde "test"
attrs: 0x0000000000000000
type:
ebd0a0a2-b9e5-4433-87c0-
68b6b72699c7
type: data
guid:
b4b84b8a-04e3-4000-0036-
aff5c9c495b1
And 0x22 = 34 LBA => offset = 0x4400 is accepted as expected
Reviewed-by: Łukasz Majewski <lukma@denx.de>
Tested-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Patrick Delaunay [Wed, 18 Oct 2017 13:11:04 +0000 (15:11 +0200)]
test/py: gpt: add test for sub-command read and verify
add sandbox test for some gpt sub-command
- gpt read / part list : read the gpt partition created by sgdisk on host
test start, size, LBA and name output
- gpt verify : verify the gpt partition create by sgdisk on host
PS: persistent data test_gpt_disk_image.bin are udpated
Acked-by: Stephen Warren <swarren@nvidia.com>
Tested-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Patrick Delaunay [Wed, 18 Oct 2017 13:11:03 +0000 (15:11 +0200)]
test/py: gpt: copy persistent file
copy the persistent gpt binary file as it can be modified during the test
that avoid issue if the test fail: the test always restart with clean file
Acked-by: Stephen Warren <swarren@nvidia.com>
Tested-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Bin Meng [Tue, 17 Oct 2017 15:19:33 +0000 (08:19 -0700)]
rtc: mc146818: Correct alarm message for day alarm
RTC_CONFIG_D register contains the day within the month to generate
an alarm, not the month. This corrects the printf to indicate it.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Michal Oleszczyk [Tue, 17 Oct 2017 12:06:33 +0000 (14:06 +0200)]
chiliboard config: use CONFIG_DEFAULT_FDT_FILE as env variable
Remove hardcoded ftd file name from environment variables.
Use CONFIG_DEFAULT_FDT_FILE macro instead.
Signed-off-by: Michal Oleszczyk <m.oleszczyk@grinn-global.com>
Masahiro Yamada [Tue, 17 Oct 2017 08:37:14 +0000 (17:37 +0900)]
simple-bus: remove DECLARE_GLOBAL_DATA_PTR
No global pointer is used in this file.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
York Sun [Tue, 17 Oct 2017 15:00:21 +0000 (08:00 -0700)]
powerpc: mpc85xx: Implement CPU erratum A-007907 for secondary cores
Commit
06ad970b53a3 ("powerpc: mpc85xx: Implemente workaround for CPU
erratum A-007907") clears L1CSR2 for the boot core, but other cores
don't run through the workaround. Add similar code for secondary
cores to clear DCSTASHID field in L1CSR2 register.
Signed-off-by: York Sun <york.sun@nxp.com>
Masahiro Yamada [Tue, 17 Oct 2017 15:10:49 +0000 (00:10 +0900)]
mtd: remove MTDDEBUG() and CONFIG_MTD_DEBUG
All users of this macro have been converted. Remove MTDDEBUG and
related CONFIG options.
ubifs_dbg_msg_key() is kept. It is silent unless DEBUG is defined.
I am not touching scripts/config_whitelist.txt. The deprecated options
will be dropped by the next resync.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamada [Tue, 17 Oct 2017 15:10:48 +0000 (00:10 +0900)]
mtd: replace MTDDEBUG() with pr_debug()
In old days, the MTD subsystem in Linux had debug facility like
DEBUG(MTD_DEBUG_LEVEL1, ...).
They were all replaced with pr_debug() until Linux 3.2. See Linux
commit
289c05222172 ("mtd: replace DEBUG() with pr_debug()").
U-Boot still uses similar macros. Covert all of them for easier sync.
Done with the help of Coccinelle.
The semantic patch I used is as follows:
// <smpl>
@@
expression e1, e2;
@@
-MTDDEBUG(e1, e2)
+pr_debug(e2)
@@
expression e1, e2;
@@
-MTDDEBUG(e1, e2,
+pr_debug(e2,
...)
// </smpl>
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Tom Rini [Sun, 22 Oct 2017 23:21:04 +0000 (19:21 -0400)]
Merge git://git.denx.de/u-boot-uniphier
Masahiro Yamada [Sun, 22 Oct 2017 15:19:36 +0000 (00:19 +0900)]
ARM: uniphier: use pr_*() more where appropriate
Commit
dd74b945af2e ("ARM: uniphier: use pr_() instead of printf()
where appropriate"), but I missed to update this file for some reason.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamada [Sun, 22 Oct 2017 06:15:01 +0000 (15:15 +0900)]
doc: uniphier: add simple guide to Verified Boot
Add a simple documentation about how to use the Verified Boot on
UniPhier boards.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamada [Sat, 21 Oct 2017 10:51:13 +0000 (19:51 +0900)]
ARM: uniphier: remove verify=n from environments
If the environment "verify" is set to n, the image verification
is entirely skipped. Remove it as a preparation for verified boot.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamada [Thu, 19 Oct 2017 10:17:51 +0000 (19:17 +0900)]
ARM: uniphier: increase CONFIG_SYS_BOOTM_LEN to 32MB
The default value of CONFIG_SYS_BOOTM_LEN, 0x800000, causes error
when uncompressing Image.gz out of FIT image.
Uncompressing Kernel Image ... Error: inflate() returned -5
Image too large: increase CONFIG_SYS_BOOTM_LEN
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamada [Tue, 17 Oct 2017 12:19:43 +0000 (21:19 +0900)]
ARM: dts: uniphier: sync DT with Linux 4.14-rc5
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamada [Tue, 17 Oct 2017 12:19:42 +0000 (21:19 +0900)]
ARM: uniphier: split u-boot,dm-pre-reloc out to uniphier-v7-u-boot.dtsi
UniPhier 32-bit SoCs use CONFIG_SPL_OF_CONTROL. So, many nodes must
be marked as dm-pre-reloc to prevent fdtgrep from stripping them off.
Sprinkling U-Boot-specific properties all over the place is painful
because DT files are synced with Linux from time to time.
Split u-boot,dm-pre-reloc out to uniphier-v7-u-boot.dtsi, which is
appended to UniPhier V7 DTS before the build.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Masahiro Yamada [Tue, 17 Oct 2017 12:19:41 +0000 (21:19 +0900)]
ARM: uniphier: remove CONFIG_UNIPHIER_ETH
The option is never enabled by anyone. Remove the code surrounded
by its ifdef. This should be handled by the clock/reset drivers.
CONFIG_UNIPHIER_ETH in scripts/config_whitelist.txt will be dropped
by the next resync.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamada [Tue, 17 Oct 2017 12:19:40 +0000 (21:19 +0900)]
ARM: uniphier: enable DWC3 xHCI driver really
I thought commit
d37d31849c6a ("ARM: uniphier: enable DWC3 xHCI
driver") enabled CONFIG_USB_DWC3_UNIPHIER, but CONFIG_USB_XHCI_DWC3
was missing in uniphier_v7_defconfig. Re-add.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Tom Rini [Sat, 21 Oct 2017 14:26:34 +0000 (10:26 -0400)]
uniphier_ld4_sld8: Re-add SMC911X_BASE address
This was dropped by accident in the Kconfig conversion.
Signed-off-by: Tom Rini <trini@konsulko.com>
Adam Ford [Tue, 5 Sep 2017 20:20:44 +0000 (15:20 -0500)]
net: Add SMC911X driver to Kconfig, convert
We add the various SMC91XX symbols to drivers/net/Kconfig and then this
converts the following to Kconfig:
CONFIG_SMC911X
CONFIG_SMC911X_BASE
CONFIG_SMC911X_16_BIT
CONFIG_SMC911X_32_BIT
Signed-off-by: Adam Ford <aford173@gmail.com>
[trini: Apply to the rest of the tree, re-squash old and new patch]
Signed-off-by: Tom Rini <trini@konsulko.com>
Adam Ford [Mon, 16 Oct 2017 19:08:26 +0000 (14:08 -0500)]
Convert CONFIG_NAND_OMAP_GPMC et al and CONFIG_NAND_MXC to Kconfig
This converts the following to Kconfig:
CONFIG_NAND_MXC
CONFIG_NAND_OMAP_GPMC
CONFIG_NAND_OMAP_GPMC_PREFETCH
CONFIG_NAND_OMAP_ELM
CONFIG_SPL_NAND_AM33XX_BCH
CONFIG_SPL_NAND_SIMPLE
CONFIG_SYS_NAND_BUSWIDTH_16BIT
Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
[trini: Finish migration of CONFIG_SPL_NAND_SIMPLE, fix some build issues,
add CONFIG_NAND_MXC so we can do CONFIG_SYS_NAND_BUSWIDTH_16BIT]
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Thu, 19 Oct 2017 15:19:38 +0000 (11:19 -0400)]
Merge git://git.denx.de/u-boot-x86
Stefan Roese [Tue, 17 Oct 2017 06:09:14 +0000 (08:09 +0200)]
x86: conga-qeval20-qa3-e3845-internal-uart_defconfig: Add ACPI resume support
I've missed to add the ACPI resume support to this x86 build target.
This patch adds the ACPI resume support enabling S3 suspend /
resume.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Heinrich Schuchardt [Mon, 16 Oct 2017 18:08:38 +0000 (18:08 +0000)]
x86: provide CONFIG_BUILD_ROM
Up to now we depended on an exported variable to build u-boot.rom.
We should be able to specify it in the configuration file, too.
With this patch this becomes possible using the new Kconfig option
CONFIG_BUILD_ROM.
This option depends on CONFIG_X86 and is selected in
qemu-x86_defconfig and qemu-x86_64_defconfig.
Cc: Simon Glass <sjg@chromium.org>
Cc: Bin Meng <bmeng.cn@gmail.com>
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Bin Meng [Fri, 13 Oct 2017 08:30:06 +0000 (01:30 -0700)]
x86: baytrail: fsp: Move Azalia update codes to board
Azalia configuration may be different across boards, hence it's not
appropriate to do that in the SoC level. Instead, let's make the
SoC update_fsp_azalia_configs() routine as a weak version, and do
the actual work in the board codes.
So far it seems only som-db5800-som-6867 board enables the Azalia.
Move the original codes into som-db5800-som-6867.c.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Bin Meng [Fri, 13 Oct 2017 08:30:05 +0000 (01:30 -0700)]
x86: baytrail: fsp: Use a function to update the Azalia config pointer
At present we directly pass the Azalia config pointer to the FSP UPD.
This updates to use a function to do the stuff, like Braswell does.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Bin Meng [Fri, 13 Oct 2017 08:30:04 +0000 (01:30 -0700)]
x86: fsp: Consolidate Azalia header file
So far there are two copies of Azalia struct defines with one in
baytrail and the other one in braswell. This consolidates these
two into one, put it in the common place, and remove the prefix
pch_ to these structs to make their names more generic.
This also corrects reset_wait_timer from us to ms.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Bin Meng [Thu, 12 Oct 2017 12:07:58 +0000 (05:07 -0700)]
x86: Turn off running VGA ROM during S3 resume
This is only needed when graphics console is used. For kernel with
native graphics driver, this can be turned off to speed up.
Change this option's default to n in the Kconfig.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Bin Meng [Thu, 12 Oct 2017 12:07:57 +0000 (05:07 -0700)]
x86: baytrail: Fix unstable ACPI S3 resume
It was observed that when booting a Ubuntu 16.04 kernel, doing ACPI
S3 suspend/resume sometimes causes the Ubuntu kernel hang forever.
The issue is however not reproduced with a kernel built from i386/
x86_64 defconfig configuration.
The unstability is actually caused by unexpected interrupts being
generated during the S3 resume. For some unknown reason, FSP (gold4)
for BayTrail configures the GPIO DFX5 PAD to enable level interrupt
(bit 24 and 25). As this pin keeps generating interrupts during an
S3 resume, and there is no IRQ requester in the kernel to handle it,
the kernel seems to hang and does not continue resuming.
Clear the mysterious interrupt bits for this pin.
Reported-by: Stefan Roese <sr@denx.de>
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Stefan Roese <sr@denx.de>
Reviewed-by: Stefan Roese <sr@denx.de>
Bin Meng [Sat, 7 Oct 2017 09:43:52 +0000 (02:43 -0700)]
x86: minnowmax: Adjust VGA rom address
Adjust VGA rom address to 0xfffb0000 so that u-boot.rom image
can be built again.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Tom Rini [Wed, 18 Oct 2017 13:32:35 +0000 (09:32 -0400)]
Merge git://git.denx.de/u-boot-i2c
Tom Rini [Wed, 18 Oct 2017 13:32:21 +0000 (09:32 -0400)]
Merge git://git.denx.de/u-boot-spi
Patrice Chotard [Tue, 17 Oct 2017 09:21:33 +0000 (11:21 +0200)]
i2c: stm32f7_i2c: fix usage of useless local variable
Remove useless local variable "s" and use directly
function's parameter "output"
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Christophe Kerello [Tue, 17 Oct 2017 09:21:32 +0000 (11:21 +0200)]
i2c: stm32f7_i2c: fix data abort
As "v" is a local variable in stm32_i2c_choose_solution()
"v" has to be copied into "s" to avoid data abort in
stm32_i2c_compute_timing().
Signed-off-by: Christophe Kerello <christophe.kerello@st.com>
Reviewed-by: Patrick DELAUNAY <patrick.delaunay@st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Masahiro Yamada [Fri, 13 Oct 2017 10:29:03 +0000 (19:29 +0900)]
i2c: remove DECLARE_GLOBAL_DATA_PTR from i2c-uclass
No global pointer is used in this file.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Tom Rini [Tue, 17 Oct 2017 01:27:55 +0000 (21:27 -0400)]
Prepare v2017.11-rc2
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Tue, 17 Oct 2017 01:35:43 +0000 (21:35 -0400)]
configs: Resync with savedefconfig
Rsync all defconfig files using moveconfig.py
Signed-off-by: Tom Rini <trini@konsulko.com>
Heinrich Schuchardt [Fri, 13 Oct 2017 20:28:31 +0000 (22:28 +0200)]
test/py/tests/test_sleep.py: test time approximately
On qemu errors like
assert 2.
999650001525879 >= 3
occur.
According to the comment in the code the test is meant to be
approximate. So we should accept some milliseconds less.
Cc: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Heinrich Schuchardt [Fri, 13 Oct 2017 17:31:20 +0000 (19:31 +0200)]
scripts/get_maintainer.pl: update to current version
Update the script to version 0.26 (as of Linux v4.14-rc1)
Keep our "penguin_chief".
Keep our top_of_kernel_tree.
The negative forms of the command line parameters are described
when using --help.
New options are
--git-blame-signatures => when used with --git-blame,
also include all commit signers
--r => include reviewer(s) if any
--letters => print all matching 'letter' types
from all matching sections
File .get_maintainer.ignore can be used to specify
email addressees that shall be ignored.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Praneeth Bajjuri [Fri, 13 Oct 2017 03:47:05 +0000 (22:47 -0500)]
arm: dra76: fastboot: extend cpu type for getvar command
'commit
fa24eca1f20a ("omap: Add routine for setting fastboot variables")'
adds initial support and usage of "fastboot getvar" command
for DRA75x and DRA72x devices.
and
'commit
0f9e6aee9dbc ("arm: dra76: Add support for ES1.0 detection")'
adds initial dra76 device definition
This patch is to extend usage of "fastboot getvar" for DRA76 device.
Signed-off-by: Praneeth Bajjuri <praneeth@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Vishal Mahaveer [Fri, 13 Oct 2017 03:47:04 +0000 (22:47 -0500)]
omap-common: fastboot: extend cpu type for DRA71x rev 2.1
DRA71x processors are reduced pin and software compatible
derivative of DRA72 processors. Extend support for this
revision in "getvar cpu" command.
Signed-off-by: Vishal Mahaveer <vishalm@ti.com>
[praneeth@ti.com: rebase to u-boot master]
Signed-off-by: Praneeth Bajjuri <praneeth@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Vishal Mahaveer [Fri, 13 Oct 2017 03:47:03 +0000 (22:47 -0500)]
arm: dra7xx: Add vendor partition to Android GPT table for eMMC
Add vendor partition to Android GPT table for eMMC.
A Vendor image contains SoC-specific code and configuration.
Prior to Android 8.0, the vendor partition was optional ;
files belonging to these images were placed in boot.img or system.img
with symlinks (such as /vendor >/system/vendor ) when absent.
Android 8.0 makes the vendor partition mandatory
The goal is to modularize Android partitions with standard interface between
the Android Platform (on system.img ) and vendor-provided code(on vendor.img).
This standard interface enables the Android Platform to be updated
without affecting the SoC partitions. This makes it possible to upgrade a
device system.img from Android 8.0 to Android P while other images (such as
vendor.img) remain at Android 8.0. This modularity enables timely
Android platform upgrades (such as monthly security updates )
without requiring SoC/ODM partners to update SoC- and device-specific code.
Signed-off-by: Vishal Mahaveer <vishalm@ti.com>
Signed-off-by: Praneeth Bajjuri <praneeth@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Praneeth Bajjuri [Fri, 13 Oct 2017 03:47:02 +0000 (22:47 -0500)]
arm: am57xx: Add vendor partition to Android GPT table for eMMC
Add vendor partition to Android GPT table for eMMC.
A Vendor image contains SoC-specific code and configuration.
Prior to Android 8.0, the vendor partition was optional ;
files belonging to these images were placed in boot.img or system.img
with symlinks (such as /vendor >/system/vendor ) when absent.
Android 8.0 makes the vendor partition mandatory
The goal is to modularize Android partitions with standard interface between
the Android Platform (on system.img ) and vendor-provided code(on vendor.img).
This standard interface enables the Android Platform to be updated
without affecting the SoC partitions. This makes it possible to upgrade a
device system.img from Android 8.0 to Android P while other images (such as
vendor.img) remain at Android 8.0. This modularity enables timely
Android platform upgrades (such as monthly security updates )
without requiring SoC/ODM partners to update SoC- and device-specific code.
Signed-off-by: Praneeth Bajjuri <praneeth@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Heinrich Schuchardt [Thu, 12 Oct 2017 21:37:37 +0000 (23:37 +0200)]
usbtty: fix typos
Fix typos in USB tty driver.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Bin Meng [Thu, 12 Oct 2017 03:15:04 +0000 (20:15 -0700)]
tools: env: Add embedded.c to .gitignore
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Tom Rini [Wed, 11 Oct 2017 19:34:33 +0000 (15:34 -0400)]
cmd/pxe.c: Rework bootargs construction to clarify string checks
As the code currently stands, we first check that the length of the
given command line, along with ip_str/mac_str along with an additional 1
for the NULL termination will fit within the buffer we have, and if not,
we return an error. The way this code was originally written however
left Coverity "unhappy" due to using strcat rather than strncat.
Switching this to strncat however causes clang to be unhappy that we
aren't enforcing the "1" portion within strncat. Rather than further
re-work the code to include a "- 1" in this case as well, make the
strcat code only be done within the else side of the length test. This
keeps both clang and Coverity happy.
Fixes:
48ee0a87bc46 ("cmd/pxe.c: Rework initrd and bootargs handling slightly")
Signed-off-by: Tom Rini <trini@konsulko.com>
Masahiro Yamada [Wed, 11 Oct 2017 14:56:10 +0000 (23:56 +0900)]
kbuild: fix dependency of DT build
I saw a DT build issue report some time before [1]. I was able to
reproduce the bug, and figure out the root cause.
Since commit
6d427c6b1fa0 ("binman: Automatically include a U-Boot
.dtsi file"), invalid .*.cmd files are generated.
Since that commit, DTS files are put into sed and piped to CPP.
Because CPP reads the stream from stdin, -Wp,-MD,$(depfile).pre.tmp
option generates a depfile with the target name "-". This is not
the format expected by fixdep.
Use one more temporary file instead of using pipe. With this, deps_
in the .*.cmd will be fixed. Having a temp file name in source_ is
odd, but it is unsed in the build system. Not a big deal.
[1] https://lists.denx.de/pipermail/u-boot/2017-June/294451.html
Fiexes:
6d427c6b1fa0 ("binman: Automatically include a U-Boot .dtsi file")
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>