Christian König [Tue, 11 Sep 2018 09:50:57 +0000 (11:50 +0200)]
drm/amdgpu: fix shadow BO restoring
Don't grab the reservation lock any more and simplify the handling quite
a bit.
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Christian König [Tue, 11 Sep 2018 08:36:16 +0000 (10:36 +0200)]
drm/amdgpu: always recover VRAM during GPU recovery
It shouldn't add much overhead and we should make sure that critical
VRAM content is always restored.
Signed-off-by: Christian König <christian.koenig@amd.com>
Acked-by: Junwei Zhang <Jerry.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Christian König [Tue, 11 Sep 2018 08:31:54 +0000 (10:31 +0200)]
drm/amdgpu: shadow BOs don't need any alignment
They aren't directly used by the hardware.
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Christian König [Tue, 11 Sep 2018 08:30:31 +0000 (10:30 +0200)]
drm/amdgpu: always enable shadow BOs v2
Even when GPU recovery is disabled we could run into a manually
triggered recovery.
v2: keep accidental removed comments
Signed-off-by: Christian König <christian.koenig@amd.com>
Acked-by: Emily Deng <Emily.Deng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Christian König [Tue, 11 Sep 2018 07:30:46 +0000 (09:30 +0200)]
drm/amdgpu: stop pipelining VM PDs/PTs moves
We are going to need this for recoverable page fault handling and it
makes shadow handling during GPU reset much more easier.
Signed-off-by: Christian König <christian.koenig@amd.com>
Acked-by: Junwei Zhang <Jerry.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Christian König [Tue, 18 Sep 2018 08:38:09 +0000 (10:38 +0200)]
drm/amdgpu: remove fence fallback
DC doesn't seem to have a fallback path either.
So when interrupts doesn't work any more we are pretty much busted no
matter what.
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Evan Quan [Mon, 17 Sep 2018 06:59:54 +0000 (14:59 +0800)]
drm/amd/powerplay: retrieve the updated clock table after OD
With OD settings applied, the clock table will be updated accordingly.
We need to retrieve the new clock tables then.
Signed-off-by: Evan Quan <evan.quan@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Evan Quan [Thu, 13 Sep 2018 08:14:33 +0000 (16:14 +0800)]
drm/amd/powerplay: update OD to take voltage value instead of offset
With the latest SMC fw, we are able to get the voltage value for
specific frequency point. So, we update the OD relates to take
absolute voltage instead of offset.
Signed-off-by: Evan Quan <evan.quan@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Evan Quan [Wed, 12 Sep 2018 03:45:01 +0000 (11:45 +0800)]
drm/amd/powerplay: update OD feature judgement
Update the conditions to judge whether an OD feature
should be supported on vega20.
Signed-off-by: Evan Quan <evan.quan@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Hawking Zhang [Mon, 17 Sep 2018 12:19:48 +0000 (20:19 +0800)]
drm/amdgpu: fix unknown vram mem type for vega20
vega20 should use umc_info v3_3 instead of v3_1. There are
serveral versions of umc_info for vega series. Compared to
various versions of these structures, vram_info strucure is
unified for vega series. The patch switch to query mem_type
from vram_info structure for all the vega series dGPU.
Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Hawking Zhang [Mon, 17 Sep 2018 12:25:03 +0000 (20:25 +0800)]
drm/amdgpu: update vram_info structure in atomfirmware.h
atomfirmware has structure changes in varm_info. Updated it
to the latest one.
Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Mathieu Malaterre [Thu, 12 Apr 2018 19:33:33 +0000 (21:33 +0200)]
drm/radeon: change function signature to pass full range
In function ‘radeon_process_i2c_ch’ a comparison of a u8 value against
255 is done. Since it is always false, change the signature of this
function to use an `int` instead, which match the type used in caller:
`radeon_atom_hw_i2c_xfer`.
Fix the following warning triggered with W=1:
CC [M] drivers/gpu/drm/radeon/atombios_i2c.o
drivers/gpu/drm/radeon/atombios_i2c.c: In function ‘radeon_process_i2c_ch’:
drivers/gpu/drm/radeon/atombios_i2c.c:71:11: warning: comparison is always false due to limited range of data type [-Wtype-limits]
if (num > ATOM_MAX_HW_I2C_READ) {
^
Reviewed-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Mathieu Malaterre <malat@debian.org>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
A. Wilcox [Mon, 2 Jul 2018 03:44:52 +0000 (22:44 -0500)]
drm/amdgpu: use processed values for counting
adev->gfx.rlc has the values from rlc_hdr already processed by
le32_to_cpu. Using the rlc_hdr values on big-endian machines causes
a kernel Oops due to writing well outside of the array (0x24000000
instead of 0x24).
Signed-off-by: A. Wilcox <AWilcox@Wilcox-Tech.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Tom St Denis [Mon, 17 Sep 2018 18:07:00 +0000 (14:07 -0400)]
drm/amd/amdgpu: Avoid fault when allocating an empty buffer object
Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Christian König [Fri, 14 Sep 2018 19:06:50 +0000 (21:06 +0200)]
drm/amdgpu: drop size check
We no don't allocate zero sized kernel BOs any longer.
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Christian König [Fri, 14 Sep 2018 19:03:37 +0000 (21:03 +0200)]
drm/amdgpu: don't allocate zero sized kernel BOs
Just free the BO if the size should be zero.
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Christian König [Fri, 14 Sep 2018 18:44:17 +0000 (20:44 +0200)]
drm/amdgpu: stop crashing on GDS/GWS/OA eviction
Simply ignore any copying here.
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Christian König [Fri, 14 Sep 2018 13:43:57 +0000 (15:43 +0200)]
drm/amdgpu: add GDS, GWS and OA debugfs files
Additional to the existing files for VRAM and GTT.
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Christian König [Sat, 15 Sep 2018 08:04:54 +0000 (10:04 +0200)]
drm/amdgpu: fix parameter documentation for amdgpu_vm_free_pts
The function was modified without updating the documentation.
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Christian König [Sat, 15 Sep 2018 08:02:13 +0000 (10:02 +0200)]
drm/amdgpu: add amdgpu_vm_entries_mask v2
We can't get the mask for the root directory from the number of entries.
So add a new function to avoid that problem.
v2: fix typo in mask
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Leo Li [Wed, 5 Sep 2018 15:28:29 +0000 (11:28 -0400)]
drm/amd/display: Drop amdgpu_dm_prev_state struct
[Why]
It's not being used
[How]
Nuke it
Signed-off-by: Leo Li <sunpeng.li@amd.com>
Reviewed-by: David Francis <David.Francis@amd.com>
Acked-by: Leo Li <sunpeng.li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Leo Li [Wed, 5 Sep 2018 15:19:42 +0000 (11:19 -0400)]
drm/amd/display: Drop amdgpu_display_manager.dal member
[Why]
It's not being used anymore.
[How]
Nuke it
Signed-off-by: Leo Li <sunpeng.li@amd.com>
Reviewed-by: David Francis <David.Francis@amd.com>
Acked-by: Leo Li <sunpeng.li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Chiawen Huang [Wed, 5 Sep 2018 12:34:57 +0000 (20:34 +0800)]
drm/amd/display: add query HPD interface.
[Why]
current dc_link_detect function is not only detection but also update some link data.
[How]
added a pure get HPD state function.
Signed-off-by: Chiawen Huang <chiawen.huang@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Leo Li <sunpeng.li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Tony Cheng [Mon, 27 Aug 2018 17:35:31 +0000 (13:35 -0400)]
drm/amd/display: dc 3.1.66
Signed-off-by: Tony Cheng <tony.cheng@amd.com>
Reviewed-by: Steven Chiu <Steven.Chiu@amd.com>
Acked-by: Leo Li <sunpeng.li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Chiawen Huang [Wed, 29 Aug 2018 10:39:38 +0000 (18:39 +0800)]
drm/amd/display: add aux i2c event log.
[Why]
support i2c transition event log
[How]
refined aux REQ and REP events in aux flow.
commented REQ and REP events in i2c flow.
note: i2c event log is currently commented out. more work is required
to find an portocol parser to and generate event for the parser
Signed-off-by: Chiawen Huang <chiawen.huang@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Leo Li <sunpeng.li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Dmytro Laktyushkin [Wed, 29 Aug 2018 20:23:59 +0000 (16:23 -0400)]
drm/amd/display: stop using switch for different CS revisions
Clock sources currently have support for asic specific
function pointers. But actual separation into functions
was never performed, leaving us with giant functions that
rely on switch.
This change creates separate functions, removing switch use.
Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Leo Li <sunpeng.li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Charlene Liu [Mon, 27 Aug 2018 15:31:08 +0000 (11:31 -0400)]
drm/amd/display: Fix 3D stereo issues.
We were not providing the correct pixel clocks to DML for marks
calculation.
Signed-off-by: Charlene Liu <charlene.liu@amd.com>
Reviewed-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Acked-by: Leo Li <sunpeng.li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Christian König [Fri, 14 Sep 2018 10:54:33 +0000 (12:54 +0200)]
drm/amdgpu: revert "stop using gart_start as offset for the GTT domain"
Turned out the commit is incomplete and since we remove using the AGP
mapping from the GTT manager it is also not necessary any more.
This reverts commit
22d8bfafcc12dfa17b91d2e8ae4e1898e782003a.
Signed-off-by: Christian König <christian.koenig@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: James Zhu <James.Zhu@amd.com>
Tested-by: James Zhu <James.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Christian König [Fri, 14 Sep 2018 08:17:24 +0000 (10:17 +0200)]
drm/amdgpu: fix mask in GART location calculation
We need to mask the lower bits not the upper one.
Fixes:
ec210e3226dc0 drm/amdgpu: put GART away from VRAM v2
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: James Zhu <James.Zhu@amd.com>
Tested-by: James Zhu <James.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Deucher [Thu, 13 Sep 2018 16:01:28 +0000 (11:01 -0500)]
drm/amdgpu/display: return proper error codes in dm
Replace -1 with proper error codes.
Acked-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Deucher [Thu, 13 Sep 2018 20:41:57 +0000 (15:41 -0500)]
drm/amdgpu: simplify Raven, Raven2, and Picasso handling
Treat them all as Raven rather than adding a new picasso
asic type. This simplifies a lot of code and also handles the
case of rv2 chips with the 0x15d8 pci id. It also fixes dmcu
fw handling for picasso.
Acked-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Deucher [Thu, 13 Sep 2018 20:05:22 +0000 (15:05 -0500)]
drm/amdgpu/soc15: clean up picasso support
It's the same as raven so remove the duplicate case.
Acked-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
David Francis [Thu, 13 Sep 2018 19:37:50 +0000 (15:37 -0400)]
drm/amdgpu: Add DMCU to firmware query interface
DMCU firmware version can be read using the AMDGPU_INFO ioctl
or the amdgpu_firmware_info debugfs entry
Signed-off-by: David Francis <David.Francis@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
David Francis [Thu, 13 Sep 2018 19:36:27 +0000 (15:36 -0400)]
drm/amd/display: Add DMCU firmware version
Read the version number from the common firmware header and store
it in the dm struct
Signed-off-by: David Francis <David.Francis@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Vijetha Malkai [Thu, 13 Sep 2018 18:47:39 +0000 (14:47 -0400)]
drm/amdgpu: Style fixes to PRIME code documentation
* Use consistent capitalization in the description of function arguments
* Define and consistently use the BO acronym for buffer objects
* Some minor wording improvements
Signed-off-by: Vijetha Malkai <vijetha.malkai@amd.com>
[ Michel Dänzer: Made commit log more specific ]
Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Michel Dänzer [Wed, 12 Sep 2018 16:07:10 +0000 (18:07 +0200)]
drm/amdgpu: Initialize fences array entries in amdgpu_sa_bo_next_hole
The entries were only initialized once in amdgpu_sa_bo_new. If a fence
wasn't signalled yet in the first amdgpu_sa_bo_next_hole call, but then
got signalled before a later amdgpu_sa_bo_next_hole call, it could
destroy the fence but leave its pointer in the array, resulting in
use-after-free in amdgpu_sa_bo_new.
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Huang Rui [Tue, 19 Jun 2018 15:46:42 +0000 (10:46 -0500)]
drm/amdgpu: set CG flags for raven2 (v2)
Raven2 does not enable all of the CG flags that raven1 does.
v2: rebase (Alex)
Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Feifei Xu <Feifei.Xu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Evan Quan [Tue, 19 Jun 2018 15:41:00 +0000 (10:41 -0500)]
drm/amd/powerplay: disable raven2 force dpm level support (v2)
It's not supported yet.
v2: rebase (Alex)
Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Evan Quan [Tue, 19 Jun 2018 15:32:50 +0000 (10:32 -0500)]
drm/amd/powerplay: round up the Mhz convertion (v2)
Since the clock value there may be like 29999 10Khz.
v2: rebase (Alex)
Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Evan Quan [Fri, 15 Jun 2018 22:22:38 +0000 (17:22 -0500)]
drm/amd/powerplay: update smu10_verify_smc_interface() to be raven2 compatible
Check the raven2 version number as well.
Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Bhawanpreet Lakha [Mon, 22 Jan 2018 22:40:50 +0000 (17:40 -0500)]
drm/amd/display: Add DC config flag for Raven2 (v2)
Add DRM_AMD_DC_DCN1_01 config flag for Raven2
v2: Make DC select DRM_AMD_DC_DCN1_01 (Alex)
Signed-off-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Bhawanpreet Lakha [Mon, 22 Jan 2018 21:12:27 +0000 (16:12 -0500)]
drm/amd/display: Add Raven2 definitions in dc
Add Raven2 definitions in the dc code
Signed-off-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Huang Rui [Tue, 16 Jan 2018 02:42:58 +0000 (10:42 +0800)]
drm/amdgpu: fix the VM fault while write at the top of the invisible vram
Raven2 has a HW issue that it is unable to use the vram which is out of
MC_VM_SYSTEM_APERTURE_HIGH_ADDR. So here is the workaround that increase system
aperture high address to get rid of the VM fault and hardware hang.
Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Feifei Xu [Thu, 4 Jan 2018 10:36:40 +0000 (18:36 +0800)]
drm/amdgpu/gfx9: add raven2 golden setting
Golden register settings from the hw team.
Signed-off-by: Feifei Xu <Feifei.Xu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Feifei Xu [Thu, 4 Jan 2018 10:33:49 +0000 (18:33 +0800)]
drm/amdgpu/gfx9: add support for raven2 gfx firmware
use raven2 gfx firmware.
Signed-off-by: Feifei Xu <Feifei.Xu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Feifei Xu [Thu, 4 Jan 2018 10:13:41 +0000 (18:13 +0800)]
drm/amdgpu/sdma4: Add raven2 golden setting
Golden register settings from the hw team.
Signed-off-by: Feifei Xu <Feifei.Xu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Feifei Xu [Thu, 4 Jan 2018 10:05:35 +0000 (18:05 +0800)]
drm/amdgpu/sdma4: specify raven2 firmware.
use raven2 sdma firmware.
Signed-off-by: Feifei Xu <Feifei.Xu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Likun Gao [Tue, 5 Jun 2018 06:05:45 +0000 (14:05 +0800)]
drm/amdgpu: add psp support for raven2
Modified for using raven2_asd.bin to replace raven_asd.bin for raven2
Signed-off-by: Likun Gao <Likun.Gao@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Feifei Xu [Fri, 15 Jun 2018 21:01:41 +0000 (16:01 -0500)]
drm/amdgpu: add raven2 vcn firmware support
Specify raven2 vcn firmware on amdgpu_vce_sw_init.
Signed-off-by: Feifei Xu <Feifei.Xu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Feifei Xu [Thu, 4 Jan 2018 09:26:00 +0000 (17:26 +0800)]
drm/amdgpu: add raven2 to gpu_info firmware
Add gpu_info firmware for raven2.
Signed-off-by: Feifei Xu <Feifei.Xu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Deucher [Fri, 15 Jun 2018 22:28:44 +0000 (17:28 -0500)]
drm/amdgpu: set external rev id for raven2
It's different from raven1.
Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Feifei Xu <Feifei.Xu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Huang Rui [Fri, 15 Jun 2018 21:05:48 +0000 (16:05 -0500)]
drm/amdgpu: move get_rev_id at first before load gpu_info firmware
Rev id is used for identifying Raven2 series of chips. So we would better to
initialize it at first.
Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Deucher [Wed, 12 Sep 2018 18:51:25 +0000 (13:51 -0500)]
drm/amdgpu: use IP presence to free uvd and vce handles
Rather than checking the asic type, check whether the UVD
or VCE IP blocks exist. This way we don't have to update
the check with new asics that use VCN.
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Kenneth Feng [Thu, 6 Sep 2018 06:56:19 +0000 (14:56 +0800)]
drm/amdgpu: enable gfxoff in non-sriov and stutter mode by default
enable gfxoff in non-sriov and stutter mode by default
Signed-off-by: Kenneth Feng <kenneth.feng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Huang Rui [Mon, 9 Jul 2018 11:51:19 +0000 (19:51 +0800)]
drm/amdgpu: add new raven series device
This patch is to add new pci device for raven series.
Signed-off-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Likun Gao <Likun.Gao@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Huang Rui [Mon, 9 Jul 2018 12:00:05 +0000 (20:00 +0800)]
drm/amdgpu: add ip blocks for picasso (v2)
Add PCO IPs.
V2: enable VCN as well
Signed-off-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Likun Gao <Likun.Gao@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Kenneth Feng [Fri, 24 Aug 2018 08:44:11 +0000 (16:44 +0800)]
drm/amdgpu: enable vcn powergating for PCO
enable vcn pg
Signed-off-by: Kenneth Feng <kenneth.feng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Kenneth Feng [Mon, 20 Aug 2018 07:39:32 +0000 (15:39 +0800)]
drm/amdgpu: enable mmhub power gating
Remove some functions due to the design change.
All the mmhub power gating sequence is moved to
smu fw.Driver sends the message to enable mmhub
powergating.We can also skip the fw version check
since the old fw version is in a very early stage
and we don't use that fw for release.
Signed-off-by: Kenneth Feng <kenneth.feng@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Kenneth Feng [Fri, 10 Aug 2018 08:22:26 +0000 (16:22 +0800)]
drm/amdgpu: Enable SDMA power gating for PCO
Enable SDMA power gating
Signed-off-by: Kenneth Feng <kenneth.feng@amd.com>
Acked-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Kenneth Feng [Tue, 7 Aug 2018 09:05:22 +0000 (17:05 +0800)]
drm/amdgpu: Add pg support for gfxoff for PCO
Add pg support for gfxoff.
Signed-off-by: Kenneth Feng <kenneth.feng@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Likun Gao [Tue, 10 Jul 2018 12:34:10 +0000 (20:34 +0800)]
drm/amdgpu: add picasso for amdgpu kms
Add picasso for amdgpu kms
Signed-off-by: Likun Gao <Likun.Gao@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Likun Gao [Tue, 10 Jul 2018 12:30:42 +0000 (20:30 +0800)]
drm/amdgpu: add picasso support for sdma_v4
Add sdma support to picasso
Signed-off-by: Likun Gao <Likun.Gao@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Likun Gao [Tue, 10 Jul 2018 12:29:12 +0000 (20:29 +0800)]
drm/amdgpu: add picasso support for gfx_v9_0
Add gfx support to picasso
Signed-off-by: Likun Gao <Likun.Gao@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Likun Gao [Tue, 10 Jul 2018 12:26:41 +0000 (20:26 +0800)]
drm/amdgpu: add picasso support for gmc
Same as raven.
Signed-off-by: Likun Gao <Likun.Gao@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Likun Gao [Tue, 10 Jul 2018 12:25:24 +0000 (20:25 +0800)]
drm/amdgpu: add clockgating support for picasso
Treat it the same as raven for now.
Signed-off-by: Likun Gao <Likun.Gao@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Likun Gao [Tue, 10 Jul 2018 12:17:13 +0000 (20:17 +0800)]
drm/amdgpu: add picasso support for vcn
Add vcn support for picasso.
Signed-off-by: Likun Gao <Likun.Gao@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Likun Gao [Tue, 10 Jul 2018 12:15:45 +0000 (20:15 +0800)]
drm/amdgpu: add picasso ucode loading method
Same as raven.
Signed-off-by: Likun Gao <Likun.Gao@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Likun Gao [Tue, 10 Jul 2018 12:12:38 +0000 (20:12 +0800)]
drm/amdgpu: initilize picasso psp firmwares support
Same as raven for now.
Signed-off-by: Likun Gao <Likun.Gao@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Likun Gao [Tue, 10 Jul 2018 11:25:29 +0000 (19:25 +0800)]
drm/amdgpu: Add support of powerplay for picasso
add powerplay support for picasso, treat it the same as raven now.
Signed-off-by: Likun Gao <Likun.Gao@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Likun Gao [Tue, 10 Jul 2018 12:32:06 +0000 (20:32 +0800)]
drm/amd/display/dm: add picasso support
Add support for picasso to the display manager.
Signed-off-by: Likun Gao <Likun.Gao@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Likun Gao [Tue, 10 Jul 2018 12:20:16 +0000 (20:20 +0800)]
drm/amdgpu: add picasso support for vm
Add vm support for picasso.
Signed-off-by: Likun Gao <Likun.Gao@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Likun Gao [Tue, 10 Jul 2018 12:22:36 +0000 (20:22 +0800)]
drm/amdgpu: add soc15 support for picasso
Add the IP blocks, clock and powergating flags, and common clockgating support.
Signed-off-by: Likun Gao <Likun.Gao@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Likun Gao [Tue, 10 Jul 2018 12:10:05 +0000 (20:10 +0800)]
drm/amdgpu: add picasso to asic_type enum
Add picasso to amd_asic_type enum and amdgpu_asic_name[].
Signed-off-by: Likun Gao <Likun.Gao@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Christian König [Mon, 10 Sep 2018 18:02:46 +0000 (20:02 +0200)]
drm/amdgpu: use a single linked list for amdgpu_vm_bo_base
Instead of the double linked list. Gets the size of amdgpu_vm_pt down to
64 bytes again.
We could even reduce it down to 32 bytes, but that would require some
rather extreme hacks.
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Acked-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Christian König [Mon, 10 Sep 2018 14:07:57 +0000 (16:07 +0200)]
drm/amdgpu: remove amdgpu_bo_list_entry.robj (v2)
We can get that just by casting tv.bo.
v2: squash in kfd fix (Alex)
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Christian König [Wed, 12 Sep 2018 19:19:57 +0000 (21:19 +0200)]
drm/ttm: once more fix ttm_bo_bulk_move_lru_tail
While cutting the lists we sometimes accidentally added a list_head from
the stack to the LRUs, effectively corrupting the list.
Remove the list cutting and use explicit list manipulation instead.
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-and-Tested: Huang Rui <ray.huang@amd.com>
Tested-by: Mike Lothian <mike@fireburn.co.uk>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Andrey Grodzovsky [Wed, 12 Sep 2018 20:38:57 +0000 (16:38 -0400)]
drm/amd/display: Fix pflip IRQ status after gpu reset.
Problem:
After GPU reset pflip completion IRQ is disabled and hence
any subsequent mode set or plane update leads to hang.
Fix:
Unless acrtc->otg_inst is initialized to -1 during display
block initializtion then durng resume from GPU reset
amdgpu_irq_gpu_reset_resume_helper will override CRTC 0 pflip
IRQ value with whatever value was on every other unused CRTC because
dm_irq_state will do irq_source = dal_irq_type + acrtc->otg_inst
where acrtc->otg_inst will be 0 for every unused CRTC.
Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Christian König [Fri, 7 Sep 2018 18:34:17 +0000 (20:34 +0200)]
drm/amdgpu: allow fragment processing for invalid PTEs
That should improve the PRT performance on Vega quite a bit.
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Acked-by: Junwei Zhang <Jerry.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Christian König [Fri, 7 Sep 2018 12:21:15 +0000 (14:21 +0200)]
drm/amdgpu: use the maximum possible fragment size on Vega/Raven
The fragment size controls only the L1 on Vega/Raven and we now don't
have any extra overhead any more because of larger fragments.
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Acked-by: Junwei Zhang <Jerry.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Christian König [Thu, 6 Sep 2018 15:13:06 +0000 (17:13 +0200)]
drm/amdgpu: meld together VM fragment and huge page handling
This optimizes the generating of PTEs by walking the hierarchy only once
for a range and making changes as necessary.
It allows for both huge (2MB) as well giant (1GB) pages to be used on
Vega and Raven.
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Acked-by: Junwei Zhang <Jerry.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Christian König [Mon, 3 Sep 2018 12:34:51 +0000 (14:34 +0200)]
drm/amdgpu: use leaf iterator for filling PTs
Less overhead and is the starting point for further cleanups and
improvements.
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Christian König [Sat, 8 Sep 2018 11:05:34 +0000 (13:05 +0200)]
drm/amdgpu: use the DFS iterator in amdgpu_vm_invalidate_pds v2
Less code and easier to maintain.
v2: rename the function as well
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Christian König [Thu, 6 Sep 2018 13:35:13 +0000 (15:35 +0200)]
drm/amdgpu: use dfs iterator to free PDs/PTs
Allows us to free all PDs/PTs without recursion.
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Christian König [Sat, 1 Sep 2018 10:03:37 +0000 (12:03 +0200)]
drm/amdgpu: use leaf iterator for allocating PD/PT
Less code and allows for easier error handling.
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Christian König [Sat, 1 Sep 2018 08:36:48 +0000 (10:36 +0200)]
drm/amdgpu: add some VM PD/PT iterators v2
Both a leaf as well as dfs iterator to walk over all the PDs/PTs.
v2: update comments and fix for_each_amdgpu_vm_pt_dfs_safe
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
James Zhu [Mon, 10 Sep 2018 16:53:25 +0000 (12:53 -0400)]
drm/amdgpu:Add error message when register failed to reach expected value
Add error message when register failed to reach expected value, It will
help discover potential issue.
Signed-off-by: James Zhu <James.Zhu@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
kbuild test robot [Wed, 12 Sep 2018 00:59:07 +0000 (08:59 +0800)]
drm/amd/display: fix ptr_ret.cocci warnings
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c:771:1-3: WARNING: PTR_ERR_OR_ZERO can be used
Use PTR_ERR_OR_ZERO rather than if(IS_ERR(...)) + PTR_ERR
Generated by: scripts/coccinelle/api/ptr_ret.cocci
Fixes:
e498eb713604 ("drm/amd/display: Add support for hw_state logging via debugfs")
CC: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Signed-off-by: kbuild test robot <fengguang.wu@intel.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
David Francis [Tue, 11 Sep 2018 17:49:49 +0000 (13:49 -0400)]
drm/amd: Add DM DMCU support
DMCU (Display Microcontroller Unit) is a GPU chip involved in
eDP features like Adaptive Backlight Modulation and Panel Self
Refresh.
DC is already fully equipped to initialize DMCU as long as the
firmware is loaded.
At the moment only the raven firmware is available.
A single .bin file is loaded by the kernel's loading mechanism
and split into two ucodes according to the header.
DMCU is optional, so if the firmware is not found, no error or
warning is raised.
Signed-off-by: David Francis <David.Francis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
David Francis [Tue, 11 Sep 2018 17:46:41 +0000 (13:46 -0400)]
drm/amd: Add PSP DMCU support
DMCU (Display Microcontroller Unit) is a GPU chip involved in
eDP features like Adaptive Backlight Modulation and Panel Self
Refresh.
PSP is already equipped to handle DMCU firmware loading, all
that is needed is to translate between the new DMCU ucode ID and
the equivalent psp_gfx_fw_type.
Signed-off-by: David Francis <David.Francis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
David Francis [Tue, 11 Sep 2018 17:41:01 +0000 (13:41 -0400)]
drm/amd: Add ucode DMCU support
DMCU (Display Microcontroller Unit) is a GPU chip involved in
eDP features like Adaptive Backlight Modulation and Panel Self
Refresh.
DMCU has two pieces of firmware: the ERAM and the interrupt
vectors, which must be loaded seperately.
To this end, the DMCU firmware has a custom header and parsing
logic similar to MEC, to extract the two ucodes from a single
struct firmware.
Signed-off-by: David Francis <David.Francis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Oak Zeng [Thu, 6 Sep 2018 03:51:23 +0000 (23:51 -0400)]
drm/amdgpu: Move fault hash table to amdgpu vm
In stead of share one fault hash table per device, make it
per vm. This can avoid inter-process lock issue when fault
hash table is full.
Change-Id: I5d1281b7c41eddc8e26113e010516557588d3708
Signed-off-by: Oak Zeng <Oak.Zeng@amd.com>
Suggested-by: Christian Konig <Christian.Koenig@amd.com>
Suggested-by: Felix Kuehling <Felix.Kuehling@amd.com>
Reviewed-by: Christian Konig <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Chunming Zhou [Tue, 11 Sep 2018 09:22:40 +0000 (17:22 +0800)]
drm/amdgpu: move cs dependencies front a bit
cs dependencies handling doesn't need in vm resv
Signed-off-by: Chunming Zhou <david1.zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Christian König [Fri, 7 Sep 2018 12:27:05 +0000 (14:27 +0200)]
drm/amdgpu: try allocating VRAM as power of two
Try to allocate VRAM in power of two sizes and only fallback to vram
split sizes if that fails.
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Felix Kuehling <felix.kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Andrey Grodzovsky [Mon, 10 Sep 2018 22:43:58 +0000 (18:43 -0400)]
drm/amdgpu: Fix SDMA TO after GPU reset v3
After GPU reset amdgpu_vm_clear_bo triggers VM flush
but job->vm_pd_addr is not set causing SDMA TO.
v2:
Per advise by Christian König avoid flushing VM for jobs where
job->vm_pd_addr wasn't explicitly set.
v3:
Shortcut vm_flush_needed early.
Fixes cbd5285 drm/amdgpu: move setting the GART addr into TTM.
Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Christian König [Thu, 30 Aug 2018 13:55:54 +0000 (15:55 +0200)]
drm/amdgpu: add amdgpu_vm_update_func
Add helper to call the update function for both BO and shadow.
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Christian König [Thu, 30 Aug 2018 13:55:54 +0000 (15:55 +0200)]
drm/amdgpu: add amdgpu_vm_pt_parent helper
Add a function to get the parent of a PD/PT.
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Christian König [Mon, 10 Sep 2018 13:52:55 +0000 (15:52 +0200)]
drm/amdgpu: fix error handling in amdgpu_cs_user_fence_chunk
Slowly leaking memory one page at a time :)
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
shaoyunl [Fri, 7 Sep 2018 16:00:07 +0000 (12:00 -0400)]
drm/amdkfd: Only add bi-directional iolink on GPU with XGMI or largebar (v2)
v2: compile fix
Signed-off-by: shaoyunl <Shaoyun.Liu@amd.com>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Shaoyun Liu [Mon, 13 Aug 2018 18:04:11 +0000 (14:04 -0400)]
drm/amdkfd: Generate xGMI direct iolink
Generate xGMI iolink for upper level usage
Signed-off-by: Shaoyun Liu <Shaoyun.Liu@amd.com>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Shaoyun Liu [Mon, 13 Aug 2018 18:02:17 +0000 (14:02 -0400)]
drm/amdkfd: Add new iolink type defines
Update the iolink type defines according to the new thunk spec
Signed-off-by: Shaoyun Liu <Shaoyun.Liu@amd.com>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>