Lubomir Rintel [Sat, 18 Jul 2020 20:50:14 +0000 (22:50 +0200)]
ARM: dts: mmp2: Add SSPA nodes
There are two I2S-capable audio serial port blocks.
Link: https://lore.kernel.org/r/20200718205019.184927-9-lkundrak@v3.sk
Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Lubomir Rintel [Sat, 18 Jul 2020 20:50:13 +0000 (22:50 +0200)]
ARM: dts: mmp2: Add Audio Clock controller
This device generates the audio codec master clock and bit clock.
Link: https://lore.kernel.org/r/20200718205019.184927-8-lkundrak@v3.sk
Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Lubomir Rintel [Sat, 18 Jul 2020 20:50:12 +0000 (22:50 +0200)]
ARM: dts: mmp2: Add DMA nodes
There is a 16-channel peripheral DMA controller along with two-channel
audio DMA engines.
Link: https://lore.kernel.org/r/20200718205019.184927-7-lkundrak@v3.sk
Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Lubomir Rintel [Sat, 18 Jul 2020 20:50:11 +0000 (22:50 +0200)]
ARM: dts: mmp2: Add Audio SRAM
This memory is region is where the two-channel audio DMA can pump sound
samples into the SSPA's internal FIFO.
Link: https://lore.kernel.org/r/20200718205019.184927-6-lkundrak@v3.sk
Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Lubomir Rintel [Sat, 18 Jul 2020 20:50:10 +0000 (22:50 +0200)]
ARM: dts: mmp2: Extend the MPMU reg range
The ACGR register is at the offset of 0x1024, beyond the 4k originally
assigned to the MPMU range.
Link: https://lore.kernel.org/r/20200718205019.184927-5-lkundrak@v3.sk
Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Lubomir Rintel [Sat, 18 Jul 2020 20:50:09 +0000 (22:50 +0200)]
ARM: dts: mmp2: Add #power-domain-cells to /clocks
The power management unit, described by the soc_clocks node, controls the
power to the peripherals by the means of power domains with a single
cell -- the domain number.
Link: https://lore.kernel.org/r/20200718205019.184927-4-lkundrak@v3.sk
Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Lubomir Rintel [Sat, 18 Jul 2020 20:50:08 +0000 (22:50 +0200)]
ARM: dts: mmp2-olpc-xo-1-75: Delete #address-cells from ssp3
On the XO-1.75, this node represents a bus interface that operates in slave
mode and thus is only able to accommodate a single subnode; no address
cells are necessary.
The Documentation/devicetree/bindings/spi/spi-controller.yaml binding
prefers that we drop the property instead of setting it to zero.
This fixes a DT validation error:
arch/arm/boot/dts/mmp2-olpc-xo-1-75.dt.yaml: spi@
d4037000:
{ ... } is valid under each of {'required': ['spi-slave']},
{'required': ['#address-cells']}
We also need to drop #size-cells:
arch/arm/boot/dts/mmp2-olpc-xo-1-75.dt.yaml: spi@
d4037000:
'#address-cells' is a dependency of '#size-cells'
Link: https://lore.kernel.org/r/20200718205019.184927-3-lkundrak@v3.sk
Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Lubomir Rintel [Sat, 18 Jul 2020 20:50:07 +0000 (22:50 +0200)]
ARM: dts: mmp2-olpc-xo-1-75: Fix camera I2C node validation
mmp2-olpc-xo-1-75.dt.yaml: camera_i2c: $nodename:0:
'camera_i2c' does not match '^i2c(@.*)?'
mmp2-olpc-xo-1-75.dt.yaml: camera_i2c: 'sda-gpios' is a required property
mmp2-olpc-xo-1-75.dt.yaml: camera_i2c: 'scl-gpios' is a required property
The "gpios" property actually was documented as deprecated, but got dropped
in commit
0175ce4a58d6 ("dt-bindings: i2c: Convert i2c-gpio binding to
json-schema"). It's probably best kept forgotten though.
Link: https://lore.kernel.org/r/20200718205019.184927-2-lkundrak@v3.sk
Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Wed, 22 Jul 2020 20:03:23 +0000 (22:03 +0200)]
Merge tag 'ux500-dts-for-v5.9-1' of git://git./linux/kernel/git/linusw/linux-stericsson into arm/dt
Ux500 DTS changes for the v5.9 kernel series:
- Add touchkey to the Samsung Golden.
- Fix up the supply nodes for the AB8500 PWM devices.
- Fix up the cache controller node names.
- Fix the Samsing Skomer accelerometer mounting matrix.
* tag 'ux500-dts-for-v5.9-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson:
ARM: dts: ux500-skomer: Correct accel mounting matrix
ARM: dts: ste: Align L2 cache-controller nodename with dtschema
ARM: dts: ux500: Supply nodes for the other 2 AB8500 PWM devices
ARM: dts: ux500: samsung-golden: Add touchkey
Link: https://lore.kernel.org/r/CACRpkdZZgZ1LeOK5zFj5Z6Mh=RVz37hZ-7Z4DQNGC1uaiEVTeA@mail.gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Wed, 22 Jul 2020 20:02:00 +0000 (22:02 +0200)]
Merge tag 'stm32-dt-for-v5.9-1' of git://git./linux/kernel/git/atorgue/stm32 into arm/dt
STM32 DT updates for v5.9, round 1
Highlights:
----------
MCU part:
-Enable stmpe811 on stm32f429
-Enable l3gd20-gyro on stm32f429
-Enable panel-ilitek-9341 on stm32f429
-Fixes for yaml validation (leds, nodes names,
remove useless bindings ...)
-Add stm32xxx compatibles for syscon nodes
MPU part:
-Add support for usb role switch to dwc2
-Add stm32xxx compatibles for syscon nodes
-Update uart4 pin configuration for low power mode
used by dkx and ed1 ST boards
-Fix uart nodes ordering and uart7_pins_a comments
-Add the support of uart instances available on STM32MP157 boards:
- usart3 on stm32mp157c-ev1, stm32mp157a-dk1, and stm32mp157c-dk2
- uart7 on stm32mp157a-dk1 and stm32mp157c-dk2
- usart2 on stm32mp157c-dk2
-Configure I2C5 on stm32mp15 DK boards
* tag 'stm32-dt-for-v5.9-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32: (38 commits)
ARM: dts: stm32: enable usb-role-switch on USB OTG on stm32mp15xx-dkx
ARM: dts: stm32: Add compatibles for syscon for stm32mp151
ARM: dts: stm32: Add compatibles for syscon for stm32h743
ARM: dts: stm32: Add compatibles for syscon for stm32f746
ARM: dts: stm32: Add compatibles for syscon for stm32f426
dt-bindings: arm: stm32: Add compatibles for syscon nodes
ARM: dts: stm32: Fix spi4 pins in stm32mp15-pinctrl
ARM: dts: stm32: configure i2c5 support on stm32mp15xx-dkx
ARM: dts: stm32: add usart2 node to stm32mp157c-dk2
ARM: dts: stm32: add uart7 support to stm32mp15xx-dkx boards
ARM: dts: stm32: add usart3 node to stm32mp157c-ev1
ARM: dts: stm32: add usart3 node to stm32mp15xx-dkx boards
ARM: dts: stm32: add usart2, usart3 and uart7 pins in stm32mp15-pinctrl
ARM: dts: stm32: cosmetic updates in stm32mp15-pinctrl
ARM: dts: stm32: fix uart7_pins_a comments in stm32mp15-pinctrl
ARM: dts: stm32: fix uart nodes ordering in stm32mp15-pinctrl
ARM: dts: stm32: Update UART4 pin states on stm32mp15xx-dkx
ARM: dts: stm32: Update pin states for uart4 on stm32mp157c-ed1
ARM: dts: stm32: update uart4 pin configuration for low power on stm32mp157
dt-bindings: usb: dwc2: Fix issues for stm32mp15x SoC
...
Link: https://lore.kernel.org/r/8a9bb27b-fc08-126a-11f7-01354e8577e1@st.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Wed, 22 Jul 2020 19:59:59 +0000 (21:59 +0200)]
Merge tag 'samsung-dt64-5.9' of git://git./linux/kernel/git/krzk/linux into arm/dt
Samsung DTS ARM64 changes for v5.9
1. Enable UFS (Universal Flash Storage) on Exynos7 Espresso board.
2. Fix silent hang after boot off Exynos7 Espresso board.
3. Minor DTS fixes and adjustments with dtschema.
* tag 'samsung-dt64-5.9' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
arm64: dts: exynos: Add unit address to soc node and move thermal zones on Exynos7
arm64: dts: exynos: Add unit address to soc node on Exynos5433
arm64: dts: exynos: Remove DMA controller bus node name to fix dtschema warnings
arm64: dts: exynos: Keep LDO12 always-on on Espresso
arm64: dts: exynos: Fix silent hang after boot on Espresso
arm64: dts: exynos: Remove generic arm,armv8-pmuv3 compatible
arm64: dts: exynos: Describe PWM interrupts on Exynos7
arm64: dts: exynos: Add UFS node to Exynos7
Link: https://lore.kernel.org/r/20200721180900.13844-3-krzk@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Wed, 22 Jul 2020 19:58:56 +0000 (21:58 +0200)]
Merge tag 'samsung-dt-5.9' of git://git./linux/kernel/git/krzk/linux into arm/dt
Samsung DTS ARM changes for v5.9
1. Enable Bluetooth on Artik5 (Exynos3250).
2. Enable accelerometer on Aries boards (Samsung Galaxy S family,
S5Pv210); multiple fixes.
3. Fix highest frequencies on Exynos5800.
4. Fix rare USB instability on Odroid XU3 family (Exynos5422).
5. Minor DTS fixes and adjustments with dtschema.
* tag 'samsung-dt-5.9' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
ARM: dts: exynos: Replace HTTP links with HTTPS ones
ARM: dts: exynos: Disable frequency scaling for FSYS bus on Odroid XU3 family
ARM: dts: exynos: Define fixed regulators in root node for consistency in SMDK5420
ARM: dts: exynos: Define fixed regulators in root node for consistency in Arndale
ARM: dts: exynos: Define fixed regulators in root node for consistency in Origen
ARM: dts: exynos: Remove DMA controller bus node name to fix dtschema warnings
ARM: dts: exynos: Fix missing empty reg/ranges property regulators on Trats
ARM: dts: exynos: Align L2 cache-controller nodename with dtschema
ARM: dts: s5pv210: Correct BCM4329 bluetooth node
ARM: dts: s5pv210: Add BMA023 accelerometer support to Aries
ARM: dts: s5pv210: Add support for GP2A light sensor on Aries
ARM: dts: s5pv210: Correct fuelgauge definition on Aries
ARM: dts: s5pv210: Add interrupt-controller property to gph3
ARM: dts: exynos: Enable Bluetooth support for Artik5 board
ARM: dts: exynos: Extend all Exynos5800 A15's OPPs with max voltage data
Link: https://lore.kernel.org/r/20200721180900.13844-2-krzk@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Wed, 22 Jul 2020 19:58:15 +0000 (21:58 +0200)]
Merge tag 'qcom-dts-for-5.9' of git://git./linux/kernel/git/qcom/linux into arm/dt
Qualcomm ARM dts updates for v5.9
Add QFPROM and ethernet for ipq8064 and a new DTS for the MikroTik
RB3011 using the same platform.
* tag 'qcom-dts-for-5.9' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux:
ARM: dts: qcom: add qfprom definition to ipq806x
ARM: dts: qcom: Add MikroTik RB3011
ARM: dts: qcom: add ethernet definitions to ipq8064
Link: https://lore.kernel.org/r/20200721045032.3430395-1-bjorn.andersson@linaro.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Wed, 22 Jul 2020 19:55:45 +0000 (21:55 +0200)]
Merge tag 'qcom-arm64-for-5.9' of git://git./linux/kernel/git/qcom/linux into arm/dt
Qualcomm ARM64 DT updates for v5.9
For SM8250 this adds the main pinctrl/gpio block (TLMM), I2C and SPI
controllers, the CPU subsytem watchdog, inter-processor signalling
controller (IPCC), always-on power/clock controller (AOSS),
inter-processor state machine (SMP2P), defines remoteproc controls
for audio, compute and sensor processors and base definition for the
PM8009 PMIC. It also does fix up a few minor issues from the initial
merge of the platform support.
SC7180 and SDM845 gains interconnect paths and performance tables
defined for display, QUP, QSPI, SDHC and CPUs.
SC7180 gains WiFi support and some cleanups related to the modem
remoteproc.
SDM845 gains inline crypto engine support for UFS, LAB/IBB
regulators for powering display panels, remoteproc relocation debug
support
SM8150 gains USB controller support and the two related PHYs, as well as
thermal zones and throttling support.
IPQ8074 gains USB and SDHCI support.
MSM8916 is being cleaned up, gains interconnect providers and Samsung
A2015 gains accelerometer and magnetometer support.
MSM8994 gains PSCI, SDHCI, SPMI support, I2C, SPI, UART gains DMA
support and the DTS files are cleaned up.
The SDM630 platform DTS is at last merged and initial support for Sony
Xperia 10, 10 Plus, XA2, XA2 Plus and XA2 Ultra is added.
* tag 'qcom-arm64-for-5.9' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (66 commits)
arm64: dts: qcom: pmi8998: Add nodes for LAB and IBB regulators
arm64: dts: sc7180: Add DSI and MDP OPP tables and power-domains
arm64: dts: sdm845: Add DSI and MDP OPP tables and power-domains
arm64: dts: qcom: sc7180: Move the fixed-perm property to SoC dtsi
arm64: dts: qcom: msm8916-samsung-a2015: Add accelerometer/magnetometer
arm64: dts: qcom: msm8916: Use higher I2C drive-strength only on DB410c
arm64: dts: qcom: msm8916: Simplify pinctrl configuration
arm64: dts: msm8916-samsung/longcheer: Move pinctrl/regulators to end of file
arm64: dts: qcom: sm8250: Drop tcsr_mutex syscon
arm64: dts: qcom: sc7180: Add missing properties for Wifi node
arm64: dts: qcom: Fix WiFi supplies on sc7180-idp
arm64: dts: sdm845: add Inline Crypto Engine registers and clock
arm64: dts: sc7180: Add sdhc opps and power-domains
arm64: dts: sdm845: Add sdhc opps and power-domains
arm64: dts: sc7180: Add OPP table for all qup devices
arm64: dts: sdm845: Add OPP table for all qup devices
arm64: dts: sc7180: Add qspi opps and power-domains
arm64: dts: sdm845: Add qspi opps and power-domains
arm64: dts: qcom: sdm845: Add cpu OPP tables
arm64: dts: qcom: sc7180: Drop the unused non-MSA SID
...
Link: https://lore.kernel.org/r/20200721044934.3430084-1-bjorn.andersson@linaro.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Wed, 22 Jul 2020 19:53:43 +0000 (21:53 +0200)]
Merge tag 'hisi-arm64-dt-for-5.9' of git://github.com/hisilicon/linux-hisi into arm/dt
ARM64: DT: Hisilicon SoCs DT updates for 5.9
- Refactor hi6220-hikey dts to use phandles for overriding nodes
- Align UART node name to fix dtschema validator warnings for hi6220
- Add basic usb gadget support on hikey960
- Update adv7533 nodes to meet with the binding for hikey and hikey960
* tag 'hisi-arm64-dt-for-5.9' of git://github.com/hisilicon/linux-hisi:
arm64: dts: hisilicon: hikey: fixes to comply with adi, adv7533 DT binding
dts: hi3660: Add support for basic usb gadget on Hikey960
arm64: dts: hisilicon: Align UART nodename with dtschema
arm64: dts: hisilicon: Use phandles for overriding nodes in hi6220
Link: https://lore.kernel.org/r/5F165E8E.3030503@hisilicon.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Wed, 22 Jul 2020 19:51:57 +0000 (21:51 +0200)]
Merge tag 'hisi-arm32-dt-for-5.9' of git://github.com/hisilicon/linux-hisi into arm/dt
ARM: DT: Hisilicon ARM32 SoCs updates for v5.9
- Update L2 cache controller nodes to fix dtschema validator warnings
for hi3620 and hix5hd2
* tag 'hisi-arm32-dt-for-5.9' of git://github.com/hisilicon/linux-hisi:
ARM: dts: hisilicon: Align L2 cache-controller nodename with dtschema
Link: https://lore.kernel.org/r/5F165FA1.2030301@hisilicon.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Wed, 22 Jul 2020 19:50:35 +0000 (21:50 +0200)]
Merge tag 'sunxi-dt-for-5.9-1' of git://git./linux/kernel/git/sunxi/linux into arm/dt
Our usual number of patches to improve the Allwinner Device Tree
support, including:
- CPUFreq / Thermal throttling support for the H5
- Touchscreen support for the Pinephone
- New boards: PinePhone v1.2
* tag 'sunxi-dt-for-5.9-1' of git://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux:
arm64: dts: allwinner: h5: bananapi-m2-plus-v1.2: Tie in CPU OPPs
arm64: dts: allwinner: h5: libretech-all-h3-cc: Tie in CPU OPPs
arm64: dts: allwinner: h5: Add CPU Operating Performance Points table
arm64: dts: allwinner: h5: Add trip and cooling maps to CPU thermal zones
arm64: dts: allwinner: h5: Add clock to CPU cores
ARM: dts: sunxi: bananapi-m2-plus-v1.2: Fix CPU supply voltages
ARM: dts: sunxi: bananapi-m2-plus-v1.2: Add regulator supply to all CPU cores
ARM: dts: sunxi: libretech-all-h3-cc: Add regulator supply to all CPU cores
arm64: dts: sun50i-pinephone: dldo4 must not be >= 1.8V
arm64: dts: allwinner: Add support for PinePhone revision 1.2
dt-bindings: arm: sunxi: Add PinePhone 1.2 bindings
arm64: dts: sun50i-a64-pinephone: Add touchscreen support
arm64: dts: sun50i-a64-pinephone: Enable LCD support on PinePhone
ARM: dts: orange-pi-zero-plus2: add leds configuration
ARM: dts: orange-pi-zero-plus2: enable USB OTG port
Link: https://lore.kernel.org/r/fa48ffcb-3404-41bb-b065-a16717cf5688.lettre@localhost
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Wed, 22 Jul 2020 19:49:58 +0000 (21:49 +0200)]
Merge tag 'versatile-for-v5.9' of git://git./linux/kernel/git/linusw/linux-integrator into arm/dt
Versatile DTS changes for the v5.9 kernel cycle, essentially
just a single patch fixing up the node names for schema.
* tag 'versatile-for-v5.9' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-integrator:
ARM: dts: arm-realview: Align L2 cache-controller nodename with dtschema
Link: https://lore.kernel.org/r/CACRpkdbkM9ZmuG2FnBmO7upcJfnqq2oSLDCFDXC5b3K+dtps9Q@mail.gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Wed, 22 Jul 2020 19:48:15 +0000 (21:48 +0200)]
Merge tag 'imx-dt64-5.9' of git://git./linux/kernel/git/shawnguo/linux into arm/dt
i.MX arm64 device tree update for 5.9:
- Update i.MX8M OCOTP device node name to match .yaml schema.
- Add ftm_alarm0 device support for layerscape SoCs.
- Add DSPI controller support for lx2160a device.
- A series from Peng Fan to add aliases for various devices on i.MX8
SoCs.
- Add Hantro G1/G2 VPU device support for imx8mq.
- Add more thermal zone support for ls1028a, ls1043a and ls1046a.
- Other small random changes.
* tag 'imx-dt64-5.9' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: (26 commits)
arm64: dts: lx2160a-rdb: fix shunt-resistor value
arm64: dts: ls1028a-qds: Add DSPI flash nodes
arm64: dts: lx2160a: Increase configuration space size
arm64: dts: zii-ultra: update MDIO speed and preamble
arm64: dts: ls1043a: update USB nodes status to match board config
arm64: dts: imx8mn-evk: add pca9450 for i.mx8mn-evk board
arm64: dts: imx8mp: add ddr pmu device node
arm64: dts: ls1043a: add more thermal zone support
arm64: dts: ls1046a: add more thermal zone support
arm64: dts: layerscape: add ftm_alarm0 node
arm64: dts: ls1028a: Add ftm_alarm0 DT node
arm64: dts: lx2160a: add ftm_alarm0 DT node
arm64: dts: lx2160a: add DT node for all DSPI controller
arm64: dts: lx2160a: add dspi controller DT nodes
arm64: dts: imx8mp: Add fallback compatible to ocotp node
arm64: dts: imx8qxp: Add ethernet alias
arm64: dts: imx8qxp: add i2c aliases
arm64: dts: imx8qxp: add alias for lsio MU
arm64: dts: imx8m: add mu node
arm64: dts: imx8m: change ocotp node name on i.MX8M SoCs
...
Link: https://lore.kernel.org/r/20200720085536.24138-4-shawnguo@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Wed, 22 Jul 2020 19:46:21 +0000 (21:46 +0200)]
Merge tag 'imx-dt-5.9' of git://git./linux/kernel/git/shawnguo/linux into arm/dt
i.MX device tree update for 5.9:
- New board support: Protonic PRTI6Q/WD2/VT7/RVT and MYiR MYS-6ULX SBC.
- Update IIM, OCOTP and SD/MMC device node name to match .yaml bindings.
- Make tempmon node as child of anatop node according to hardware
architecture.
- The vf610-zii device update: configure fiber port to 1000BaseX, add
switch watchdog, MDIO speed and preamble.
- A series from Fabio Estevam to update imx6qdl-sabresd and
imx6q-tbs2910 for using MDIO node and reset-assert-us.
- Align L2 cache-controller device node name with .yaml schema.
- Enable SATA support for imx6qp-sabreauto and imx6qp-sabresd board.
- A series of patches from Shengjiu Wang to enable various audio
support on i.MX6 devices.
- Add Gateworks System Controller support for imx6qdl-gw devices.
- Change default #pwm-cells setting to <3> in the SoC dtsi files.
- Other small random changes.
* tag 'imx-dt-5.9' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: (43 commits)
ARM: dts: vf610-zii-ssmb-spu3: Add node for switch watchdog
ARM: dts: vf610-zii-ssmb-dtu: Add no-sdio/no-sd properties
ARM: dts: imx6q-tbs2910: Pass reset-assert-us
ARM: dts: imx6q-tbs2910: Add an mdio node
ARM: dts: imx6qdl-sabresd: Pass reset-assert-us
ARM: dts: imx6qdl-sabresd: Add an mdio node
ARM: dts: imx6qdl-gw: add Gateworks System Controller support
ARM: dts: imx6ull: add MYiR MYS-6ULX SBC
ARM: dts: vf610-zii-spb4: Add node for switch watchdog
ARM: dts: colibri-imx6: remove pinctrl-names orphan
ARM: dts: imx: default to #pwm-cells = <3> in the SoC dtsi files
ARM: dts: vf610-zii-scu4-aib: Configure fibre ports to 1000BaseX
ARM: dts: vf610-zii-dev-rev-c: Configure fiber port to 1000BaseX
ARM: dts: ZII: update MDIO speed and preamble
ARM: dts: vfxxx: Add node for CAAM
ARM: dts: imx6qp-sabresd: enable sata
ARM: dts: imx6qp-sabreauto: enable sata
ARM: dts: add Protonic RVT board
ARM: dts: add Protonic VT7 board
ARM: dts: add Protonic WD2 board
...
Link: https://lore.kernel.org/r/20200720085536.24138-3-shawnguo@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Wed, 22 Jul 2020 19:45:28 +0000 (21:45 +0200)]
Merge tag 'imx-bindings-5.9' of git://git./linux/kernel/git/shawnguo/linux into arm/dt
i.MX DT bindings for 5.9:
- Add compatible for Protonic PRTI6Q, WD2, RVT, VT7 boards.
- Add compatible for MYiR Tech iMX6ULL Evaluation Board
* tag 'imx-bindings-5.9' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
dt-bindings: arm: fsl: Add MYiR Tech boards
dt-bindings: arm: fsl: add different Protonic boards
Link: https://lore.kernel.org/r/20200720085536.24138-2-shawnguo@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Wed, 22 Jul 2020 19:43:23 +0000 (21:43 +0200)]
Merge tag 'socfpga_dts_update_for_v5.9' of git://git./linux/kernel/git/dinguyen/linux into arm/dt
SoCFPGA DTS updates for v5.9
- Populate clock entries for Agilex platform
- Add "reset-names" to SPI entries
- Add Maxim max1619 temperature sensor to Arria10 devkit
* tag 'socfpga_dts_update_for_v5.9' of git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux:
ARM: dts: socfpga: add the temperature sensor to the Arria10 devkit
arm: dts: socfpga: add reset-names to spi node
arm64: dts: agilex: add nand clocks
arm64: dts: agilex: populate clock dts entries for Intel SoCFPGA Agilex
Link: https://lore.kernel.org/r/20200719011804.15599-1-dinguyen@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Amelie Delaunay [Tue, 16 Jun 2020 14:07:17 +0000 (16:07 +0200)]
ARM: dts: stm32: enable usb-role-switch on USB OTG on stm32mp15xx-dkx
Now that USB OTG driver supports usb role switch by overriding PHY input
signals (A-Valid, B-Valid and Vbus-Valid), enable it on stm32mp15xx-dkx.
dr_mode needn't to be forced to Peripheral anymore, it is set to OTG in
SoC device tree.
USB role (USB_ROLE_NONE, USB_ROLE_DEVICE, USB_ROLE_HOST) will be provided
by STUSB1600 Type-C controller driver.
This patch depends on "Add STUSB160x Type-C port controller support"
series, which is under review.
Signed-off-by: Amelie Delaunay <amelie.delaunay@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
Benjamin Gaignard [Fri, 3 Jul 2020 09:55:20 +0000 (11:55 +0200)]
ARM: dts: stm32: Add compatibles for syscon for stm32mp151
Syscon nodes needs at least 2 compatibles to be compliant why yaml documentation.
Signed-off-by: Benjamin Gaignard <benjamin.gaignard@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
Benjamin Gaignard [Fri, 3 Jul 2020 09:55:19 +0000 (11:55 +0200)]
ARM: dts: stm32: Add compatibles for syscon for stm32h743
Syscon nodes needs at least 2 compatibles to be compliant why yaml documentation.
Signed-off-by: Benjamin Gaignard <benjamin.gaignard@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
Benjamin Gaignard [Fri, 3 Jul 2020 09:55:18 +0000 (11:55 +0200)]
ARM: dts: stm32: Add compatibles for syscon for stm32f746
Syscon nodes needs at least 2 compatibles to be compliant why yaml documentation.
Signed-off-by: Benjamin Gaignard <benjamin.gaignard@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
Benjamin Gaignard [Fri, 3 Jul 2020 09:55:17 +0000 (11:55 +0200)]
ARM: dts: stm32: Add compatibles for syscon for stm32f426
Syscon nodes needs at least 2 compatibles to be compliant why yaml documentation.
Signed-off-by: Benjamin Gaignard <benjamin.gaignard@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
Benjamin Gaignard [Fri, 3 Jul 2020 09:55:16 +0000 (11:55 +0200)]
dt-bindings: arm: stm32: Add compatibles for syscon nodes
Since commit
ad440432d1f9 ("dt-bindings: mfd: Ensure 'syscon' has a more specific compatible")
it is required to provide at least 2 compatibles string for syscon node.
This patch document the missing compatibles for stm32 SoCs.
Signed-off-by: Benjamin Gaignard <benjamin.gaignard@st.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
Patrick Delaunay [Wed, 8 Jul 2020 11:43:24 +0000 (13:43 +0200)]
ARM: dts: stm32: Fix spi4 pins in stm32mp15-pinctrl
Move spi4_pins_a nodes from pinctrl_z to pinctrl as the associated pins
are not in BANK Z.
Fixes:
498a7014989d ("ARM: dts: stm32: Add missing pinctrl entries for STM32MP15")
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Manivannan Sadhasivam <mani@kernel.org>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
Fabrice Gasnier [Tue, 23 Jun 2020 09:31:12 +0000 (11:31 +0200)]
ARM: dts: stm32: configure i2c5 support on stm32mp15xx-dkx
Configure I2C5 on stm32mp15 DK boards. It's available and can be used on:
- Arduino connector
- GPIO expansion connector
Keep it disabled by default, so the pins are kept in their initial state to
lower power consumption. This way they can also be used as GPIO.
Signed-off-by: Fabrice Gasnier <fabrice.gasnier@st.com>
Signed-off-by: Alain Volmat <alain.volmat@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
Erwan Le Ray [Thu, 18 Jun 2020 13:06:51 +0000 (15:06 +0200)]
ARM: dts: stm32: add usart2 node to stm32mp157c-dk2
Adds the usart2 node to stm32mp157c-dk2 board. usart2 pins are connected
to Bluetooth component. usart2 is disabled by default.
Signed-off-by: Erwan Le Ray <erwan.leray@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
Erwan Le Ray [Thu, 18 Jun 2020 13:06:50 +0000 (15:06 +0200)]
ARM: dts: stm32: add uart7 support to stm32mp15xx-dkx boards
Adds uart7 node to stm32mp15xx-dkx and uart7 alias to stm32mp157a-dk1 and
stm32mp157c-dk2 boards. uart7 pins are connected to Arduino connector.
uart7 is disabled by default.
Signed-off-by: Erwan Le Ray <erwan.leray@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
Erwan Le Ray [Thu, 18 Jun 2020 13:06:49 +0000 (15:06 +0200)]
ARM: dts: stm32: add usart3 node to stm32mp157c-ev1
Adds the usart3 node to stm32mp157c-ev1 board. usart3 pins are connected to
GPIO Expansion connector. usart3 is disabled by default.
Signed-off-by: Erwan Le Ray <erwan.leray@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
Erwan Le Ray [Thu, 18 Jun 2020 13:06:48 +0000 (15:06 +0200)]
ARM: dts: stm32: add usart3 node to stm32mp15xx-dkx boards
Adds usart3 node to stm32mp15xx-dkx and usart3 alias to stm32mp157a-dk1
and stm32mp157c-dk2 boards. usart3 pins are connected to GPIO Expansion
connector. usart3 is disabled by default.
Signed-off-by: Erwan Le Ray <erwan.leray@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
Erwan Le Ray [Thu, 18 Jun 2020 13:06:47 +0000 (15:06 +0200)]
ARM: dts: stm32: add usart2, usart3 and uart7 pins in stm32mp15-pinctrl
Adds usart2_pins_c, usart3_pins_b, usart3_pins_c and uart7_pins_c pins
configurations in stm32mp15-pinctrl.
- usart2_pins_c pins are connected to Bluetooth chip on dk2 board.
- usart3_pins_b pins are connected to GPIO expansion connector on evx board.
- usart3_pins_c pins are connected to GPIO expansion connector on dkx board.
- uart7_pins_c pins are connected to Arduino Uno connector on dkx board.
Signed-off-by: Erwan Le Ray <erwan.leray@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
Patrick Delaunay [Tue, 16 Jun 2020 15:33:29 +0000 (17:33 +0200)]
ARM: dts: stm32: cosmetic updates in stm32mp15-pinctrl
Use tabs where possible and remove multiple blanks lines.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
Alexander A. Klimov [Sun, 19 Jul 2020 09:39:39 +0000 (11:39 +0200)]
ARM: dts: exynos: Replace HTTP links with HTTPS ones
Rationale:
Reduces attack surface on kernel devs opening the links for MITM
as HTTPS traffic is much harder to manipulate.
Deterministic algorithm:
For each file:
If not .svg:
For each line:
If doesn't contain `\bxmlns\b`:
For each link, `\bhttp://[^# \t\r\n]*(?:\w|/)`:
If neither `\bgnu\.org/license`, nor `\bmozilla\.org/MPL\b`:
If both the HTTP and HTTPS versions
return 200 OK and serve the same content:
Replace HTTP with HTTPS.
Signed-off-by: Alexander A. Klimov <grandmaster@al2klimov.de>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Chen-Yu Tsai [Fri, 17 Jul 2020 16:00:53 +0000 (00:00 +0800)]
arm64: dts: allwinner: h5: bananapi-m2-plus-v1.2: Tie in CPU OPPs
The Bananapi M2 Plus H5 v1.2 can work with the standard H5 OPPs.
Tie them in to enable CPU frequency scaling.
The original Bananapi M2 Plus H5 is left out for now, as adding
the fixed regulator along with the enable pin seemed to cause some
glitching in Linux.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Link: https://lore.kernel.org/r/20200717160053.31191-9-wens@kernel.org
Chen-Yu Tsai [Fri, 17 Jul 2020 16:00:52 +0000 (00:00 +0800)]
arm64: dts: allwinner: h5: libretech-all-h3-cc: Tie in CPU OPPs
The Libre Computer ALL-H3-CC H5 variant can work with the standard H5
OPPs. Tie them in to enable CPU frequency scaling.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Link: https://lore.kernel.org/r/20200717160053.31191-8-wens@kernel.org
Chen-Yu Tsai [Fri, 17 Jul 2020 16:00:51 +0000 (00:00 +0800)]
arm64: dts: allwinner: h5: Add CPU Operating Performance Points table
Add an OPP (Operating Performance Points) table for the CPU cores for
boards to include to DVFS (Dynamic Voltage & Frequency Scaling) on the
H5. The table originates from Armbian, but the maximum voltage is raised
slightly to account for boards using slightly higher voltages.
The table and tie in to the CPU cores are put in a separate dtsi file
that board files can include to opt in. Or they can define their own
tables if the standard one does not fit.
This has been tested on the Libre Computer ALL-H3-CC-H5 and the Bananapi
M2+ v1.2 H5, both with adequate cooling. The former has a fixed 1.2V
regulator, while the latter has a GPIO controlled regulator switchable
between 1.1V and 1.3V.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Link: https://lore.kernel.org/r/20200717160053.31191-7-wens@kernel.org
Chen-Yu Tsai [Fri, 17 Jul 2020 16:00:50 +0000 (00:00 +0800)]
arm64: dts: allwinner: h5: Add trip and cooling maps to CPU thermal zones
This enables passive cooling by down-regulating CPU voltage and frequency.
The trip points were copied from the H3.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Link: https://lore.kernel.org/r/20200717160053.31191-6-wens@kernel.org
Chen-Yu Tsai [Fri, 17 Jul 2020 16:00:49 +0000 (00:00 +0800)]
arm64: dts: allwinner: h5: Add clock to CPU cores
The ARM CPU cores are fed by the CPU clock from the CCU. Add a
reference to the clock for each CPU core, along with the clock
transition latency.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Link: https://lore.kernel.org/r/20200717160053.31191-5-wens@kernel.org
Chen-Yu Tsai [Fri, 17 Jul 2020 16:00:48 +0000 (00:00 +0800)]
ARM: dts: sunxi: bananapi-m2-plus-v1.2: Fix CPU supply voltages
The Bananapi M2+ uses a GPIO line to change the effective resistance of
the CPU supply regulator's feedback resistor network. The voltages
described in the device tree were given directly by the vendor. This
turns out to be slightly off compared to the real values.
The updated voltages are based on calculations of the feedback resistor
network, and verified down to three decimal places with a multi-meter.
Fixes:
6eeb4180d4b9 ("ARM: dts: sunxi: h3-h5: Add Bananapi M2+ v1.2 device trees")
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Link: https://lore.kernel.org/r/20200717160053.31191-4-wens@kernel.org
Chen-Yu Tsai [Fri, 17 Jul 2020 16:00:47 +0000 (00:00 +0800)]
ARM: dts: sunxi: bananapi-m2-plus-v1.2: Add regulator supply to all CPU cores
The device tree currently only assigns the a supply for the first CPU
core, when in reality the regulator supply is shared by all four cores.
This might cause an issue if the implementation does not realize the
sharing of the supply.
Assign the same regulator supply to the remaining CPU cores to address
this.
Fixes:
6eeb4180d4b9 ("ARM: dts: sunxi: h3-h5: Add Bananapi M2+ v1.2 device trees")
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Link: https://lore.kernel.org/r/20200717160053.31191-3-wens@kernel.org
Chen-Yu Tsai [Fri, 17 Jul 2020 16:00:46 +0000 (00:00 +0800)]
ARM: dts: sunxi: libretech-all-h3-cc: Add regulator supply to all CPU cores
The device tree currently only assigns the a supply for the first CPU
core, when in reality the regulator supply is shared by all four cores.
This might cause an issue if the implementation does not realize the
sharing of the supply.
Assign the same regulator supply to the remaining CPU cores to address
this.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Link: https://lore.kernel.org/r/20200717160053.31191-2-wens@kernel.org
Linus Walleij [Sun, 19 Jul 2020 20:16:02 +0000 (22:16 +0200)]
ARM: dts: ux500-skomer: Correct accel mounting matrix
This corrects the mounting matrix for the BMA254
accelerometer to what makes PostmarketOS actually
orient the screen the right way on this device.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Link: https://lore.kernel.org/r/20200719201603.3610389-1-linus.walleij@linaro.org
Marek Szyprowski [Tue, 14 Jul 2020 06:47:59 +0000 (08:47 +0200)]
ARM: dts: exynos: Disable frequency scaling for FSYS bus on Odroid XU3 family
Commit
1019fe2c7280 ("ARM: dts: exynos: Adjust bus related OPPs to the
values correct for Exynos5422 Odroids") changed the parameters of the
OPPs for the FSYS bus. Besides the frequency adjustments, it also removed
the 'shared-opp' property from the OPP table used for FSYS_APB and FSYS
busses.
This revealed that in fact the FSYS bus frequency scaling never worked.
When one OPP table is marked as 'opp-shared', only the first bus which
selects the OPP sets the rate of its clock. Then OPP core assumes that
the other busses have been changed to that OPP and no change to their
clock rates are needed. Thus when FSYS_APB bus, which was registered
first, set the rate for its clock, the OPP core did not change the FSYS
bus clock later.
The mentioned commit removed that behavior, what introduced a regression
on some Odroid XU3 boards. Frequency scaling of the FSYS bus causes
instability of the USB host operation, what can be observed as network
hangs. To restore old behavior, simply disable frequency scaling for the
FSYS bus.
Reported-by: Willy Wolff <willy.mh.wolff.ml@gmail.com>
Fixes:
1019fe2c7280 ("ARM: dts: exynos: Adjust bus related OPPs to the values correct for Exynos5422 Odroids")
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Chris Healy [Wed, 15 Jul 2020 22:07:58 +0000 (15:07 -0700)]
ARM: dts: vf610-zii-ssmb-spu3: Add node for switch watchdog
Add I2C child node for switch watchdog present on SPU3
Signed-off-by: Chris Healy <cphealy@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Chris Healy [Wed, 15 Jul 2020 21:31:48 +0000 (14:31 -0700)]
ARM: dts: vf610-zii-ssmb-dtu: Add no-sdio/no-sd properties
esdhc0 is connected to an eMMC, so it is safe to pass the "no-sdio"/"no-sd"
properties.
esdhc1 is wired to a standard SD socket, so pass the "no-sdio" property.
Signed-off-by: Chris Healy <cphealy@gmail.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Biwen Li [Tue, 14 Jul 2020 07:08:28 +0000 (15:08 +0800)]
arm64: dts: lx2160a-rdb: fix shunt-resistor value
Fix value of shunt-resistor property.
The LX2160A-RDB has 500 uOhm shunt for
the INA220, not 1000 uOhm. Unless
it will get wrong power consumption(1/2)
Signed-off-by: Biwen Li <biwen.li@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Fabio Estevam [Mon, 13 Jul 2020 13:05:09 +0000 (10:05 -0300)]
ARM: dts: imx6q-tbs2910: Pass reset-assert-us
According to the AR8035 datasheet:
"When using crystal, the clock is generated internally after power is
stable. For a reliable power on reset, suggest to keep asserting the reset
low long enough (10ms) to ensure the clock is stable and clock-to-reset 1ms
requirement is satisfied."
Pass the 'reset-assert-us' property to describe such requirement.
While at it, use the 'reset-gpios' property inside the the mdio
node instead of the deprecated usage of 'phy-reset-gpios'.
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Soeren Moch <smoch@web.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Fabio Estevam [Mon, 13 Jul 2020 13:05:08 +0000 (10:05 -0300)]
ARM: dts: imx6q-tbs2910: Add an mdio node
imx6q-tbs2910 has an Atheros AR8035 Ethernet PHY at address 4.
The AR8035 provides a 125MHz clock to the ENET_REF_CLK i.MX6 pin.
Improve the Ethernet representation by adding an mdio node with such
information.
This fixes an Ethernet regression in U-Boot as U-Boot AR803X driver now
expects the 'qca,clk-out-frequency' property to be passed via
device tree.
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Soeren Moch <smoch@web.de>
Tested-by: Soeren Moch <smoch@web.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Fabio Estevam [Mon, 13 Jul 2020 13:04:16 +0000 (10:04 -0300)]
ARM: dts: imx6qdl-sabresd: Pass reset-assert-us
According to the AR8031 datasheet:
"When using crystal, clock is generated internally after the power is
stable. In order to get reliable power-on-reset, it is recommended to
keep asserting the reset low signal long enough (10 ms) to ensure the
clock is stable and clock-to-reset (1 ms) requirement is satisfied."
Pass the 'reset-assert-us' property to describe such requirement.
While at it, use the 'reset-gpios' property inside the the mdio
node instead of the deprecated usage of 'phy-reset-gpios'.
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Soeren Moch <smoch@web.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Fabio Estevam [Mon, 13 Jul 2020 13:04:15 +0000 (10:04 -0300)]
ARM: dts: imx6qdl-sabresd: Add an mdio node
imx6qdl-sabresd has an Atheros AR8031 Ethernet PHY at address 1.
The AR8031 provides a 125MHz clock to the ENET_REF_CLK i.MX6 pin.
Improve the Ethernet representation by adding an mdio node with such
information.
An advantage of adding the mdio node is that the AR8031 initialization
code in the mx6sabresd board file in U-Boot can totally be removed.
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Soeren Moch <smoch@web.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Parthiban Nallathambi [Mon, 13 Jul 2020 07:23:19 +0000 (09:23 +0200)]
dt-bindings: arm: fsl: Add MYiR Tech boards
Add entries for MYiR Tech imx6ULL eval boards.
Signed-off-by: Parthiban Nallathambi <parthiban@linumiz.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Tim Harvey [Thu, 16 Jul 2020 15:35:55 +0000 (08:35 -0700)]
ARM: dts: imx6qdl-gw: add Gateworks System Controller support
Add Gateworks System Controller support to Gateworks Ventana boards:
- add dt bindings for GSC mfd driver and hwmon driver for ADC's and
fan controllers.
- add dt bindings for gpio-keys driver for push-button and interrupt events
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Nisha Kumari [Mon, 22 Jun 2020 12:41:09 +0000 (18:11 +0530)]
arm64: dts: qcom: pmi8998: Add nodes for LAB and IBB regulators
This patch adds devicetree nodes for LAB and IBB regulators.
Signed-off-by: Nisha Kumari <nishakumari@codeaurora.org>
[sumits: Updated for better compatible strings and names]
Signed-off-by: Sumit Semwal <sumit.semwal@linaro.org>
Link: https://lore.kernel.org/r/20200622124110.20971-4-sumit.semwal@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Dinh Nguyen [Wed, 15 Jul 2020 18:05:16 +0000 (13:05 -0500)]
ARM: dts: socfpga: add the temperature sensor to the Arria10 devkit
Add the Maxim max1619 temp sensor that is on the Arria10 devkit.
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
Dinh Nguyen [Tue, 30 Jun 2020 20:18:16 +0000 (15:18 -0500)]
arm: dts: socfpga: add reset-names to spi node
Add reset-names = "spi" to spi dts nodes.
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
Dinh Nguyen [Tue, 30 Jun 2020 18:44:37 +0000 (13:44 -0500)]
arm64: dts: agilex: add nand clocks
Add the clock properties for the NAND dts node.
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
Dinh Nguyen [Fri, 9 Aug 2019 19:28:06 +0000 (12:28 -0700)]
arm64: dts: agilex: populate clock dts entries for Intel SoCFPGA Agilex
Add clock dts entries to the Intel SoCFPGA Agilex platform.
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
Rajendra Nayak [Thu, 9 Jul 2020 11:04:34 +0000 (16:34 +0530)]
arm64: dts: sc7180: Add DSI and MDP OPP tables and power-domains
Add the OPP tables for DSI and MDP based on the perf state/clk
requirements, and add the power-domains property to specify the
scalable power domain.
Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org>
Reviewed-by: Matthias Kaehlcke <mka@chromium.org>
Link: https://lore.kernel.org/r/1594292674-15632-5-git-send-email-rnayak@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Rajendra Nayak [Thu, 9 Jul 2020 11:04:33 +0000 (16:34 +0530)]
arm64: dts: sdm845: Add DSI and MDP OPP tables and power-domains
Add the OPP tables for DSI and MDP based on the perf state/clk
requirements, and add the power-domains property to specify the
scalable power domain.
Tested-by: Rob Clark <robdclark@gmail.com>
Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org>
Reviewed-by: Matthias Kaehlcke <mka@chromium.org>
Link: https://lore.kernel.org/r/1594292674-15632-4-git-send-email-rnayak@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Arnd Bergmann [Fri, 17 Jul 2020 18:24:39 +0000 (20:24 +0200)]
Merge tag 'tegra-for-5.9-arm64-dt' of git://git./linux/kernel/git/tegra/linux into arm/dt
arm64: tegra: Device tree changes for v5.9-rc1
This contains a slew of fixes in preparation for validating device trees
against json-schema bindings. In addition, this enables the CPU complex
(for CPU frequency scaling) and GPU on Tegra194.
* tag 'tegra-for-5.9-arm64-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux: (56 commits)
arm64: tegra: Add the GPU on Tegra194
arm64: tegra: Add compatible string for Tegra194 CPU complex
arm64: tegra: Add HDMI supplies on Norrin
arm64: tegra: Add #{address,size}-cells for VI I2C on Tegra210
arm64: tegra: Add missing clocks and power-domains to Tegra210 VI I2C
arm64: tegra: Add clocks and resets for ISP on Tegra210
arm64: tegra: Fix compatible string for DPAUX on Tegra210
arm64: tegra: Add i2c-bus subnode for DPAUX controllers
arm64: tegra: Sort aliases alphabetically
arm64: tegra: Remove spurious tabs
arm64: tegra: Populate VBUS for USB3 on Jetson TX2
arm64: tegra: Enable DFLL support on Jetson Nano
arm64: tegra: Add support for Jetson Xavier NX
arm64: tegra: Re-order PCIe aperture mappings
arm64: tegra: Enable Tegra VI CSI support for Jetson Nano
arm64: tegra: jetson-tx1: Add camera supplies
arm64: tegra: Fix order of XUSB controller clocks
arm64: tegra: Rename cbb@0 to bus@0 on Tegra194
arm64: tegra: Sort nodes by unit-address on Jetson Nano
arm64: tegra: Various fixes for PMICs
...
Link: https://lore.kernel.org/r/20200717161300.1661002-7-thierry.reding@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Fri, 17 Jul 2020 18:03:49 +0000 (20:03 +0200)]
Merge tag 'tegra-for-5.9-arm-dt' of git://git./linux/kernel/git/tegra/linux into arm/dt
ARM: tegra: Device tree changes for v5.9-rc1
This adds device trees for the ASUS Google Nexus 7 and Acer Iconia Tab
A500. In addition there are a slew of fixes to existing device trees in
preparation for validating the DTBs against json-schema.
* tag 'tegra-for-5.9-arm-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux: (38 commits)
ARM: tegra: Add device-tree for ASUS Google Nexus 7
ARM: tegra: Add device-tree for Acer Iconia Tab A500
ARM: tegra: Add HDMI supplies on Nyan boards
ARM: tegra: Add missing DSI controller on Tegra30
ARM: tegra: Add i2c-bus subnode for DPAUX controllers
ARM: tegra: The Tegra30 SDHCI is not backwards-compatible
ARM: tegra: The Tegra30 DC is not backwards-compatible
ARM: tegra: Remove spurious comma from node name
ARM: tegra: Add parent clock to DSI output
ARM: tegra: Use standard names for SRAM nodes
ARM: tegra: seaboard: Use standard battery bindings
ARM: tegra: Use standard names for LED nodes
ARM: tegra: Use numeric unit-addresses
ARM: tegra: medcom-wide: Remove extra panel power supply
ARM: tegra: Use proper unit-addresses for OPPs
ARM: tegra: Add missing clock-names for SDHCI controllers
ARM: tegra: Fix order of XUSB controller clocks
ARM: tegra: Add #reset-cells to Tegra124 memory controller
ARM: tegra: Add missing panel power supplies
ARM: tegra: Add micro-USB A/B port on Jetson TK1
...
Link: https://lore.kernel.org/r/20200717161300.1661002-5-thierry.reding@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Fri, 17 Jul 2020 18:00:45 +0000 (20:00 +0200)]
Merge tag 'tegra-for-5.9-dt-bindings' of git://git./linux/kernel/git/tegra/linux into arm/dt
dt-bindings: Changes for v5.9-rc1
This adds compatible strings for some new devices as well as updates and
fixes existing bindings.
* tag 'tegra-for-5.9-dt-bindings' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
dt-bindings: fuse: tegra: Add missing compatible strings
dt-bindings: i2c: tegra: Document Tegra210 VI I2C clocks and power-domains
dt-bindings: Add documentation for GV11B GPU
dt-bindings: ARM: tegra: Add ASUS Google Nexus 7
dt-bindings: ARM: tegra: Add Acer Iconia Tab A500
dt-bindings: Add vendor prefix for Acer Inc.
dt-bindings: tegra: Document Jetson Xavier NX (and devkit)
Link: https://lore.kernel.org/r/20200717161300.1661002-1-thierry.reding@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Fri, 17 Jul 2020 17:59:03 +0000 (19:59 +0200)]
Merge tag 'amlogic-dt64' of git://git./linux/kernel/git/khilman/linux-amlogic into arm/dt
arm64: dts: amlogic updates for v5.9
- meson-gx: Switch to the meson-ee-pwrc bindings
- add Khadas MCU nodes
* tag 'amlogic-dt64' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic:
arm64: dts: amlogic: Add the Ethernet "timing-adjustment" clock
arm64: dts: meson-gx: Switch to the meson-ee-pwrc bindings
arm64: dts: meson-khadas-vim3: add Khadas MCU nodes
Link: https://lore.kernel.org/r/7h8sfif2na.fsf@baylibre.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Fri, 17 Jul 2020 17:57:03 +0000 (19:57 +0200)]
Merge tag 'amlogic-dt' of git://git./linux/kernel/git/khilman/linux-amlogic into arm/dt
ARM: dts: amlogic updates for v5.9
- power-domain and MMC updates
* tag 'amlogic-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic:
ARM: dts: meson8b: odroidc1: enable the SDHC controller
ARM: dts: meson8b: ec100: enable the SDHC controller
ARM: dts: meson: add the SDHC MMC controller
ARM: dts: meson8b: add power domain controller
ARM: dts: meson8m2: add resets for the power domain controller
ARM: dts: meson8: add power domain controller
Link: https://lore.kernel.org/r/7hd04uf2o8.fsf@baylibre.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Thierry Reding [Thu, 16 Jul 2020 12:01:38 +0000 (14:01 +0200)]
arm64: tegra: Add the GPU on Tegra194
The GPU found on NVIDIA Tegra194 SoCs is a Volta generation GPU called
GV11B.
Reviewed-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Thierry Reding [Mon, 25 May 2020 14:50:04 +0000 (16:50 +0200)]
dt-bindings: fuse: tegra: Add missing compatible strings
The Tegra FUSE device tree bindings haven't been updated in a while. Add
compatible strings for the SoC generations that were released since the
last update.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Sowjanya Komatineni [Wed, 15 Jul 2020 04:20:38 +0000 (21:20 -0700)]
dt-bindings: i2c: tegra: Document Tegra210 VI I2C clocks and power-domains
This patch documents missing clocks and power-domains of Tegra210 VI I2C.
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Thierry Reding [Thu, 16 Jul 2020 13:18:45 +0000 (15:18 +0200)]
dt-bindings: Add documentation for GV11B GPU
The GV11B's device tree bindings are the same as for GP10B, though the
GPU is not completely compatible, so all that is needed is a different
compatible string.
Reviewed-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Arnd Bergmann [Fri, 17 Jul 2020 14:04:56 +0000 (16:04 +0200)]
Merge tag 'renesas-dt-bindings-for-v5.9-tag1' of git://git./linux/kernel/git/geert/renesas-devel into arm/dt
Renesas DT binding updates for v5.9
- Document core support for the RZ/G2H SoC,
- Document support for the HopeRun HiHope RZ/G2H, and Beacon
EmbeddedWorks RZ/G2M boards.
* tag 'renesas-dt-bindings-for-v5.9-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel:
dt-bindings: arm: renesas: Document beacon-rzg2m
dt-bindings: reset: renesas,rst: Document r8a774e1 reset module
dt-bindings: power: renesas,rcar-sysc: Document r8a774e1 SYSC binding
dt-bindings: arm: renesas: Add HopeRun RZ/G2H boards
dt-bindings: arm: renesas: Document RZ/G2H SoC DT bindings
Link: https://lore.kernel.org/r/20200717112427.26032-4-geert+renesas@glider.be
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Fri, 17 Jul 2020 13:36:23 +0000 (15:36 +0200)]
Merge tag 'renesas-arm-dt-for-v5.9-tag2' of git://git./linux/kernel/git/geert/renesas-devel into arm/dt
Renesas ARM DT updates for v5.9 (take two)
- SPI Multi I/O Bus Controller (RPC-IF) support for R-Car V3H and V3M,
including QSPI support for the Condor, Eagle, V3HSK, and V3MSK
boards,
- Initial support for the RZ/G2H SoC on the HopeRun HiHope RZ/G2H
board,
- Initial support for the Beacon EmbeddedWorks RZ/G2M board,
- Minor fixes and improvements.
* tag 'renesas-arm-dt-for-v5.9-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel: (34 commits)
ARM: dts: sh73a0: Add missing clocks to sound node
arm64: dts: renesas: r8a774e1: Add CAN[FD] support
arm64: dts: renesas: r8a774e1: Add RWDT node
arm64: dts: renesas: r8a774e1: Add MSIOF nodes
arm64: dts: renesas: r8a774e1: Add I2C and IIC-DVFS support
arm64: dts: renesas: r8a774e1: Add SDHI nodes
arm64: dts: renesas: r8a774e1: Add SCIF and HSCIF nodes
arm64: dts: renesas: r8a774e1: Add TMU device nodes
arm64: dts: renesas: r8a774e1: Add CMT device nodes
arm64: dts: renesas: r8a774e1: Add RZ/G2H thermal support
arm64: dts: renesas: r8a774e1: Add operating points
arm64: dts: renesas: Introduce r8a774a1-beacon-rzg2m-kit
arm64: dts: renesas: r8a774e1: Add Ethernet AVB node
arm64: dts: renesas: r8a774e1: Add GPIO device nodes
arm64: dts: renesas: r8a774e1: Add SYS-DMAC device nodes
arm64: dts: renesas: r8a774e1: Add IPMMU device nodes
ARM: dts: gose: Fix ports node name for adv7612
ARM: dts: renesas: Fix SD Card/eMMC interface device node names
arm64: dts: renesas: Fix SD Card/eMMC interface device node names
arm64: dts: renesas: add full-pwr-cycle-in-suspend into eMMC nodes
...
Link: https://lore.kernel.org/r/20200717112427.26032-2-geert+renesas@glider.be
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Geert Uytterhoeven [Tue, 19 May 2020 07:55:25 +0000 (09:55 +0200)]
ARM: dts: sh73a0: Add missing clocks to sound node
The device node for the FIFO-buffered Serial Interface sound node lacks
the "clocks" property, as the DTS file didn't describe any clocks yet at
its introduction.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20200519075525.24742-1-geert+renesas@glider.be
Lad Prabhakar [Wed, 15 Jul 2020 11:09:10 +0000 (12:09 +0100)]
arm64: dts: renesas: r8a774e1: Add CAN[FD] support
Add CAN[01] and CANFD support to RZ/G2H (R8A774E1) SoC specific dtsi.
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@bp.renesas.com>
Link: https://lore.kernel.org/r/1594811350-14066-21-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Lad Prabhakar [Wed, 15 Jul 2020 11:09:07 +0000 (12:09 +0100)]
arm64: dts: renesas: r8a774e1: Add RWDT node
Add a device node for the Watchdog Timer (RWDT) controller on the Renesas
RZ/G2H (r8a774e1) SoC.
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@bp.renesas.com>
Link: https://lore.kernel.org/r/1594811350-14066-18-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Lad Prabhakar [Wed, 15 Jul 2020 11:09:05 +0000 (12:09 +0100)]
arm64: dts: renesas: r8a774e1: Add MSIOF nodes
Add the DT nodes needed by MSIOF[0123] interfaces to the SoC dtsi.
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@bp.renesas.com>
Link: https://lore.kernel.org/r/1594811350-14066-16-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Lad Prabhakar [Wed, 15 Jul 2020 11:09:03 +0000 (12:09 +0100)]
arm64: dts: renesas: r8a774e1: Add I2C and IIC-DVFS support
Add the I2C[0-6] and IIC Bus Interface for DVFS (IIC for DVFS)
devices nodes to the r8a774e1 device tree.
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@bp.renesas.com>
Link: https://lore.kernel.org/r/1594811350-14066-14-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Lad Prabhakar [Wed, 15 Jul 2020 11:09:00 +0000 (12:09 +0100)]
arm64: dts: renesas: r8a774e1: Add SDHI nodes
Add SDHI[0-2] device nodes to R8A774E1 SoC.
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@bp.renesas.com>
Link: https://lore.kernel.org/r/1594811350-14066-11-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Lad Prabhakar [Wed, 15 Jul 2020 11:08:59 +0000 (12:08 +0100)]
arm64: dts: renesas: r8a774e1: Add SCIF and HSCIF nodes
Add the device nodes for RZ/G2H SCIF and HSCIF serial ports,
including clocks, power domains and DMAs.
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@bp.renesas.com>
Link: https://lore.kernel.org/r/1594811350-14066-10-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Marian-Cristian Rotariu [Wed, 15 Jul 2020 11:08:58 +0000 (12:08 +0100)]
arm64: dts: renesas: r8a774e1: Add TMU device nodes
This patch adds TMU[01234] device tree nodes to the r8a774e1
SoC specific DT.
Signed-off-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@bp.renesas.com>
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/1594811350-14066-9-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Marian-Cristian Rotariu [Wed, 15 Jul 2020 11:08:56 +0000 (12:08 +0100)]
arm64: dts: renesas: r8a774e1: Add CMT device nodes
This patch adds the CMT[0123] device tree nodes to the
r8a774e1 SoC specific DT.
Signed-off-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@bp.renesas.com>
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/1594811350-14066-7-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Marian-Cristian Rotariu [Wed, 15 Jul 2020 11:08:54 +0000 (12:08 +0100)]
arm64: dts: renesas: r8a774e1: Add RZ/G2H thermal support
Add thermal support for R8A774E1 (RZ/G2H) SoC.
Based on the work done for r8a774a1 SoC.
Signed-off-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@bp.renesas.com>
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/1594811350-14066-5-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Marian-Cristian Rotariu [Wed, 15 Jul 2020 11:08:51 +0000 (12:08 +0100)]
arm64: dts: renesas: r8a774e1: Add operating points
The RZ/G2H (r8a774e1) comes with two clusters of processors, similarly to
the r8a774a1. The first cluster is made of A57s, the second cluster is made
of A53s.
The operating points for the cluster with the A57s are:
Frequency | Voltage
----------|---------
500 MHz | 0.82V
1.0 GHz | 0.82V
1.5 GHz | 0.82V
The operating points for the cluster with the A53s are:
Frequency | Voltage
----------|---------
800 MHz | 0.82V
1.0 GHz | 0.82V
1.2 GHz | 0.82V
This patch adds the definitions for the operating points to the SoC
specific DT.
Signed-off-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@bp.renesas.com>
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/1594811350-14066-2-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Adam Ford [Wed, 15 Jul 2020 14:06:21 +0000 (09:06 -0500)]
arm64: dts: renesas: Introduce r8a774a1-beacon-rzg2m-kit
Beacon EmebeddedWorks, formerly Logic PD is introducing a new
SOM and development kit based on the RZ/G2M SoC from Renesas.
The SOM supports eMMC, WiFi and Bluetooth, along with a Cat-M1
cellular radio.
The Baseboard has Ethernet, USB, HDMI, stereo audio in and out,
along with a variety of push buttons and LED's, and support for
a parallel RGB and an LVDS display.
Signed-off-by: Adam Ford <aford173@gmail.com>
Link: https://lore.kernel.org/r/20200715140622.1295370-1-aford173@gmail.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Marian-Cristian Rotariu [Mon, 13 Jul 2020 21:35:20 +0000 (22:35 +0100)]
arm64: dts: renesas: r8a774e1: Add Ethernet AVB node
This patch adds the SoC specific part of the Ethernet AVB
device tree node.
Signed-off-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@bp.renesas.com>
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/1594676120-5862-10-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Marian-Cristian Rotariu [Mon, 13 Jul 2020 21:35:18 +0000 (22:35 +0100)]
arm64: dts: renesas: r8a774e1: Add GPIO device nodes
Add GPIO device nodes to the DT of the r8a774e1 SoC.
Signed-off-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@bp.renesas.com>
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/1594676120-5862-8-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Marian-Cristian Rotariu [Mon, 13 Jul 2020 21:35:16 +0000 (22:35 +0100)]
arm64: dts: renesas: r8a774e1: Add SYS-DMAC device nodes
Add sys-dmac[0-2] device nodes for RZ/G2H (R8A774E1) SoC.
Signed-off-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@bp.renesas.com>
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/1594676120-5862-6-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Marian-Cristian Rotariu [Mon, 13 Jul 2020 21:35:14 +0000 (22:35 +0100)]
arm64: dts: renesas: r8a774e1: Add IPMMU device nodes
Add RZ/G2H (R8A774E1) IPMMU nodes.
Signed-off-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@bp.renesas.com>
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/1594676120-5862-4-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Niklas Söderlund [Mon, 13 Jul 2020 11:10:16 +0000 (13:10 +0200)]
ARM: dts: gose: Fix ports node name for adv7612
When adding the adv7612 device node the ports node was misspelled as
port, fix this.
Fixes:
bc63cd87f3ce924f ("ARM: dts: gose: add HDMI input")
Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Link: https://lore.kernel.org/r/20200713111016.523189-1-niklas.soderlund+renesas@ragnatech.se
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Yoshihiro Shimoda [Fri, 10 Jul 2020 12:08:56 +0000 (21:08 +0900)]
ARM: dts: renesas: Fix SD Card/eMMC interface device node names
Fix the device node names as "mmc@".
Fixes:
66474697923c ("ARM: dts: r7s72100: add sdhi to device tree")
Fixes:
a49f76cddaee ("ARM: dts: r7s9210: Add SDHI support")
Fixes:
43304a5f5106 ("ARM: shmobile: r8a73a4: tidyup DT node naming")
Fixes:
7d907894bfe3 ("ARM: shmobile: r8a7740: tidyup DT node naming")
Fixes:
3ab2ea5fd1ce ("ARM: dts: r8a7742: Add SDHI nodes")
Fixes:
63ce8a617b51 ("ARM: dts: r8a7743: Add SDHI controllers")
Fixes:
b591e323b271 ("ARM: dts: r8a7744: Add SDHI nodes")
Fixes:
d83010f87ab3 ("ARM: dts: r8a7744: Initial SoC device tree")
Fixes:
7079131ef9b9 ("ARM: dts: r8a7745: Add SDHI controllers")
Fixes:
0485da788028 ("ARM: dts: r8a77470: Add SDHI1 support")
Fixes:
15aa5a95e820 ("ARM: dts: r8a77470: Add SDHI0 support")
Fixes:
f068cc816015 ("ARM: dts: r8a77470: Add SDHI2 support")
Fixes:
14e1d9147d96 ("ARM: shmobile: r8a7778: tidyup DT node naming")
Fixes:
2624705ceb7b ("ARM: shmobile: r8a7779: tidyup DT node naming")
Fixes:
b718aa448378 ("ARM: shmobile: r8a7790: tidyup DT node naming")
Fixes:
b7ed8a0dd4f1 ("ARM: shmobile: Add SDHI devices to r8a7791 DTSI")
Fixes:
ce01b14ecf19 ("ARM: dts: r8a7792: add SDHI support")
Fixes:
fc9ee228f500 ("ARM: dts: r8a7793: Add SDHI controllers")
Fixes:
b8e8ea127d00 ("ARM: shmobile: r8a7794: add SDHI DT support")
Fixes:
33f6be3bf6b7 ("ARM: shmobile: sh73a0: tidyup DT node naming")
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Link: https://lore.kernel.org/r/1594382936-14114-1-git-send-email-yoshihiro.shimoda.uh@renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Yoshihiro Shimoda [Fri, 10 Jul 2020 12:03:54 +0000 (21:03 +0900)]
arm64: dts: renesas: Fix SD Card/eMMC interface device node names
Fix the device node names as "mmc@".
Fixes:
663386c3e1aa ("arm64: dts: renesas: r8a774a1: Add SDHI nodes")
Fixes:
9b33e3001b67 ("arm64: dts: renesas: Initial r8a774b1 SoC device tree")
Fixes:
77223211f44d ("arm64: dts: renesas: r8a774c0: Add SDHI nodes")
Fixes:
d9d67010e0c6 ("arm64: dts: r8a7795: Add SDHI support to dtsi")
Fixes:
a513cf1e6457 ("arm64: dts: r8a7796: add SDHI nodes")
Fixes:
111cc9ace2b5 ("arm64: dts: renesas: r8a77961: Add SDHI nodes")
Fixes:
f51746ad7d1f ("arm64: dts: renesas: Add Renesas R8A77961 SoC support")
Fixes:
df863d6f95f5 ("arm64: dts: renesas: initial R8A77965 SoC device tree")
Fixes:
9aa3558a02f0 ("arm64: dts: renesas: ebisu: Add and enable SDHI device nodes")
Fixes:
83f18749c2f6 ("arm64: dts: renesas: r8a77995: Add SDHI (MMC) support")
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Link: https://lore.kernel.org/r/1594382634-13714-1-git-send-email-yoshihiro.shimoda.uh@renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Yoshihiro Shimoda [Fri, 10 Jul 2020 12:03:32 +0000 (21:03 +0900)]
arm64: dts: renesas: add full-pwr-cycle-in-suspend into eMMC nodes
Add full-pwr-cycle-in-suspend property to do a graceful shutdown of
the eMMC device in system suspend.
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Link: https://lore.kernel.org/r/1594382612-13664-1-git-send-email-yoshihiro.shimoda.uh@renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Marian-Cristian Rotariu [Wed, 8 Jul 2020 17:48:31 +0000 (18:48 +0100)]
arm64: dts: renesas: Add HiHope RZ/G2H sub board support
The HiHope RZ/G2H sub board sits below the HiHope RZ/G2H main board.
These boards are identical with the ones for RZ/G2M[N].
Signed-off-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@bp.renesas.com>
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/1594230511-24790-9-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Marian-Cristian Rotariu [Wed, 8 Jul 2020 17:48:30 +0000 (18:48 +0100)]
arm64: dts: renesas: Add HiHope RZ/G2H main board support
Basic support for the HiHope RZ/G2H main board:
- Memory,
- Main crystal,
- Serial console
- eMMC
Signed-off-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@bp.renesas.com>
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/1594230511-24790-8-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Marian-Cristian Rotariu [Wed, 8 Jul 2020 17:48:29 +0000 (18:48 +0100)]
arm64: dts: renesas: Initial r8a774e1 SoC device tree
Basic support for the RZ/G2H SoC.
Signed-off-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@bp.renesas.com>
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/1594230511-24790-7-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Marian-Cristian Rotariu [Wed, 8 Jul 2020 17:48:28 +0000 (18:48 +0100)]
arm64: defconfig: Enable R8A774E1 SoC
Enable the Renesas RZ/G2H (R8A774E1) SoC in the ARM64 defconfig.
Signed-off-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@bp.renesas.com>
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/1594230511-24790-6-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Geert Uytterhoeven [Fri, 17 Jul 2020 08:57:49 +0000 (10:57 +0200)]
Merge tag 'renesas-r8a774e1-dt-binding-defs-tag' into renesas-arm-dt-for-v5.9
Renesas RZ/G2H DT Binding Definitions
Clock and Power Domain definitions for the Renesas RZ/G2H (R8A774E1)
SoC, shared by driver and DT source files.
Ricardo Cañuelo [Mon, 1 Jun 2020 06:33:06 +0000 (08:33 +0200)]
arm64: dts: hisilicon: hikey: fixes to comply with adi, adv7533 DT binding
hi3660-hikey960.dts:
Define a 'ports' node for 'adv7533: adv7533@39' and the
'adi,dsi-lanes' property to make it compliant with the adi,adv7533 DT
binding.
This fills the requirements to meet the binding requirements,
remote endpoints are not defined.
hi6220-hikey.dts:
Change property name s/pd-gpio/pd-gpios, gpio properties should be
plural. This is just a cosmetic change.
Signed-off-by: Ricardo Cañuelo <ricardo.canuelo@collabora.com>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>