Icecream95 [Thu, 14 Oct 2021 03:38:38 +0000 (16:38 +1300)]
panfrost: Don't initialise the trampolines array
PIPE_MAX_SHADER_SAMPLER_VIEWS is 128, so we just end up initialising a
kilobyte of memory for no reason, when usually only a couple of
sampler views are used.
Fixes:
53ef20f08d4 ("panfrost: Handle NULL sampler views")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15366>
Samuel Pitoiset [Mon, 28 Feb 2022 15:00:43 +0000 (16:00 +0100)]
radv: stop zeroing radv_sample_locations_state in barriers
This is useless because all fields should be correctly filled if the
pNext struct is found.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15164>
Samuel Pitoiset [Mon, 28 Feb 2022 14:38:19 +0000 (15:38 +0100)]
radv: move waiting for events to CmdWaitEvents2KHR()
CmdPipelineBarrier doesn't have events.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15164>
Samuel Pitoiset [Wed, 23 Feb 2022 18:49:54 +0000 (19:49 +0100)]
radv: remove unnecessary check in FreeCommandBuffers()
cmd_buffer->pool should never be NULL. Even if AllocateCommandBuffers()
fails, the successfully created cmdbuffers would have it set correctly.
From the Vulkan spec:
"VUID-vkFreeCommandBuffers-pCommandBuffers-parent
Each element of pCommandBuffers that is a valid handle must have
been created, allocated, or retrieved from commandPool."
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15164>
Samuel Pitoiset [Wed, 23 Feb 2022 18:46:15 +0000 (19:46 +0100)]
radv: remove unnecessary NULL check in TrimCommandPool()
This function seems rarely used or maybe never but I noticed this.
From the Vulkan spec:
"VUID-vkTrimCommandPool-commandPool-parameter
commandPool must be a valid VkCommandPool handle".
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15164>
Samuel Pitoiset [Fri, 25 Feb 2022 07:14:25 +0000 (08:14 +0100)]
radv: remove useless check in radv_cmd_buffer_upload_data()
ptr shouldn't be NULL.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15164>
Samuel Pitoiset [Thu, 17 Feb 2022 15:21:47 +0000 (16:21 +0100)]
radv: fix compatibility with VK_IMAGE_CREATE_EXTENDED_USAGE_BIT
Some formats can be accepted if a compatible format is also supported
and VK_IMAGE_CREATE_EXTENDED_USAGE_BIT used.
Fixes new CTS dEQP-VK.image.extended_usage_bit_compatibility.*.
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/6046
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15063>
Samuel Pitoiset [Fri, 11 Mar 2022 08:10:41 +0000 (09:10 +0100)]
radv: update inputs_read when lowering the view index
Otherwise inputs_read doesn't contain the information. This shouldn't
fix anything in practice because radv_shader_info gathers this from
the variable.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15337>
Ernst Sjöstrand [Sat, 12 Mar 2022 16:24:11 +0000 (17:24 +0100)]
intel/compiler: Fix non-trivial designated initializer
Not supported by GCC 7.
src/compiler/nir/nir_builder_opcodes.h:14156:118:
sorry, unimplemented: non-trivial designated initializers not supported
src/intel/compiler/brw_mesh.cpp:515:7:
note: in expansion of macro ‘nir_store_per_primitive_output’
Reviewed-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Fixes:
bc4f8c073a2 ("intel/compiler: inject MUE initialization")
Signed-off-by: Ernst Sjöstrand <ernstp@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15360>
Samuel Pitoiset [Mon, 28 Feb 2022 14:50:34 +0000 (15:50 +0100)]
radv: stop waiting for DMA to be idle for all transfer operations
Only copy operations actually use CP DMA.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15194>
Gert Wollny [Thu, 10 Mar 2022 13:17:55 +0000 (14:17 +0100)]
Revert "llvmpipe: allow vertex processing and fragment processing in parallel"
This reverts commit
ec8104c6b227421b3a21e9c0652e3050066bb169.
llvmpipe: allow vertex processing and fragment processing in parallel
The commit breaks the the virglrenderer vtest environment used in the
virglrednerer CI and running wayland in virtualized environments.
Related: #6130
Related: #6110
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Acked-by: Dave Airlie <airlied@redhat.com>
Acked-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15338>
Samuel Pitoiset [Wed, 16 Feb 2022 18:03:48 +0000 (19:03 +0100)]
radv: fix indirect dispatches on the compute queue on GFX10.3+
For weird reasons, the COPY_DATA packet doesn't seem to copy anything
while on the compute queue. Instead, use PKT3_LOAD_SH_REG_INDEX which
seems to work as expected.
Note that LOAD_SH_REG_INDEX on the compute queue is only supported by
the CP on GFX10.3, so we need to implement a different solution (load
from the indirect BO in the shader) for older generations.
This should fix the Control RT GPU hang.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15053>
Samuel Pitoiset [Wed, 16 Feb 2022 18:02:51 +0000 (19:02 +0100)]
amd: add PKT3_LOAD_SH_REG_INDEX
It seems only available on GFX8+.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15053>
Daniel Schürmann [Fri, 18 Jun 2021 15:51:15 +0000 (17:51 +0200)]
aco/ra: refactor collect_vars() to return a sorted vector
The vector of IDs is sorted with decreasing sizes,
and by increasing assigned registers.
This decouples register assingment from ssa IDs.
Totals from 12694 (9.41% of 134913) affected shaders: (GFX10.3)
VGPRs: 757864 -> 757848 (-0.00%); split: -0.00%, +0.00%
CodeSize:
72350540 ->
72348688 (-0.00%); split: -0.02%, +0.02%
MaxWaves: 237018 -> 237020 (+0.00%); split: +0.00%, -0.00%
Instrs:
13545494 ->
13544699 (-0.01%); split: -0.03%, +0.02%
Latency:
148539203 ->
148533292 (-0.00%); split: -0.01%, +0.00%
InvThroughput:
30319086 ->
30320382 (+0.00%); split: -0.01%, +0.01%
VClause: 326875 -> 327028 (+0.05%); split: -0.05%, +0.09%
SClause: 479833 -> 479837 (+0.00%); split: -0.00%, +0.00%
Copies: 862152 -> 860914 (-0.14%); split: -0.43%, +0.28%
Branches: 317775 -> 317777 (+0.00%)
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11526>
Daniel Schürmann [Fri, 18 Jun 2021 15:45:16 +0000 (17:45 +0200)]
aco/ra: refactor find_vars() to return a vector
instead of std::set<>
No fossil-db changes.
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11526>
Daniel Schürmann [Fri, 18 Jun 2021 14:43:18 +0000 (16:43 +0200)]
aco/ra: special-case get_reg_for_create_vector_copy()
This function implements separate handling for
p_create_vector during get_regs_for_copies().
This simplifies some code and lets more precisely select
swap instructions if possible.
Totals from 876 (0.65% of 134913) affected shaders: (GFX10.3)
VGPRs: 53312 -> 53336 (+0.05%)
CodeSize: 3792936 -> 3788160 (-0.13%); split: -0.15%, +0.03%
MaxWaves: 16084 -> 16078 (-0.04%)
Instrs: 707449 -> 706385 (-0.15%); split: -0.19%, +0.04%
Latency: 6288293 -> 6286677 (-0.03%); split: -0.03%, +0.01%
InvThroughput: 4264450 -> 4263671 (-0.02%); split: -0.02%, +0.00%
VClause: 18655 -> 18679 (+0.13%); split: -0.20%, +0.33%
Copies: 55397 -> 54353 (-1.88%); split: -2.45%, +0.57%
Branches: 12426 -> 12415 (-0.09%)
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11526>
Daniel Schürmann [Fri, 18 Jun 2021 08:59:58 +0000 (10:59 +0200)]
aco/ra: count constant moves in get_reg_create_vector()
Also implements a correct_pos_mask to keep track which
operands are already at the right target position.
To mitigate some regressions, call get_reg_impl() less often.
Totals from 1229 (0.91% of 134913) affected shaders: (GFX10.3)
VGPRs: 60216 -> 59848 (-0.61%)
CodeSize: 3716496 -> 3711268 (-0.14%); split: -0.19%, +0.05%
MaxWaves: 27952 -> 28004 (+0.19%)
Instrs: 685983 -> 685035 (-0.14%); split: -0.20%, +0.06%
Latency: 6727587 -> 6725340 (-0.03%); split: -0.06%, +0.02%
InvThroughput: 9289043 -> 9289866 (+0.01%); split: -0.02%, +0.03%
VClause: 17730 -> 17740 (+0.06%); split: -0.25%, +0.30%
Copies: 54352 -> 53420 (-1.71%); split: -2.46%, +0.75%
Branches: 12122 -> 12121 (-0.01%)
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11526>
Samuel Pitoiset [Fri, 25 Feb 2022 07:54:27 +0000 (08:54 +0100)]
radv: rework the CS regalloc hang workaround
Move it to the pipeline creation to reduce computations in the hot path.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15162>
Samuel Pitoiset [Fri, 25 Feb 2022 07:44:07 +0000 (08:44 +0100)]
radv: fix the CS regalloc hang workaround on GFX6 and few GFX7 chips
RadeonSI uses a different terminology and info->blocks is actually the
number of threads, not the number of blocks (ie. info->grid).
Found by inspection.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15162>
Mike Blumenkrantz [Mon, 7 Mar 2022 20:17:55 +0000 (15:17 -0500)]
zink: use dynamic rasterizer_discard state when possible
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15328>
Mike Blumenkrantz [Mon, 7 Mar 2022 20:09:56 +0000 (15:09 -0500)]
zink: move dynamic state2 pipeline state to substruct in pipeline state
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15328>
Mike Blumenkrantz [Mon, 7 Mar 2022 20:56:58 +0000 (15:56 -0500)]
zink: assert that the dynamic state array size is big enough
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15328>
Dave Airlie [Mon, 7 Mar 2022 00:49:05 +0000 (10:49 +1000)]
radv/winsys: add support for queues without user fences.
The video queues don't have user fence support.
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15257>
Dave Airlie [Mon, 7 Mar 2022 00:45:03 +0000 (10:45 +1000)]
radv/winsys: add a ring level detection for ib bo usage.
The video rings can't use IB bos
v2: add use_ib flag to avoid a bunch of checks.
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15257>
Dave Airlie [Mon, 7 Mar 2022 00:34:37 +0000 (10:34 +1000)]
radv/winsys: add nop packets for uvd and vcn dec.
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15257>
Dave Airlie [Mon, 7 Mar 2022 00:31:20 +0000 (10:31 +1000)]
radv/winsys: complete ring/ip translations.
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15257>
Mihai Preda [Tue, 8 Mar 2022 02:00:43 +0000 (04:00 +0200)]
radeonsi/tests: update piglit baseline on vega20
current as of commit:
67314601947
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15273>
Konstantin Seurer [Fri, 14 Jan 2022 22:05:19 +0000 (23:05 +0100)]
radv: Enable KHR_ray_query
Signed-off-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14565>
Konstantin Seurer [Fri, 14 Jan 2022 22:08:27 +0000 (23:08 +0100)]
radv: Lower ray queries
Signed-off-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14565>
Konstantin Seurer [Fri, 14 Jan 2022 22:06:07 +0000 (23:06 +0100)]
nir,spirv: Preserve ray_query_value
Signed-off-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14565>
Konstantin Seurer [Fri, 14 Jan 2022 22:02:37 +0000 (23:02 +0100)]
radv: Move common code to seperate file
Signed-off-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14565>
Dave Airlie [Sat, 12 Mar 2022 19:42:10 +0000 (05:42 +1000)]
radv: try and fix internal transfer queue mapping
The WSI code wants to remain generic and try and use vulkan APIs,
even though these queues aren't exposed through the API.
Add the transfer queue to the end of the queues.
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Tested-by: Mike Lothian <mike@fireburn.co.uk>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15357>
Mike Blumenkrantz [Sun, 13 Mar 2022 00:15:17 +0000 (19:15 -0500)]
zink: anv ci updates
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15361>
Alyssa Rosenzweig [Sat, 5 Mar 2022 21:27:56 +0000 (16:27 -0500)]
panfrost: Handle txs of cube arrays
We need to divide the array length by 6 to match what OpenGL expects.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15254>
Alyssa Rosenzweig [Sat, 5 Mar 2022 20:49:43 +0000 (15:49 -0500)]
pan/bi: Handle non-2D arrays
Handle arrays generically by using the last component of the coordinate source
as the array index. That works for both 2D arrays and cube arrays, fixing cube
arrays. Cube arrays were already handled correctly in core Panfrost code.
This code path is not tested in dEQP-GLES31 without exposing OES_cube_map_array,
which depends on OES_geometry_shader, which we don't have. Yet we do expose
PIPE_CAP_CUBE_ARRAY, so ARB_cube_map_array is exposed.
Disabling PIPE_CAP_CUBE_ARRAY would be an easy band-aid fix, but it's easy
enough to handle correctly.
dEQP-GLES31 passes with a hack enabling OES_cube_map_array [without geometry
shaders].
Also fixes 1D arrays on Bifrost for the same reasons.
Fixes:
70d6c5675d6 ("pan/bi: Emit TEXC with builder")
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15254>
Alyssa Rosenzweig [Sat, 5 Mar 2022 20:10:10 +0000 (15:10 -0500)]
panfrost: Emulate GL_CLAMP on Bifrost
Hardware support was removed with Midgard. Use mesa/st to emulate GL_CLAMP with
nir_lower_tex automatically (the Zink lowering), and disable GL_MIRROR_CLAMP
which isn't lowered correctly.
Fixes *texwrap* Piglit tests on G52.
Fixes:
f9ceab7b237 ("panfrost: Fix CLAMP wrap mode")
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15253>
Rob Clark [Fri, 11 Mar 2022 04:46:23 +0000 (20:46 -0800)]
freedreno/ir3: Don't try re-swapping cat3 srcs
This can lead us to endless loops of "progress".. Note fixes commit
commit really just exposed an existing problem.
Fixes:
9c9e8c33498 ("nir: Reorder ffma and fsub combining")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/6133
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15336>
Rob Clark [Fri, 11 Mar 2022 04:42:00 +0000 (20:42 -0800)]
freedreno/ir3: Remove unused define
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15336>
Rob Clark [Thu, 9 Apr 2020 16:39:09 +0000 (09:39 -0700)]
mesa: Easier shader capture for android
I've typed this patch a few times already.. lets just add some debug
code which can be easily switched on so I don't have to type it again.
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15336>
Dave Airlie [Mon, 28 Feb 2022 08:01:44 +0000 (18:01 +1000)]
crocus: force ignore_sample_mask_out on gen4/5 for precompile
on gen4/5 this won't ever be anything else, avoids some recompiles.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15315>
Dave Airlie [Thu, 3 Mar 2022 03:48:34 +0000 (13:48 +1000)]
intel: add some missing debug recompile info.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15315>
Jason Ekstrand [Fri, 11 Mar 2022 18:47:21 +0000 (12:47 -0600)]
bifrost: Constant fold after lower_explicit_io
nir_lower_explicit_io generates mul+add chains even for constants. One
round of constant folding should get rid of these. This fixes all of
the dEQP-VK.glsl.conversions.* tests on panvk.
GoGoGoGo'd-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15349>
Alyssa Rosenzweig [Sat, 5 Mar 2022 22:07:37 +0000 (17:07 -0500)]
mesa: Remove unused framebuffer validation
Probably unused since we deleted classic.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15255>
Jason Ekstrand [Fri, 11 Mar 2022 21:28:26 +0000 (15:28 -0600)]
bifrost: Handle nir_op_frexp* and nir_op_ldexp
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15352>
Jason Ekstrand [Fri, 11 Mar 2022 22:11:16 +0000 (16:11 -0600)]
bifrost: Implement fine and coarse derivatives
We leave the undecorated ops as fine so we don't disturb panfrost. For
coarse derivatives, we use a lane ID of 0 for the first lane and 1 or 2
for the second depending on axis. This ensures that coarse derivatives
are quad-uniform.
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15352>
Jason Ekstrand [Fri, 11 Mar 2022 22:09:28 +0000 (16:09 -0600)]
bifrost: Simplify derivatives a bit
Instead of two magic ternary operations, define a new `axis` temporary
which is 1 for X and 2 for Y. Then define everything else in terms of
this variable. In particular, the mask operation we do on LANE_ID is a
mask so it makes more sense to use ~axis than 1/2 but in the other
order.
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15352>
Jason Ekstrand [Fri, 11 Mar 2022 20:55:48 +0000 (14:55 -0600)]
bifrost: Lower usub_borrow
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15352>
Jonathan Gray [Sat, 12 Mar 2022 00:08:56 +0000 (11:08 +1100)]
util: fix msvc build
Fix msvc build regression after
0536b691338f2759b850f9ec94634033a5d1f9e1
reported by Prodea Alexandru-Liviu.
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/6137
Fixes:
0536b691338 ("util: fix build with clang 10 on mips64")
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15355>
Jason Ekstrand [Sat, 12 Feb 2022 05:41:03 +0000 (23:41 -0600)]
anv: Allow MSAA resolve with different numbers of planes
The Vulkan spec for VK_KHR_depth_stencil_resolve allows a format
mismatch between the primary attachment and the resolve attachment
within certain limits. In particular,
VUID-VkSubpassDescriptionDepthStencilResolve-pDepthStencilResolveAttachment-03181
If pDepthStencilResolveAttachment is not NULL and does not have the
value VK_ATTACHMENT_UNUSED and VkFormat of
pDepthStencilResolveAttachment has a depth component, then the
VkFormat of pDepthStencilAttachment must have a depth component with
the same number of bits and numerical type
VUID-VkSubpassDescriptionDepthStencilResolve-pDepthStencilResolveAttachment-03182
If pDepthStencilResolveAttachment is not NULL and does not have the
value VK_ATTACHMENT_UNUSED, and VkFormat of
pDepthStencilResolveAttachment has a stencil component, then the
VkFormat of pDepthStencilAttachment must have a stencil component
with the same number of bits and numerical type
So you can resolve from a depth/stencil format to a depth-only or
stencil-only format so long as the number of bits matches.
Unfortunately, this has never been tested because the CTS tests which
purport to test this are broken and actually test with a destination
combined depth/stencil format.
Fixes:
5e4f9ea363a6 ("anv: Implement VK_KHR_depth_stencil_resolve")
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15333>
Mike Blumenkrantz [Fri, 11 Mar 2022 19:46:06 +0000 (14:46 -0500)]
zink: remove flake
this had already been resolved by the time the flake was added
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15350>
Jason Ekstrand [Thu, 10 Mar 2022 16:25:45 +0000 (10:25 -0600)]
lavapipe: Use the auto-generated vk_enqueue_BeginRendering
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Acked-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15325>
Jason Ekstrand [Thu, 10 Mar 2022 16:24:06 +0000 (10:24 -0600)]
vulkan/cmd_queue: Properly support non-array pointer members
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/5440
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Acked-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15325>
Thong Thai [Mon, 9 Mar 2020 12:35:30 +0000 (08:35 -0400)]
radeonsi: add option to disable EFC
Signed-off-by: Thong Thai <thong.thai@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15196>
Thong Thai [Tue, 1 Mar 2022 12:46:28 +0000 (07:46 -0500)]
radeon: add EFC support to only VCN2.0 devices
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/5228
Signed-off-by: Thong Thai <thong.thai@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15196>
Thong Thai [Thu, 3 Mar 2022 16:05:22 +0000 (11:05 -0500)]
frontends/va: zero-copy efc
Signed-off-by: Thong Thai <thong.thai@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15196>
Thong Thai [Mon, 28 Feb 2022 20:23:17 +0000 (15:23 -0500)]
frontends/va: add encoder format conversion (EFC) support
Signed-off-by: Thong Thai <thong.thai@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15196>
Thong Thai [Mon, 28 Feb 2022 20:22:23 +0000 (15:22 -0500)]
gallium: add parameters for encoder format conversion (EFC) support
Signed-off-by: Thong Thai <thong.thai@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15196>
Tapani Pälli [Fri, 11 Mar 2022 05:59:37 +0000 (07:59 +0200)]
ci: update various ci result files
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12936>
Tapani Pälli [Thu, 29 Jul 2021 16:11:30 +0000 (19:11 +0300)]
mesa: check for valid internalformat with glTex[Sub]Image
This changes our error handling to be compatible with upcoming
specification change that unifies glTex[Sub]Image error handling
between OpenGL ES 2.0 vs ES 3.0+ specifications, see:
https://gitlab.khronos.org/opengl/API/-/issues/147
OpenGL ES 2.0.25 spec states:
"Specifying a value for internalformat that is not one of
the above values generates the error INVALID_VALUE. If
internalformat does not match format, the error
INVALID_OPERATION is generated."
This fixes following new tests:
KHR-GLES31.core.compressed_format.*
KHR-GLES32.core.compressed_format.*
v2: GL_INVALID_OPERATION -> GL_INVALID_VALUE in extension
checks, remove (now overlapping) extension checks from
_mesa_gles_error_check_format_and_type (Eric Anholt)
v3: take GLES version in to account in internalformat checks
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12936>
Lionel Landwerlin [Thu, 10 Mar 2022 20:34:25 +0000 (22:34 +0200)]
anv: silence compiler warning
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15241>
Lionel Landwerlin [Tue, 8 Mar 2022 13:59:38 +0000 (15:59 +0200)]
anv: make a couple of descriptor function private
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15241>
Lionel Landwerlin [Fri, 4 Mar 2022 10:52:04 +0000 (12:52 +0200)]
anv: rename host only descriptor internal flag
We add an assert to verify that those are not bound.
v2: Drop != 0 (Tapani)
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15241>
Lionel Landwerlin [Tue, 8 Mar 2022 14:56:50 +0000 (16:56 +0200)]
anv: don't lazy allocate surface states in descriptor sets
In
4001d9ce1a6e we started lazily allocating surface states in the
descriptor sets rather than upfront in the descriptor pool. This was
to workaround vkd3d-proton allocating more than we could handle at the
HW level.
The issue introduced in that change is that we didn't protect the
descriptor pool free list as well as the anv_state_stream which are
now potentially used from different threads through the descriptor set
write functions.
This reverts the lazy allocation part of that change. Host only
descriptor sets changes remain.
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes:
4001d9ce1a6e ("anv: Handle VK_DESCRIPTOR_POOL_CREATE_HOST_ONLY_BIT_VALVE for descriptor sets")
Reviewed-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15241>
Lionel Landwerlin [Mon, 7 Mar 2022 08:29:19 +0000 (10:29 +0200)]
anv: fix acceleration structure descriptor copies
We're not supposed to have a
VkWriteDescriptorSetAccelerationStructureKHR when doing a copy. We
should instead get the acceleration structure object from the source
descriptor.
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes:
03e1e19246da ("anv: Refactor descriptor copy")
Reviewed-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15241>
Pierre-Eric Pelloux-Prayer [Mon, 7 Mar 2022 10:02:45 +0000 (11:02 +0100)]
radeonsi: don't clear framebuffer.state before dcc decomp
This causes inconsistencies between sctx->framebuffer.state and other
sctx->framebuffer properties (like compressed_cb_mask).
The point of this code was to fix an issue with vi_separate_dcc_stop_query,
which was removed by
804e2924406 we can safely drop it.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/6099
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15261>
Kenneth Graunke [Thu, 10 Mar 2022 03:21:23 +0000 (19:21 -0800)]
iris: Restore flagging of dirty bindings in binder_realloc
When I switched iris over to use 3DSTATE_BINDING_TABLE_POOL_ALLOC, I
stopped flagging things dirty when allocating a new binder, because
the contents of the binding table were still valid, thanks to us not
having to subtract Surface State Base Address anymore.
This unfortunately missed the point that the old binding table is in the
old buffer, which is no longer what the binder pool base address points
to. So we'd either need to copy it over, or just flag it dirty and
re-emit it on the next draw.
Fixes misrendering in Ryujinx.
Fixes:
8b9045e7a45 ("intel: Use 3DSTATE_BINDING_TABLE_POOL_ALLOC exclusively on Gfx11+")
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15314>
Samuel Pitoiset [Thu, 10 Mar 2022 08:15:12 +0000 (09:15 +0100)]
radv: optimize the number of loaded components for VS inputs in NIR
fossils-db (Sienna Cichlid):
Totals from 3691 (2.74% of 134913) affected shaders:
VGPRs: 121368 -> 121584 (+0.18%); split: -0.36%, +0.54%
CodeSize: 7597912 -> 7561140 (-0.48%); split: -0.66%, +0.18%
MaxWaves: 104706 -> 104772 (+0.06%)
Instrs: 1441229 -> 1437652 (-0.25%); split: -0.53%, +0.28%
Latency: 5500766 -> 5482101 (-0.34%); split: -0.45%, +0.11%
InvThroughput: 804401 -> 797178 (-0.90%); split: -1.09%, +0.20%
VClause: 25185 -> 25143 (-0.17%); split: -0.50%, +0.33%
SClause: 27486 -> 27445 (-0.15%); split: -0.57%, +0.42%
Copies: 143816 -> 147900 (+2.84%); split: -0.54%, +3.38%
PreSGPRs: 109584 -> 110396 (+0.74%); split: -0.04%, +0.79%
PreVGPRs: 95541 -> 94583 (-1.00%); split: -1.12%, +0.12%
fossils-db (Polaris10):
Totals from 1773 (1.30% of 135960) affected shaders:
SGPRs: 80848 -> 80864 (+0.02%); split: -0.14%, +0.16%
VGPRs: 56424 -> 55600 (-1.46%); split: -1.47%, +0.01%
CodeSize: 1732588 -> 1696840 (-2.06%); split: -2.07%, +0.01%
MaxWaves: 12103 -> 12106 (+0.02%)
Instrs: 347684 -> 341597 (-1.75%); split: -1.76%, +0.01%
Latency: 2542840 -> 2523946 (-0.74%); split: -0.95%, +0.21%
InvThroughput: 924601 -> 905102 (-2.11%); split: -2.13%, +0.02%
VClause: 9565 -> 9545 (-0.21%); split: -0.51%, +0.30%
SClause: 10587 -> 10333 (-2.40%); split: -2.82%, +0.43%
Copies: 19321 -> 20307 (+5.10%); split: -0.78%, +5.88%
PreSGPRs: 30879 -> 30875 (-0.01%); split: -0.20%, +0.18%
PreVGPRs: 41211 -> 41270 (+0.14%); split: -0.73%, +0.87%
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15317>
Dave Airlie [Fri, 5 Nov 2021 06:03:24 +0000 (16:03 +1000)]
radv: abstract queue family away from queue family index.
If we introduce another queue type (video decode) we can have a
disconnect between the RADV_QUEUE_ enum and the API queue_family_index.
currently the driver has
GENERAL, COMPUTE, TRANSFER which would end up at QFI 0, 1, <nothing>
since we don't create transfer.
Now if I add VDEC we get
GENERAL, COMPUTE, TRANSFER, VDEC at QFI 0, 1, <nothing>, 2
or if you do nocompute
GENERAL, COMPUTE, TRANSFER, VDEC at QFI 0, <nothing>, <nothing>, 1
This means we have to add a remapping table between the API qfi
and the internal qf.
This patches tries to do that, in theory right now it just adds
overhead, but I'd like to exercise these paths.
v2: add radv_queue_ring abstraction, and pass physical device in,
as it makes adding uvd later easier.
v3: rename, and drop one direction as unneeded now, drop queue_family_index
from cmd_buffers.
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13687>
Mike Blumenkrantz [Mon, 31 Jan 2022 17:00:27 +0000 (12:00 -0500)]
lavapipe: more descriptor validation
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14656>
Mike Blumenkrantz [Fri, 21 Jan 2022 21:38:08 +0000 (16:38 -0500)]
lavapipe: validate per-stage descriptor limits when creating pipeline layouts
this is super annoying to track down later, so just crash early if it's seen
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14656>
Mike Blumenkrantz [Fri, 21 Jan 2022 21:37:33 +0000 (16:37 -0500)]
lavapipe: make device limits a physical device struct
it's useful to have this info around and a bit simpler to gather
info on init
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14656>
Mike Blumenkrantz [Tue, 8 Mar 2022 01:20:11 +0000 (20:20 -0500)]
anv: fix some dynamic rasterization discard cases in pipeline construction
cc: mesa-stable
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15280>
Mike Blumenkrantz [Tue, 8 Mar 2022 01:15:50 +0000 (20:15 -0500)]
anv: fix CmdSetColorWriteEnableEXT for maximum rts
Fixes:
b15bfe92f7f ("anv: implement VK_EXT_color_write_enable")
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15280>
Mike Blumenkrantz [Mon, 7 Mar 2022 21:35:04 +0000 (16:35 -0500)]
anv: fix xfb usage with rasterizer discard
in the initial implementation, a stream like:
* CmdBeginTransformFeedbackEXT
* CmdSetRasterizerDiscardEnableEXT
* CmdDraw
* CmdEndTransformFeedbackEXT
* CmdBeginTransformFeedbackEXT
* CmdDraw
* CmdEndTransformFeedbackEXT
would never enable transform feedback, as it only checked for the change
in rasterizer_discard state
Fixes:
4d531c67dfd ("anv: support rasterizer discard dynamic state")
Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15269>
Dave Airlie [Thu, 10 Mar 2022 05:01:20 +0000 (15:01 +1000)]
crocus: don't map scanout buffers as write-back
This essentially ports
64405230774210488dedbc54d73ba394ec6ae802
Author: Keith Packard <keithp@keithp.com>
Date: Fri Aug 6 16:11:18 2021 -0700
iris: Map scanout buffers WC instead of WB [v2]
to crocus.
Fixes:
f3630548f1da ("crocus: initial gallium driver for Intel gfx 4-7")
Reviewed-by: Zoltán Böszörményi <zboszor@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15313>
Mike Blumenkrantz [Wed, 9 Mar 2022 16:48:51 +0000 (11:48 -0500)]
llvmpipe: fix occlusion queries with early depth test
for genuine early depth tests, the samplecount must be updated after depth
test but before samplemask is applied
for inferred-early or regular depth tests, the samplemask can be applied
before the depth test
Fixes:
d9276ae965a ("llvmpipe: handle gl_SampleMask writing.")
fixes:
dEQP-VK.fragment_operations.early_fragment.sample_count_early_fragment_tests_depth_samples_4
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15319>
Jason Ekstrand [Thu, 10 Mar 2022 17:02:08 +0000 (11:02 -0600)]
lavapipe: Use the common vk_enqueue_CmdBindDescriptorSets
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15329>
Jason Ekstrand [Thu, 10 Mar 2022 16:56:30 +0000 (10:56 -0600)]
lavapipe: Reference count pipeline layouts
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15329>
Jason Ekstrand [Thu, 10 Mar 2022 16:52:07 +0000 (10:52 -0600)]
lavapipe: Allocate descriptor set layouts with DEVICE scope
Because they can come and go at any time, we can't use OBJECT scope
because that might confuse the client allocator. Instead, use DEVICE
scope and always allocate off the device allocator.
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15329>
Jason Ekstrand [Wed, 9 Mar 2022 21:27:33 +0000 (15:27 -0600)]
vulkan/cmd_queue: Add a common vk_cmd_enqueue_CmdBindDescriptorSets
In order for this to work, the driver must reference-count pipeline
layouts so we can take a reference while the command is in the queue.
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15329>
Jason Ekstrand [Wed, 9 Mar 2022 21:15:40 +0000 (15:15 -0600)]
vulkan/cmd_queue: Add a driver_free_cb hook
If a driver sets driver_data but not driver_free_cb, driver_data will
get freed along with the command. If a driver sets driver_free_cb,
driver_data will not get automatically freed but the callback will get
called before the rest of the data structure is freed.
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15329>
Mike Blumenkrantz [Thu, 10 Mar 2022 16:17:40 +0000 (11:17 -0500)]
lavapipe: ci updates
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15322>
Mike Blumenkrantz [Thu, 10 Mar 2022 16:16:03 +0000 (11:16 -0500)]
lavapipe: run nir_opt_copy_prop_vars during optimization loop
this enables better elimination of operations
fixes:
dEQP-VK.graphicsfuzz.spv-stable-mergesort-flatten-selection-dead-continues
fixes #5458
cc: mesa-stable
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15322>
Mike Blumenkrantz [Thu, 10 Mar 2022 19:25:51 +0000 (14:25 -0500)]
lavapipe: ci updates
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15320>
Mike Blumenkrantz [Wed, 9 Mar 2022 19:26:19 +0000 (14:26 -0500)]
lavapipe: skip format checks for EXTENDED_USAGE
we can effectively skip any kind of checks here and just assume that one
of two scenarios is in effect:
* the user is about to attempt some incredibly illegal behavior that VVL will catch
* the user is about to attempt a pro gamer move and we'll be fine
in either case, it's EXTENDED_USAGE, so hopefully we're about to make a texture
view from a compatible and supported format
cc: mesa-stable
fixes:
dEQP-VK.image.extended_usage_bit_compatibility.image_format_properties*
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15320>
Mike Blumenkrantz [Thu, 10 Mar 2022 19:05:32 +0000 (14:05 -0500)]
lavapipe: use the correct value for dynamic render resolve attachment indexing
subpass->color_count is (obviously) not set yet, so this would just clobber
the color attachments any time resolves were used
Fixes:
8a6160a3542 ("lavapipe: VK_KHR_dynamic_rendering")
fixes:
dEQP-VK.draw.dynamic_rendering.multiple_interpolation.structured.with_sample_decoration.4_samples
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15330>
Dave Airlie [Wed, 9 Mar 2022 06:31:46 +0000 (16:31 +1000)]
lavapipe: remove broken workaround for zink depth texturing.
Cc: mesa-stable
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15297>
Dave Airlie [Thu, 10 Mar 2022 03:07:37 +0000 (13:07 +1000)]
zink: workaround depth texture mode alpha.
Since spir-v only has single channel depth sampling, it breaks
with the old school GL_ALPHA depth mode swizzle, so just detect
that case and smash all the channels.
Cc: mesa-stable
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15297>
Connor Abbott [Tue, 7 Dec 2021 11:11:31 +0000 (12:11 +0100)]
tu: Expose subgroup arithmetic
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14107>
Connor Abbott [Tue, 7 Dec 2021 11:11:05 +0000 (12:11 +0100)]
ir3: Add support for subgroup arithmetic
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14107>
Connor Abbott [Mon, 10 Jan 2022 12:34:16 +0000 (13:34 +0100)]
ir3: Track physical edges when inserting (ss) for shared regs
Normally this wouldn't matter, but it will matter for the upcoming scan
macro because the running tally is communicated through a shared
register across a physical edge. It may also matter if a live-range
split occurs.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14107>
Connor Abbott [Mon, 10 Jan 2022 13:01:34 +0000 (14:01 +0100)]
util/bitset: Fix off-by-one in __bitset_set_range
Fixes:
b3b03e33c9f ("util/bitset: add BITSET_SET_RANGE(..)")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14107>
Connor Abbott [Thu, 10 Mar 2022 10:24:44 +0000 (11:24 +0100)]
ir3/spill: Mark reload destination as early-clobber
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14107>
Connor Abbott [Fri, 3 Dec 2021 11:10:04 +0000 (12:10 +0100)]
ir3/ra: Add IR3_REG_EARLY_CLOBBER
We'll need this to model the subgroup reduction macros.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14107>
Connor Abbott [Thu, 2 Dec 2021 18:41:40 +0000 (19:41 +0100)]
ir3/ra: Add proper support for multiple destinations
We weren't considering the other destinations when allocating a
destination, so we could allocate overlapping destinations. This wasn't
done before because we never had a need for it, but the subgroup
reduction macros will need it.
The trickiest part of this is that we have to rewrite the
compress_regs_left fallback, because we may have to move around the
other already-allocated destinations. We now have a list of destinations
to (re)allocate in addition to the popped live intervals. For the rest
of the destination handling, we can just bail out if the proposed spot
for something overlaps another destination, but for the fallback we have
to handle all the cases gracefully. I also added support for odd
combinations of multiple destinations where some of them are tied, which
we'll use in the next commit to handle early-clobber destinations and
which will actually be used because one of the destinations of the
subgroup reduction macro will be early-clobber. The result is that the
order of intervals to allocate is now a lot more complicated.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14107>
Connor Abbott [Mon, 10 Jan 2022 17:16:05 +0000 (18:16 +0100)]
ir3/ra: Sanitize parallel copy flags better
For pcopies we only care about the register's type, i.e. whether its a
half-register and whether it's an array (plus its size). Copying over
other flags like IR3_REG_RELATIV just leads to sadness and validator
assertions.
Fixes:
0ffcb19b9d9 ("ir3: Rewrite register allocation")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14107>
Connor Abbott [Thu, 2 Dec 2021 18:41:12 +0000 (19:41 +0100)]
ir3/ra: Fix ra_foreach_dst_n
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14107>
Connor Abbott [Thu, 2 Dec 2021 13:48:08 +0000 (14:48 +0100)]
ir3/ra: Fix tied destination handling with multiple destinations
Before, we were careful to
1. Get the source physreg.
2. Allocate the destination.
3. Insert a copy with the source being the physreg from step 1.
and this guaranteed that if the tied source were moved in step 2 we'd
still insert a copy from the correct place. However this won't work with
multiple destinations because an earlier destination could've already
moved the tied source around. Instead flip steps 2 and 3 (we'll insert
the copy before we allocate the interval, but that's ok) and run the
first two steps in a separate loop before any destinations are
allocated.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14107>
Connor Abbott [Wed, 1 Dec 2021 15:33:57 +0000 (16:33 +0100)]
ir3/sched: Support multiple destinations
Note: this is a behavior change for arrays, because it will count the
entire array instead of just the components written in the register
pressure calculation. However this is more accurate since this matches
how RA works.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14107>
Connor Abbott [Wed, 1 Dec 2021 15:24:46 +0000 (16:24 +0100)]
ir3/dce: Support multiple destinations
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14107>
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