platform/upstream/llvm.git
3 years ago[mlir] Add missing const * updates in StandardAttributes
Tres Popp [Thu, 19 Nov 2020 21:48:03 +0000 (22:48 +0100)]
[mlir] Add missing const * updates in StandardAttributes

This add missing updates to the header file that caused linking issues.
Original change at https://reviews.llvm.org/D91740

Differential Revision: https://reviews.llvm.org/D91822

3 years agoRemove unused private fields
Geoffrey Martin-Noble [Thu, 19 Nov 2020 21:34:40 +0000 (13:34 -0800)]
Remove unused private fields

Unused since https://reviews.llvm.org/D91762 and triggering
-Wunused-private-field

```
llvm/lib/Transforms/Instrumentation/DataFlowSanitizer.cpp:365:13: error: private field 'GetArgTLS' is not used [-Werror,-Wunused-private-field]
  Constant *GetArgTLS;
            ^
llvm/lib/Transforms/Instrumentation/DataFlowSanitizer.cpp:366:13: error: private field 'GetRetvalTLS' is not used [-Werror,-Wunused-private-field]
  Constant *GetRetvalTLS;
```

Reviewed By: stephan.yichao.zhao

Differential Revision: https://reviews.llvm.org/D91820

3 years ago[InstCombine] Fold `and(shl(zext(x), width(SIGNMASK) - width(%x)), SIGNMASK)` to...
Roman Lebedev [Thu, 19 Nov 2020 21:07:48 +0000 (00:07 +0300)]
[InstCombine] Fold `and(shl(zext(x), width(SIGNMASK) - width(%x)), SIGNMASK)` to `and(sext(%x), SIGNMASK)`

One less instruction and reducing use count of zext.
As alive2 confirms, we're fine with all the weird combinations of
undef elts in constants, but unless the shift amount was undef
for a lane, we must sanitize undef mask to zero, since sign bits
are no longer zeros.

https://rise4fun.com/Alive/d7r
```
----------------------------------------
Optimization: zz
Precondition: ((C1 == (width(%r) - width(%x))) && isSignBit(C2))
  %o0 = zext %x
  %o1 = shl %o0, C1
  %r = and %o1, C2
=>
  %n0 = sext %x
  %r = and %n0, C2

Done: 2016
Optimization is correct!
```

3 years ago[NFC][InstCombine] Add test coverage for `and (sext %x), SIGNMASK`-like pattern
Roman Lebedev [Thu, 19 Nov 2020 21:04:48 +0000 (00:04 +0300)]
[NFC][InstCombine] Add test coverage for `and (sext %x), SIGNMASK`-like pattern

3 years ago[MemLoc] Use hasValue() method more (NFC)
Nikita Popov [Thu, 19 Nov 2020 21:28:39 +0000 (22:28 +0100)]
[MemLoc] Use hasValue() method more (NFC)

Followup to 7de7c40898a8f815d661781c92757f93fa4c6e5b. I previously
removed a number of == comparisons to LocationSize::unknown(), but
missed these != comparisons.

3 years ago[mlir] Add an assertion on creating an Operation with null result types
Alex Zinenko [Thu, 19 Nov 2020 18:35:35 +0000 (19:35 +0100)]
[mlir] Add an assertion on creating an Operation with null result types

Null types are commonly used as an error marker. Catch them in the constructor
of Operation if they are present in the result type list, as otherwise this
could lead to further surprising behavior when querying op result types.

Fix AsyncToLLVM and StandardToLLVM that were using null types when constructing
operations.

Reviewed By: rriddle

Differential Revision: https://reviews.llvm.org/D91770

3 years agoRemove deadcode from DFSanFunction::get*TLS*()
Jianzhou Zhao [Thu, 19 Nov 2020 05:27:13 +0000 (05:27 +0000)]
Remove deadcode from DFSanFunction::get*TLS*()

clean more deadcode after D84704

Reviewed-by: morehouse
Differential Revision: https://reviews.llvm.org/D91762

3 years ago[mlir] Split BufferUtils.h out of Bufferize.h
Sean Silva [Mon, 16 Nov 2020 21:10:20 +0000 (13:10 -0800)]
[mlir] Split BufferUtils.h out of Bufferize.h

These utilities are more closely associated with the buffer
optimizations and buffer deallocation than with the dialect conversion
stuff in Bufferize.h. So move them out.

This makes Bufferize.h very easy to understand and completely focused on
dialect conversion.

Differential Revision: https://reviews.llvm.org/D91563

3 years ago[MemLoc] Use hasValue() method (NFC)
Nikita Popov [Thu, 19 Nov 2020 20:53:20 +0000 (21:53 +0100)]
[MemLoc] Use hasValue() method (NFC)

Instead of comparing to LocationSize::unknown(), prefer calling
the hasValue() method instead, which is less reliant on
implementation details.

3 years ago[MemLoc] Specify LocationSize in unit test
Nikita Popov [Thu, 19 Nov 2020 20:50:44 +0000 (21:50 +0100)]
[MemLoc] Specify LocationSize in unit test

Followup to 393b9e9db31a3f83bc8b813ee24b56bc8ed93a49,
where I missed updating one MemoryLocation use inside a unit test.

3 years ago[MemLoc] Require LocationSize argument (NFC)
Nikita Popov [Thu, 19 Nov 2020 20:41:51 +0000 (21:41 +0100)]
[MemLoc] Require LocationSize argument (NFC)

When constructing a MemoryLocation by hand, require that a
LocationSize is explicitly specified. D91649 will split up
LocationSize::unknown() into two different states, and callers
should make an explicit choice regarding the kind of MemoryLocation
they want to have.

3 years agoFix rollback of first block erasure in a region.
Tres Popp [Thu, 19 Nov 2020 13:27:58 +0000 (14:27 +0100)]
Fix rollback of first block erasure in a region.

Differential Revision: https://reviews.llvm.org/D91788

3 years agoReplace the equivalent code by UnionTableAddr
Jianzhou Zhao [Thu, 19 Nov 2020 04:39:25 +0000 (04:39 +0000)]
Replace the equivalent code by UnionTableAddr

UnionTableAddr is always inlined.

Reviewed-by: morehouse
Differential Revision: https://reviews.llvm.org/DD91758

3 years ago[BasicAA] Deoptimize intrinsics don't modify memory
Artur Pilipenko [Tue, 17 Nov 2020 20:16:24 +0000 (12:16 -0800)]
[BasicAA] Deoptimize intrinsics don't modify memory

Similarly to assumes and guards deoptimize intrinsics are
marked as writing to ensure proper control dependencies
but they never modify any particular memory location.

Differential Revision: https://reviews.llvm.org/D91658

3 years agoMake array pointers in the CAPI const
George [Thu, 19 Nov 2020 18:45:43 +0000 (10:45 -0800)]
Make array pointers in the CAPI const

These pointers do not need to be mutable. This has an affect that generated function signatures in the Swift bindings now use `UnsafePointer` instead of `UnsafeMutablePointer`.

Reviewed By: ftynse, mehdi_amini

Differential Revision: https://reviews.llvm.org/D91740

3 years ago[Lint] Use MemoryLocation
Nikita Popov [Thu, 19 Nov 2020 19:53:27 +0000 (20:53 +0100)]
[Lint] Use MemoryLocation

Instead of separately passing pointer and size, make use of
MemoryLocation. This allows us to also reuse all the existing
logic for determining the MemoryLocation correponding to an
instruction or call argument.

Not quite NFC because used locations may be more precise in some
cases.

3 years ago[libc++] Add documentation for setting up new CI jobs
Louis Dionne [Thu, 19 Nov 2020 19:22:28 +0000 (14:22 -0500)]
[libc++] Add documentation for setting up new CI jobs

3 years ago[Polly] Use LocationSize::unknown() (NFC)
Nikita Popov [Thu, 19 Nov 2020 19:25:30 +0000 (20:25 +0100)]
[Polly] Use LocationSize::unknown() (NFC)

Avoid MemoryLocation::UnknownSize when we're initializing a
LocationSize.

3 years ago[gn build] (manually) merge 1fb91fcf9cfe849
Nico Weber [Thu, 19 Nov 2020 19:24:27 +0000 (14:24 -0500)]
[gn build] (manually) merge 1fb91fcf9cfe849

3 years ago[NPM] Move more O0 pass building into PassBuilder
Arthur Eubanks [Mon, 16 Nov 2020 20:48:42 +0000 (12:48 -0800)]
[NPM] Move more O0 pass building into PassBuilder

This moves handling of alwaysinline, coroutines, matrix lowering, PGO,
and LTO-required passes into PassBuilder. Much of this is replicated
between Clang and opt. Other out-of-tree users also replicate some of
this, such as Rust [1] replicating the alwaysinline, LTO, and PGO
passes.

The LTO passes are also now run in
build(Thin)LTOPreLinkDefaultPipeline() since they are semantically
required for (Thin)LTO.

[1]: https://github.com/rust-lang/rust/blob/f5230fbf76bafd86ee4376a0e26e551df8d17fec/compiler/rustc_llvm/llvm-wrapper/PassWrapper.cpp#L896

Reviewed By: tejohnson

Differential Revision: https://reviews.llvm.org/D91585

3 years agoFix crash after looking up dwo_id=0 in CU index.
Jorge Gorbe Moya [Thu, 19 Nov 2020 18:59:08 +0000 (10:59 -0800)]
Fix crash after looking up dwo_id=0 in CU index.

In the current state, if getFromHash(0) is called and there's no CU with
dwo_id=0, the lookup will stop at an empty slot, then the check
`Rows[H].getSignature() != S` won't cause the lookup to fail and return
a nullptr (as it should), because the empty slot has a 0 in the
signature field, and a pointer to the empty slot will be incorrectly
returned.

This patch fixes this by using the index field in the hash entry to
check for empty slots: signature = 0 can match a valid hash but
according to the spec the index for an occupied slot will always be
non-zero.

Differential Revision: https://reviews.llvm.org/D91670

3 years ago[clangd] Express ASAN interactions of tests more clearly. NFC
Sam McCall [Thu, 19 Nov 2020 19:14:40 +0000 (20:14 +0100)]
[clangd] Express ASAN interactions of tests more clearly. NFC

3 years ago[mlir][BuiltinDialect] Resolve comments from D91571
River Riddle [Thu, 19 Nov 2020 18:43:12 +0000 (10:43 -0800)]
[mlir][BuiltinDialect] Resolve comments from D91571

* Move ops to a BuiltinOps.h
* Add file comments

3 years ago[clangd] Also detect corrupt stri table size.
Sam McCall [Wed, 11 Nov 2020 21:34:46 +0000 (22:34 +0100)]
[clangd] Also detect corrupt stri table size.

Differential Revision: https://reviews.llvm.org/D91299

3 years ago[OpenMP] Add support for Intel's umonitor/umwait
AndreyChurbanov [Thu, 19 Nov 2020 19:04:21 +0000 (22:04 +0300)]
[OpenMP] Add support for Intel's umonitor/umwait

Patch by tlwilmar (Terry Wilmarth)

Differential Revision: https://reviews.llvm.org/D91189

3 years ago[RISCV] Add test cases for missed grevi/greviw opportunities. NFC
Fraser Cormack [Thu, 19 Nov 2020 18:39:35 +0000 (18:39 +0000)]
[RISCV] Add test cases for missed grevi/greviw opportunities. NFC

3 years ago[libc++] Mark a few tests as unsupported on older Clangs to fix bots
Louis Dionne [Thu, 19 Nov 2020 18:36:48 +0000 (13:36 -0500)]
[libc++] Mark a few tests as unsupported on older Clangs to fix bots

3 years ago[CUDA] Unbreak CUDA compilation with -std=c++20
Artem Belevich [Thu, 19 Nov 2020 18:06:57 +0000 (10:06 -0800)]
[CUDA] Unbreak CUDA compilation with -std=c++20

Standard libc++ headers in stdc++ mode include <new> which picks up
cuda_wrappers/new before any of the CUDA macros have been defined.

We can not include CUDA headers that early, so the work-around is to define
__device__ in the wrapper header itself.

Differential Revision: https://reviews.llvm.org/D91807

3 years ago[mlir] Add a missing dependency to LinalgToLLVM
Stella Stamenova [Thu, 19 Nov 2020 18:30:40 +0000 (10:30 -0800)]
[mlir] Add a missing dependency to LinalgToLLVM

Generate passes.h before trying to use it

Reviewed By: mehdi_amini

Differential Revision: https://reviews.llvm.org/D91750

3 years ago[llvm][IR] Add dso_local_equivalent Constant
Leonard Chan [Wed, 1 Apr 2020 22:25:04 +0000 (15:25 -0700)]
[llvm][IR] Add dso_local_equivalent Constant

The `dso_local_equivalent` constant is a wrapper for functions that represents a
value which is functionally equivalent to the global passed to this. That is, if
this accepts a function, calling this constant should have the same effects as
calling the function directly. This could be a direct reference to the function,
the `@plt` modifier on X86/AArch64, a thunk, or anything that's equivalent to the
resolved function as a call target.

When lowered, the returned address must have a constant offset at link time from
some other symbol defined within the same binary. The address of this value is
also insignificant. The name is leveraged from `dso_local` where use of a function
or variable is resolved to a symbol in the same linkage unit.

In this patch:
- Addition of `dso_local_equivalent` and handling it
- Update Constant::needsRelocation() to strip constant inbound GEPs and take
  advantage of `dso_local_equivalent` for relative references

This is useful for the [Relative VTables C++ ABI](https://reviews.llvm.org/D72959)
which makes vtables readonly. This works by replacing the dynamic relocations for
function pointers in them with static relocations that represent the offset between
the vtable and virtual functions. If a function is externally defined,
`dso_local_equivalent` can be used as a generic wrapper for the function to still
allow for this static offset calculation to be done.

See [RFC](http://lists.llvm.org/pipermail/llvm-dev/2020-August/144469.html) for more details.

Differential Revision: https://reviews.llvm.org/D77248

3 years ago[MLIR][SPIRV] Rename `spv._module_end` to `spv.mlir.endmodule`
ergawy [Thu, 19 Nov 2020 18:22:37 +0000 (13:22 -0500)]
[MLIR][SPIRV] Rename `spv._module_end` to `spv.mlir.endmodule`

This commit does the renaming mentioned in the title in order to bring
'spv' dialect closer to the MLIR naming conventions.

Reviewed By: antiagainst

Differential Revision: https://reviews.llvm.org/D91792

3 years ago[lldb] Fix another Python2/3 string<->bytes type error in patch-crashlog.py
Raphael Isemann [Thu, 19 Nov 2020 18:24:40 +0000 (19:24 +0100)]
[lldb] Fix another Python2/3 string<->bytes type error in patch-crashlog.py

3 years ago[MemProf] Add interface to dump profile
Teresa Johnson [Thu, 19 Nov 2020 07:14:48 +0000 (23:14 -0800)]
[MemProf] Add interface to dump profile

Add an interface so that the profile can be dumped on demand.

Differential Revision: https://reviews.llvm.org/D91768

3 years ago[clang-tidy] ElseAfterReturn check wont suggest fixes if preprocessor branches are...
Nathan James [Thu, 19 Nov 2020 18:20:31 +0000 (18:20 +0000)]
[clang-tidy] ElseAfterReturn check wont suggest fixes if preprocessor branches are involved

Consider this code:
```
if (Cond) {
#ifdef X_SUPPORTED
  X();
#else
  return;
#endif
} else {
  Y();
}
Z();```

In this example, if `X_SUPPORTED` is not defined, currently we'll get a warning from the else-after-return check. However If we apply that fix, and then the code is recompiled with `X_SUPPORTED` defined, we have inadvertently changed the behaviour of the if statement due to the else being removed. Code flow when `Cond` is `true` will be:
```
X();
Y();
Z();```
 where as before the fix it was:
 ```
 X();
 Z();```

 This patch adds checks that guard against `#endif` directives appearing between the control flow interrupter and the else and not applying the fix if they are detected.

Reviewed By: aaron.ballman

Differential Revision: https://reviews.llvm.org/D91485

3 years ago[RISCV] Lower GREVI and GORCI as custom nodes
Fraser Cormack [Wed, 11 Nov 2020 13:41:55 +0000 (13:41 +0000)]
[RISCV] Lower GREVI and GORCI as custom nodes

This moves the recognition of GREVI and GORCI from TableGen patterns
into a DAGCombine. This is done primarily to match "deeper" patterns in
the future, like (grevi (grevi x, 1) 2) -> (grevi x, 3).

TableGen is not best suited to matching patterns such as these as the compile
time of the DAG matchers quickly gets out of hand due to the expansion of
commutative permutations.

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D91259

3 years agoRevert "Reorder linalg.conv indexing_maps loop order"
Lei Zhang [Thu, 19 Nov 2020 18:13:41 +0000 (13:13 -0500)]
Revert "Reorder linalg.conv indexing_maps loop order"

This reverts commit 9b47525824df9be5ae23c39e7ce0d220d12f85e5
and falls back to the original parallel-iterators-as-leading-
dimensions convention. We can control the loop order by first
converting the named op into linalg.generic and then performing
interchange.

Reviewed By: nicolasvasilache, asaadaldien

Differential Revision: https://reviews.llvm.org/D91796

3 years ago[compiler-rt] [builtins] Use _Float16 on extendhfsf2, truncdfhf2 __truncsfhf2 if...
Adhemerval Zanella [Wed, 18 Nov 2020 19:08:43 +0000 (19:08 +0000)]
[compiler-rt] [builtins] Use _Float16 on extendhfsf2, truncdfhf2 __truncsfhf2 if available

On AArch64 it allows use the native FP16 ABI (although libcalls are
not emitted for fptrunc/fpext lowering), while on other architectures
the expected current semantic is preserved (arm for instance).

Differential Revision: https://reviews.llvm.org/D91733

3 years ago[compiler-rt] [builtins] Support conversion between fp16 and fp128
Adhemerval Zanella [Wed, 18 Nov 2020 17:24:04 +0000 (17:24 +0000)]
[compiler-rt] [builtins] Support conversion between fp16 and fp128

This patch adds both extendhftf2 and trunctfhf2 to support
conversion between half-precision and quad-precision floating-point
values. They are enabled iff the compiler supports _Float16.

Some notes on ARM plaforms: while __fp16 is supported on all
architectures, _Float16 is supported only for 32-bit ARM, 64-bit ARM,
and SPIR (as indicated by clang/docs/LanguageExtensions.rst).  Also,
__fp16 is a storage format and promoted to 'float' for argument passing
and 64-bit ARM supports floating-point convert precision to half as
base armv8-a instruction.

It means that although extendhfsf2, truncdfhf2 __truncsfhf2 will be
built for 64-bit ARM, they will be never used in practice (compiler
won't emit libcall to them). This patch does not change the ABI for
32-bit ARM, it will continue to pass _Float16 as uint16.

Differential Revision: https://reviews.llvm.org/D91732

3 years ago[AArch64] Lower fptrunc/fpext from/to FP128t to/from FP16
Adhemerval Zanella [Wed, 18 Nov 2020 17:21:46 +0000 (17:21 +0000)]
[AArch64] Lower fptrunc/fpext from/to FP128t to/from FP16

The compiler-rt part which adds the emitted symbols is handled in
a subsequent patch.

Differential Revision: https://reviews.llvm.org/D91731

3 years ago[lldb] Fix incorrect error handling in GDBRemoteCommunicationClient::SendGetSupporte...
Raphael Isemann [Thu, 19 Nov 2020 18:13:39 +0000 (19:13 +0100)]
[lldb] Fix incorrect error handling in  GDBRemoteCommunicationClient::SendGetSupportedTraceType

GDBRemoteCommunicationClient::SendGetSupportedTraceType is checking whether the
response is `!response.IsNormalResponse()` and infers from that that it is an error response.
However, it could be either "unsupported" or "error". If we get an unsupported response,
the code then tries to generate an llvm::Expected from the non-error response which then asserts.

Debugserver doesn't implement `jLLDBTraceSupportedType`, so we get an unsupported response
whenever this function is called on macOS.

This fixes the TestAproposWithProcess on macOS (where the `apropos` command will query
the CommandObjectTraceStart which then sends the trace type query package).

Reviewed By: wallace, shafik

Differential Revision: https://reviews.llvm.org/D91801

3 years ago[LoopVectorize] NFC: Fix unused variable warning for MaxSafeDepDist
Sander de Smalen [Thu, 19 Nov 2020 17:02:43 +0000 (17:02 +0000)]
[LoopVectorize] NFC: Fix unused variable warning for MaxSafeDepDist

rGf571fe6df585127d8b045f8e8f5b4e59da9bbb73 led to a warning of an unused
variable for MaxSafeDepDist (written but not used). It seems this
variable and assignment can be safely removed.

3 years ago[libomptarget] Add support for target update non-contiguous
cchen [Thu, 19 Nov 2020 17:16:09 +0000 (11:16 -0600)]
[libomptarget] Add support for target update non-contiguous

This patch is the runtime support for https://reviews.llvm.org/D84192.

In order not to modify the tgt_target_data_update information but still be
able to pass the extra information for non-contiguous map item (offset,
count, and stride for each dimension), this patch overload arg when
the maptype is set as OMP_TGT_MAPTYPE_DESCRIPTOR. The origin arg is for
passing the pointer information, however, the overloaded arg is an
array of descriptor_dim:

```
struct descriptor_dim {
  int64_t offset;
  int64_t count;
  int64_t stride
};
```

and the array size is the dimension size. In addition, since we
have count and stride information in descriptor_dim, we can replace/overload the
arg_size parameter by using dimension size.

Reviewed By: grokos, tianshilei1992

Differential Revision: https://reviews.llvm.org/D82245

3 years ago[sanitizer_common] Add facility to get the full report path
Teresa Johnson [Thu, 19 Nov 2020 05:11:55 +0000 (21:11 -0800)]
[sanitizer_common] Add facility to get the full report path

Add a new interface __sanitizer_get_report_path which will return the
full path to the report file if __sanitizer_set_report_path was
previously called (otherwise it returns null). This is useful in
particular for memory profiling handlers to access the path which
was specified at compile time (and passed down via
__memprof_profile_filename), including the pid added to the path when
the file is opened.

There wasn't a test for __sanitizer_set_report_path, so I added one
which additionally tests the new interface.

Differential Revision: https://reviews.llvm.org/D91765

3 years ago[ARM][LowOverheadLoops] Convert intermediate vpr use assertion to condition
Sam Tebbs [Thu, 19 Nov 2020 13:32:23 +0000 (13:32 +0000)]
[ARM][LowOverheadLoops] Convert intermediate vpr use assertion to condition

This converts the intermediate VPR use assertion to a condition in the if-statement to protect against assertion failures in case behaviuour is changed.

This is a follow-up to https://reviews.llvm.org/D90935 and implements the post-approval comments.

Reviewed By: dmgreen

Differential Revision: https://reviews.llvm.org/D91790

3 years ago[OpenMP] Add Location Fields to Libomptarget Runtime for Debugging
Joseph Huber [Thu, 19 Nov 2020 16:56:59 +0000 (11:56 -0500)]
[OpenMP] Add Location Fields to Libomptarget Runtime for Debugging

Summary:
Add support for passing source locations to libomptarget runtime functions using the ident_t struct present in the rest of the libomp API. This will allow the runtime system to give much more insightful error messages and debugging values.

Reviewers: jdoerfert grokos

Differential Revision: https://reviews.llvm.org/D87946

3 years agoUse rewriter in SCFToSPIRV conversion.
Tres Popp [Thu, 19 Nov 2020 13:41:36 +0000 (14:41 +0100)]
Use rewriter in SCFToSPIRV conversion.

Additionally, clear a data structure to ensure a proper state if multiple conversion attempts are needed.

Differential Revision: https://reviews.llvm.org/D91791

3 years ago[NFC][PhaseOrdering] Add a test showing the need to run IndVars after LoopIdiom
Roman Lebedev [Thu, 19 Nov 2020 15:59:25 +0000 (18:59 +0300)]
[NFC][PhaseOrdering] Add a test showing the need to run IndVars after LoopIdiom

3 years ago[libc] Add differential fuzzers for ldexp and remquo.
Siva Chandra Reddy [Wed, 18 Nov 2020 15:28:00 +0000 (07:28 -0800)]
[libc] Add differential fuzzers for ldexp and remquo.

Reviewed By: lntue

Differential Revision: https://reviews.llvm.org/D91763

3 years ago[lldb][NFC] Add a FIXME for ClangASTSource::FindExternalLexicalDecls's unused 'decls...
Raphael Isemann [Thu, 19 Nov 2020 16:14:08 +0000 (17:14 +0100)]
[lldb][NFC] Add a FIXME for ClangASTSource::FindExternalLexicalDecls's unused 'decls' parameter

3 years ago[lldb] Remove legacy casts from TestStackFromStdModule
Raphael Isemann [Mon, 28 Sep 2020 08:21:18 +0000 (10:21 +0200)]
[lldb] Remove legacy casts from TestStackFromStdModule

We can handle all the types in the expression evaluator now without casting.
On Linux, we have a system header declaration that is still causing issues, so
I'm skipping the test there until I get around to fix this.

3 years ago[FileCheck] Disallow unused prefixes in llvm/test/Analysis
Mircea Trofin [Wed, 11 Nov 2020 17:12:43 +0000 (09:12 -0800)]
[FileCheck] Disallow unused prefixes in llvm/test/Analysis

This is achieved through a substitution of FileCheck in lit.cfg.py,
where we explicitly set -allow-unused-prefixes to false.

We also introduce a %FileCheckWithUnusedPrefixes% substitution that can
be used in those cases where we want to allow unused prefixes, even if
the folder policy is to disallow them.

Differential Revision: https://reviews.llvm.org/D91275

3 years ago[AIX][XCOFF][Patch2] decode vector information and extent long table of the traceback...
diggerlin [Thu, 19 Nov 2020 15:23:43 +0000 (10:23 -0500)]
[AIX][XCOFF][Patch2] decode vector information and extent long table of the traceback table of the xcoff.

SUMMARY:

1. decode the Vector extension if has_vec is set
2. decode long table fields, if longtbtable is set.

There is conflict on the bit order of HasVectorInfoMask and HasExtensionTableMask between AIX os header and IBM aix compiler XLC.
In the /usr/include/sys/debug.h defines
static constexpr uint32_t HasVectorInfoMask = 0x0040'0000;
static constexpr uint32_t HasExtensionTableMask = 0x0080'0000;
but the XLC defines as

static constexpr uint32_t HasVectorInfoMask = 0x0080'0000;
static constexpr uint32_t HasExtensionTableMask = 0x0040'0000;
we follows the definition of the IBM AIX compiler XLC here.

Reviewer: Jason Liu

Differential Revision: https://reviews.llvm.org/D86461

3 years ago[MLIR][SPIRV] ModuleCombiner: deduplicate global vars, spec consts, and funcs.
ergawy [Thu, 19 Nov 2020 15:05:55 +0000 (10:05 -0500)]
[MLIR][SPIRV] ModuleCombiner: deduplicate global vars, spec consts, and funcs.

This commit extends the functionality of the SPIR-V module combiner
library by adding new deduplication capabilities. In particular,
implementation of deduplication of global variables and specialization
constants, and functions is introduced.

For global variables, 2 variables are considered duplicate if they either
have the same descriptor set + binding or the same built_in attribute.

For specialization constants, 2 spec constants are considered duplicate if
they have the same spec_id attribute.

2 functions are deduplicated if they are identical. 2 functions are
identical if they have the same prototype, attributes, and body.

Reviewed By: antiagainst

Differential Revision: https://reviews.llvm.org/D90951

3 years ago[MLIR][SPIRV] Rename `spv._merge` to `spv.mlir.merge`
ergawy [Thu, 19 Nov 2020 14:48:58 +0000 (09:48 -0500)]
[MLIR][SPIRV] Rename `spv._merge` to `spv.mlir.merge`

This commit does the renaming mentioned in the title in order to bring
'spv' dialect closer to the MLIR naming conventions.

Reviewed By: antiagainst

Differential Revision: https://reviews.llvm.org/D91797

3 years ago[ARM] Add a WLS tail predication test. NFC
David Green [Thu, 19 Nov 2020 14:52:46 +0000 (14:52 +0000)]
[ARM] Add a WLS tail predication test. NFC

3 years ago[clangd] No crash on "-verify" mode.
Haojian Wu [Thu, 19 Nov 2020 10:02:14 +0000 (11:02 +0100)]
[clangd] No crash on "-verify" mode.

If there is a "-verify" flag in the compile command, clangd will crash
(hit the assertion) inside the `~VerifyDiagnosticConsumer` (Looks like our
compiler invocation doesn't setup correctly?).

This patch disables the verify mode as it is rarely useful in clangd.

Differential Revision: https://reviews.llvm.org/D91777

3 years ago[clang][cli] Port analyzer flags to new option parsing system
Jan Svoboda [Wed, 18 Nov 2020 12:19:37 +0000 (13:19 +0100)]
[clang][cli] Port analyzer flags to new option parsing system

Depends on D83691

Reviewed By: dexonsmith

Original patch by Daniel Grumberg.

Differential Revision: https://reviews.llvm.org/D83693

3 years agoRevert "[libc++] ADL-proof <vector> by adding _VSTD:: qualification on calls."
Mikhail Goncharov [Thu, 19 Nov 2020 14:36:49 +0000 (15:36 +0100)]
Revert "[libc++] ADL-proof <vector> by adding _VSTD:: qualification on calls."

This reverts commit 40267cc989e6d055d5e470681dc7bcfffc72c32f.

Build fails, e.g. http://lab.llvm.org:8011/#/builders/23/builds/108

3 years ago[clang][cli] Port Comment option flags to new parsing system
Jan Svoboda [Thu, 19 Nov 2020 14:24:26 +0000 (15:24 +0100)]
[clang][cli] Port Comment option flags to new parsing system

Depends on D83690

Reviewed By: dexonsmith

Original patch by Daniel Grumberg.

Differential Revision: https://reviews.llvm.org/D83691

3 years agoRevert "[lldb] Use translated full ftag values"
Mikhail Goncharov [Thu, 19 Nov 2020 14:23:25 +0000 (15:23 +0100)]
Revert "[lldb] Use translated full ftag values"

This reverts commit c43abf043692babf9ad4f8bded2fdf6ab9c354b0.

Test commands/register/register/register_command/TestRegisters.py fails.
Buildbot http://lab.llvm.org:8011/#/changes/4149

3 years ago[AIX][FE] Support constructor/destructor attribute
Xiangling Liao [Thu, 19 Nov 2020 13:58:38 +0000 (08:58 -0500)]
[AIX][FE] Support constructor/destructor attribute

Support attribute((constructor)) and attribute((destructor)) on AIX

Differential Revision: https://reviews.llvm.org/D90892

3 years ago[mlir][linalg] Start a named ops to generic ops pass
Lei Zhang [Thu, 19 Nov 2020 13:56:06 +0000 (08:56 -0500)]
[mlir][linalg] Start a named ops to generic ops pass

This commit starts a new pass and patterns for converting Linalg
named ops to generic ops. This enables us to leverage the flexbility
from generic ops during transformations. Right now only linalg.conv
is supported; others will be added when useful.

Reviewed By: nicolasvasilache

Differential Revision: https://reviews.llvm.org/D91357

3 years ago[libc++] ADL-proof <vector> by adding _VSTD:: qualification on calls.
Arthur O'Dwyer [Wed, 18 Nov 2020 23:54:38 +0000 (18:54 -0500)]
[libc++] ADL-proof <vector> by adding _VSTD:: qualification on calls.

(1) Add _VSTD:: qualification to __swap_allocator.

(2) Add _VSTD:: qualification consistently to __to_address.

(3) Add some more missing _VSTD:: to <vector>, with a regression test.
This part is cleanup after d9a4f936d05.

Note that a vector whose allocator actually runs afoul of any of these ADL calls will
likely also run afoul of simple things like `v1 == v2` (which is also an ADL call).
But, still, libc++ should be consistent in qualifying function calls wherever possible.

Relevant blog post: https://quuxplusone.github.io/blog/2019/09/26/uglification-doesnt-stop-adl/

Differential Revision: https://reviews.llvm.org/D91708

3 years agoFix Wundef warnings for Support/Compiler.h
Sven van Haastregt [Thu, 19 Nov 2020 14:10:55 +0000 (14:10 +0000)]
Fix Wundef warnings for Support/Compiler.h

Support/Compiler.h is included by c files (e.g. regcomp.c) where
__cplusplus is not defined at all.  Avoid evaluating the undefined
macro for such files.

3 years ago[ConstraintElimination] Add GEP test case with variable offset.
Florian Hahn [Thu, 19 Nov 2020 14:04:05 +0000 (14:04 +0000)]
[ConstraintElimination] Add GEP test case with variable offset.

3 years ago[RISCV] Extend 32-bit test coverage of neg-abs tests for D91120
Simon Pilgrim [Thu, 19 Nov 2020 13:59:18 +0000 (13:59 +0000)]
[RISCV] Extend 32-bit test coverage of neg-abs tests for D91120

3 years ago[ValueTracking] computeKnownBitsFromShiftOperator - move shift amount analysis to...
Simon Pilgrim [Thu, 19 Nov 2020 13:49:13 +0000 (13:49 +0000)]
[ValueTracking] computeKnownBitsFromShiftOperator - move shift amount analysis to top of the function. NFCI.

These are all lightweight to compute and helps avoid issues with Known being used to hold both the shift amount and then the shifted result.

Minor cleanup for D90479.

3 years ago[ARM] Deliberately prevent inline asm in low overhead loops. NFC
David Green [Thu, 19 Nov 2020 13:28:21 +0000 (13:28 +0000)]
[ARM] Deliberately prevent inline asm in low overhead loops. NFC

This was already something that was handled by one of the "else"
branches in maybeLoweredToCall, so this patch is an NFC but makes it
explicit and adds a test. We may in the future want to support this
under certain situations but for the moment just don't try and create
low overhead loops with inline asm in them.

Differential Revision: https://reviews.llvm.org/D91257

3 years ago[clangd] Disable SerializationTest.NoCrashOnBadArraySize with ASAN
Kirill Bobyrev [Thu, 19 Nov 2020 12:23:43 +0000 (13:23 +0100)]
[clangd] Disable SerializationTest.NoCrashOnBadArraySize with ASAN

Address Sanitizer crashes on large allocations:

```c++
// Try to crash rather than hang on large allocation.
ScopedMemoryLimit MemLimit(1000 * 1024 * 1024); // 1GB
```

3 years ago[lldb] Use translated full ftag values
Michał Górny [Sun, 15 Nov 2020 17:36:22 +0000 (18:36 +0100)]
[lldb] Use translated full ftag values

Translate between abridged and full ftag values in order to expose
the latter in the gdb-remote protocol while the former are used by
FXSAVE/XSAVE...  This matches the gdb behavior.

Differential Revision: https://reviews.llvm.org/D91504

3 years ago[lldb] Add explicit 64-bit fip/fdp registers on x86_64
Michał Górny [Sun, 15 Nov 2020 13:55:40 +0000 (14:55 +0100)]
[lldb] Add explicit 64-bit fip/fdp registers on x86_64

The FXSAVE/XSAVE data can have two different layouts on x86_64.  When
called as FXSAVE/XSAVE..., the Instruction Pointer and Address Pointer
registers are reported using a 16-bit segment identifier and a 32-bit
offset.  When called as FXSAVE64/XSAVE64..., they are reported using
a complete 64-bit offsets instead.

LLDB has historically followed GDB and unconditionally used to assume
the 32-bit layout, with the slight modification of possibly
using a 32-bit segment register (i.e. extending the register into
the reserved 16 upper bits).  When the underlying operating system used
FXSAVE64/XSAVE64..., the pointer was split into two halves,
with the upper half repored as the segment registers.  While
reconstructing the full address was possible on the user end (and e.g.
the FPU register tests did that), it certainly was not the most
convenient option.

Introduce a two additional 'fip' and 'fdp' registers that overlap
with 'fiseg'/'fioff' and 'foseg'/'foff' respectively, and report
the complete 64-bit address.

Differential Revision: https://reviews.llvm.org/D91497

3 years ago[X86][AVX] Only share broadcasts of different widths from the same SDValue of the...
Simon Pilgrim [Thu, 19 Nov 2020 12:12:16 +0000 (12:12 +0000)]
[X86][AVX] Only share broadcasts of different widths from the same SDValue of the same SDNode (PR48215)

D57663 allowed us to reuse broadcasts of the same scalar value by extracting low subvectors from the widest type.

Unfortunately we weren't ensuring the broadcasts were from the same SDValue, just the same SDNode - which failed on multiple-value nodes like ISD::SDIVREM

FYI: I intend to request this be merged into the 11.x release branch.

Differential Revision: https://reviews.llvm.org/D91709

3 years ago[AArch64][SVE] Allow C-style casts between fixed-size and scalable vectors
Joe Ellis [Tue, 17 Nov 2020 12:33:56 +0000 (12:33 +0000)]
[AArch64][SVE] Allow C-style casts between fixed-size and scalable vectors

This patch allows C-style casting between fixed-size and scalable
vectors. This kind of cast was previously blocked by the compiler, but
it should be allowed.

Differential Revision: https://reviews.llvm.org/D91262

3 years ago[LV][NFC-ish] Allow vector widths over 256 elements
Simon Moll [Thu, 19 Nov 2020 09:58:12 +0000 (10:58 +0100)]
[LV][NFC-ish] Allow vector widths over 256 elements

The assertion that vector widths are <= 256 elements was hard wired in the LV code. Eg, VE allows for vectors up to 512 elements. Test again the TTI vector register bit width instead - this is an NFC for non-asserting builds.

Reviewed By: fhahn

Differential Revision: https://reviews.llvm.org/D91518

3 years ago[Mach0] Fix unused-variable warnings
Gabriel Hjort Åkerlund [Thu, 19 Nov 2020 09:47:47 +0000 (10:47 +0100)]
[Mach0] Fix unused-variable warnings

Reviewed By: arsenm

Differential Revision: https://reviews.llvm.org/D91519

3 years ago[SelDAGBuilder] Do not require simple VTs for constraints.
Florian Hahn [Thu, 19 Nov 2020 09:31:54 +0000 (09:31 +0000)]
[SelDAGBuilder] Do not require simple VTs for constraints.

In some cases, the values passed to `asm sideeffect` calls cannot be
mapped directly to simple MVTs. Currently, we crash in the backend if
that happens. An example can be found in the @test_vector_too_large_r_m
test case, where we pass <9 x float> vectors. In practice, this can
happen in cases like the simple C example below.

using vec = float __attribute__((ext_vector_type(9)));
void f1 (vec m) {
  asm volatile("" : "+r,m"(m) : : "memory");
}

One case that use "+r,m" constraints for arbitrary data types in
practice is google-benchmark's DoNotOptimize.

This patch updates visitInlineAsm so that it use MVT::Other for
constraints with complex VTs. It looks like the rest of the backend
correctly deals with that and properly legalizes the type.

And we still report an error if there are no registers to satisfy the
constraint.

Reviewed By: arsenm

Differential Revision: https://reviews.llvm.org/D91710

3 years ago[NFC] Remove comment (commited ahead of time by mistake)
Max Kazantsev [Thu, 19 Nov 2020 09:28:34 +0000 (16:28 +0700)]
[NFC] Remove comment (commited ahead of time by mistake)

3 years ago[NFC] Move code earlier as preparation for further changes
Max Kazantsev [Thu, 19 Nov 2020 09:04:27 +0000 (16:04 +0700)]
[NFC] Move code earlier as preparation for further changes

3 years ago[clang-tidy] Improving bugprone-sizeof-expr check.
Balázs Kéri [Thu, 19 Nov 2020 08:03:22 +0000 (09:03 +0100)]
[clang-tidy] Improving bugprone-sizeof-expr check.

Do not warn for "pointer to aggregate" in a `sizeof(A) / sizeof(A[0])`
expression if `A` is an array of pointers. This is the usual way of
calculating the array length even if the array is of pointers.

Reviewed By: aaron.ballman

Differential Revision: https://reviews.llvm.org/D91543

3 years ago[mlir][TableGen] Support intrinsics with multiple returns and overloaded operands.
Ji Kim [Thu, 19 Nov 2020 08:54:31 +0000 (09:54 +0100)]
[mlir][TableGen] Support intrinsics with multiple returns and overloaded operands.

For intrinsics with multiple returns where one or more operands are overloaded, the overloaded type is inferred from the corresponding field of the resulting struct, instead of accessing the result directly.

As such, the hasResult parameter of LLVM_IntrOpBase (and derived classes) is replaced with numResults. TableGen for intrinsics also updated to populate this field with the total number of results.

Reviewed By: ftynse

Differential Revision: https://reviews.llvm.org/D91680

3 years ago[VE] VEC_BROADCAST, lowering and isel
Simon Moll [Thu, 19 Nov 2020 08:44:48 +0000 (09:44 +0100)]
[VE] VEC_BROADCAST, lowering and isel

This defines the vec_broadcast SDNode along with lowering and isel code.
We also remove unused type mappings for the vector register classes (all vector MVTs that are not used in the ISA go).

We will implement support for short vectors later by intercepting nodes with illegal vector EVTs before LLVM has had a chance to widen them.

Reviewed By: kaz7

Differential Revision: https://reviews.llvm.org/D91646

3 years ago[WebAssembly] Add support for named globals in the object format.
Sam Clegg [Thu, 19 Nov 2020 05:38:23 +0000 (21:38 -0800)]
[WebAssembly] Add support for named globals in the object format.

Differential Revision: https://reviews.llvm.org/D91769

3 years ago[IndVarSimplify] Notify top most loop to drop cached exit counts
Andrew Wei [Thu, 19 Nov 2020 07:34:16 +0000 (15:34 +0800)]
[IndVarSimplify] Notify top most loop to drop cached exit counts

Some nested loops may share the same ExitingBB, so after we finishing FoldExit,
we need to notify OuterLoop and SCEV to drop any stored trip count.

Patched by: guopeilin
Reviewed By: mkazantsev

Differential Revision: https://reviews.llvm.org/D91325

3 years ago[clangd] Fix data race in GoToInclude.All test
Kadir Cetinkaya [Thu, 19 Nov 2020 07:47:25 +0000 (08:47 +0100)]
[clangd] Fix data race in GoToInclude.All test

3 years ago[PowerPC] [Clang] Fix alignment of 128-bit float types
Qiu Chaofan [Thu, 19 Nov 2020 06:20:24 +0000 (14:20 +0800)]
[PowerPC] [Clang] Fix alignment of 128-bit float types

According to ELF v2 ABI, both IEEE 128-bit and IBM extended floating
point variables should be quad-word (16 bytes) aligned. Previously, only
vector types are considered aligned as quad-word on PowerPC.

This patch will fix incorrectness of IEEE 128-bit float argument in
va_arg cases.

Reviewed By: rjmccall

Differential Revision: https://reviews.llvm.org/D91596

3 years ago[libc] Fix the overflow check condition of ldexp.
Siva Chandra Reddy [Wed, 18 Nov 2020 15:30:29 +0000 (07:30 -0800)]
[libc] Fix the overflow check condition of ldexp.

Targeted tests have been added.

Reviewed By: lntue

Differential Revision: https://reviews.llvm.org/D91752

3 years ago[NFC][TFUtils] also include output specs lookup logic in loadOutputSpecs
Mircea Trofin [Thu, 19 Nov 2020 04:54:04 +0000 (20:54 -0800)]
[NFC][TFUtils] also include output specs lookup logic in loadOutputSpecs

The lookup logic is also reusable.

Also refactored the API to return the loaded vector - this makes it more
clear what state it is in in the case of error (as it won't be
returned).

Differential Revision: https://reviews.llvm.org/D91759

3 years ago[Transforms] Use llvm::is_contained (NFC)
Kazu Hirata [Thu, 19 Nov 2020 04:42:22 +0000 (20:42 -0800)]
[Transforms] Use llvm::is_contained (NFC)

3 years ago[NFC][TFUtils] Extract out the output spec loader
Mircea Trofin [Thu, 19 Nov 2020 00:16:10 +0000 (16:16 -0800)]
[NFC][TFUtils] Extract out the output spec loader

It's generic for the 'development mode', not specific to the inliner
case.

Differential Revision: https://reviews.llvm.org/D91751

3 years ago[RISCV] Add MemOperand to the instruction created by storeRegToStackSlot/loadRegFromS...
Craig Topper [Thu, 19 Nov 2020 02:23:55 +0000 (18:23 -0800)]
[RISCV] Add MemOperand to the instruction created by storeRegToStackSlot/loadRegFromStackSlot

Differential Revision: https://reviews.llvm.org/D91730

3 years ago[mlir][Pass] Only enable/disable CrashRecovery once
River Riddle [Thu, 19 Nov 2020 02:49:23 +0000 (18:49 -0800)]
[mlir][Pass] Only enable/disable CrashRecovery once

This prevents potential problems that occur when multiple pass managers register crash recovery contexts.

3 years ago[mlir] Add support for referencing a SymbolRefAttr in a SideEffectInstance
River Riddle [Thu, 19 Nov 2020 02:31:40 +0000 (18:31 -0800)]
[mlir] Add support for referencing a SymbolRefAttr in a SideEffectInstance

This allows for operations that exclusively affect symbol operations to better describe their side effects.

Differential Revision: https://reviews.llvm.org/D91581

3 years ago[X86][AArch64][RISCV] Pre-commit negated abs test case. NFC.
Kai Luo [Thu, 19 Nov 2020 02:22:09 +0000 (02:22 +0000)]
[X86][AArch64][RISCV] Pre-commit negated abs test case. NFC.

3 years ago[trace][intel-pt] Scaffold the 'thread trace start | stop' commands
Walter Erquinigo [Tue, 27 Oct 2020 04:22:06 +0000 (21:22 -0700)]
[trace][intel-pt] Scaffold the 'thread trace start | stop' commands

Depends on D90490.

The stop command is simple and invokes the new method Trace::StopTracingThread(thread).

On the other hand, the start command works by delegating its implementation to a CommandObject provided by the Trace plugin. This is necessary because each trace plugin needs different options for this command. There's even the chance that a Trace plugin can't support live tracing, but instead supports offline decoding and analysis, which means that "thread trace dump instructions" works but "thread trace start" doest. Because of this and a few other reasons, it's better to have each plugin provide this implementation.

Besides, I'm using the GetSupportedTraceType method introduced in D90490 to quickly infer what's the trace plug-in that works for the current process.

As an implementation note, I moved CommandObjectIterateOverThreads to its header so that I can use it from the IntelPT plugin. Besides, the actual start and stop logic for intel-pt is not part of this diff.

Reviewed By: clayborg

Differential Revision: https://reviews.llvm.org/D90729

3 years ago[clang-tidy] Extend bugprone-string-constructor-check to std::string_view.
Chris Kennelly [Sat, 7 Nov 2020 21:38:30 +0000 (16:38 -0500)]
[clang-tidy] Extend bugprone-string-constructor-check to std::string_view.

This allows for matching the constructors std::string has in common with
std::string_view.

Reviewed By: aaron.ballman

Differential Revision: https://reviews.llvm.org/D91015

3 years agoSupport: Avoid SmallVector::assign with a range from to-be-replaced vector in Windows...
Duncan P. N. Exon Smith [Thu, 19 Nov 2020 01:53:34 +0000 (17:53 -0800)]
Support: Avoid SmallVector::assign with a range from to-be-replaced vector in Windows GetExecutableName

This code wasn't valid, and 5abf76fbe37380874a88cc9aa02164800e4e10f3
started asserting. This is a speculative fix since I don't have a
Windows machine handy.

3 years agoADT: Add assertions to SmallVector::insert, etc., for reference invalidation
Duncan P. N. Exon Smith [Fri, 13 Nov 2020 23:29:32 +0000 (18:29 -0500)]
ADT: Add assertions to SmallVector::insert, etc., for reference invalidation

2c196bbc6bd897b3dcc1d87a3baac28e1e88df41 asserted that
`SmallVector::push_back` doesn't invalidate the parameter when it needs
to grow. Do the same for `resize`, `append`, `assign`, `insert`, and
`emplace_back`.

Differential Revision: https://reviews.llvm.org/D91744

3 years ago[mlir][sparse] remove a few rewriting failures
Aart Bik [Wed, 18 Nov 2020 23:35:57 +0000 (15:35 -0800)]
[mlir][sparse] remove a few rewriting failures

Rationale:
Make sure preconditions are tested already during verfication.
Currently, the only way a sparse rewriting rule can fail is if
(1) the linalg op does not have sparse annotations, or
(2) a yet to be handled operation is encounted inside the op

Reviewed By: penpornk

Differential Revision: https://reviews.llvm.org/D91748

3 years ago[WebAssembly] Support fp reg class in r constraint
snek [Wed, 18 Nov 2020 18:23:01 +0000 (10:23 -0800)]
[WebAssembly] Support fp reg class in r constraint

Patch by snek

Reviewed By: aheejin

Differential Revision: https://reviews.llvm.org/D90978

3 years agoAdded GDB pretty printer for StringMap
Moritz Sichert [Wed, 18 Nov 2020 23:36:06 +0000 (15:36 -0800)]
Added GDB pretty printer for StringMap

Reviewed By: csigg, dblaikie

Differential Revision: https://reviews.llvm.org/D91183