radv: remove useless memset() in radv_CreateFence()

All radv_fence fields are initialized here.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>

radv: use vk_error() everywhere an error is returned

For consistency and it might help for debugging purposes.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>

radv: make radv_emit_framebuffer_state() static

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>

radv: do not emit the framebuffer when restoring a pass

Instead just dirty RADV_CMD_DIRTY_FRAMEBUFFER and it will be
re-emitted if necessary before the next draw.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>

radv: prefetch VBO descriptors at the right place

Just after the vertex shader.

This seems to give a minor boost for, at least, Serious Sam
Fusion 2017 and Dawn of War 3. I don't see any real impacts
with The Talos Principle.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>

radv: add radv_emit_prefetch_TC_L2_async() helper

Will be used for VBO descriptors prefetching.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>

radv: rename radv_emit_shaders_prefetch() to radv_emit_prefetch()

For consistency because this function will also prefetch VBO
descriptors.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>

glsl/linker: use without_array() to retrieve type

This is what we do in the condition too, so it makes sense.

v2: Only compute without_array() once (Ilia).

Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>

radv: emit esgs ring size in one place.

This register is the same on all gpus so far, so emit it in one
place and also for the pre-gfx9 gpus set the value in the pipeline
creation.

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>

radv: move calculating vs out info regs into pipeline.

This moves some calculations of register values into the pipeline
construction, it saves looking at outinfo in the cmd buffer emit.

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>

freedreno/a5xx: fix SSBO emit for non-zero offset

Signed-off-by: Rob Clark <robdclark@gmail.com>

freedreno/a5xx: remove obsolete comment

Signed-off-by: Rob Clark <robdclark@gmail.com>

freedreno/ir3: don't create split/fo if only writing .x

In case an instruction only writes one register, and it is .x, we can
skip the extra level of fanout indirection.

Signed-off-by: Rob Clark <robdclark@gmail.com>

freedreno/a5xx: indirect grids

Signed-off-by: Rob Clark <robdclark@gmail.com>

freedreno/a5xx: add global size compute cap

Signed-off-by: Rob Clark <robdclark@gmail.com>

freedreno/ir3: turn on std430 packing

Seems to fix dEQP compute related tests.. and matches what i965 does, so
perhaps there is some assumption that std430 packing is on by default
somewhere in NIR?

freedreno/a5xx: image support

freedreno/ir3: moar better scheduler

Add a new pass that inserts additional dependencies, rather than simply
relying on SSA srcs added in the nir->ir3 frontend.  This makes it
easier to deal with barriers, but the additional false deps also lets us
deal properly with ensuring a write depends on all previous reads.

Since conversion to barrier instructions is lossy (ie. just knowing the
instruction doesn't tell us enough about what other instructions the
barrier applies to), use barrier_class/barrier_conflict fields in the
ir3_instruction to retain this information.

This could probably be relaxed somewhat by considering *which* array/
buffer/image variable is being referenced.  Ie. a write to buffer A
can overtake a read from buffer B, if B is not coherent.  (right?)

Signed-off-by: Rob Clark <robdclark@gmail.com>

freedreno/ir3: move macros

I want to add a growable array to ir3_instruction, so we can append
false dependencies for purposes of scheduling barriers, atomics, and
dealing with write after read hazards.

Just code motion preparing for next patch.

Signed-off-by: Rob Clark <robdclark@gmail.com>

freedreno/ir3: image support

Signed-off-by: Rob Clark <robdclark@gmail.com>

freedreno/ir3: shared variable support

Signed-off-by: Rob Clark <robdclark@gmail.com>

freedreno/ir3: some SSBO cleanups/fixes

Signed-off-by: Rob Clark <robdclark@gmail.com>

freedreno/ir3: split out INSTR4F instructions

Atomic instructions take a different # of src args depending on .g or .l
variant, split these out into different helpers with INSTR*F() helper
macro that lets you specify instruction flag.

Signed-off-by: Rob Clark <robdclark@gmail.com>

freedreno/ir3: cat6 encoding fixes

Instruction encoding/decoding fixes needed for images, shared variables,
etc.

Signed-off-by: Rob Clark <robdclark@gmail.com>

freedreno/ir3: add barriers

Signed-off-by: Rob Clark <robdclark@gmail.com>

freedreno/ir3: invert is_same_type_mov() logic

Some instructions (like barriers) have no dst, which causes problems
with dereferencing a NULL dst.  Flip the logic around to reject opc's
that can't be a type of move first, to filter out those instructions.

Signed-off-by: Rob Clark <robdclark@gmail.com>

freedreno/ir3: add cat7 instructions

Needed for memory and execution barriers.

Signed-off-by: Rob Clark <robdclark@gmail.com>

freedreno/ir3: add SSBO get_buffer_size() support

Somehow I overlooked this when adding initial SSBO support.

Signed-off-by: Rob Clark <robdclark@gmail.com>

freedreno/ir3: extract helper for common consts

User consts and driver consts such as UBO addresses and immediates are
handled the same for all shader stages, so split out a shared helper for
these, to make it easier to add more.

Signed-off-by: Rob Clark <robdclark@gmail.com>

freedreno: add image view state tracking

It is unfortunate that image state isn't a real CSO, since (at least for
a4xx/a5xx) it is a combination of sampler and "SSBO" image state, and it
would be useful to pre-compute the state block "register" values rather
than doing it at emit time.

Signed-off-by: Rob Clark <robdclark@gmail.com>

freedreno: update generated headers

Signed-off-by: Rob Clark <robdclark@gmail.com>

mesa/st/nir: assign driver_location for images

Signed-off-by: Rob Clark <robdclark@gmail.com>

st/program: fix compute shader nir references

In case the IR is NIR, the driver takes reference to the nir_shader.
Also, because there are no variants, we need to clone the shader,
instead of sharing the reference with gl_program, which would result
in a double free in _mesa_delete_program().

Signed-off-by: Rob Clark <robdclark@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>

freedreno/ir3: rename ir3_compile -> ir3_context

Having both an ir3_compile (which was really context for compiling a
single shader variant) and ir3_compiler (which is the compiler object
that compiles all variants, ie. basically holds the RA regset) is a
bit confusing.

Signed-off-by: Rob Clark <robdclark@gmail.com>

intel/tools: Fix detection of enabled shader stages.

We renamed "Function Enable" to "Enable", which broke our detection
of whether shaders are enabled or not.  So, we'd see a bunch of HS/DS
packets with program offsets of 0, and think that was a valid TCS/TES.

Fixes: c032cae9ff77e (genxml: Rename "Function Enable" to "Enable".)

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>

st/atifs: remove unrequired initialisation of gl_program fields

As far as I can tell these fields are only used to query arb
program info and are not related to ATI_fragment_shader.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Miklós Máté <mtmkls@gmail.com>

ac: add emit_vertex to the abi

Reviewed-by: Marek Olšák <marek.olsak@amd.com>

radeonsi: rework gs_vtx_offset handling

This simplifies things a bit and will enable it to work with the
common NIR -> LLVM code.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>

nir: add streams to nir data

This will be used by gallium drivers.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>

st/dri: fix deadlock when waiting on android fences

Android fences can't be deferred, because st/dri calls fence_finish
with ctx = NULL, so the driver can't flush u_threaded_context.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

meson: Guard freedreno build with with_gallium_freedreno.

This prevents build failures when libdrm_freedreno is unavailable,
which started happening after the ir3_compiler build was enabled.

(Patch by Rob, commit message by Ken).

Fixes: fecd04a66ae ("freedreno/ir3: fix standalone compiler meson build")
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

docs: update calendar, add news item and link release notes for 17.2.5

Signed-off-by: Andres Gomez <agomez@igalia.com>

docs: add sha256 checksums for 17.2.5

Signed-off-by: Andres Gomez <agomez@igalia.com>
(cherry picked from commit 96ad27f8fcf3979c577c052f725e2a80035295aa)

docs: add release notes for 17.2.5

Signed-off-by: Andres Gomez <agomez@igalia.com>
(cherry picked from commit ae52410bf08aa9c054651258f2fd0d0a2c9c5241)

i965/gen10: Use the correct form of | for the RCPFE workaround

Found by inspection

Fixes: d3d0fe4572f62474b86ef3a68405046c68b54062
Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>

i965: Make L3 configuration atom listen for TCS/TES program updates.

The L3 configuration code already considers the TCS and TES programs,
but failed to listen for TCS/TES program changes.

This was somehow missing.

Fixes: e9644cb1f96ccf7e ("i965: Consider tessellation in get_pipeline_state_l3_weights.")
Reviewed-by: Francisco Jerez <currojerez@riseup.net>

meson: build gallium-xlib based glx

Signed-off-by: Dylan Baker <dylanx.c.baker@intel.com>
Reviewed-by: Eric Anholt <eric@anholt.net>

meson: add support for xlib glx

There is a bunch of churn in the main meson.build so that we can
correctly set the auto tristate of GLX. In particular, don't build
xlib-based glx when dri and gallium are disabled but vulkan is enabled,
in that case just turn glx off.

Signed-off-by: Dylan Baker <dylanx.c.baker@intel.com>
Reviewed-by: Eric Anholt <eric@anholt.net>

meson: move gl pkgconfig generation out of glx

Because the same generation logic is required by xlib glx and
gallium-xlib glx, it makes sense to pull it out.

v2: - Ensure that libgl is defined before trying to generate a pkgconfig
      file with it.

Signed-off-by: Dylan Baker <dylanx.c.baker@intel.com>
Reviewed-by: Eric Anholt <eric@anholt.net>

meson: move wayland-egl into egl folder

This ensure that it's properly guarded, but also makes the code clearer
by grouping related things together.

Signed-off-by: Dylan Baker <dylanx.c.baker@intel.com>
Reviewed-by: Eric Anholt <eric@anholt.net>

meson: add nir_builder_opcodes_h to gallium_auxiliary

This creates a dependency on this header being generated before trying
to compile any of these targets, as well as passing the correct -I to
the compiler to ensure it's included correctly.

Signed-off-by: Dylan Baker <dylanx.c.baker@intel.com>
Reviewed-by: Eric Anholt <eric@anholt.net>

gallium/xlib: remove GL_{MAJOR,MINOR,TINY}

These variables were removed from autotools in 2008 (sha:
80f68e1b6a0e5bd2da799c), but they have lived on here. The Scons build
meanwhile doesn't set a patch/tiny version at all, just major and minor.
This patch removes the unused variables and simply sets the version,
leaving patch/tiny as 0 since that's what the autotools build as been
doing forever. This shouldn't change any behavior.

Signed-off-by: Dylan Baker <dylanx.c.baker@intel.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Brian Paul <brianp@vmware.com>

radeonsi: get llvm types from ac

Reviewed-by: Marek Olšák <marek.olsak@amd.com>

glx/windows: Fix building libwindowsdri when libX11 headers are installed in a non-standard location

Signed-off-by: Jon Turney <jon.turney@dronecode.org.uk>
Reviewed-by: Adam Jackson <ajax@redhat.com>

util: include unistd.h, which may be required for usleep prototype

This seems to be dropped in 222a2fb9 "util: move os_time.[ch] to src/util"

../../../src/util/os_time.c: In function ‘os_time_sleep’:
../../../src/util/os_time.c:104:4: error: implicit declaration of function ‘usleep’ [-Werror=implicit-function-declaration]

Signed-off-by: Jon Turney <jon.turney@dronecode.org.uk>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

autotools: Set C++ visibility flags on Intel

These flags are set for C sources, but not C++. This causes symbol
visibility leaks from the C++ parts of the Intel compiler.

Fixes: 700bebb958e93f4d ("i965: Move the back-end compiler to src/intel/compiler")
Signed-off-by: Dylan Baker <dylanx.c.baker@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>

docs/releasing: improve the pre-announce template and examples

v2: Choose a proper rejection example (Emil).

Cc: Emil Velikov <emil.velikov@collabora.com>
Cc: Eric Engestrom <eric.engestrom@imgtec.com>
Signed-off-by: Andres Gomez <agomez@igalia.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>

docs/releasing: drop manually exported variables during smoke test

Cc: Emil Velikov <emil.velikov@collabora.com>
Cc: Eric Engestrom <eric.engestrom@imgtec.com>
Signed-off-by: Andres Gomez <agomez@igalia.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>

docs/releasing: drop custom LLVM_CONFIG if previously manually set

Cc: Emil Velikov <emil.velikov@collabora.com>
Cc: Eric Engestrom <eric.engestrom@imgtec.com>
Signed-off-by: Andres Gomez <agomez@igalia.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>

st/dri: fix android fence regression

Fixes piglit - egl_khr_fence_sync/android_native tests.
Broken by 884a0b2a9e55d4c1ca39475b50d9af598d7d7280.

Introduce state-tracker flush flags, analogous to the pipe ones. Use
the former when with stapi->flush().

Fixes: 884a0b2a9e5 ("st/dri: use stapi flush instead of pipe flush
when creating fences")
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

util/u_thread: fix compilation on Mac OS

Apparently, it doesn't have pthread barriers.

p_config.h (which was originally used to guard this code) uses the
__APPLE__ macro to detect Mac OS.

Fixes: f0d3a4de75 ("util: move pipe_barrier into src/util and rename to util_barrier")
Cc: Roland Scheidegger <sroland@vmware.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Brian Paul <brianp@vmware.com>

util/u_queue: handle OS_TIMEOUT_INFINITE in util_queue_fence_wait_timeout

Fixes e.g. piglit/bin/bufferstorage-persistent read -auto

Fixes: e6dbc804a87a ("winsys/amdgpu: handle cs_add_fence_dependency for deferred/unsubmitted fences")
Reviewed-by: Marek Olšák <marek.olsak@amd.com>

gallium/u_threaded: fix end_query regression

Ouch...

Fixes: 244536d3d6b4 ("gallium/u_threaded: avoid syncs for get_query_result")
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=103653
Reviewed-by: Marek Olšák <marek.olsak@amd.com>

swr: Fixed an uncommon freed-memory access during state validation

State validation is performed during clear and draw calls.  Validation
during clear was still accessing vertex buffer state.  When the currently
set vertex buffers are client arrays, this could lead to accessing freed
memory.  Such is the case with the VMD application.

Previously, vertex buffer validation depended on a dirty bit or the
draw info indicating an indexed draw.  This required special handling for
clears.  But, vertex buffer validation still occurred which was unnecessary
and wrong.

Now, only minimal validation is performed during clear, deferring the
remainder to the next draw.  And, by setting the dirty bit in swr_draw_vbo
for indexed draws, vertex buffer validation is only dependent upon a
single dirty bit.

This fixes a bug exposed by the VMD application when changing models.

Reviewed-By: George Kyriazis <george.kyriazis@intel.com>

freedreno/ir3: fix standalone compiler meson build

Signed-off-by: Rob Clark <robdclark@gmail.com>

freedreno/ir3: correct # of dest components for intrinsics

Don't rely on intr->num_components having a valid value.  It doesn't
seem to anymore for non-vectorized intrinsics.

Signed-off-by: Rob Clark <robdclark@gmail.com>

freedreno/ir3: remove bogus assert

The ssbo atomic instructions are not vectorized.  So num_components is
not expected to be valid.

Signed-off-by: Rob Clark <robdclark@gmail.com>

nir: handle get_buffer_size in nir_lower_atomics_to_ssbo

Overlooked initially, be we need to remap the SSBO index for this as
well.

Signed-off-by: Rob Clark <robdclark@gmail.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

anv/meson: Generate dev_icd.json

I tested this in a setup where the builddir was outside of the srcdir.

Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>

anv: Fix architecture in intel_icd.{arch}.json

Use the host arch, not the target arch. In Meson and in recent
Autotools, the host arch is where the binary will be used. The target
arch is useful only when compiling a compiler.

See: http://mesonbuild.com/Cross-compilation.html
See: https://www.gnu.org/software/automake/manual/html_node/Cross_002dCompilation.html
Reported-by: Eric Engestrom <eric.engestrom@imgtec.com>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>

radv: Fix architecture in radeon_icd.{arch}.json

Use the host arch, not the target arch. In Meson and in recent
Autotools, the host arch is where the binary will be used. The target
arch is useful only when compiling a compiler.

See: http://mesonbuild.com/Cross-compilation.html
See: https://www.gnu.org/software/automake/manual/html_node/Cross_002dCompilation.html
Reported-by: Eric Engestrom <eric.engestrom@imgtec.com>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>

anv: Refactor anv_GetImageSubresourceLayout()

Its helper function, anv_surface_get_subresource_layout(), was not very
helpful. So fold it into the main function.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>

anv/image: Refactor choice of isl_tiling_flags_t

Instead of choosing the tiling flags inside make_surface(), which is
called once per aspect in a loop, and which chooses the same tiling for
each aspect, choose the tiling flags exactly once before entering the
aspect loop.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>

anv: Refactor anv_get_format_plane() - explicit unsupported

The same local variable, 'plane_format', was returned on success *and*
failure. Be more explicit in distinguishing the two cases: return
'plane_format' on success and return 'unsupported' on failure.

This simplifies the diff in upcoming patches for
VK_EXT_image_drm_format_modifier.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>

anv: Remove anv_physical_device_get_format_properties()

Fold its body into its sole caller,
anv_GetPhysicalDeviceFormatProperties().

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>

anv: Simplify anv_physical_device_get_format_properties()

Now that get_image_format_properties() returns the correct
VkFormatFeatureFlags, we can remove the unneeded if-branch and some
local variables.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>

anv: Simplify anv_get_image_format_properties()

Now that get_image_format_features() has a VkImageTiling parameter, we
can bypass anv_physical_device_get_format_properties() and call
get_image_format_features() directly.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>

anv: Rename get_image_format_properties()

The name is misleading. It looks like vkGetPhysicalDeviceImageFormatProperties(),
but it actually implement vkGetPhysicalDeviceFormatProperties. Let's
rename it to what it actually does, get_image_format_features(), because it
returns VkFormatFeatureFlags.

For consistency, also rename get_buffer_format_properties() to
get_buffer_format_features().

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>

anv: Fix get_image_format_properties() - YCbCr

Teach it to calculate the format features for YCbCr.

The goal (which is completed in this patch) is to incrementally fix
get_image_format_properties() to return a correct result.  Previously,
it returned incorrect VkFormatFeatureFlags which the caller needed clean
up.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>

anv: Fix get_image_format_properties() - 3-channel formats

Teach it to calculate the format features for 3-channel formats.

The goal is to incrementally fix get_image_format_properties() to return
a correct result.  Currently, it returns incorrect VkFormatFeatureFlags
which the caller must clean up.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>

anv: Refactor get_image_format_properties() - Reduce params

Replace parameters 'enum isl_format' and 'struct anv_format_plane' with
new parameter 'const struct anv_format *'.

The goal is to incrementally fix get_image_format_properties() to return
a correct result.  Currently, it returns incorrect VkFormatFeatureFlags
which the caller must clean up.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>

anv: Refactor get_image_format_properties() - base_isl_format

Rename parameter 'base' to 'base_isl_format'.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>

anv: Refactor get_image_format_properties() - plane_format

Rename parameter 'format' to 'plane_format'.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>

anv: Refactor get_image_format_properties() - ASTC

Teach it to calculate the format features for ASTC.

The goal is to incrementally fix get_image_format_properties() to return
a correct result.  Currently, it returns incorrect VkFormatFeatureFlags
which the caller must clean up.

v2: New commit message

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net> (v1)
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>

anv: Refactor get_image_format_properties() - depthstencil (v2)

Teach it to calculate the features of depthstencil formats.

The goal is to incrementally fix get_image_format_properties() to return
a correct result.  Currently, it returns incorrect VkFormatFeatureFlags
which the caller must clean up.

v2: New commit message

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net> (v1)
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>

anv: Better types for 'aspect' function params

Some functions have a comment that says "Exactly one bit must be in
'aspect'". So change the type of their 'aspect' parameter from
VkImageAspectFlags to VkImageAspectFlagBits.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>

anv: Refactor get_buffer_format_properties()

Make it a stand-alone function. Pre-patch, for some formats the function
returned incorrect VkFormatFeatureFlags which were cleaned up by the
caller.

This prepares for a cleaner implementation of
VK_EXT_image_drm_format_modifier.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>

broadcom/vc4: Fix simulator mode for the MADVISE usage.

mesa: enable ARB_texture_buffer_* extensions in the Compatibility profile

We already have piglit tests testing alpha, luminance, and intensity
formats. They were skipped by piglit until now.

Additionally, I'm enabling one ARB_texture_buffer_range piglit test to run
with the compat profile.

i965 behavior is unchanged except that it doesn't expose TBOs in the Compat
profile. Not sure how that affects the GL version override.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Eric Anholt <eric@anholt.net>

docs: update r600 atomic counter status.

Signed-off-by: Dave Airlie <airlied@redhat.com>

r600: add support for hw atomic counters. (v3)

This adds support for the evergreen/cayman atomic counters.

These are implemented using GDS append/consume counters. The values
for each counter are loaded before drawing and saved after each draw
using special CP packets.

v2: move hw atomic assignment into driver.
v3: fix messing up caps (Gert Wollny), only store ranges in driver,
drop buffers.

Signed-off-by: Dave Airlie <airlied@redhat.com>
Acked-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Tested-By: Gert Wollny <gw.fossdev@gmail.com>

st/mesa: add support for hw atomics to glsl->tgsi. (v5)

This adds support for creating the hw atomic tgsi from
the glsl codepaths.

v2: drop the atomic index and move to backend.
v3: drop buffer decls. (Marek)
v4: fix off by one (Gert)
v5: fix off by one the other way (Dave)

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Tested-By: Gert Wollny <gw.fossdev@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>

st/mesa: setup hw atomic limits. (v1.1)

HW atomics need to use caps to set some limits, and some
other limits may also need limiting.

This fixes things up to work for evergreen hw, it may need
more changes in the future if other hw wants to use this path.

v1.1: fix indent.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Tested-By: Gert Wollny <gw.fossdev@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>

st/mesa: start adding support for hw atomics atom. (v2)

This adds a new atom that calls the new driver API to
bind buffers containing hw atomics.

v2: fixup bindings for sparse buffers. (mareko/nha)
don't bind buffer atomics when hw atomics are enabled.
use NewAtomicBuffer (mareko)

Tested-By: Gert Wollny <gw.fossdev@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>

mesa/program: add hw atomic counter file

This is needed for the GLSL->TGSI translation for hw atomic counters.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Tested-By: Gert Wollny <gw.fossdev@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>

gallium: add hw atomic buffer binding API.

This API binds atomic buffers for all bound shaders (as per the
GL semantics).

This is needed to support cross shader hw atomic counters.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Tested-By: Gert Wollny <gw.fossdev@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>

gallium/tgsi: start adding hw atomics (v3.2)

This adds support for a hw atomic counters to TGSI.

A new register file for storing atomic counters is added,
along with a new atomic counter semantic, along with docs
for both.

v2: drop semantic, move hw counter to backend,
Ilia pointed out SSO would have busted my plan, and he
was right.
v3: drop BUFFER decls. (Marek)
v3.1: minor fixups for whitespace, set ureg error
if we overflow the hw atomic limits. (nha)
v3.2: fix some docs inconsistencies (Ilia)

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Tested-By: Gert Wollny <gw.fossdev@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>

gallium: add CAPs to support HW atomic counters. (v3)

This looks like an evergreen specific feature, but with atomic
counters AMD have hw specific counters they use instead of operating
on buffers directly. These are separate to the buffer atomics,
so require different limits and code paths.

I've left the CAP for atomic type extensible in case someone
else has a variant on this sort of thing (freedreno maybe?)
and needs to change it.

This adds all the CAPs required to add support for those atomic
counters, along with a related CAP for limiting the number of
output resources.

I'd like to land this and the st patch then I can start to
upstream the evergreen support for these and other GL4.x features.

v2: drop the ATOMIC_COUNTER_MODE cap, just use the return
from the HW counters. If 0 we use the current mode.
v3: fix some rebase errors (Gert Wollny)

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Tested-By: Gert Wollny <gw.fossdev@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>

r600/query: drop rest of vi workaround code.

This isn't needed in r600 anymore.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>

docs: Fix GL_MESA_program_debug enums

13b303ff9265b89bdd9100e32f905e9cdadfad81 added the actual enums but
didn't remove the already existing XXXX ones. (And also duplicated
the "fragment" names instead of using the "vertex" names.)

Fixes: 13b303ff9265b89bdd91 "docs: Update the list of used MESA GL enums."
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
Reviewed-by: Brian Paul <brianp@vmware.com>