Heinrich Schuchardt [Sun, 12 Jun 2022 13:13:05 +0000 (13:13 +0000)]
snd: enable building max98357a driver with ACPIGEN=n
sandbox_defconfig builds the max98357a driver. It should be possible to
build the sandbox without ACPI support.
ACPI support in the max98357a driver is only needed when creating an ACPI
table. Fix building with ACPIGEN=n.
Fixes:
54bcca29737f ("sound: Add an ACPI driver for Maxim MAX98357ac")
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Heinrich Schuchardt [Sun, 12 Jun 2022 12:28:22 +0000 (12:28 +0000)]
test: fix CONFIG_ACPIGEN dependencies
Some tests cannot be built with CONFIG_ACPIGEN=n. Consider this in the
Makefile.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Pali Rohár [Tue, 31 May 2022 08:32:36 +0000 (10:32 +0200)]
distroboot: Fix ubifs
Fix multiple issues in ubifs distroboot code:
U-Boot supports attaching only one MTD device as UBI at the time. So
always call 'ubifsmount ubi0:${bootubivol}' for mounting UBI volume
${bootubivol}. Usage of 'ubi${devnum}' is incorrect as 'ubi part'
command attach MTD device always as UBI device ubi0.
Set distroboot ${bootfstype} variable to ubifs in ubifs_boot command.
Distroboot scripts require ${bootfstype} variable to be properly set and it
is already set for all other boot types.
Set distroboot ${distro_bootpart} variable to ${bootubivol} value. UBI
device does not have partitions, but has volumes. Distroboot scripts
require something to be set in ${distro_bootpart} variable, so set it to
the UBI volume which is currently mounted by ubifs.
Set distroboot ${devnum} variable to fixed string "ubi0". ubifs code
differs from the other partition code that it requires "ubi" prefix before
number.
Explicitly unmount ubifs volume after loading all data from it. This allows
to detach UBI device from MTD device.
Move definition of MTD device with UBI and UBI volume with ubifs filesystem
from global env variables ${bootubipart} and ${bootubivol} into the
distroboot "func" macro, defined in board include config files. UBIFS
distroboot macros then set ${bootubipart} and ${bootubivol} local variables
for compatibility with existing distroboot scripts.
This last change allows to define more UBIFS target devices and make it
clear what is boot MTD/UBI device.
All board include config files are adjusted to use this new scheme of
specifying boot MTD/UBI device.
Signed-off-by: Pali Rohár <pali@kernel.org>
Acked-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Pali Rohár [Mon, 30 May 2022 09:09:11 +0000 (11:09 +0200)]
ubifs: Fix reference count leak in ubifsumount
Original ubifs code was designed that after ubifs_umount() call it is
required to also call ubi_close_volume() which closes underlying UBI
volume. But U-Boot ubifs modification have not implemented it properly
which caused that ubifsumount command contains resource leak. It can be
observed by calling simple sequence of commands:
=> ubi part mtd2
ubi0: attaching mtd2
...
=> ubifsmount ubi0
=> ubifsumount
Unmounting UBIFS volume rootfs!
=> ubi detach
ubi0 error: ubi_detach_mtd_dev: ubi0 reference count 1, destroy anyway
ubi0: detaching mtd2
ubi0: mtd2 is detached
Fix this issue by calling ubi_close_volume() and mutex_unlock() in
directly in ubifs_umount() function before freeing U-Boot's global
ubifs_sb. And remove duplicate calls of these two functions in remaining
places. Note that when ubifs_umount() is not called then during error
handling is still needed to call ubi_close_volume() and mutex_unlock.
With this change ubifsumount command does not throw that error anymore:
=> ubi part rootfs
ubi0: attaching mtd2
...
=> ubifsmount ubi0
=> ubifsumount
Unmounting UBIFS volume rootfs!
=> ubi detach
ubi0: detaching mtd2
ubi0: mtd2 is detached
Signed-off-by: Pali Rohár <pali@kernel.org>
Rogier Stam [Wed, 11 May 2022 21:20:28 +0000 (23:20 +0200)]
Add SCSI scan for ENV in EXT4 or FAT
When having environment stored in EXT4 or FAT
and using an AHCI or SCSI device / partition
the scan would not be performed early enough
and hence the device would not be recognized.
This change adds the scan when the interface
is "scsi" in a similar way to mmc_initialize.
Signed-off-by: Rogier Stam <rogier@unrailed.org>
Reviewed-by: Pali Rohár <pali@kernel.org>
Tom Rini [Thu, 7 Jul 2022 18:12:07 +0000 (14:12 -0400)]
Merge branch '2022-07-07-Kconfig-migrations-dead-code-removal' into next
- Migrate more CONFIG options to Kconfig and remove some unused code
while we're at it.
Tom Rini [Sat, 25 Jun 2022 23:29:46 +0000 (19:29 -0400)]
Convert CONFIG_SYS_BOOTM_LEN to Kconfig
This converts the following to Kconfig:
CONFIG_SYS_BOOTM_LEN
As part of this, rework error handling in boot/bootm.c so that we pass
the buffer size to handle_decomp_error as CONFIG_SYS_BOOTM_LEN will not
be available to host tools but we do know the size that we passed to
malloc().
Cc: Soeren Moch <smoch@web.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Sat, 25 Jun 2022 15:02:49 +0000 (11:02 -0400)]
Convert CONFIG_SYS_BOOTCOUNT_LE et al to Kconfig
This converts the following to Kconfig:
CONFIG_SYS_BOOTCOUNT_LE
CONFIG_SYS_BOOTCOUNT_BE
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Sat, 25 Jun 2022 15:02:48 +0000 (11:02 -0400)]
kmcoge5ne: Move BFTIC3 CONFIG references to their usage
We only reference CONFIG_SYS_BFTIC3_BASE in one location. Move the
comment to where we reference it, and use the value directly.
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Holger Brunck <holger.brunck@hitachienergy.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Tom Rini [Sat, 25 Jun 2022 15:02:47 +0000 (11:02 -0400)]
mx*sabresd: Reference CONFIG_SYS_AUXCORE_BOOTDATA value directly
As this is used in the environment, reference it directly rather than as
a CONFIG value.
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Adrian Alonso <adrian.alonso@nxp.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Sat, 25 Jun 2022 15:02:46 +0000 (11:02 -0400)]
Convert CONFIG_SYS_BOOT_RAMDISK_HIGH to Kconfig
This converts the following to Kconfig:
CONFIG_SYS_BOOT_RAMDISK_HIGH
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Sat, 25 Jun 2022 15:02:45 +0000 (11:02 -0400)]
Convert CONFIG_SYS_FSL_CPC et al to Kconfig
This converts the following to Kconfig:
CONFIG_SYS_FSL_CPC
CONFIG_SYS_CPC_REINIT_F
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Sat, 25 Jun 2022 15:02:44 +0000 (11:02 -0400)]
Convert CONFIG_SYS_RAMBOOT to Kconfig
This converts the following to Kconfig:
CONFIG_SYS_RAMBOOT
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Sat, 25 Jun 2022 15:02:43 +0000 (11:02 -0400)]
Convert CONFIG_SYS_BOOK3E_HV to Kconfig
This converts the following to Kconfig:
CONFIG_SYS_BOOK3E_HV
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Sat, 25 Jun 2022 15:02:42 +0000 (11:02 -0400)]
arm: Remove PXA architecture support
With the last platform for this architecture removed, remove the rest of
the architecture support as well.
Cc: Marek Vasut <marex@denx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tom Rini [Sat, 25 Jun 2022 15:02:41 +0000 (11:02 -0400)]
Convert CONFIG_SYS_83XX_DDR_USES_CS0 to Kconfig
This converts the following to Kconfig:
CONFIG_SYS_83XX_DDR_USES_CS0
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Sat, 25 Jun 2022 15:02:40 +0000 (11:02 -0400)]
thunerx_88xx: Clean up config slightly.
We don't use CONFIG_SYS_64BIT anywhere and can use
CONFIG_TARGET_THUNDERX_88XX to build the device trees.
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Sat, 25 Jun 2022 15:02:38 +0000 (11:02 -0400)]
Convert CONFIG_PALMAS_POWER to Kconfig
This converts the following to Kconfig:
CONFIG_PALMAS_POWER
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Sat, 25 Jun 2022 15:02:37 +0000 (11:02 -0400)]
Convert CONFIG_SYS_EMIF_PRECALCULATED_TIMING_REGS et al to Kconfig
This converts the following to Kconfig:
CONFIG_SYS_EMIF_PRECALCULATED_TIMING_REGS
CONFIG_SYS_AUTOMATIC_SDRAM_DETECTION
CONFIG_SYS_DEFAULT_LPDDR2_TIMINGS
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Sat, 25 Jun 2022 15:02:36 +0000 (11:02 -0400)]
Convert CONFIG_SYS_DISCOVER_PHY to Kconfig
This converts the following to Kconfig:
CONFIG_SYS_DISCOVER_PHY
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Sat, 25 Jun 2022 15:02:35 +0000 (11:02 -0400)]
Convert CONFIG_SYS_UNIFY_CACHE to Kconfig
This converts the following to Kconfig:
CONFIG_SYS_UNIFY_CACHE
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Sat, 25 Jun 2022 15:02:34 +0000 (11:02 -0400)]
layerscape: Remove some unused CONFIG symbols
All of these symbols are not referenced anywhere else in the code, so
remove them.
Cc: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Sat, 25 Jun 2022 15:02:33 +0000 (11:02 -0400)]
usb: Remove some unused CONFIG settings
On platforms that use CONFIG_USB_OHCI_NEW we do not need to set
CONFIG_SYS_USB_OHCI_REGS_BASE nor CONFIG_SYS_USB_OHCI_SLOT_NAME. Drop
these from platforms that we can.
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Sat, 25 Jun 2022 15:02:32 +0000 (11:02 -0400)]
usb: ohci-hcd: Remove some unused legacy code
At this point, the only user of ohci-hcd that also uses PCI is using DM,
so we can drop CONFIG_PCI_OHCI* usage. No platforms set either of
CONFIG_SYS_USB_OHCI_BOARD_INIT or CONFIG_SYS_USB_OHCI_CPU_INIT so those
hooks can be removed as well.
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Sat, 25 Jun 2022 15:02:31 +0000 (11:02 -0400)]
Convert CONFIG_USB_OHCI_NEW et al to Kconfig
This converts the following to Kconfig:
CONFIG_SYS_OHCI_SWAP_REG_ACCESS
CONFIG_SYS_USB_OHCI_CPU_INIT
CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS
CONFIG_SYS_USB_OHCI_SLOT_NAME
CONFIG_USB_ATMEL
CONFIG_USB_ATMEL_CLK_SEL_PLLB
CONFIG_USB_ATMEL_CLK_SEL_UPLL
CONFIG_USB_OHCI_LPC32XX
CONFIG_USB_OHCI_NEW
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Sat, 11 Jun 2022 03:03:09 +0000 (23:03 -0400)]
spl: Ensure all SPL symbols in Kconfig have some SPL dependency
Tighten up symbol dependencies in a number of places. Ensure that a SPL
specific option has at least a direct dependency on SPL. In places
where it's clear that we depend on something more specific, use that
dependency instead. This means in a very small number of places we can
drop redundant dependencies.
Reported-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Sat, 11 Jun 2022 03:03:00 +0000 (23:03 -0400)]
Convert CONFIG_USB_XHCI_EXYNOS et al to Kconfig
This converts the following to Kconfig:
CONFIG_USB_XHCI_EXYNOS
CONFIG_USB_EHCI_EXYNOS
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Wed, 6 Jul 2022 22:54:29 +0000 (18:54 -0400)]
Merge branch '2022-07-06-platform-updates' into next
- Assorted updates for Toradex, TI, Aspeed and Nuvoton platforms
Jim Liu [Fri, 24 Jun 2022 08:24:37 +0000 (16:24 +0800)]
misc: nuvoton: Add host interface configuration driver
add nuvoton BMC npcm750 host configuration driver
Signed-off-by: Jim Liu <JJLIU0@nuvoton.com>
Joel Stanley [Wed, 29 Jun 2022 07:05:25 +0000 (16:35 +0930)]
CI: Add Aspeed AST2600
The AST2600 has a Qemu model that allows testing. Create a SPI NOR image
containing the combined SPL and u-boot FIT image.
Reviewed-by: Chia-Wei Wang <chiawei_wang@aspeedtech.com>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Signed-off-by: Joel Stanley <joel@jms.id.au>
Joel Stanley [Wed, 29 Jun 2022 07:05:24 +0000 (16:35 +0930)]
aspeed/spl: Remove OVERLAY from linker script
The generic arm linker script contains this section:
.bss __rel_dyn_start (OVERLAY) : {
...
}
The (OVERLAY) syntax in the description causes the .bss section to be
included in the NOR area of the image:
$ objdump -t -j .bss spl/u-boot-spl
SYMBOL TABLE:
0000c61c l d .bss
00000000 .bss
0000c640 l O .bss
00000040 __value.0
0000c68c g O .bss
00000000 __bss_end
0000c61c g O .bss
00000000 __bss_start
0000c680 g O .bss
0000000c stdio_devices
This is what the custom linker script tries to avoid, as the NOR area is
read-only.
Remove the OVERLAY syntax to fix the BSS location:
$ objdump -t -j .bss spl/u-boot-spl
SYMBOL TABLE:
83000000 l d .bss
00000000 .bss
83000000 l O .bss
00000040 __value.0
0000c61c g O .bss
00000000 __image_copy_end
8300004c g O .bss
00000000 __bss_end
83000000 g O .bss
00000000 __bss_start
83000040 g O .bss
0000000c stdio_devices
This restores the state of the linker script before the patch that fixed
the linker lists issue.
Fixes:
f6810b749f2e ("aspeed/ast2600: Fix SPL linker script")
Signed-off-by: Joel Stanley <joel@jms.id.au>
Joel Stanley [Wed, 29 Jun 2022 07:05:23 +0000 (16:35 +0930)]
ast2600: Configure u-boot-with-spl.bin target
The normal way of loading u-boot is as a FIT, so configure u-boot.img as
the SPL playload.
The u-boot-with-spl.bin target will add padding according to
CONFIG_SPL_MAX_SIZE which defaults to 64KB on the AST2600.
With this the following simple steps can be used to build and boot a
system:
make u-boot-with-spl.bin
truncate -s 64M u-boot-with-spl.bin
qemu-system-arm -nographic -M ast2600-evb \
-drive file=u-boot-with-spl.bin,if=mtd,format=raw
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Reviewed-by: Chia-Wei Wang <chiawei_wang@aspeedtech.com>
Signed-off-by: Joel Stanley <joel@jms.id.au>
Joel Stanley [Wed, 29 Jun 2022 07:05:22 +0000 (16:35 +0930)]
spl: Set SPL_MAX_SIZE default for AST2600
The AST2600 bootrom has a max size of 64KB. This can be overridden if the
system is running the SPL from SPI NOR and not using secure boot.
Signed-off-by: Joel Stanley <joel@jms.id.au>
Joel Stanley [Wed, 29 Jun 2022 07:05:21 +0000 (16:35 +0930)]
config/ast2600: Disable hash hardware accel
The HACE driver lacks support for all the hash types, causing boot to
fail with the default FIT configuration which uses CRC32.
Additionally the Qemu model or the u-boot driver is unable to correctly
compute the SHA256 hash used in a FIT.
Disable HACE by default while the above issues are worked out to enable
boot testing in Qemu.
Reviewed-by: Chia-Wei Wang <chiawei_wang@aspeedtech.com>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Signed-off-by: Joel Stanley <joel@jms.id.au>
Joel Stanley [Wed, 29 Jun 2022 07:05:20 +0000 (16:35 +0930)]
config/ast2600: Make position independent
Allows loading one u-boot from another. Useful for testing on hardware.
Reviewed-by: Chia-Wei Wang <chiawei_wang@aspeedtech.com>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Signed-off-by: Joel Stanley <joel@jms.id.au>
Joel Stanley [Wed, 29 Jun 2022 07:05:19 +0000 (16:35 +0930)]
config/ast2600: Enable CRC32
Useful for testing images with the default hash type.
Reviewed-by: Chia-Wei Wang <chiawei_wang@aspeedtech.com>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Signed-off-by: Joel Stanley <joel@jms.id.au>
Joel Stanley [Thu, 23 Jun 2022 09:05:36 +0000 (18:35 +0930)]
config/ast2600: Enable eMMC related boot options
Allow booting zImage from ext4 devices with DOS or UEFI partition
layouts.
Signed-off-by: Joel Stanley <joel@jms.id.au>
Joel Stanley [Thu, 23 Jun 2022 09:05:35 +0000 (18:35 +0930)]
mmc/aspeed: Enable controller clocks
Request and enable the controller level clocks.
Signed-off-by: Joel Stanley <joel@jms.id.au>
Joel Stanley [Thu, 23 Jun 2022 09:05:34 +0000 (18:35 +0930)]
mmc/aspeed: Probe from controller
The Aspeed SDHCI controller is arranged with some shared control
registers, followed by one or two sets of actual SDHCI registers.
Adjust the driver to probe this controller device first. The driver then
wants to iterate over the child nodes to probe the SDHCI proper:
ofnode node;
dev_for_each_subnode(node, parent) {
struct udevice *dev;
int ret;
ret = device_bind_driver_to_node(parent, "aspeed_sdhci",
ofnode_get_name(node),
node, &dev);
if (ret)
return ret;
}
However if we did this the sdhci driver would probe twice; once
"naturally" from the device tree and a second time due to this code.
Instead of doing this we can rely on the probe order, where the
controller will be set up before the sdhci devices. A better solution is
preferred.
Select MISC as the controller driver is implemented as a misc device.
Signed-off-by: Joel Stanley <joel@jms.id.au>
Joel Stanley [Thu, 23 Jun 2022 09:05:33 +0000 (18:35 +0930)]
mmc/aspeed: Add debuging for clock probe failures
Signed-off-by: Joel Stanley <joel@jms.id.au>
Joel Stanley [Thu, 23 Jun 2022 09:05:32 +0000 (18:35 +0930)]
clk/ast2500: Add SD clock
In order to use the clock from the sdhci driver, add the SD clock.
Signed-off-by: Joel Stanley <joel@jms.id.au>
Joel Stanley [Thu, 23 Jun 2022 09:05:31 +0000 (18:35 +0930)]
clk/ast2600: Adjust eMMC clock names
Adjust clock to stay compatible with those used by the Linux kernel
device tree.
Signed-off-by: Joel Stanley <joel@jms.id.au>
Joel Stanley [Thu, 23 Jun 2022 09:05:30 +0000 (18:35 +0930)]
clk/aspeed: Add debug message when clock fails
A common message across platforms that prints the clock number.
Signed-off-by: Joel Stanley <joel@jms.id.au>
Joel Stanley [Thu, 23 Jun 2022 09:05:29 +0000 (18:35 +0930)]
ARM: dts: ast2500: Update SDHCI nodes
Match the description used by the Linux kernel, except use scu instead
of syscon as the phandle.
Signed-off-by: Joel Stanley <joel@jms.id.au>
Joel Stanley [Thu, 23 Jun 2022 09:05:28 +0000 (18:35 +0930)]
ARM: dts: ast2600: Update SDHCI nodes
Match the description used by the Linux kernel, except use scu instead
of syscon as the phandle.
Signed-off-by: Joel Stanley <joel@jms.id.au>
Joel Stanley [Thu, 23 Jun 2022 05:10:41 +0000 (14:40 +0930)]
config/aspeed: Enable EEPROM options
To allow testing of the I2C driver, enable the eprom command and the
misc driver.
Signed-off-by: Joel Stanley <joel@jms.id.au>
Joel Stanley [Thu, 23 Jun 2022 05:10:40 +0000 (14:40 +0930)]
config/ast2600: Enable I2C driver
Signed-off-by: Joel Stanley <joel@jms.id.au>
Joel Stanley [Thu, 23 Jun 2022 05:10:39 +0000 (14:40 +0930)]
i2c/aspeed: Add AST2600 compatible
Signed-off-by: Joel Stanley <joel@jms.id.au>
Reviewed-by: Ryan Chen <ryan_chen@aspeedtech.com>
Joel Stanley [Thu, 23 Jun 2022 05:10:38 +0000 (14:40 +0930)]
i2c/aspeed: Fix reset control
The reset control was written for the ast2500 and directly programs the
clocking register.
So we can share the code with other SoC generations use the reset device
to deassert the I2C reset line.
Signed-off-by: Joel Stanley <joel@jms.id.au>
Reviewed-by: Ryan Chen <ryan_chen@aspeedtech.com>
Joel Stanley [Thu, 23 Jun 2022 05:10:37 +0000 (14:40 +0930)]
reset/aspeed: Implement status callback
The I2C driver shares a reset line between buses, so allow it to test
the state of the reset line before resetting it.
Signed-off-by: Joel Stanley <joel@jms.id.au>
Reviewed-by: Ryan Chen <ryan_chen@aspeedtech.com>
Joel Stanley [Thu, 23 Jun 2022 05:10:36 +0000 (14:40 +0930)]
ARM: dts: ast2600-evb: Add I2C devices
The EVB has an EEPROM and ADT8490 temp sensor/fan controller on bus 7,
and a LM75 temp sensor on bus 8.
Signed-off-by: Joel Stanley <joel@jms.id.au>
Joel Stanley [Thu, 23 Jun 2022 05:10:35 +0000 (14:40 +0930)]
ARM: dts: ast2500-evb: Add I2C devices
The EVB has an EEPROM on bus 3 and a LM75 temp sensor on bus 7. Enable
those busses we can test the I2C driver.
Signed-off-by: Joel Stanley <joel@jms.id.au>
Reviewed-by: Ryan Chen <ryan_chen@aspeedtech.com>
Joel Stanley [Thu, 23 Jun 2022 05:10:34 +0000 (14:40 +0930)]
ARM: dts: ast2600-evb: Remove redundant pinctrl
Now that these are in the dtsi we don't need them in the EVB device
tree.
Signed-off-by: Joel Stanley <joel@jms.id.au>
Joel Stanley [Thu, 23 Jun 2022 05:10:33 +0000 (14:40 +0930)]
ARM: dts: ast2600: Disable I2C nodes by default
Allow boards to enable the buses they use.
Signed-off-by: Joel Stanley <joel@jms.id.au>
Reviewed-by: Ryan Chen <ryan_chen@aspeedtech.com>
Joel Stanley [Thu, 23 Jun 2022 05:10:32 +0000 (14:40 +0930)]
ARM: dts: ast2600: Add I2C reset properties
The same as the upstream Linux device tree, each i2c bus has a property
specifying the reset line.
Signed-off-by: Joel Stanley <joel@jms.id.au>
Reviewed-by: Ryan Chen <ryan_chen@aspeedtech.com>
Eddie James [Thu, 23 Jun 2022 05:10:31 +0000 (14:40 +0930)]
ARM: dts: ast2600: Add I2C pinctrl
Set the pinctrl groups for each I2C bus. These are essential to
I2C operating correctly.
Signed-off-by: Eddie James <eajames@linux.ibm.com>
Reviewed-by: Ryan Chen <ryan_chen@aspeedtech.com>
Signed-off-by: Joel Stanley <joel@jms.id.au>
Bryan Brattlof [Tue, 21 Jun 2022 21:36:03 +0000 (16:36 -0500)]
soc: soc_ti_k3: identify j7200 SR2.0 SoCs
Anytime a new revision of a chip is produced, Texas Instruments
will increment the 4 bit VARIANT section of the CTRLMMR_WKUP_JTAGID
register by one. Typically this will be decoded as SR1.0 -> SR2.0 ...
however a few TI SoCs do not follow this convention.
Rather than defining a revision string array for each SoC, use a
default revision string array for all TI SoCs that continue to follow
the typical 1.0 -> 2.0 revision scheme.
Signed-off-by: Bryan Brattlof <bb@ti.com>
Jim Liu [Tue, 21 Jun 2022 09:03:38 +0000 (17:03 +0800)]
phy: nuvoton: add NPCM7xx phy control driver
add BMC NPCM750 phy control driver
Signed-off-by: Jim Liu <JJLIU0@nuvoton.com>
Philippe Schenker [Mon, 20 Jun 2022 14:57:45 +0000 (16:57 +0200)]
toradex: tdx-cfg-block: add new toradex oui range
Add new Toradex MAC OUI (8c:06:cb), to the config block. With this change
we extend the possible serial-numbers as follows:
For serial-numbers
00000000-
16777215 OUI 00:14:2d is taken
For serial-numbers
16777216-
33554431 OUI 8c:06:cb is taken
Lower 24-bit of the serial number are used in the NIC part of the
MAC address, the complete serial number can be calculated using the OUI.
Signed-off-by: Philippe Schenker <philippe.schenker@toradex.com>
Reviewed-by: Francesco Dolcini <francesco.dolcini@toradex.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Nishanth Menon [Fri, 17 Jun 2022 18:26:12 +0000 (13:26 -0500)]
board: ti: common: board_detect: Do 1byte address checks first.
Do 1 byte address checks first prior to doing 2 byte address checks.
When performing 2 byte addressing on 1 byte addressing eeprom, the
second byte is taken in as a write operation and ends up erasing the
eeprom region we want to preserve.
While we could have theoretically handled this by ensuring the write
protect of the eeproms are properly managed, this is not true in case
where board are updated with 1 byte eeproms to handle supply status.
Flipping the checks by checking for 1 byte addressing prior to 2 byte
addressing check prevents this problem at the minor cost of additional
overhead for boards with 2 byte addressing eeproms.
Signed-off-by: Nishanth Menon <nm@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Nishanth Menon [Fri, 17 Jun 2022 18:26:11 +0000 (13:26 -0500)]
board: ti: common: Handle the legacy eeprom address width properly
Due to supply chain issues, we are starting to see a mixture of eeprom
usage including the smaller 7-bit addressing eeproms such as 24c04
used for eeproms.
These eeproms don't respond well to 2 byte addressing and fail the
read operation. We do have a check to ensure that we are reading the
alternate addressing size, however the valid failure prevents us
from checking at 1 byte anymore.
Rectify the same by falling through and depend on header data comparison
to ensure that we have valid data.
Signed-off-by: Nishanth Menon <nm@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Nishanth Menon [Fri, 17 Jun 2022 18:26:10 +0000 (13:26 -0500)]
board: ti: common: Optimize boot when detecting consecutive bad records
The eeprom data area is much bigger than the data we intend to store,
however, with bad programming, we might end up reading bad records over
and over till we run out of eeprom space. instead just exit when 10
consecutive records are read.
Signed-off-by: Nishanth Menon <nm@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Vignesh Raghavendra [Wed, 15 Jun 2022 14:03:05 +0000 (19:33 +0530)]
firmware: ti_sci_static_data: Make file board agnostic
Static DMA channel data for R5 SPL is mostly board agnostic so use SOC
configs instead of EVM specific config to ease adding new board support.
Drop J7200 EVM specific settings as its same as J721e
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Reviewed-by: Nishanth Menon <nm@ti.com>
Georgi Vlaev [Tue, 14 Jun 2022 14:45:34 +0000 (17:45 +0300)]
configs: am62x_evm_r5: Add CONFIG_NR_DRAM_BANKS as done in a53 defconfig
Add CONFIG_NR_DRAM_BANKS from am62x_evm_a53_defconfig as this is
needed to calculate the size of DDR that is available.
Signed-off-by: Georgi Vlaev <g-vlaev@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Georgi Vlaev [Tue, 14 Jun 2022 14:45:33 +0000 (17:45 +0300)]
board: ti: am62x: Account for DDR size fixups if ECC is enabled
Call into k3-ddrss driver to fixup device tree and resize
the available amount of DDR if ECC is enabled.
A second fixup is required from A53 SPL to take the fixup
as done from R5 SPL and apply it to DT passed to A53 U-boot,
which in turn passes this to the OS.
Signed-off-by: Georgi Vlaev <g-vlaev@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Georgi Vlaev [Tue, 14 Jun 2022 14:45:32 +0000 (17:45 +0300)]
board: ti: am62x: Use fdt functions for ram and bank init
Use the appropriate fdtdec_setup_mem_size_base() call in
dram_init() and fdtdec_setup_bank_size() in dram_bank_init()
to pull these values from DT, where they are already available,
instead of hardcoding them.
Signed-off-by: Georgi Vlaev <g-vlaev@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Georgi Vlaev [Tue, 14 Jun 2022 14:45:31 +0000 (17:45 +0300)]
arm: dts: k3-am625-*: Mark memory with u-boot,dm-spl
Mark the memory node with u-boot,dm-spl so we can use it
from early SPL on both R5 and A53.
Signed-off-by: Georgi Vlaev <g-vlaev@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Georgi Vlaev [Tue, 14 Jun 2022 14:45:30 +0000 (17:45 +0300)]
arm: mach-k3: common: Use ddr_init in spl_enable_dcache
The spl_enable_dcache() function calls dram_init_banksize()
to get the total memory size. Normally the dram_init_banksize()
setups the memory banks, while the total size is reported
by ddr_init(). This worked so far for K3 since we set the
gd->ram_size in dram_init_banksize() as well.
Signed-off-by: Georgi Vlaev <g-vlaev@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Philippe Schenker [Mon, 13 Jun 2022 17:35:23 +0000 (19:35 +0200)]
toradex: tdx-cfg-block: extend assembly version
There are two decimal digits reserved to encode the module version and
revision. This code so far implemented A-Z which used 0-25 of this
range.
This commit extends the range to make use of all 99 numbers. After
capital letters the form with a hashtag and number (e.g. #26) is used.
Examples:
If the assembly version is between zero and 25 the numbering is as follows,
as it also has been before this commit:
0: V0.0A
1: V0.0B
...
25: V0.0Z
New numbering of assembly version:
If the number is between 26 and 99 the new assembly version name is:
26: V0.0#26
27: V0.0#27
...
99: V0.0#99
Signed-off-by: Philippe Schenker <philippe.schenker@toradex.com>
Reviewed-by: Francesco Dolcini <francesco.dolcini@toradex.com>
Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Philippe Schenker [Mon, 13 Jun 2022 17:35:22 +0000 (19:35 +0200)]
toradex: tdx-cfg-block: use defines for string length
With those defines the length can be reused and is in one place
extendable.
Signed-off-by: Philippe Schenker <philippe.schenker@toradex.com>
Reviewed-by: Francesco Dolcini <francesco.dolcini@toradex.com>
Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Philippe Schenker [Mon, 13 Jun 2022 17:35:21 +0000 (19:35 +0200)]
toradex: tdx-cfg-block: use only snprintf
Prevent memory issues that could appear with sprintf. Replace all
sprintf occurences with snprintf.
Signed-off-by: Philippe Schenker <philippe.schenker@toradex.com>
Reviewed-by: Francesco Dolcini <francesco.dolcini@toradex.com>
Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Aswath Govindraju [Fri, 10 Jun 2022 12:53:38 +0000 (18:23 +0530)]
board: ti: j721e: Return if there is an error while configuring SerDes
While configuring SerDes, errors could be encountered, in these cases,
return instead of going ahead. This is will help in booting even if
configuration of SerDes fails.
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
Vaishnav Achath [Fri, 3 Jun 2022 06:02:16 +0000 (11:32 +0530)]
arm: k3: j721e: add dynamic sf bus override support for j721e
implement overrides for spl_spi_boot_bus() and spl_spi_boot_cs()
lookup functions according to bootmode selection, so as to support
both QSPI and OSPI boot using the same build.
Signed-off-by: Vaishnav Achath <vaishnav.a@ti.com>
Reviewed-by: Pratyush Yadav <p.yadav@ti.com>
Vaishnav Achath [Fri, 3 Jun 2022 06:02:15 +0000 (11:32 +0530)]
common: spl: spl_spi: add support for dynamic override of sf bus
Currently the SPI flash to load from is defined through the compile
time config CONFIG_SF_DEFAULT_BUS and CONFIG_SF_DEFAULT_CS, this
prevents the loading of binaries from different SPI flash using the
same build.E.g. supporting QSPI flash boot and OSPI flash boot
on J721E platform is not possible due to this limitation.
This commit adds lookup functions spl_spi_boot_bus()
and spl_spi_boot_cs for identifying the flash device based on the
selected boot device, when not overridden the lookup functions are
weakly defined in common/spl/spl_spi.c.
Signed-off-by: Vaishnav Achath <vaishnav.a@ti.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Tom Rini [Wed, 6 Jul 2022 13:15:36 +0000 (09:15 -0400)]
Merge branch '2022-07-05-more-Kconfig-migrations' into next
- Migrate more CONFIG symbols to Kconfig, remove some dead code and
clean-up arch/Kconfig.nxp slightly more.
Tom Rini [Mon, 20 Jun 2022 12:07:58 +0000 (08:07 -0400)]
Convert CONFIG_KIRKWOOD_PCIE_INIT et al to Kconfig
This converts the following to Kconfig:
CONFIG_KIRKWOOD_EGIGA_INIT
CONFIG_KIRKWOOD_PCIE_INIT
CONFIG_KIRKWOOD_RGMII_PAD_1V8
CONFIG_KM_DISABLE_PCIE
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Mon, 20 Jun 2022 12:07:57 +0000 (08:07 -0400)]
qemu-ppce500: Move CONFIG_SYS_PCI_MAP_{START, END} to board code
These CONFIG options are only used on this board, in the board file
itself. Remove these from the CONFIG namespace and define in the board
file.
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Mon, 20 Jun 2022 12:07:56 +0000 (08:07 -0400)]
Convert CONFIG_SYS_FSL_PCI_VER_3_X to Kconfig
This converts the following to Kconfig:
CONFIG_SYS_FSL_PCI_VER_3_X
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Mon, 20 Jun 2022 12:07:55 +0000 (08:07 -0400)]
Convert CONFIG_PCI_MSC01 to Kconfig
This converts the following to Kconfig:
CONFIG_PCI_MSC01
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Mon, 20 Jun 2022 12:07:54 +0000 (08:07 -0400)]
socrates: Rework CONFIG_PCI_CLK_FREQ
The symbol CONFIG_PCI_CLK_FREQ is local to this board. Provide equal
clarity in the code by referencing the numeric value directly and move
the explanatory comment to the code, just prior to use.
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Mon, 20 Jun 2022 12:07:53 +0000 (08:07 -0400)]
Convert CONFIG_SH7751_PCI to Kconfig
This converts the following to Kconfig:
CONFIG_SH7751_PCI
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Mon, 20 Jun 2022 12:07:52 +0000 (08:07 -0400)]
MPC837XERDB: Remove unused PCI defines
These defines aren't referenced in code today, remove them.
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Mon, 20 Jun 2022 12:07:51 +0000 (08:07 -0400)]
m68k: Remove unused PCI code
The only mcf5445x platform does not enable PCI, drop this code.
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Mon, 20 Jun 2022 12:07:50 +0000 (08:07 -0400)]
Convert CONFIG_PCI_CONFIG_HOST_BRIDGE to Kconfig
This converts the following to Kconfig:
CONFIG_PCI_CONFIG_HOST_BRIDGE
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Mon, 20 Jun 2022 12:07:49 +0000 (08:07 -0400)]
Convert CONFIG_PCI_GT64120 to Kconfig
This converts the following to Kconfig:
CONFIG_PCI_GT64120
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Mon, 20 Jun 2022 12:07:48 +0000 (08:07 -0400)]
Convert CONFIG_PCI_SCAN_SHOW to Kconfig
This converts the following to Kconfig:
CONFIG_PCI_SCAN_SHOW
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Mon, 20 Jun 2022 12:07:47 +0000 (08:07 -0400)]
pci: Remove pci_sh4 and related defines.
This driver is not enabled anywhere, remove it. Also remove definitions
of symbols only used in this driver, on platforms that did not enable
it.
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Mon, 20 Jun 2022 12:07:46 +0000 (08:07 -0400)]
Convert CONFIG_PCIE_IMX to Kconfig
This converts the following to Kconfig:
CONFIG_PCIE_IMX
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Mon, 20 Jun 2022 12:07:45 +0000 (08:07 -0400)]
Convert CONFIG_PCIE1 et al to Kconfig
This converts the following to Kconfig:
CONFIG_PCIE1
CONFIG_PCIE2
CONFIG_PCIE3
CONFIG_PCIE4
CONFIG_PCI1
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Mon, 20 Jun 2022 12:07:44 +0000 (08:07 -0400)]
Convert CONFIG_LAYERSCAPE_NS_ACCESS to Kconfig
This converts the following to Kconfig:
CONFIG_LAYERSCAPE_NS_ACCESS
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Mon, 20 Jun 2022 12:07:43 +0000 (08:07 -0400)]
lcd: Remove legacy CONFIG_FB_ADDR code
No platforms set both CONFIG_LCD and CONFIG_FB_ADDR at this time, drop
this legacy code.
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Mon, 20 Jun 2022 12:07:42 +0000 (08:07 -0400)]
Convert CONFIG_FSL_FIXED_MMC_LOCATION et al to Kconfig
This converts the following to Kconfig:
CONFIG_FSL_FIXED_MMC_LOCATION
CONFIG_ESDHC_HC_BLK_ADDR
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Fri, 17 Jun 2022 20:24:34 +0000 (16:24 -0400)]
powerpc: Clean up CHAIN_OF_TRUST related options
As things stand currently, there is only one PowerPC platform that
enables the options for CHAIN_OF_TRUST. From the board header files,
remove a number of never-set options. Remove board specific values from
arch/powerpc/include/asm/fsl_secure_boot.h as well. Rework
include/config_fsl_chain_trust.h to not abuse the CONFIG namespace for
constructing CHAIN_BOOT_CMD. Migrate all of the configurable addresses
to Kconfig.
If any platforms are re-introduced with secure boot support, everything
required should still be here, but now in Kconfig, or requires migration
of an option to Kconfig.
Cc: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Fri, 17 Jun 2022 20:24:33 +0000 (16:24 -0400)]
nxp: config_fsl_chain_trust.h: Clean up and remove unused portions
The way that secure boot is implemented today on NXP ARM platforms does
not reuse the elements found in include/config_fsl_chain_trust.h to
construct CONFIG_SECBOOT but instead board header files have their
environment setup as needed and then fsl_setenv_chain_of_trust() will
set secureboot in the environment. Remove a large number of unused
defines here.
Cc: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Fri, 17 Jun 2022 20:24:32 +0000 (16:24 -0400)]
fsl_validate: Migrate SPL_UBOOT_KEY_HASH to Kconfig
Move setting of SPL_UBOOT_KEY_HASH to a non-NULL value to Kconfig. As
part of this, change fsl_secboot_validate(...) to check that it is
passed a non-empty string, rather than non-NULL.
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Priyanka Jain <priyanka.jain@nxp.com>
Cc: Kshitiz Varshney <kshitiz.varshney@nxp.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Fri, 17 Jun 2022 20:24:31 +0000 (16:24 -0400)]
arch/Kconfig.nxp: Re-organize slightly
Make all of the CHAIN_OF_TRUST options be under a single menu and add a
comment for the rest, so the resulting config file reads more clearly.
Remove duplicate CHAIN_OF_TRUST options from
board/congatec/common/Kconfig. Remove duplicate NXP_ESBC config
questions and move to arch/Kconfig.nxp.
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Thu, 16 Jun 2022 18:04:40 +0000 (14:04 -0400)]
Convert CONFIG_SYS_FSL_SFP_BE et al to Kconfig
This converts the following to Kconfig:
CONFIG_KEY_REVOCATION
CONFIG_SYS_FSL_SFP_BE
CONFIG_SYS_FSL_SFP_LE
CONFIG_SYS_FSL_SFP_VER_3_0
CONFIG_SYS_FSL_SFP_VER_3_2
CONFIG_SYS_FSL_SFP_VER_3_4
CONFIG_SYS_FSL_SRK_LE
This partly means making sure to enable SYS_FSL_ERRATUM_A007186 only for
when CHAIN_OF_TRUST is enabled.
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Thu, 16 Jun 2022 18:04:39 +0000 (14:04 -0400)]
Convert CONFIG_SYS_FSL_SEC_MON et al to Kconfig
This converts the following to Kconfig:
CONFIG_SYS_FSL_SEC_MON
CONFIG_SYS_FSL_SEC_MON_BE
CONFIG_SYS_FSL_SEC_MON_LE
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Thu, 16 Jun 2022 18:04:38 +0000 (14:04 -0400)]
Convert CONFIG_ESDHC_DETECT_QUIRK to Kconfig
This converts the following to Kconfig:
CONFIG_ESDHC_DETECT_QUIRK
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Thu, 16 Jun 2022 18:04:37 +0000 (14:04 -0400)]
Convert CONFIG_ESBC_HDR_LS et al to Kconfig
This converts the following to Kconfig:
CONFIG_ESBC_HDR_LS
CONFIG_ESBC_ADDR_64BIT
Signed-off-by: Tom Rini <trini@konsulko.com>