Jagan Teki [Wed, 2 Sep 2015 06:09:46 +0000 (11:39 +0530)]
sf: Return bank_sel, if flash->bank_curr == bank_sel
If computed bank_sel is same as flash->bank_curr which is
computed at probe time, then return the bank_sel instead of zero.
Cc: Michal Simek <michal.simek@xilinx.com>
Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Jagan Teki <jteki@openedev.com>
Jagan Teki [Wed, 2 Sep 2015 06:09:45 +0000 (11:39 +0530)]
spi: zynq_spi: Remove unneeded headers
- Removed unneeded inclusion of header files
- Add "Xilinx" on license text
Cc: Michal Simek <michal.simek@xilinx.com>
Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Jagan Teki <jteki@openedev.com>
Siva Durga Prasad Paladugu [Mon, 14 Sep 2015 07:29:08 +0000 (12:59 +0530)]
zynq-common: Add SPL SPI offset, size configs
Define CONFIG_SYS_SPI_ARGS_OFFS, CONFIG_SYS_SPI_ARGS_SIZE
and CONFIG_SYS_SPI_KERNEL_OFFS which will be used in SPL
spi mode. These macros defines the device tree offset, size
and the kernel image offset in flash respectively.
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Reviewed-by: Jagan Teki <jteki@openedev.com>
Jagan Teki [Mon, 7 Sep 2015 20:09:44 +0000 (01:39 +0530)]
spi: zynq_qspi: Fix to configure CPOL, CPHA mask
priv->mode is initialized when .set_speed triggers
with mode value, so checking mode for configuring
CPOL, CPHA using priv->mode is invalid hence use
mode from .set_speed argument, and at the end
priv->mode will initialized with mode.
This patch also replaces formatting string to use
speed instead of mode in .set_speed ops.
Signed-off-by: Jagan Teki <jteki@openedev.com>
Jagan Teki [Fri, 4 Sep 2015 13:00:34 +0000 (18:30 +0530)]
zynq-common: Enable ISSI SPI-NOR flash support
This patch enabled CONFIG_SPI_FLASH_ISSI for qspi on zynq boards.
Signed-off-by: Jagan Teki <jteki@openedev.com>
Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Cc: Michal Simek <michal.simek@xilinx.com>
Jagan Teki [Fri, 4 Sep 2015 12:59:12 +0000 (18:29 +0530)]
sf: params: Add IS25LP128 part support
Added support for IS25LP128 flash part.
Signed-off-by: Jagan Teki <jteki@openedev.com>
Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Cc: Michal Simek <michal.simek@xilinx.com>
Jagan Teki [Fri, 4 Sep 2015 12:57:58 +0000 (18:27 +0530)]
sf: params: Add IS25LP064 part support
Added support for IS25LP064 flash part.
Signed-off-by: Jagan Teki <jteki@openedev.com>
Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Cc: Michal Simek <michal.simek@xilinx.com>
Jagan Teki [Fri, 4 Sep 2015 12:55:45 +0000 (18:25 +0530)]
sf: params: Add IS25LP032 part support
Added support for IS25LP032 flash part.
Signed-off-by: Jagan Teki <jteki@openedev.com>
Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Cc: Michal Simek <michal.simek@xilinx.com>
Jagan Teki [Mon, 17 Aug 2015 13:01:39 +0000 (18:31 +0530)]
spi: zynq_spi: Store cs value into private data
Store cs value into private data and use it while activating
chipselect instead of passing through function.
Signed-off-by: Jagan Teki <jteki@openedev.com>
Jagan Teki [Mon, 17 Aug 2015 12:57:47 +0000 (18:27 +0530)]
spi: zynq_spi: Rename baudrate divisor mask name
Rename ZYNQ_SPI_CR_BRD_MASK to ZYNQ_SPI_CR_BAUD_MASK
for more readable.
Signed-off-by: Jagan Teki <jteki@openedev.com>
Jagan Teki [Mon, 17 Aug 2015 12:55:03 +0000 (18:25 +0530)]
spi: zynq_spi: Add config reg shift named macros
Update the numerical values for baudrate and chipselect
with config reg shift named macro's
Signed-off-by: Jagan Teki <jteki@openedev.com>
Jagan Teki [Sat, 15 Aug 2015 18:49:38 +0000 (00:19 +0530)]
spi: Kconfig: Add Zynq QSPI controller entry
Add Zynq QSPI controller Kconfig entry.
Signed-off-by: Jagan Teki <jteki@openedev.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Michal Simek <michal.simek@xilinx.com>
Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Jagan Teki [Mon, 31 Aug 2015 12:08:40 +0000 (17:38 +0530)]
configs: zynq: Enable zynq qspi controller
Enable zynq qspi controller driver on respective zynq boards.
Signed-off-by: Jagan Teki <jteki@openedev.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Michal Simek <michal.simek@xilinx.com>
Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Tested-by: Jagan Teki <jteki@openedev.com>
Jagan Teki [Mon, 17 Aug 2015 13:26:38 +0000 (18:56 +0530)]
zynq-common: Enable Bank/Extended address register support
Enabled SPI flash Bank/Extended address register support.
Bank/Extended address registers are used to access the flash
which has size > 16MiB in 3-byte addressing.
Signed-off-by: Jagan Teki <jteki@openedev.com>
Jagan Teki [Mon, 17 Aug 2015 13:25:02 +0000 (18:55 +0530)]
zynq-common: Enable zynq qspi controller support
This patch adds support for zynq qspi controller driver
on zynq-common.h
Signed-off-by: Jagan Teki <jteki@openedev.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Acked-by: Michal Simek <michal.simek@xilinx.com>
Tested-by: Jagan Teki <jteki@openedev.com>
Jagan Teki [Mon, 31 Aug 2015 12:06:03 +0000 (17:36 +0530)]
configs: Enable legacy SPI flash interface support
Enable legacy spi-flash interface support for boards which
supports qspi controller with connected spi-nor flash.
Signed-off-by: Jagan Teki <jteki@openedev.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Michal Simek <michal.simek@xilinx.com>
Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Tested-by: Jagan Teki <jteki@openedev.com>
Jagan Teki [Sat, 15 Aug 2015 17:49:05 +0000 (23:19 +0530)]
dts: zed: Enable zynq qspi controller node
Enabled zynq qspi controller node for zed board.
Signed-off-by: Jagan Teki <jteki@openedev.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Acked-by: Michal Simek <michal.simek@xilinx.com>
Jagan Teki [Fri, 4 Sep 2015 07:19:49 +0000 (12:49 +0530)]
dts: zc770-xm010: Enable zynq qspi controller node
Enabled zynq qspi controller node for zc770-xm010 board.
=> sf probe 0 -- bus1 for selecting qspi controller
=> sf probe 1 -- bus0 for selecting spi controller
Signed-off-by: Jagan Teki <jteki@openedev.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Acked-by: Michal Simek <michal.simek@xilinx.com>
Jagan Teki [Sat, 15 Aug 2015 17:46:21 +0000 (23:16 +0530)]
dts: zc706: Enable zynq qspi controller node
Enabled zynq qspi controller node for zc706 board.
Signed-off-by: Jagan Teki <jteki@openedev.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Acked-by: Michal Simek <michal.simek@xilinx.com>
Jagan Teki [Sat, 15 Aug 2015 17:45:21 +0000 (23:15 +0530)]
dts: zc702: Enable zynq qspi controller node
Enabled zynq qspi controller node for zc702 board.
Signed-off-by: Jagan Teki <jteki@openedev.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Acked-by: Michal Simek <michal.simek@xilinx.com>
Jagan Teki [Sat, 15 Aug 2015 17:38:51 +0000 (23:08 +0530)]
dts: microzed: Enable zynq qspi controller node
Enabled zynq qspi controller node for microzed board,
verified the same on spansion spi-nor flash.
Signed-off-by: Jagan Teki <jteki@openedev.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Acked-by: Michal Simek <michal.simek@xilinx.com>
Tested-by: Jagan Teki <jteki@openedev.com>
Jagan Teki [Sat, 15 Aug 2015 17:36:56 +0000 (23:06 +0530)]
doc: device-tree-bindings: spi: Add zynq qspi info
Added device-tree-binding information for zynq qspi controller
driver.
Signed-off-by: Jagan Teki <jteki@openedev.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Acked-by: Michal Simek <michal.simek@xilinx.com>
Tested-by: Jagan Teki <jteki@openedev.com>
Jagan Teki [Sat, 15 Aug 2015 17:32:31 +0000 (23:02 +0530)]
dts: zynq: Add zynq qspi controller nodes
This patch adds zynq qspi controller nodes in zynq-7000.dtsi.
Signed-off-by: Jagan Teki <jteki@openedev.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Acked-by: Michal Simek <michal.simek@xilinx.com>
Tested-by: Jagan Teki <jteki@openedev.com>
Jagan Teki [Mon, 17 Aug 2015 13:08:06 +0000 (18:38 +0530)]
spi: Add zynq qspi controller driver
Added zynq qspi controller driver for Xilinx Zynq APSOC,
this driver is driver-model driven with devicetree support.
=> sf probe
SF: Detected S25FL128S_64K with page size 256 Bytes, erase size 64 KiB, total 16 MiB
=> mw.b 0x100 0xCC 0x1000000
=> sf update 0x100 0x0 0x1000000
device 0 whole chip
16777216 bytes written, 0 bytes skipped in 59.842s, speed 289262 B/s
=> sf read 0x3000000 0x0 0x1000000
device 0 whole chip
SF:
16777216 bytes @ 0x0 Read: OK
=> cmp.b 0x3000000 0x100 0x1000000
Total of
16777216 byte(s) were the same
Signed-off-by: Jagan Teki <jteki@openedev.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Cc: Michal Simek <michal.simek@xilinx.com>
Acked-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Tested-by: Jagan Teki <jteki@openedev.com>
Gong Qianyu [Wed, 9 Sep 2015 08:44:16 +0000 (16:44 +0800)]
common/board_f.c: modify the macro to use get_clocks() more common
get_clocks() should not be limited by ESDHC.
Signed-off-by: Gong Qianyu <Qianyu.Gong@freescale.com>
Masahiro Yamada [Tue, 20 Oct 2015 12:09:06 +0000 (21:09 +0900)]
arm, powerpc: select SYS_GENERIC_BOARD
We have finished Generic Board conversion for ARM and PowerPC, i.e.
all the boards have been converted except OpenRISC, SuperH, SPARC,
which have not supported Generic Board framework yet.
Select SYS_GENERIC_BOARD in arch/Kconfig and delete all the macro
defines in include/configs/*.h.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Simon Glass [Mon, 19 Oct 2015 12:50:03 +0000 (06:50 -0600)]
Revert "ARM: zynq: disable CONFIG_SYS_MALLOC_F to fix MMC boot"
This reverts commit
321f86e18d6aae9f7b7ba3ef1eb0cec769481874.
The original bug has been fixed.
Signed-off-by: Simon Glass <sjg@chromium.org>
Tested-on: Zedboard and ZC706 board
Tested-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Tested-on: zc702
Tested-by: Michal Simek <michal.simek@xilinx.com>
Simon Glass [Mon, 19 Oct 2015 12:50:02 +0000 (06:50 -0600)]
zynq: Move SPL console init out of board_init_f()
We should not init the console this early since it precludes using driver
model for the UART, since it is not set up at the start of board_init_f().
See the README for more information. The debug UART does not have this
restriction. If we want to do early init with the console on it can be done
in spl_board_init().
Move the preloader_console_init() call from board_init_f() to board_init_r().
Signed-off-by: Simon Glass <sjg@chromium.org>
Tested-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Tested-by: Michal Simek <michal.simek@xilinx.com>
Simon Glass [Mon, 19 Oct 2015 12:50:01 +0000 (06:50 -0600)]
microblaze: Add a TODO to call board_init_f_mem()
This C function should be used to do the early memory layout and init. This
is beyond my powers, so just add a TODO for the maintainer.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Michal Simek <michal.simek@xilinx.com>
Simon Glass [Mon, 19 Oct 2015 12:50:00 +0000 (06:50 -0600)]
arm: Switch 32-bit ARM to using generic global_data setup
There is quite a bit of assembler code that can be removed if we use the
generic global_data setup. Less arch-specific code makes it easier to add
new features and maintain the start-up code.
Drop the unneeded code and adjust the hooks in board_f.c to cope.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Mon, 19 Oct 2015 12:49:59 +0000 (06:49 -0600)]
arm: Switch aarch64 to using generic global_data setup
There is quite a bit of assembler code that can be removed if we use the
generic global_data setup. Less arch-specific code makes it easier to add
new features and maintain the start-up code.
Drop the unneeded code and adjust the hooks in board_f.c to cope.
Tested on LS2085ARDB and LS2085AQDS (armv8 SoC).
Tested-by: York Sun <yorksun@freescale.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Mon, 19 Oct 2015 12:49:58 +0000 (06:49 -0600)]
board_init_f_mem(): Don't create an unused early malloc() area
Change the #ifdef so that the early malloc() area is not set up in SPL if
CONFIG_SYS_SPL_MALLOC_START is defined. In that case it would never actually
be used, and just chews up stack space.
Signed-off-by: Simon Glass <sjg@chromium.org>
Tested-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Simon Glass [Mon, 19 Oct 2015 12:49:57 +0000 (06:49 -0600)]
board_init_f_mem(): Don't require memset()
Unfortunately memset() is not always available, so provide a substitute when
needed.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Mon, 19 Oct 2015 12:49:56 +0000 (06:49 -0600)]
Move board_init_f_mem() into a common location
This function will be used by both SPL and U-Boot proper. So move it into
a common place. Also change the #ifdef so that the early malloc() area is
not set up in SPL if CONFIG_SYS_SPL_MALLOC_START is defined. In that case
it would never actually be used, and just chews up stack space.
Signed-off-by: Simon Glass <sjg@chromium.org>
Stephen Warren [Sat, 3 Oct 2015 19:56:48 +0000 (13:56 -0600)]
fs-test.sh: fix pre-requisite detection
In the following snippet:
if [ ! -x `which $prereq` ]; then
When $prereq does not exist, `which $prereq` evaluates to the empty string,
which results in *no* argument being passed to the -x operator, which then
evaluates to true, which is the equivalent of the prereq having been found. In
order for this to fail as expected, we must pass an empty argument, which then
causes -x to fail. Do this by wrapping the `` in quotes so there's always an
argument to -x, even if the value of the argument is zero-length.
Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
Stephen Warren [Sat, 3 Oct 2015 19:56:47 +0000 (13:56 -0600)]
test: fat: add test of non-contiguous file reads
In my patch series to replace fs/fat with "ff.c", I enhanced ff.c to
optimize file reading, so that reads of contiguous clusters are submitted
to the IO device as a single read. This test attempts to torture-test
edge-cases of that enhancement.
BTW, the only way I found to validate that this script actually does
create non-contiguous files was to manually inspect the FAT bitmap in a
hex dump of the FAT image. hdparm --fibmap doesn't work on loop-mounted
filesystems. filefrag -v -e seems to lie about files being contiguous
when they aren't.
Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
Stephen Warren [Sat, 3 Oct 2015 19:56:46 +0000 (13:56 -0600)]
itest: make memory access work under sandbox
itest accesses memory, and hence must map/unmap it. Without doing so, it
accesses invalid addresses and crashes.
Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Roy Spliet [Thu, 17 Sep 2015 22:46:59 +0000 (18:46 -0400)]
distro_bootcmd: Add support for booting from ubifs
Under the assumptions of having a UBI volume called boot, containing
a ubifs filesystem.
Signed-off-by: Roy Spliet <rspliet@eclipso.eu>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
Hans de Goede [Thu, 17 Sep 2015 22:46:58 +0000 (18:46 -0400)]
ubifs: Add generic fs support
Add generic fs support, so that commands like ls, load and test -e can be
used on ubifs.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Hans de Goede [Thu, 17 Sep 2015 22:46:57 +0000 (18:46 -0400)]
ubifs: Add functions for generic fs use
Implement the necessary functions for implementing generic fs support
for ubifs.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Hans de Goede [Thu, 17 Sep 2015 22:46:56 +0000 (18:46 -0400)]
ubifs: Modify ubifs u-boot wrapper function prototypes for generic fs use
Modify the ubifs u-boot wrapper function prototypes for generic fs use,
and give them their own header file.
This is a preparation patch for adding ubifs support to the generic fs
code from fs/fs.c.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Hans de Goede [Thu, 17 Sep 2015 22:46:55 +0000 (18:46 -0400)]
disk/part: Only build hostfs special handling when CONFIG_SANDBOX is set
This is not necessary / useful when not building with CONFIG_SANDBOX and
with the addition of ubifs support to the generic fs commands it actually
gets in the way, since both operate on a fake / NULL blkdev.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
Pierre Aubert [Wed, 16 Sep 2015 06:29:11 +0000 (08:29 +0200)]
Allow imxtract to extract part of script image.
Scripts are multi-file images, the imxtract command should handle them
in the same manner.
Signed-off-by: Pierre Aubert <p.aubert@staubli.com>
Thomas Huth [Tue, 25 Aug 2015 15:09:40 +0000 (17:09 +0200)]
Fix bad return value checks (detected with Coccinelle)
In the "Getting Started with Coccinelle - KVM edition" presentation that
has been held by Julia Lawall at the KVM forum 2015 (see the slides at
http://events.linuxfoundation.org/sites/events/files/slides/tutorial_kvm_0.pdf),
she pointed out some bad return value checks in U-Boot that can be
detected with Coccinelle by using the following config file:
@@
identifier x,y;
identifier f;
statement S;
@@
x = f(...);
(
if (x < 0) S
|
if (
- y
+ x
< 0) S
)
This patch now fixes these issues.
Signed-off-by: Thomas Huth <huth@tuxfamily.org>
Guillaume GARDET [Tue, 25 Aug 2015 13:10:26 +0000 (15:10 +0200)]
ARM: rpi: Add CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG support
Add CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG support and enable it to set
'board_rev' and 'board_name' envs.
'board_rev' can be used in scripts to determine what board we are running on
and 'board_name' for pretty printing.
Signed-off-by: Guillaume GARDET <guillaume.gardet@free.fr>
Cc: Stephen Warren <swarren@wwwdotorg.org>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Bernhard Nortmann [Fri, 21 Aug 2015 13:13:21 +0000 (15:13 +0200)]
allow LED initialization without STATUS_LED_BOOT
For current U-Boot to initialize status LEDs via status_led_init(), it
is required to have both CONFIG_STATUS_LED and STATUS_LED_BOOT defined.
This may be a particular concern with GPIO LEDs, where __led_init() is
required to correctly set up the GPIO (gpio_request and
gpio_direction_output). Without STATUS_LED_BOOT the initialization isn't
called, which could leave the user with a non-functional "led" command -
due to the fact that the LED routines in gpio_led.c use gpio_set_value()
just fine, but the GPIO never got set up properly in the first place.
I think having CONFIG_STATUS_LED is sufficient to justify a
corresponding call to status_led_init(), even with no STATUS_LED_BOOT
defined. To do so, common/board_r.c needs call that routine, so it now
is exposed via status_led.h.
Signed-off-by: Bernhard Nortmann <bernhard.nortmann@web.de>
[trini: Add dummy __led_init to pca9551_led.c]
Signed-off-by: Tom Rini <trini@konsulko.com>
Bernhard Nortmann [Fri, 21 Aug 2015 13:13:20 +0000 (15:13 +0200)]
add generic stubs for GPIO LEDs
For boards that support LEDs driven via GPIO (CONFIG_GPIO_LED),
it may be useful to have some generic stubs (wrapper functions)
for the "colored" LEDs.
This allows defining STATUS_LED_* values directly to GPIO numbers,
e.g.: #define STATUS_LED_GREEN 248 /* = PH24 */
To keep those optional, it's probably best to introduce an additional
configuration setting. I've chosen CONFIG_GPIO_LED_STUBS for that.
Placing the code in drivers/misc/gpio_led.c also ensures that it
automatically depends on CONFIG_GPIO_LED too.
Signed-off-by: Bernhard Nortmann <bernhard.nortmann@web.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Lokesh Vutla [Sat, 19 Sep 2015 09:17:36 +0000 (14:47 +0530)]
dm: keystone: serial: Add driver model support
Add driver model support for keystone serial driver.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Acked-by: Simon Glass <sjg@chromium.org>
Thomas Chou [Thu, 22 Oct 2015 07:29:11 +0000 (15:29 +0800)]
net: convert altera_tse to driver model and phylib
Convert altera_tse to driver model and phylib.
Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Reviewed-by: Marek Vasut <marex@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Thomas Chou [Thu, 22 Oct 2015 07:38:24 +0000 (15:38 +0800)]
nios2: fix virt_to_phys for nios2 with MMU
As the virtual address and physical address mapping of nios2 with
MMU are different. Add a check of MMU, and fix the mapping.
Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Acked-by: Marek Vasut <marex@denx.de>
Reviewed-by: Ley Foon Tan <lftan@altera.com>
Thomas Chou [Wed, 21 Oct 2015 14:37:04 +0000 (22:37 +0800)]
nios2: add README.nios2
Add README.nios2 about how to add nios2 boards to u-boot.
Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Acked-by: Marek Vasut <marex@denx.de>
Thomas Chou [Fri, 23 Oct 2015 06:55:36 +0000 (14:55 +0800)]
nios2: zap nios2-generic board dir
As we use device tree to control u-boot now, the generic
board can be removed.
Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Thomas Chou [Sun, 18 Oct 2015 12:03:53 +0000 (20:03 +0800)]
nios2: convert dma_alloc_coherent to use malloc_cache_aligned
Convert dma_alloc_coherent to use memalign.
Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Reviewed-by: Marek Vasut <marex@denx.de>
Thomas Chou [Tue, 6 Oct 2015 06:09:19 +0000 (14:09 +0800)]
nios2: convert copy_exception_trampoline to use dm cpu data
Convert copy_exception_trampoline() to use dm cpu data.
Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Thomas Chou [Thu, 22 Oct 2015 23:58:20 +0000 (07:58 +0800)]
nios2: convert cache flush to use dm cpu data
Convert cache flush to use dm cpu data.
The original cache flush functions are written in assembly
and use CONFIG_SYS_{I,D}CACHE_SIZE... macros. It is difficult
to convert to use cache configuration in dm cpu data which is
extracted from device tree.
The cacheflush.c of Linux nios2 arch uses cpuinfo structure,
which is very close to our dm cpu data. So we copy and modify
it to arch/nios2/lib/cache.c to replace the old cache.S.
Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Thomas Chou [Fri, 9 Oct 2015 12:09:17 +0000 (20:09 +0800)]
nios2: set default cache configuration in start.S
Set default icache and dcache configuration for start.S.
We want to remove the CONFIG_SYS_{I,D}CACHE_SIZE...
configuration macros. As we are just barely starting from
reset, there is no luxury of device tree.
We will set some maximum cache configuration so that it will
work for most configurations. This is used only in this
start.S. The speed penalty is only once here.
After start up, during board initialization, cpu information
will be extracted from device tree. Then cache flush operations
will have correct cache configurations.
Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Acked-by: Marek Vasut <marex@denx.de>
Thomas Chou [Fri, 9 Oct 2015 03:36:01 +0000 (11:36 +0800)]
nios2: zap initdram
Zap initdram(), as it is not used.
Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Acked-by: Marek Vasut <marex@denx.de>
Thomas Chou [Tue, 6 Oct 2015 02:12:59 +0000 (10:12 +0800)]
nios2: clean up comments style in start.S
Clean up comments style in start.S.
Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Thomas Chou [Mon, 5 Oct 2015 02:37:19 +0000 (10:37 +0800)]
nios2: convert ioremap to use dm cpu data
Convert ioremap() to use io_region_base in dm cpu global data.
Also remove three unused io functions, which have style issue
and are replaced by macros already.
Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Thomas Chou [Fri, 9 Oct 2015 01:43:52 +0000 (09:43 +0800)]
nios2: convert do_reset to use dm cpu data
Convert do_reset to use dm cpu data.
Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Reviewed-by: Simon Glass <sjg@chromium.org>
Thomas Chou [Fri, 9 Oct 2015 01:32:00 +0000 (09:32 +0800)]
nios2: remove asm/psr.h
Remove asm/psr.h, which is not used.
Also clean up asm/sections.h and unaligned.h.
Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Reviewed-by: Marek Vasut <marex@denx.de>
Thomas Chou [Wed, 14 Oct 2015 00:43:31 +0000 (08:43 +0800)]
nios2: convert altera sysid to driver model
Convert altera sysid to driver model with misc uclass.
Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Acked-by: Chin Liang See <clsee@altera.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Thomas Chou [Wed, 7 Oct 2015 12:20:51 +0000 (20:20 +0800)]
dm: implement a Miscellaneous uclass
Implement a Miscellaneous uclass with generic read or
write operations. This class is used only for those
do not fit other more general classes.
Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Acked-by: Simon Glass <sjg@chromium.org>
Thomas Chou [Fri, 9 Oct 2015 01:28:20 +0000 (09:28 +0800)]
serial: remove altera serial initializations
Both altera_jtag_serial_initialize() and
altera_serial_initialize() are no longer used after
they are converted to driver model.
Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Acked-by: Simon Glass <sjg@chromium.org>
Acked-by: Marek Vasut <marex@denx.de>
Thomas Chou [Thu, 22 Oct 2015 14:28:53 +0000 (22:28 +0800)]
nios2: convert altera timer to driver model
Convert altera timer to driver model.
Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Acked-by: Chin Liang See <clsee@altera.com>
Thomas Chou [Fri, 9 Oct 2015 05:48:56 +0000 (13:48 +0800)]
timer: start a new timer after relocation
Start a new timer after relocation, just in case the
timer has been used in per-relocation.
Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Acked-by: Simon Glass <sjg@chromium.org>
Thomas Chou [Fri, 9 Oct 2015 05:46:34 +0000 (13:46 +0800)]
dm: implement a Timer uclass
Implement a Timer uclass to work with lib/time.c.
Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Acked-by: Simon Glass <sjg@chromium.org>
Thomas Chou [Wed, 21 Oct 2015 13:34:57 +0000 (21:34 +0800)]
nios2: convert nios2 cpu to driver model
Convert nios2 cpu to driver model. The cpu parameters are
extracted from device tree and saved to global data structure.
We will use them to replace the custom_fpga.h .
Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Reviewed-by: Simon Glass <sjg@chromium.org>
Thomas Chou [Wed, 21 Oct 2015 13:33:45 +0000 (21:33 +0800)]
nios2 : convert altera_pio to driver model
Convert altera_pio to driver model.
Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Acked-by: Chin Liang See <clsee@altera.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Thomas Chou [Wed, 30 Sep 2015 12:56:53 +0000 (20:56 +0800)]
nios2: add clear and set bits macros
These macros can be used to clear and set multiple bits
in a register using a single call.
Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Reviewed-by: Marek Vasut <marex@denx.de>
Acked-by: Chin Liang See <clsee@altera.com>
Thomas Chou [Wed, 14 Oct 2015 00:33:34 +0000 (08:33 +0800)]
spi : convert altera_spi to driver model
Convert altera_spi to driver model
Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Reviewed-by: Jagan Teki <jteki@openedev.com>
Thomas Chou [Wed, 21 Oct 2015 13:26:54 +0000 (21:26 +0800)]
nios2: convert altera_uart to driver model
Convert altera_uart to driver model.
Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Marek Vasut <marex@denx.de>
Thomas Chou [Thu, 22 Oct 2015 23:36:37 +0000 (07:36 +0800)]
nios2: convert altera_jtag_uart to driver model
Convert altera_jtag_uart to driver model.
Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Acked-by: Marek Vasut <marex@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Thomas Chou [Sat, 3 Oct 2015 13:02:30 +0000 (21:02 +0800)]
nios2: map physical address to uncached virtual address
Add ioremap() to map physical address to uncached virtual
address. We need this to convert the reg address from the
device tree.
The order of headers inclusion in interrupts.c is changed
because common.h will include board header that contains
IO_REGION_BASE.
In the future, the IO_REGION_BASE should be decided from
the device tree.
tree
Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Acked-by: Marek Vasut <marex@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Thomas Chou [Wed, 9 Sep 2015 07:59:15 +0000 (15:59 +0800)]
nios2: enable malloc() pool before relocation
Enable malloc() pool before relocation, because this is needed
to use serial uclass.
Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Reviewed-by: Marek Vasut <marex@denx.de>
Thomas Chou [Wed, 9 Sep 2015 07:09:43 +0000 (15:09 +0800)]
nios2: call board_init_f_mem
We will need CONFIG_SYS_MALLOC_F_LEN to use serial uclass.
So we shall undefine CONFIG_SYS_GENERIC_GLOBAL_DATA, and
call board_init_f_mem() to allocates early malloc() memory
with size of CONFIG_SYS_MALLOC_F_LEN in board_f.c.
Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Reviewed-by: Marek Vasut <marex@denx.de>
Thomas Chou [Wed, 9 Sep 2015 05:41:32 +0000 (13:41 +0800)]
nios2: zap version_string
There is a weak version_string[] at common/cmd_version.c .
Remove the one in start.S.
Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Acked-by: Marek Vasut <marex@denx.de>
Thomas Chou [Wed, 9 Sep 2015 05:08:05 +0000 (13:08 +0800)]
nios2: zap dly_clks
The dly_clks() in start.S is no use after switching to
generic timer. Remove it.
Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Acked-by: Marek Vasut <marex@denx.de>
Thomas Chou [Thu, 8 Oct 2015 13:23:37 +0000 (21:23 +0800)]
nios2: Split timer code into timer.c
Move the timer code from interrupts.c into timer.c . Eliminate the
installation of timer interrupt handler, which is no longer used.
Signed-off-by: Marek Vasut <marex@denx.de>
Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Thomas Chou [Thu, 8 Oct 2015 13:17:42 +0000 (21:17 +0800)]
nios2: Switch to generic timer
Zap almost all of the ad-hoc timer code from interrupts.c and
use the code in lib/time.c instead.
Signed-off-by: Marek Vasut <marex@denx.de>
Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Thomas Chou [Mon, 7 Sep 2015 11:19:31 +0000 (19:19 +0800)]
nios2: enable Driver Model
Enable the Driver Model config. The driver subsystems
are not enabled until we enable each of them.
Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Acked-by: Marek Vasut <marex@denx.de>
Thomas Chou [Sun, 18 Oct 2015 11:42:09 +0000 (19:42 +0800)]
nios2: enable device tree control of U-Boot
This patch adds device tree control of U-Boot to nios2 boards.
The example dts is taken from Linux kernel.
Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Marek Vasut <marex@denx.de>
Thomas Chou [Sun, 6 Sep 2015 12:13:34 +0000 (20:13 +0800)]
nios2: define _end in link script
Since commit
44c6e6591cb451ae606f8bde71dd5fb7b4002544
"rename _end to __bss_end__" , the _end was removed.
But we need it now for separated device tree control,
ie, CONFIG_OF_SEPARATE .
The _end is used by fdtdec_setup() to find the blob.
Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Acked-by: Marek Vasut <marex@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Thomas Chou [Sun, 6 Sep 2015 12:18:10 +0000 (20:18 +0800)]
nios2: remove gp assignments in link script
Since we don't use gp for small data with option "-G0",
we use gp as global data pointer. The _gp location is
not needed.
The ALIGN(16) was for gp only. It is removed, so that we
can get correct address of dtb in u-boot-dtb.bin image.
Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Marek Vasut <marex@denx.de>
Thomas Chou [Fri, 4 Sep 2015 08:39:16 +0000 (16:39 +0800)]
nios2: enlarge the code relocation range
As we will use u-boot-dtb.bin, the code relocation range
should be adjusted to accommodate the additional dtb.
It might be overkilled to look into dtb header to find the
dtb size, so we will simply use CONFIG_SYS_MONITOR_LEN.
Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Thomas Chou [Mon, 7 Sep 2015 00:57:14 +0000 (08:57 +0800)]
nios2: BSS should be cleared only after board_init_f
As dtb in u-boot-dtb.bin overlapped the BSS section,
we should delay the clearing of BSS until dtb is relocated
in board_init_f().
Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Acked-by: Marek Vasut <marex@denx.de>
Thomas Chou [Fri, 4 Sep 2015 08:19:16 +0000 (16:19 +0800)]
nios2: move altera_pio_init to board_early_init_r
As altera_pio_init() uses BSS, it should be moved to
board_early_init_r().
Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Acked-by: Marek Vasut <marex@denx.de>
Thomas Chou [Fri, 4 Sep 2015 05:18:00 +0000 (13:18 +0800)]
nios2: permit device tree control of U-Boot
Enable this in the Kconfig so that nios2 boards can use device
tree to configure U-Boot.
Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Marek Vasut <marex@denx.de>
Thomas Chou [Sat, 29 Aug 2015 07:24:01 +0000 (15:24 +0800)]
nios2: enable CONFIG_NET_RANDOM_ETHADDR
Enable CONFIG_NET_RANDOM_ETHADDR to generate a random MAC address
when ETHADDR is not set.
Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Thomas Chou [Wed, 26 Aug 2015 13:24:35 +0000 (21:24 +0800)]
nios2: move command line configuration to Kconfig
This patch moves command line configuration from board header
file to board defconfig in the way of Kconfig. The change passed
savedefconfig.
This fixes warnings such as : "CONFIG_SYS_HUSH_PARSER" redefined,
when "Use hush shell" is selected with menuconfig, etc.
Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Mugunthan V N [Tue, 13 Oct 2015 08:32:29 +0000 (14:02 +0530)]
ARM: AM335x: mux: change mmc0 cd pinmux from mmc0_sdcd to gpio
Currently omap_hsmmc driver doesn't use sdcd pin to detect
whether the card is present or not. Instead the same pin is used
as GPIO to detect card presence. So change the pin mux mode from
mmc0_sdcd to gpio0_6.
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Mugunthan V N [Tue, 13 Oct 2015 08:27:16 +0000 (13:57 +0530)]
drivers: gpio: omap: add support for parsing additional gpio parameters
With DM_GPIO, gpio parameters like ACTIVE_(LOW/HIGH) are to be
parsed in xlate gpio drivers-ops. Since xlate is not implemented
in omap_gpio driver, the driver considers all gpio to be
ACTIVE_HIGH which is the default case and fails to return actual
gpio status for ACTIVE_LOW gpios. So adding .xlate ops to
omap_gpio.
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Mugunthan V N [Tue, 29 Sep 2015 09:12:27 +0000 (14:42 +0530)]
am437x: Add am57xx_evm_defconfig using CONFIG_DM
Import various DT files for am57xx-beagle-x15 from
Linux Kernel v4.2
Add config file for this board, enable DM, DM_GPIO,
DM_SERIAL and DM_MMC.
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Mugunthan V N [Tue, 29 Sep 2015 09:12:26 +0000 (14:42 +0530)]
ti_omap5_common: mmc: do not define DM_MMC for spl
Since spl doesn't support DM currently, do not define DM_MMC
for spl build.
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
asdfsadf
Mugunthan V N [Mon, 28 Sep 2015 10:47:52 +0000 (16:17 +0530)]
am437x: Add am437x_sk_evm_defconfig using CONFIG_DM
Import various DT files for am437x-sk-evm from Linux Kernel v4.2
Add config file for this board, enable DM, DM_GPIO, DM_SERIAL
and DM_MMC.
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
Mugunthan V N [Mon, 28 Sep 2015 10:47:51 +0000 (16:17 +0530)]
am437x: Add am437x_gp_evm_defconfig using CONFIG_DM
Import various DT files for am4372, an43xx pinctrl and
am437x-gp-evm from Linux Kernel v4.2
Add config file for this board, enable DM, DM_GPIO, DM_SERIAL
and DM_MMC.
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
Mugunthan V N [Mon, 28 Sep 2015 10:47:50 +0000 (16:17 +0530)]
am43xx_evm: mmc: do not define DM_MMC for spl
Since spl doesn't support DM currently, do not define DM_MMC
for spl build.
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Mugunthan V N [Mon, 28 Sep 2015 10:47:49 +0000 (16:17 +0530)]
am43xx_evm.h: : switch to CONFIG_OMAP_SERIAL for non-SPL DM_SERIAL
Tested on am437x gp evm and am437x sk evm
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Mugunthan V N [Mon, 28 Sep 2015 10:47:48 +0000 (16:17 +0530)]
drivers: serial: serial_omap: add comaptibles for all ti platforms
Adding compatibles for am335x, am437x and dra7 platforms.
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
Mugunthan V N [Mon, 28 Sep 2015 10:47:47 +0000 (16:17 +0530)]
drivers: serial: serial_omap: populate default clock frequency when not found in dt
In some platforms like am437x, serial node is not populated with
clock-frequency node. So in that case have a default clock-clock
frequency.
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>