Roman Lebedev [Mon, 4 Oct 2021 16:30:07 +0000 (19:30 +0300)]
[X86][Costmodel] Load/store i32/f32 Stride=4 VF=4 interleaving costs
The only sched models that for cpu's that support avx2
but not avx512 are: haswell, broadwell, skylake, zen1-3
For load we have:
https://godbolt.org/z/avq1oz98W - for intels `Block RThroughput: =8.0`; for ryzens, `Block RThroughput: =4.0`
So could pick cost of `8`.
For store we have:
https://godbolt.org/z/89PGMc1qs - for intels `Block RThroughput: =6.0`; for ryzens, `Block RThroughput: <=6.0`
So we could pick cost of `6`.
I'm directly using the shuffling asm the llc produced,
without any manual fixups that may be needed
to ensure sequential execution.
Reviewed By: RKSimon
Differential Revision: https://reviews.llvm.org/D111061
Roman Lebedev [Mon, 4 Oct 2021 16:30:00 +0000 (19:30 +0300)]
[X86][Costmodel] Load/store i32/f32 Stride=4 VF=2 interleaving costs
Finally, we are getting to the heavy-hitter stuff!
The only sched models that for cpu's that support avx2
but not avx512 are: haswell, broadwell, skylake, zen1-3
For load we have:
https://godbolt.org/z/7crGWoar6 - for intels `Block RThroughput: =4.0`; for ryzens, `Block RThroughput: <=2.0`
So could pick cost of `4`.
For store we have:
https://godbolt.org/z/T8aq3MszM - for intels `Block RThroughput: =5.0`; for ryzens, `Block RThroughput: <=2.0`
So we could pick cost of `5`.
I'm directly using the shuffling asm the llc produced,
without any manual fixups that may be needed
to ensure sequential execution.
Reviewed By: RKSimon
Differential Revision: https://reviews.llvm.org/D111060
kpyzhov [Tue, 5 Oct 2021 13:56:04 +0000 (09:56 -0400)]
[AMDGPU] Use "hostcall" module flag instead of searching for ockl_hostcall_internal() declaration.
The current way to detect hostcalls by looking for "ockl_hostcall_internal()" function in the module seems to be not reliable enough. The LTO may rename the "ockl_hostcall_internal()" function when an application is compiled with "-fgpu-rdc", and MetadataStreamer pass to fail to detect hostcalls, therefore it does not set the "hidden_hostcall_buffer" kernel argument.
This change adds a new module flag: hostcall that can be used to detect whether GPU functions use host calls for printf.
Differential revision: https://reviews.llvm.org/D110337
Hsiangkai Wang [Tue, 5 Oct 2021 06:20:36 +0000 (14:20 +0800)]
[RISCV] Update to vlm.v and vsm.v according to v1.0-rc1.
vle1.v -> vlm.v
vse1.v -> vsm.v
Reviewed By: craig.topper
Differential Revision: https://reviews.llvm.org/D106044
Lei Zhang [Tue, 5 Oct 2021 13:32:35 +0000 (09:32 -0400)]
[mlir] Add an 'cppNamespace' field to availability
This allows us to generate interfaces in a namespace,
following other TableGen'erated code.
Reviewed By: rriddle
Differential Revision: https://reviews.llvm.org/D108311
Dmitry Vyukov [Tue, 5 Oct 2021 13:26:02 +0000 (15:26 +0200)]
tsan: improve detection of stack/tls races
Print meaningful stack frames for stack/tls races
(instead of PC 1/2 that don't symbolize).
Imitate stack/tls writes after we create and initialize
the new thread, otherwise the races are not detected.
This is re-submit of the following reverted commits,
but without tests as they failed on a number of OSes/arches:
"tsan: fix and test detection of TLS races"
"tsan: fix tls_race3 test on darwin"
"tsan: print a meaningful frame for stack races"
Differential Revision: https://reviews.llvm.org/D111147
Lei Zhang [Tue, 5 Oct 2021 13:31:49 +0000 (09:31 -0400)]
[mlir][spirv] Fix path in define_enum.sh script
Reviewed By: mravishankar
Differential Revision: https://reviews.llvm.org/D108310
Jay Foad [Fri, 1 Oct 2021 14:39:38 +0000 (15:39 +0100)]
[PHIElimination] Update LiveVariables after handling an unspillable terminator
Update the LiveVariables analysis after the special handling for
unspillable terminators which was added in D91358. This is just enough
to fix some "Block should not be in AliveBlocks" / "Block missing from
AliveBlocks" errors in the codegen test suite when machine verification
is forced to run after PHIElimination (currently it is disabled).
Differential Revision: https://reviews.llvm.org/D110939
Dmitry Vyukov [Fri, 24 Sep 2021 04:57:37 +0000 (06:57 +0200)]
tsan: make cur_thread_init return cur_thread
Whenever we call cur_thread_init, we call cur_thread on the next line.
So make cur_thread_init return the current thread directly.
Makes code a bit shorter, does not affect codegen.
Reviewed By: vitalybuka, melver
Differential Revision: https://reviews.llvm.org/D110384
Vassil Vassilev [Tue, 5 Oct 2021 06:11:42 +0000 (06:11 +0000)]
Reland "[clang-repl] Allow loading of plugins in clang-repl."
Differential revision: https://reviews.llvm.org/D110484
Jeremy Morse [Tue, 5 Oct 2021 12:44:40 +0000 (13:44 +0100)]
[DebugInfo][InstrRef] Track all of DBG_PHIs operands
An important part of the instruction referencing solution is that we
identify all the registers that values move between before we then compute
an SSA-like function from the machine code, and from the variable
intrinsics. DBG_PHIs weren't causing all the subregisters of their operands
to be tracked; this patch forces that to happen.
The practical implications were that not enough space is allocated for
storing values when analysing the function -- asan will crash on the
attached test case with an unpatched compiler. Non-asan llc's will produce
a DBG_VALUE $noreg, where it should be $dil.
Differential Revision: https://reviews.llvm.org/D109064
Kamau Bridgeman [Thu, 30 Sep 2021 16:36:54 +0000 (11:36 -0500)]
[PowerPC][MMA] Allow MMA builtin types in pre-P10 compilation units
This patch allows the use of __vector_quad and __vector_pair, PPC MMA builtin
types, on all PowerPC 64-bit compilation units. When these types are
made available the builtins that use them automatically become available
so semantic checking for mma and pair vector memop __builtins is also
expanded to ensure these builtin function call are only allowed on
Power10 and new architectures. All related test cases are updated to
ensure test coverage.
Reviewed By: #powerpc, nemanjai
Differential Revision: https://reviews.llvm.org/D109599
Tobias Gysi [Tue, 5 Oct 2021 12:24:19 +0000 (12:24 +0000)]
[mlir][linalg] Move generalization pattern to Transforms (NFC).
Move the generalization pattern to the other Linalg transforms to make it available to the codegen strategy.
Reviewed By: nicolasvasilache
Differential Revision: https://reviews.llvm.org/D110728
Raphael Isemann [Tue, 5 Oct 2021 12:27:54 +0000 (14:27 +0200)]
[lldb][NFC] Remove unnecessary include in cpp/const_this test
Aaron Ballman [Tue, 5 Oct 2021 12:21:29 +0000 (08:21 -0400)]
consteval if is now fully supported
This amends
424733c12aacc227a28114deba72061153f8dff2 which accidentally
dropped the change to the status page.
Corentin Jabot [Tue, 5 Oct 2021 12:02:53 +0000 (08:02 -0400)]
Implement if consteval (P1938)
Modify the IfStmt node to suppoort constant evaluated expressions.
Add a new ExpressionEvaluationContext::ImmediateFunctionContext to
keep track of immediate function contexts.
This proved easier/better/probably more efficient than walking the AST
backward as it allows diagnosing nested if consteval statements.
Valentin Clement [Tue, 5 Oct 2021 12:01:17 +0000 (14:01 +0200)]
[fir] Split FIROptimizer lib into several smaller libraries
Partition libFIROptimizer into smaller libraries that reflect the
structure. Adapt potential problems.
This patch is part of the upstreaming effort from fir-dev branch. It's a
building stone to upstreaming transformations.
Reviewed By: schweitz
Differential Revision: https://reviews.llvm.org/D111055
Co-authored-by: Eric Schweitz <eschweitz@nvidia.com>
Sjoerd Meijer [Tue, 5 Oct 2021 11:12:39 +0000 (12:12 +0100)]
[SCCPSolver] Fix use-after-free in markArgInFuncSpecialization
In SCCPSolver::markArgInFuncSpecialization, the ValueState map may be
reallocated *after* the initial ValueLatticeElement reference is grabbed, but
*before* its use in copy initialization. This causes a use-after-free. To fix
this, this commit changes the behavior to create the new ValueLatticeElement
before assigning the old one to it.
Patch by: https://github.com/duck-37/
Differential Revision: https://reviews.llvm.org/D111112
Mirko Brkusanin [Tue, 5 Oct 2021 11:43:39 +0000 (13:43 +0200)]
[GlobalISel] Combine fabs(fneg(x)) to fabs(x)
Differential Revision: https://reviews.llvm.org/D110943
Nicolas Vasilache [Tue, 5 Oct 2021 10:06:50 +0000 (10:06 +0000)]
[mlir][Linalg] Allow operand-less scf::ExecuteRegionOp to encapsulate scf::YieldOp
These are considered noops.
Buferization will still fail on scf.execute_region which yield values.
This is used to make comprehensive bufferization interoperate better with external clients.
Differential Revision: https://reviews.llvm.org/D111130
Aaron Ballman [Tue, 5 Oct 2021 11:13:00 +0000 (07:13 -0400)]
Silence an implicit conversion warning on the bit shift result in MSVC; NFC
gbhyamso [Tue, 5 Oct 2021 11:04:01 +0000 (12:04 +0100)]
[llvm-cxxfilt][NFC] Fix test for running in Windows cmd
The test llvm\test\tools\llvm-cxxfilt\delimiters.test started failling when run
from cmd.exe on Windows after D110986 which added a unicode character (⦙) to it.
Piping the unicode character in cmd.exe causes it to be converted to a '?'.
That causes the test to fail because the llvm-cxxfilt output becomes Foo?Bar
rather than the expected Foo⦙Bar.
Redirect the echo output to and from a temporary file to get around this
problem.
It's not entirely clear what the root cause is, but two separate downstream
builders are tripping up on this, so we are landing the work around for the
time being.
Differential Revision: https://reviews.llvm.org/D111072
Balázs Kéri [Tue, 5 Oct 2021 10:24:34 +0000 (12:24 +0200)]
[clang][ASTImporter] Add import of thread safety attributes.
Attributes of "C/C++ Thread safety attributes" section in Attr.td
are added to ASTImporter. The not added attributes from this section
do not need special import handling.
Reviewed By: martong
Differential Revision: https://reviews.llvm.org/D110528
Max Kazantsev [Tue, 5 Oct 2021 10:49:03 +0000 (17:49 +0700)]
[Test] Add test showing profitable peeling opportunity
Patch by Dmitry Makogon!
LLVM GN Syncbot [Tue, 5 Oct 2021 10:41:33 +0000 (10:41 +0000)]
[gn build] Port
214054f78a4e
Michał Górny [Fri, 1 Oct 2021 15:21:45 +0000 (17:21 +0200)]
[lldb] Move DynamicRegisterInfo to public Target library
Move DynamicRegisterInfo from the internal lldbPluginProcessUtility
library to the public lldbTarget library. This is a prerequisite
towards ABI plugin changes that are going to pass DynamicRegisterInfo
parameters.
Differential Revision: https://reviews.llvm.org/D110942
Andrew Ng [Mon, 4 Oct 2021 16:09:18 +0000 (17:09 +0100)]
[ELF][test] Enhance relative dynamic relocation tests
Add checking of the value of the relocation with an addend. Also check
all relocation offsets.
Differential Revision: https://reviews.llvm.org/D111071
Bjorn Pettersson [Mon, 20 Sep 2021 09:32:01 +0000 (11:32 +0200)]
[SelectionDAG] Replace error prone index check in BaseIndexOffset::computeAliasing
Deriving NoAlias based on having the same index in two BaseIndexOffset
expressions seemed weird (and as shown in the added unittest the
correctness of doing so depended on undocumented pre-conditions that
the user of BaseIndexOffset::computeAliasing would need to take care
of.
This patch removes the code that dereived NoAlias based on indices
being the same. As a compensation, to avoid regressions/diffs in
various lit test, we also add a new check. The new check derives
NoAlias in case the two base pointers are based on two different
GlobalValue:s (neither of them being a GlobalAlias).
Reviewed By: niravd
Differential Revision: https://reviews.llvm.org/D110256
Bjorn Pettersson [Mon, 20 Sep 2021 08:29:11 +0000 (10:29 +0200)]
[SelectionDAG] Assume that a GlobalAlias may alias other global values
This fixes a bug detected in DAGCombiner when using global alias
variables. Here is an example:
@foo = global i16 0, align 1
@aliasFoo = alias i16, i16 * @foo
define i16 @bar() {
...
store i16 7, i16 * @foo, align 1
store i16 8, i16 * @aliasFoo, align 1
...
}
BaseIndexOffset::computeAliasing would incorrectly derive NoAlias
for the two accesses in the example above, resulting in DAGCombiner
miscompiles.
This patch fixes the problem by a defensive approach letting
BaseIndexOffset::computeAliasing return false, i.e. that the aliasing
couldn't be determined, when comparing two global values and at least
one is a GlobalAlias. In the future we might improve this with a
deeper analysis to look at the aliasee for the GlobalAlias etc. But
that is a bit more complicated considering that we could have
'local_unnamed_addr' and situations with several 'alias' variables.
Fixes PR51878.
Differential Revision: https://reviews.llvm.org/D110064
Adrian Kuegel [Tue, 5 Oct 2021 09:10:42 +0000 (11:10 +0200)]
[mlir] Convert ConstShapeOp to a static tensor type.
ConstShapeOp knows its shape, so it should also have a static tensor type.
Differential Revision: https://reviews.llvm.org/D111127
Jay Foad [Fri, 1 Oct 2021 12:30:42 +0000 (13:30 +0100)]
[AMDGPU][GlobalISel] Fix legalization of G_UMULH
Scalarize before narrowing because the narrowing implementation does not
work on vectors. This matches what we do for regular G_MUL.
Differential Revision: https://reviews.llvm.org/D111129
Simon Pilgrim [Tue, 5 Oct 2021 09:51:28 +0000 (10:51 +0100)]
[Support] Change fatal_error_handler_t to take a const char* instead of std::string
https://commondatastorage.googleapis.com/chromium-browser-clang/llvm-include-analysis.html
Excessive use of the <string> header has a massive impact on compile time; its most commonly included via the ErrorHandling.h header, which has to be included in many key headers, impacting many source files that have no need for std::string.
As an initial step toward removing the <string> include from ErrorHandling.h, this patch proposes to update the fatal_error_handler_t handler to just take a raw const char* instead.
The next step will be to remove the report_fatal_error std::string variant, which will involve a lot of cleanup and better use of Twine/StringRef.
Differential Revision: https://reviews.llvm.org/D111049
Jay Foad [Tue, 5 Oct 2021 09:47:54 +0000 (10:47 +0100)]
[GlobalISel] Simplify narrowScalarMul. NFC.
Remove some redundancy because the source and result types of any
multiply are always the same.
David Green [Tue, 5 Oct 2021 09:51:18 +0000 (10:51 +0100)]
[ARM] Reset speculation-hardening-sls.ll test checks.
The commit
e497b12a69604b6d691312a30f6b86da4f18f7f8 went and regenerated
all the checks lines in the Arm speculation-hardening-sls.ll test in a
way that removed most of the important checks. This just resets them
back to how they were before, with the single character fix to change:
; NOHARDENARM: {{bxge lr$}}
to
; NOHARDENARM: {{bxgt lr$}}
Differential Revision: https://reviews.llvm.org/D111074
Frederik Gossen [Mon, 4 Oct 2021 14:42:24 +0000 (16:42 +0200)]
[MLIR] Add an option to disable `maxIterations` in greedy pattern rewrites
This option is needed for passes that are known to reach a fix point, but may
need many iterations depending on the size of the input IR.
Differential Revision: https://reviews.llvm.org/D111058
David Green [Tue, 5 Oct 2021 09:32:30 +0000 (10:32 +0100)]
[AArch64] Make speculation-hardening-sls.ll x16 test more robust
As suggested in D110830, this copies the Arm backend method of testing
function calls through specific registers, using inline assembly to
force the variable into x16 to check that the __llvm_slsblr_thunk calls
do not use a register that may be clobbered by the linker.
Differential Revision: https://reviews.llvm.org/D111056
Tim Northover [Thu, 23 Sep 2021 10:31:03 +0000 (11:31 +0100)]
AArch64+GISel: legalize vector remainder operations.
Valentin Clement [Tue, 5 Oct 2021 09:19:26 +0000 (11:19 +0200)]
Revert "[fir] Split FIROptimizer lib into several smaller libraries"
This reverts commit
c02a8cdda8733aac26481b6819a4eef000ee91c8.
Carl Ritson [Tue, 5 Oct 2021 09:02:56 +0000 (18:02 +0900)]
[AMDGPU] Pre-commit test for D111126 (NFC)
Valentin Clement [Tue, 5 Oct 2021 09:00:46 +0000 (11:00 +0200)]
[fir] Split FIROptimizer lib into several smaller libraries
Partition libFIROptimizer into smaller libraries that reflect the
structure. Adapt potential problems.
This patch is part of the upstreaming effort from fir-dev branch. It's a
building stone to upstreaming transformations.
Reviewed By: schweitz
Differential Revision: https://reviews.llvm.org/D111055
Co-authored-by: Eric Schweitz <eschweitz@nvidia.com>
Pavel Labath [Tue, 5 Oct 2021 08:37:52 +0000 (10:37 +0200)]
Revert "[lldb] Refactor variable parsing"
This commit has introduced test failures in internal google tests.
Working theory is they are caused by a genuine problem in the patch
which gets tripped by some debug info from system libraries.
Reverting while we try to reproduce the problem in a self-contained
fashion.
This reverts commit
601168e42037ac4433e74b920bb22f76d59ba420.
Nicolas Vasilache [Tue, 5 Oct 2021 06:58:53 +0000 (06:58 +0000)]
[mlir][Linalg] NFC - Add support to specify that a tensor value is known to bufferize to writeable memory
This change allows better interop with external clients of comprehensive bufferization functions
but is otherwise NFC for the MLIR pass itself.
Differential Revision: https://reviews.llvm.org/D111121
Valentin Clement [Tue, 5 Oct 2021 08:16:19 +0000 (10:16 +0200)]
Revert "[fir] Split FIROptimizer lib into several smaller libraries"
This reverts commit
c2eff3d5b931191d77fe391f93e50283a4c88739.
Sam McCall [Tue, 5 Oct 2021 07:58:17 +0000 (09:58 +0200)]
[Support] Trim #include after b06df22
Martin Storsjö [Fri, 27 Aug 2021 10:10:19 +0000 (10:10 +0000)]
[libcxx] [test] Move a missed test to ctime.timespec.compile.pass.cpp
This was missed in
ec574f5da463d303a3771597c233e52d2429db67. TIME_UTC
is a define that goes along with timespec_get. The testcase that it is
moved to is only run for >= C++17, so the surrounding ifdef guard
can be dropped.
Differential Revision: https://reviews.llvm.org/D110988
Martin Storsjö [Fri, 1 Oct 2021 20:44:17 +0000 (23:44 +0300)]
[libcxx] Don't autodetect pthreads on MinGW
e9ee517930f76a972fcda00d9dd0466db80d60f7 added support for using
winpthreads on Windows, enabled if `__WINPTHREADS_VERSION` was
defined (i.e. if winpthreads headers have been included before
including libcxx `__config`). This was fragile (libcxx changed
behaviour depending on what headers had been included externally
before), and was changed in
a1bc823a59d5b6f310bdf6c7c7b62ec71b87d1aa
to use pthreads on Windows whenever the pthread.h header was
available.
This is also fragile; pthread.h might be unavailable while building
libcxx but installed later, and available when users include the
libcxx headers.
In practice, in every modern setup for building libcxx for Windows
I've seen, users end up manually configuring it with
`LIBCXX_HAS_WIN32_THREAD_API=ON`, as the users may have winpthreads
installed (for other libraries/projects to use) while wanting to
build libcxx with the default win32 threading.
Don't automatically pick up pthreads on Windows even if the header
is available. Instead require the user to configure the libcxx
build with `LIBCXX_HAS_PTHREAD_API=ON` if that's desired.
Differential Revision: https://reviews.llvm.org/D110975
Martin Storsjö [Fri, 1 Oct 2021 19:30:55 +0000 (22:30 +0300)]
[runtimes] Set a default value for LLVM_LIT_ARGS
This matches the value used in
libcxx/cmake/Modules/HandleOutOfTreeLLVM.cmake.
Differential Revision: https://reviews.llvm.org/D110987
Valentin Clement [Tue, 5 Oct 2021 07:27:10 +0000 (09:27 +0200)]
[fir] Split FIROptimizer lib into several smaller libraries
Partition libFIROptimizer into smaller libraries that reflect the
structure. Adapt potential problems.
This patch is part of the upstreaming effort from fir-dev branch. It's a
building stone to upstreaming transformations.
Co-authored-by: Eric Schweitz <eschweitz@nvidia.com>
Reviewed By: schweitz
Differential Revision: https://reviews.llvm.org/D111055
Amara Emerson [Tue, 5 Oct 2021 04:47:04 +0000 (21:47 -0700)]
[AArch64][GlobalISel] Legalize G_VECREDUCE_AND.
These are handled identically to the already handled G_VECREDUCE_OR instructions.
Jay Foad [Mon, 4 Oct 2021 15:25:41 +0000 (16:25 +0100)]
[LiveIntervals] Fix verification of early-clobbered segments
Enable verification of live intervals immediately after computing them
(when -early-live-intervals is used) and fix a problem that that
provokes: currently the verifier insists that a segment that ends at an
early-clobber slot must be followed by another segment starting at the
same slot. But before TwoAddressInstruction runs, the equivalent
condition is: a segment that ends at an early-clobber slot must have its
last use tied to an early-clobber def. That condition is harder to check
here, so for now just disable this check until tied operands have been
rewritten.
Differential Revision: https://reviews.llvm.org/D111065
Pavel Labath [Tue, 5 Oct 2021 06:29:16 +0000 (08:29 +0200)]
[lldb] Remove some anonymous namespaces
.. and reduce the scope of others. They don't follow llvm coding
standards (which say they should be used only when the same effect
cannot be achieved with the static keyword), and they set a bad example.
Vassil Vassilev [Tue, 5 Oct 2021 06:10:38 +0000 (06:10 +0000)]
Revert "[clang-repl] Allow loading of plugins in clang-repl."
This reverts commit
81fb640f83b6a5d099f9124739ab3049be79ea56 due to bot failures:
https://lab.llvm.org/buildbot#builders/57/builds/10807
Vassil Vassilev [Sat, 25 Sep 2021 17:30:49 +0000 (17:30 +0000)]
[clang-repl] Allow loading of plugins in clang-repl.
Differential revision: https://reviews.llvm.org/D110484
Igor Kudrin [Tue, 5 Oct 2021 04:40:02 +0000 (11:40 +0700)]
[ELF][test][NFC] Make a test standard compliant
PT_LOAD segments in the program header must be sorted by their virtual
addresses, so they should be defined in a similar order as the
associated sections.
Differential Revision: https://reviews.llvm.org/D111068
LLVM GN Syncbot [Tue, 5 Oct 2021 04:34:07 +0000 (04:34 +0000)]
[gn build] Port
cfef1803dd83
Amara Emerson [Sun, 26 Sep 2021 05:55:37 +0000 (22:55 -0700)]
[GlobalISel] Port over the SelectionDAG stack protector codegen feature.
This is a port of the feature that allows the StackProtector pass to omit
checking code for stack canary checks, and rely on SelectionDAG to do it at a
later stage. The reasoning behind this seems to be to prevent the IR checking
instructions from hindering tail-call optimizations during codegen.
Here we allow GlobalISel to also use that scheme. Doing so requires that we
do some analysis using some factored-out code to determine where to generate
code for the epilogs.
Not every case is handled in this patch since we don't have support for all
targets that exercise different stack protector schemes.
Differential Revision: https://reviews.llvm.org/D98200
wlei [Sat, 2 Oct 2021 00:20:56 +0000 (17:20 -0700)]
[llvm-profgen] Filter out invalid debug line
Differential Revision: https://reviews.llvm.org/D110081
wlei [Fri, 1 Oct 2021 23:58:59 +0000 (16:58 -0700)]
[llvm-profgen] Add duplication factor for line-number based profile
This change adds duplication factor multiplier while accumulating body samples for line-number based profile. The body sample count will be `duplication-factor * count`. Base discriminator and duplication factor is decoded from the raw discriminator, this requires some refactor works.
Differential Revision: https://reviews.llvm.org/D109934
wlei [Fri, 1 Oct 2021 23:51:38 +0000 (16:51 -0700)]
[CSSPGO] Rename the field of SampleContextFrame
Differential Revision: https://reviews.llvm.org/D110980
Craig Rasmussen [Tue, 5 Oct 2021 01:22:42 +0000 (18:22 -0700)]
[flang] Remove incorrect unit test
Any test of the team_number intrinsic function will apparently
fail because it doesn't have access to ISO_FORTRAN_ENV when
called.
Amara Emerson [Mon, 4 Oct 2021 23:59:47 +0000 (16:59 -0700)]
Revert "Revert "[GlobalISel][IRTranslator] Emit trap intrinsic for "unreachable"""
This reverts commit
d95cd81141a4e398e0d3337cb2e6617281d06278.
The selector sometimes leaves unreachable blocks unselected because it uses a
postorder traversal for the block ordering.
With the trap intrinsics now being emitted, these blocks are no longer empty and
the unselected G_INTRINSIC instructions survive past selection. To fix this,
keep track of which blocks are selected and later delete any blocks that weren't
selected.
Sam Clegg [Mon, 4 Oct 2021 23:47:59 +0000 (16:47 -0700)]
[Object][WebAssemlby] Report function types (signatures). NFC
This simplifies the code in a number of ways and avoids
having to track functions and their types separately.
Differential Revision: https://reviews.llvm.org/D111104
Craig Topper [Mon, 4 Oct 2021 23:52:22 +0000 (16:52 -0700)]
[RISCV] Add riscv64 command line to hoist-global-addr-base.ll. NFC
peter klausler [Wed, 29 Sep 2021 17:19:21 +0000 (10:19 -0700)]
[flang] runtime: fix formatted real input regression w/ spaces
Blank input fields must be interpreted as zero, including the case of
virutal space characters generated from record padding at the end of
an input record. This stopped working sometime in the past few months
for real input (not sure when); here's a fix.
This bug was breaking FCVS test fm111.
Differential Revision: https://reviews.llvm.org/D110765
Leonard Chan [Mon, 4 Oct 2021 23:11:12 +0000 (16:11 -0700)]
Revert "[clang][Fuchsia] Re-enable compiler-rt tests in runtimes build"
This reverts commit
8480063f25b8527d935722769d54d47f0c0d5689.
We're seeing some test failures on our builders.
Arthur Eubanks [Mon, 4 Oct 2021 23:10:37 +0000 (16:10 -0700)]
[NFC] Add more comments about not using make_unique to pass managers/adaptors
These were missed in D110784.
Amara Emerson [Mon, 4 Oct 2021 22:44:27 +0000 (15:44 -0700)]
Revert "[GlobalISel][IRTranslator] Emit trap intrinsic for "unreachable""
This reverts commit
019041bec32400928ec57b7e3dc1352d896aa5b6.
It broke some bots.
Louis Dionne [Thu, 30 Sep 2021 18:53:45 +0000 (14:53 -0400)]
[libc++] Rename the 'libc++' Lit feature to 'llvm-libc++'
This is to simplify an upcoming change where we distinguish between
flavors of libc++ by adding an apple-libc++ Lit feature.
Differential Revision: https://reviews.llvm.org/D110870
Jeremy Morse [Mon, 4 Oct 2021 22:01:28 +0000 (23:01 +0100)]
[DebugInfo][InstrRef] Accept landingpad block arguments
This patch makes instruction-referencing accepts an additional scenario
where values can be read from physical registers at the start of blocks. As
far as I was aware, this only happened:
* With arguments in the entry block,
* With constant physical registers,
To which this patch adds a third case:
* With exception-handling landing-pad blocks
In the attached test: the operand of the dbg.value traces back to the
"landingpad" instruction, which becomes some copies from physregs. Right
now, that's deemed unacceptable, and the assertion fires. The fix is to
just accept this scenario; this is a case where the value in question is
defined by a register and a position, not by an instruction that defines
it. Reading it with a DBG_PHI is the correct behaviour, there isn't a
non-copy instruction that we can refer to.
Differential Revision: https://reviews.llvm.org/D109005
Arthur Eubanks [Tue, 14 Sep 2021 20:09:23 +0000 (13:09 -0700)]
[clang] Don't use the AST to display backend diagnostics
We keep a map from function name to source location so we don't have to
do it via looking up a source location from the AST. However, since
function names can be long, we actually use a hash of the function name
as the key.
Additionally, we can't rely on Clang's printing of function names via
the AST, so we just demangle the name instead.
This is necessary to implement
https://lists.llvm.org/pipermail/cfe-dev/2021-September/068930.html.
Reviewed By: dblaikie
Differential Revision: https://reviews.llvm.org/D110665
Arthur Eubanks [Thu, 30 Sep 2021 20:57:55 +0000 (13:57 -0700)]
[LICM] Bail if checking a global/constant for invariant.start
When we check if a load is loop invariant by finding a dominating
invariant.start call, we strip bitcasts until we get to an i8* Value,
and look for an invariant.start use of the i8* Value.
We may accidentally end up at an i8 global and look at a global's uses,
which we shouldn't do in a loop pass. Although we could make this
logic work with globals, that's not currently intended.
Reviewed By: nikic
Differential Revision: https://reviews.llvm.org/D111098
Leonard Chan [Mon, 4 Oct 2021 21:11:49 +0000 (14:11 -0700)]
[clang][Fuchsia] Re-enable compiler-rt tests in runtimes build
Differential Revision: https://reviews.llvm.org/D110778
Michael Jones [Fri, 24 Sep 2021 23:11:11 +0000 (23:11 +0000)]
[libc][NFC] Add supporting class for atof implementation
This change adds the High Precision Decimal described here:
https://nigeltao.github.io/blog/2020/parse-number-f64-simple.html
It will be used for the atof implementation later, but is complete and
tested now.
The code is inspired by the golang implmentation of the HPD class, which
can be found here: https://github.com/golang/go/blob/release-branch.go1.16/src/strconv/decimal.go
Reviewed By: sivachandra
Differential Revision: https://reviews.llvm.org/D110454
Arthur Eubanks [Mon, 4 Oct 2021 20:45:54 +0000 (13:45 -0700)]
[test] Precommit test about hoisting invariant loads from globals
And run update_test_checks.py on hoisting.ll.
serge-sans-paille [Sat, 2 Oct 2021 21:17:30 +0000 (23:17 +0200)]
Update inline builtin handling to honor gnu inline attribute
Per the GCC info page:
If the function is declared 'extern', then this definition of the
function is used only for inlining. In no case is the function
compiled as a standalone function, not even if you take its address
explicitly. Such an address becomes an external reference, as if
you had only declared the function, and had not defined it.
Respect that behavior for inline builtins: keep the original definition, and
generate a copy of the declaration suffixed by '.inline' that's only referenced
in direct call.
This fixes holes in
c3717b6858d32d64514a187ede1a77be8ba4e542.
Differential Revision: https://reviews.llvm.org/D111009
Jian Cai [Mon, 27 Sep 2021 20:26:47 +0000 (13:26 -0700)]
[mlir][doc] fix typos.
This fixes some typos in OpDefinitions.md and DeclarativeRewrites.md,
and wrap function/class names in backticks.
Reviewed By: mehdi_amini
Differential Revision: https://reviews.llvm.org/D110582
Leonard Chan [Mon, 4 Oct 2021 18:12:15 +0000 (11:12 -0700)]
[compiler-rt][scudo] Check for failing prctl call
A bunch of MTE tests like ./ScudoUnitTest-aarch64-Test/MemtagTest.StoreTags
can fail on aarch64-linux if the kernel doesn't support the tagged address ABI. It looks like
the call to prctl(PR_GET_TAGGED_ADDR_CTRL, 0, 0, 0, 0) can return -1, which
casted to an unsigned int and masked will return a value not equal to
PR_MTE_TCF_NONE, meaning systemDetectsMemoryTagFaultsTestOnly can return an incorrect value.
This updates the check to account for a failing prctl call.
Differential Revision: https://reviews.llvm.org/D110888
Nikita Popov [Sun, 3 Oct 2021 15:44:15 +0000 (17:44 +0200)]
[BasicAA] Ignore CanBeFreed in minimal extent reasoning
When determining NoAlias based on object size and dereferenceability
information, we can ignore frees for the same reason we can ignore
possible null pointers (if null is not a valid pointer): Actually
accessing the null pointer / freed pointer would be immediate UB,
and AA results are only valid under the assumption of an access.
This addresses a minor regression from D110745.
Differential Revision: https://reviews.llvm.org/D111028
Kamau Bridgeman [Thu, 30 Sep 2021 13:20:22 +0000 (08:20 -0500)]
[PowerPC] Fix to guard fetch and cas 64-bit builtin versions
The builtins: `__compare_and_swaplp`, `__fetch_and_addlp`,
` __fetch_and_andlp`, `__fetch_and_orlp`, `__fetch_and_swaplp` are
64 bit only. This patch ensures the compiler produces an error in 32 bit mode.
Reviewed By: #powerpc, nemanjai
Differential Revision: https://reviews.llvm.org/D110824
Craig Rasmussen [Mon, 4 Oct 2021 19:34:14 +0000 (12:34 -0700)]
[flang] Added tests for intrinsic function 'team_number()'
reviewers: klausler, PeteSteinfeld
Differential Revision: https://reviews.llvm.org/D100897
Amara Emerson [Mon, 27 Sep 2021 06:20:46 +0000 (23:20 -0700)]
Delay outgoing register assignments to last.
The delayed stack protector feature which is currently used for SDAG (and thus
allows for more commonly generating tail calls) depends on being able to extract
the tail call into a separate return block. To do this it also has to extract
the vreg->physreg copies that set up the call's arguments, since if it doesn't
then the call inst ends up using undefined physregs in it's new spliced block.
SelectionDAG implementations can do this because they delay emitting register
copies until *after* the stack arguments are set up. GISel however just
processes and emits the arguments in IR order, so stack arguments always end up
last, and thus this breaks the code that looks for any register arg copies that
precede the call instruction.
This patch adds a thunk argument to the assignValueToReg() and custom assignment
hooks. For outgoing arguments, register assignments use this return param to
return a thunk that does the actual generating of the copies. We collect these
until all the outgoing stack assignments have been done and then execute them,
so that the copies (and perhaps some artifacts like G_SEXTs) are placed after
any stores.
Differential Revision: https://reviews.llvm.org/D110610
Alex Zinenko [Mon, 4 Oct 2021 10:09:29 +0000 (12:09 +0200)]
[mlir] rename the "packing" flag of linalg.pad_tensor to "nofold"
The discussion in https://reviews.llvm.org/D110425 demonstrated that "packing"
may be a confusing term to define the behavior of this op in presence of the
attribute. Instead, indicate the intended effect of preventing the folder from
being applied.
Reviewed By: nicolasvasilache, silvas
Differential Revision: https://reviews.llvm.org/D111046
Jay Foad [Mon, 4 Oct 2021 19:25:42 +0000 (20:25 +0100)]
Revert "[GlobalISel] Support vectors in LegalizerHelper::narrowScalarMul"
This reverts commit
90da0b9a5a5322f5a48574274421357d7b22f2cb.
It was causing an LLVM_ENABLE_EXPENSIVE_CHECKS buildbot failure.
James King [Mon, 4 Oct 2021 19:09:12 +0000 (19:09 +0000)]
Update `DynTypedNode` to support the conversion of `TypeLoc`s.
This provides better support for `TypeLoc`s to allow `TypeLoc`-related
matchers to feature stricter typing and to avoid relying on the dynamic
casting of `TypeLoc`s in matchers.
Reviewed By: ymandel, tdl-g, sbenza
Differential Revision: https://reviews.llvm.org/D110586
Amara Emerson [Sat, 25 Sep 2021 05:52:30 +0000 (22:52 -0700)]
[GlobalISel] Widen G_EXTRACT_VECTOR_ELT using anyext instead of sext.
G_SEXT seems to be unnecessary here, anyext will do.
Differential Revision: https://reviews.llvm.org/D110469
Lei Huang [Thu, 2 Sep 2021 18:31:10 +0000 (13:31 -0500)]
[PowerPC] Disable vector types when not supported by subtarget features
Update clang to treat vector unsigned long long and friends as invalid
for AltiVec without VSX.
Reported in: https://bugs.llvm.org/show_bug.cgi?id=47782
Reviewed By: nemanjai, amyk
Differential Revision: https://reviews.llvm.org/D109178
Jean Perier [Mon, 4 Oct 2021 18:57:40 +0000 (20:57 +0200)]
[fir] add fir.array_modify op
fir.array_update is only handling intrinsic assignments.
They are two big differences with user defined assignments:
1. The LHS and RHS types may not match, this does not play well
with fir.array_update that relies on both the merge and the
updated element to have the same type.
2. user defined assignment has a call semantics, with potential
side effects. So if a fir.array_update can hide a call, it traits
would need to be updated.
Instead of hiding more semantic in the fir.array_update, introduce
a new fir.array_modify op that allows de-correlating indicating that
an array value element is modified, and how it is modified.
This allow the ArrayValueCopy pass to still perform copy elision
while not having to implement the call itself, and could in general
be used for all kind of assignments (e.g. character assignment).
Update the alias analysis to not rely on the merge arguments (since
fir.array_modify has none).
Instead, analyze what is done with the element address.
This implies adding the ability to follow the users of fir.array_modify,
as well as being able to go through fir.store that may be generated to
store the RHS value in order to pass it to a user define routine.
This is done by adding a ReachCollector class to gather all array
accesses.
This patch is part of the upstreaming effort from fir-dev branch.
Reviewed By: schweitz
Differential Revision: https://reviews.llvm.org/D110928
Co-authored-by: Valentin Clement <clementval@gmail.com>
Louis Dionne [Mon, 4 Oct 2021 18:57:50 +0000 (14:57 -0400)]
[libc++] Disable the Apple system -fno-exceptions CI that is currently building
I'm disabling it to avoid blocking everybody until I've fixed the issue.
Valentin Clement [Mon, 4 Oct 2021 18:54:43 +0000 (20:54 +0200)]
[fir][NFC] Fix couple of clang-tidy warnings
Fix some clang-tidy wrning in flang/Optimizer/Support and
remove explicit number of inlined elements for SmallVector. This
is mostly to sync with the changes from fir-dev.
This patch is part of the upstreaming effort from fir-dev branch.
Reviewed By: schweitz
Differential Revision: https://reviews.llvm.org/D111044
Simon Pilgrim [Mon, 4 Oct 2021 18:52:43 +0000 (19:52 +0100)]
[X86][SLM] Fix BSR/BSF port usage
Both ports are required for BitScan ops. Update the port usage and distributed throughput based off the most recent llvm-exegesis captures (PR36895) and what Intel AoM / Agner reports as well.
Corentin Jabot [Mon, 4 Oct 2021 18:42:13 +0000 (14:42 -0400)]
Add core papers added in the October 2021 WG21 plenary
Jay Foad [Fri, 1 Oct 2021 12:30:42 +0000 (13:30 +0100)]
[GlobalISel] Support vectors in LegalizerHelper::narrowScalarMul
Also remove some redundancy because the source and result
types of any multiply are always the same.
Differential Revision: https://reviews.llvm.org/D110926
Sanjay Patel [Mon, 4 Oct 2021 16:54:01 +0000 (12:54 -0400)]
[InstCombine] add helper for "is desirable int type"; NFC
This splits out the logic from shouldChangeType() that
currently allows 8/16/32-bit transforms even if those
types are not listed as legal in the data layout.
This could be useful as a predicate for vector
insert/extract transforms.
Note that this leaves the subsequent checks in
shouldChangeType() unchanged. We may want to merge
the checks for i1 and/or "ToLegal" into "isDesirable",
but that may alter existing transforms.
Sanjay Patel [Mon, 4 Oct 2021 13:40:02 +0000 (09:40 -0400)]
[InstCombine] add tests for extractelt of bitcasted scalar; NFC
Amara Emerson [Tue, 28 Sep 2021 01:11:07 +0000 (18:11 -0700)]
[GlobalISel][IRTranslator] Emit trap intrinsic for "unreachable"
We were previously just ignoring unreachable, but targets like Darwin want to
keep unreachable instructions as traps.
Differential Revision: https://reviews.llvm.org/D110603
Amy Kwan [Mon, 4 Oct 2021 17:19:16 +0000 (12:19 -0500)]
Fix msan/tests/msan_test.cpp due to -Wbitwise-instead-of-logical
The LE Power sanitizer bot fails when testing standalone compiler-rt due to
an MSAN test warning introduced by -Wbitwise-instead-of-logical. As this option
along with -Werror is enabled on the bot, the test failure occurs.
This patch updates msan_test.cpp to fix the warning introduced by the
-Wbitwise-instead-of-logical.
Roman Lebedev [Mon, 4 Oct 2021 17:52:57 +0000 (20:52 +0300)]
[NFC][X86][Codegen] Add test coverage for interleaved i64 load/store stride=6
Roman Lebedev [Mon, 4 Oct 2021 17:05:50 +0000 (20:05 +0300)]
[NFC][X86][LV] Add costmodel test coverage for interleaved i64/f64 load/store stride=6
Roman Lebedev [Mon, 4 Oct 2021 17:26:49 +0000 (20:26 +0300)]
[NFC][X86][Codegen] Add test coverage for interleaved i32 load/store stride=6
Roman Lebedev [Mon, 4 Oct 2021 17:05:47 +0000 (20:05 +0300)]
[NFC][X86][LV] Add costmodel test coverage for interleaved i32/f32 load/store stride=6