Tom Rini [Sat, 19 Sep 2020 12:30:54 +0000 (08:30 -0400)]
Merge branch '2020-09-18-improve-ipq40xx-support' into next
- Assorted improvements to the Qualcomm IPQ40XX SoC
Robert Marko [Thu, 10 Sep 2020 14:00:06 +0000 (16:00 +0200)]
IPQ40xx: Add USB nodes
There are drivers to support built in USB controller and PHY-s now, so lets add the USB nodes to DTSI.
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
Cc: Luka Perkov <luka.perkov@sartura.hr>
Robert Marko [Thu, 10 Sep 2020 14:00:05 +0000 (16:00 +0200)]
usb: dwc3: Add Qualcomm DWC3 compatible string
Lot of Qualcomm SoC-s use DWC3 controller for both USB2.0 and USB3.0
ports.
Qualcomm has some custom config registers on top of the generic ones,
but for host mode these are not needed.
So lets add the neccessary compatible string.
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
Cc: Luka Perkov <luka.perkov@sartura.hr>
Robert Marko [Thu, 10 Sep 2020 14:00:04 +0000 (16:00 +0200)]
phy: add driver for Qualcomm IPQ40xx USB PHY
Add a driver to setup the USB PHY-s on Qualcomm IPQ40xx series SoCs.
The driver sets up HS and SS phys.
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
Cc: Luka Perkov <luka.perkov@sartura.hr>
Robert Marko [Thu, 10 Sep 2020 14:00:03 +0000 (16:00 +0200)]
IPQ40xx: Add reset controller support
Since we have a driver for the reset controller, lets add the necessary node.
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
Cc: Luka Perkov <luka.perkov@sartura.hr>
Robert Marko [Thu, 10 Sep 2020 14:00:02 +0000 (16:00 +0200)]
reset: Add IPQ40xx reset controller driver
On Qualcomm IPQ40xx SoC series, GCC clock IP also handles the resets.
So since this will be needed by further drivers, lets add a driver for the reset controller.
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
Cc: Luka Perkov <luka.perkov@sartura.hr>
Robert Marko [Thu, 10 Sep 2020 14:00:01 +0000 (16:00 +0200)]
IPQ40xx: Add SMEM support
There is already existing driver for SMEM so lets enable it for IPQ40xx as well.
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
Cc: Luka Perkov <luka.perkov@sartura.hr>
Robert Marko [Thu, 10 Sep 2020 14:00:00 +0000 (16:00 +0200)]
IPQ40xx: clk: Use dt-bindings instead of hardcoding
Its common to use dt-bindings instead of hard-coding clocks or resets.
So lets use the imported Linux GCC bindings on IPQ40xx target.
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
Cc: Luka Perkov <luka.perkov@sartura.hr>
Tom Rini [Thu, 17 Sep 2020 13:55:01 +0000 (09:55 -0400)]
Merge tag 'for-v2021.01-next' of https://gitlab.denx.de/u-boot/custodians/u-boot-i2c into next
mpc83xx, keymile boards: enable DM_ETH and add DTS
- mpc83xx: remove unneeded extern declaration in cpu_init
- powerpc, qe: fix codingstyle issues for drivers/qe
- powerpc, qe: add DTS support for parallel I/O ports
- net, qe: add DM support for QE UEC ethernet
- add DTS for all mpc83xx based boards from keymile
mainly they are not mainlined to linux.
- add u-boot specific dtsi
- add stdout-path
- add missing ucc4 par_io definitions, which were
in board code, but not in linux DTS
- remove not used ethernet nodes
Heiko Schocher [Mon, 3 Feb 2020 06:43:57 +0000 (07:43 +0100)]
mpc83xx, keymile boards: enable DM_ETH and add DTS
enable DTS support for keymile mpc83xx based boards.
get rid of compile warning:
===================== WARNING ======================
This board does not use CONFIG_DM_ETH (Driver Model
for Ethernet drivers). Please update the board to use
CONFIG_DM_ETH before the v2020.07 release. Failure to
update by the deadline may result in board removal.
See doc/driver-model/migration.rst for more info.
====================================================
Therefore done:
- add DTS for all mpc83xx based boards from keymile
mainly they are not mainlined to linux.
- add u-boot specific dtsi
- add stdout-path
- add missing ucc4 par_io definitions, which were
in board code, but not in linux DTS
- remove not used ethernet nodes
Signed-off-by: Heiko Schocher <hs@denx.de>
Patch-cc: Mario Six <mario.six@gdsys.cc>
Patch-cc: Qiang Zhao <qiang.zhao@nxp.com>
Series-to: u-boot
Series-version: 3
Series-changes: 3
- rebase patchset to current mainline commit
c0192950df
- update defconfig files
Series-changes: 2
- add patch which fixes Codingstyle errors in drivers/qe
- add patch which converts the mpc83xx based boards from
keymile to DM_ETH
Cover-letter:
powerpc, mpc83xx: add DM_ETH support
This patch series adds DM ethernet support for mpc83xx based
keymile boards.
Travis build:
END
Heiko Schocher [Thu, 6 Feb 2020 08:48:16 +0000 (09:48 +0100)]
net, qe: add DM support for QE UEC ethernet
add DM/DTS support for the UEC ethernet on QUICC Engine
Block.
Signed-off-by: Heiko Schocher <hs@denx.de>
Patch-cc: Mario Six <mario.six@gdsys.cc>
Patch-cc: Qiang Zhao <qiang.zhao@nxp.com>
Patch-cc: Holger Brunck <holger.brunck@hitachi-powergrids.com>
Patch-cc: Madalin Bucur <madalin.bucur@oss.nxp.com>
Series-changes: 3
- revert:
commit "
3374264df97b" ("drivers: net: qe: deselect QE when DM_ETH is enabled")
as now qe works with DM and DM_ETH support.
- fix mailaddress from Holger
Series-changes: 2
- add comments from Qiang Zhao:
- add device node documentation
- I did not drop the dm_qe_uec_phy.c and use drivers/net/fsl_mdio.c
because using drivers/net/fsl_mdio.c leads in none existent
udevice mdio@3320
instead boards with DM ETH support should use now this
driver.
- remove RFC tag
Commit-notes:
- I let the old none DM based implementation in code
so boards should work with old implementation.
This Code should be removed if all boards are converted
to DM/DTS.
- add the DM based qe uec driver under drivers/net/qe
- Therefore copied the files uccf.c uccf.h uec.h from
drivers/qe. So there are a lot of Codingstyle problems
currently. I fix them in next version if this RFC
patch is OK or it needs some changes.
- The dm based driver code is now under drivers/net/qe/dm_qe_uec.c
Used a lot of functions from drivers/qe/uec.c
- seperated the PHY specific code into seperate file
drivers/net/qe/dm_qe_uec_phy.c
END
Heiko Schocher [Mon, 3 Feb 2020 09:23:53 +0000 (10:23 +0100)]
powerpc, qe: add DTS support for parallel I/O ports
add DM support for parallel I/O ports on QUICC Engine Block
Signed-off-by: Heiko Schocher <hs@denx.de>
Patch-cc: Mario Six <mario.six@gdsys.cc>
Patch-cc: Qiang Zhao <qiang.zhao@nxp.com>
Patch-cc: Holger Brunck <holger.brunck@hitachi-powergrids.com>
Series-changes: 2
- remove RFC
- fixed Codingstyle errors, therefore new patch
powerpc, mpc83xx: fix codingstyle issues for qe_io.c
- moved DM part to drivers/pinctrl
Commit-notes:
Open questions / discussion:
- I let the old none DM based implementation in code
so boards should work with old implementation.
This should be removed if all boards are converted to
DM/DTS.
- Unfortunately linux DTS does not use "pinctrl-"
properties, instead "pio-handle" properties.
Even worser old U-Boot code initializes all pins
defined in "const qe_iop_conf_t qe_iop_conf_tab[]"
table in board code. As linux does the same I decided
to also scan through all subnodes containing "pio-map"
property and initialize them too.
The proper solution would be to check for "pio-handle"
when a device is probed.
END
Heiko Schocher [Mon, 25 May 2020 05:27:26 +0000 (07:27 +0200)]
powerpc, qe: fix codingstyle issues for drivers/qe
fix Codingstyle for files in drivers/qe, remaining following
check warnings:
$ ./scripts/checkpatch.pl -f drivers/qe/uec.h
CHECK: Macro argument reuse '_bd' - possible side-effects?
+#define BD_ADVANCE(_bd, _status, _base) \
+ (((_status) & BD_WRAP) ? (_bd) = \
+ ((struct buffer_descriptor *)(_base)) : ++(_bd))
total: 0 errors, 0 warnings, 1 checks, 692 lines checked
$ ./scripts/checkpatch.pl -f drivers/qe/uec_phy.h
total: 0 errors, 0 warnings, 0 checks, 214 lines checked
$ ./scripts/checkpatch.pl -f drivers/qe/uccf.c
total: 0 errors, 0 warnings, 0 checks, 507 lines checked
$ ./scripts/checkpatch.pl -f drivers/qe/uec.c
total: 0 errors, 0 warnings, 0 checks, 1434 lines checked
$ ./scripts/checkpatch.pl -f drivers/qe/uec_phy.c
total: 0 errors, 0 warnings, 0 checks, 927 lines checked
$ ./scripts/checkpatch.pl -f drivers/qe/qe.c
CHECK: Lines should not end with a '('
+U_BOOT_CMD(
total: 0 errors, 0 warnings, 1 checks, 830 lines checked
Signed-off-by: Heiko Schocher <hs@denx.de>
Heiko Schocher [Wed, 15 Apr 2020 08:35:40 +0000 (10:35 +0200)]
mpc83xx: remove unneeded extern declaration in cpu_init
remove
extern void qe_init(uint qe_base);
extern void qe_reset(void);
and include fsl_qe.h instead.
Signed-off-by: Heiko Schocher <hs@denx.de>
Series-changes: 2
- new in v2
Tom Rini [Tue, 15 Sep 2020 19:22:00 +0000 (15:22 -0400)]
Merge tag 'ti-v2021.01-next' of https://gitlab.denx.de/u-boot/custodians/u-boot-ti into next
- Hyperflash boot for J7200
- Update Main R5FSS lockstep mode
- R5F remoteproc support for J7200
- Minor env fixes
- Add SPI boot support for am335x-icev2
Faiz Abbas [Mon, 14 Sep 2020 06:41:17 +0000 (12:11 +0530)]
configs: Add spiboot support for am335x
am335x internal SRAM is too small to support the addition of
SPI bootmode to the default defconfig. Add a separate spiboot_defconfig
Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Faiz Abbas [Mon, 14 Sep 2020 06:41:16 +0000 (12:11 +0530)]
spi: omap3_spi: Read platform data in ofdata_to_platdata()
Add an ofdata_to_platdata() callback to access dts in U-boot and
access all platform data in it. This prepares the driver for supporting
both device tree as well as static platform data structures in SPL.
Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Faiz Abbas [Mon, 14 Sep 2020 06:41:15 +0000 (12:11 +0530)]
arm: mach-omap2: am33xx: Add device structure for spi
Add platform data and a device structure for the spi device
present on am335x-icev2. This requires moving all omap3_spi
platform data structures and symbols to an omap3_spi.h so that
the board file can access them.
Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Faiz Abbas [Mon, 14 Sep 2020 06:41:14 +0000 (12:11 +0530)]
spi: spi-uclass: Block dm_scan_fdt_dev with OF_CONTROL to prevent build failures
There are devices which don't use OF_CONTROL or OF_PLATDATA but instead
rely on statically defined platdata. Block dm_scan_fdt_dev() with both
configs to avoid build failures under this condition.
Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Faiz Abbas [Mon, 14 Sep 2020 06:41:13 +0000 (12:11 +0530)]
arm: dts: am335x-icev2: Add spi node
Add spi and spi nor flash nodes for am335x-icev2.
Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Matwey V. Kornilov [Mon, 24 Aug 2020 18:00:33 +0000 (21:00 +0300)]
am335x_evm: Allow booting from usb-storage device
Signed-off-by: Matwey V. Kornilov <matwey.kornilov@gmail.com>
Matwey V. Kornilov [Mon, 24 Aug 2020 18:00:32 +0000 (21:00 +0300)]
ti: Use devtype=mmc instead of setenv devtype mmc
If devtype variable is setted via setenv, then the following devtype=X style is
ignored. Currently, many u-boot commands use devtype variable in the latter
manner:
mmc_boot=if mmc dev ${devnum}; then devtype=mmc; run scan_dev_for_boot_part; fi
Use devtype=mmc instead of setenv devtype mmc to avoid bugs with booting from
another devtype.
Signed-off-by: Matwey V. Kornilov <matwey.kornilov@gmail.com>
Suman Anna [Tue, 18 Aug 2020 19:09:45 +0000 (14:09 -0500)]
configs: j7200_evm_r5: Enable FS_LOADER
Enable the FS_LOADER and associated configs in the j7200_evm_r5_defconfig
so that the R5 SPL can support the loading of firmware files from a boot
media/file system.
Signed-off-by: Suman Anna <s-anna@ti.com>
Suman Anna [Tue, 18 Aug 2020 19:09:44 +0000 (14:09 -0500)]
arm: dts: k3-j7200-r5: Add fs_loader node
Add a generic fs_loader node to the K3 J7200 R5 common board dts
file and use it as the chosen firmware-loader so that it can be
used for loading various firmwares from a boot media/filesystem
in R5 SPL on K3 J7200 EVM.
Signed-off-by: Suman Anna <s-anna@ti.com>
Suman Anna [Tue, 18 Aug 2020 19:09:43 +0000 (14:09 -0500)]
env: ti: j721e-evm: Update R5 SPL rproc env variables for J7200
The R5 SPL on J7200 SoCs will be limited to booting just the
MCU R5FSS0 R5F core in LockStep-mode at present, so add the
two required environment variables 'addr_mcur5f0_0load' and
'name_mcur5f0_0fw' that are needed by the R5 SPL early-boot
logic. The firmware name used is also different from that on
J721E SoCs.
Signed-off-by: Suman Anna <s-anna@ti.com>
Suman Anna [Mon, 17 Aug 2020 23:15:14 +0000 (18:15 -0500)]
configs: j7200_evm_a72: Enhance bootcmd to start remoteprocs
The A72 U-boot can support early booting of any of the Main or MCU R5F
remote processors from U-boot prompt to achieve various system usecases
before booting the Linux kernel. Update the default BOOTCOMMAND to provide
an automatic and easier way to start various remote processors through
added environment variables.
Signed-off-by: Suman Anna <s-anna@ti.com>
Suman Anna [Mon, 17 Aug 2020 23:15:13 +0000 (18:15 -0500)]
configs: j7200_evm_a72: Enable R5F remoteproc driver
The J7200 SoCs has two R5F sub-systems. Enable the TI K3
R5F remoteproc driver and the remoteproc command options
to allow these R5F processors to be booted from A72 U-Boot.
The Kconfigs are added using savedefconfig.
Signed-off-by: Suman Anna <s-anna@ti.com>
Suman Anna [Mon, 17 Aug 2020 23:15:12 +0000 (18:15 -0500)]
env: ti: j721e-evm: Update rproc_fw_binaries env variable for J7200
The J7200 SoCs have different number of remote processors, but reuse
the same environment settings as the J721E SoCs. The current env
variable rproc_fw_binaries is geared towards J721E SoCs and is
incorrect for J7200 SoCs. Please see the logic originally added in
commit
0b4ab9c9a754 ("env: ti: j721e-evm: Add support to boot rprocs
including R5Fs and DSPs").
Fix this by defining the DEFAULT_RPROCS macro appropriately using
the corresponding TARGET_EVM Kconfig symbol. This macro is used by
the 'rproc_fw_binaries' env variable in the common remoteproc env
header file k3_rproc.h.
The list of R5F cores to be started before loading and booting the
Linux kernel are as follows, and mainly comprises of the Main R5FSS0
cores in this order:
Main R5FSS0 (Split) Core0 : 2 /lib/firmware/j7200-main-r5f0_0-fw
Main R5FSS0 (Split) Core1 : 3 /lib/firmware/j7200-main-r5f0_1-fw
The MCU R5FSS0 is in LockStep mode and is expected to be booted by
R5 SPL, so it is not included in the list. The order of rprocs to
boot cannot be really modified as only the Main R5FSS0 cores are
involved and Core0 has to be booted first always before the
corresponding Core1.
Signed-off-by: Suman Anna <s-anna@ti.com>
Suman Anna [Mon, 17 Aug 2020 23:15:11 +0000 (18:15 -0500)]
arm: dts: k3-j7200-main: Add MAIN domain R5F cluster nodes
The J7200 SoCs have 2 dual-core Arm Cortex-R5F processor (R5FSS)
subsystems/clusters. One R5F cluster is present within the MCU
domain (MCU_R5FSS0), and the other one is present within the MAIN
domain (MAIN_R5FSS0). Each of these can be configured at boot time
to be either run in a LockStep mode or in an Asymmetric Multi
Processing (AMP) fashion in Split-mode. These subsystems have 64 KB
each Tightly-Coupled Memory (TCM) internal memories for each core
split between two banks - ATCM and BTCM (further interleaved into
two banks). The TCMs of both Cores are combined in LockStep-mode
to provide a larger 128 KB of memory.
Add the DT node for the MAIN domain R5F cluster/subsystem, the two
R5F cores are added as child nodes to the main cluster/subsystem node.
The cluster is configured to run in Split-mode by default, with the
ATCMs enabled to allow the R5 cores to execute code from DDR with
boot-strapping code from ATCM. The inter-processor communication
between the main A72 cores and these processors is achieved through
shared memory and Mailboxes.
Signed-off-by: Suman Anna <s-anna@ti.com>
Suman Anna [Mon, 17 Aug 2020 23:15:10 +0000 (18:15 -0500)]
arm: dts: k3-j7200-mcu: Add MCU domain R5F cluster node
The J7200 SoCs have 2 dual-core Arm Cortex-R5F processor (R5FSS)
subsystems/clusters. One R5F cluster is present within the MCU
domain (MCU_R5FSS0), and the other one is present within the MAIN
domain (MAIN_R5FSS0). Each of these can be configured at boot time
to be either run in a LockStep mode or in an Asymmetric Multi
Processing (AMP) fashion in Split-mode. These subsystems have 64 KB
each Tightly-Coupled Memory (TCM) internal memories for each core
split between two banks - ATCM and BTCM (further interleaved into
two banks). The TCMs of both Cores are combined in LockStep-mode
to provide a larger 128 KB of memory.
Add the DT node for the MCU domain R5F cluster/subsystem, the two
R5F cores are added as child nodes to the main cluster/subsystem node.
The cluster is configured to run in LockStep mode by default, with
the ATCMs enabled to allow the R5 cores to execute code from DDR with
boot-strapping code from ATCM. The inter-processor communication
between the main A72 cores and these processors is achieved through
shared memory and Mailboxes.
Signed-off-by: Suman Anna <s-anna@ti.com>
Suman Anna [Mon, 17 Aug 2020 23:15:09 +0000 (18:15 -0500)]
armv8: K3: j7200: Add custom MMU support
The A72 U-Boot code can load and boot a number of the available
R5FSS Cores on the J7200 SoC. Change the memory attributes for the
DDR regions used by the remote processors so that the cores can see
and execute the proper code.
The J7200 SoC has less number of remote processors compared to J721E,
so use less memory for the remote processors. So, a separate table
based on the current J721E table is added for J7200 SoCs, and selected
using the appropriate Kconfig CONFIG_TARGET_J7200_A72_EVM symbol.
Signed-off-by: Suman Anna <s-anna@ti.com>
Suman Anna [Mon, 17 Aug 2020 23:15:08 +0000 (18:15 -0500)]
remoteproc: k3-r5: Add support for J7200 R5Fs
The K3 J7200 SoC family has a revised R5F sub-system and contains a
subset of the R5F clusters present on J721E SoCs. The integration of
these clusters is very much similar to J721E SoCs otherwise.
The revised IP has the following two new features:
1. TCMs are auto-initialized during module power-up, and the behavior
is programmable through a MMR bit controlled by System Firmware.
2. The LockStep-mode allows the Core1 TCMs to be combined with the
Core0 TCMs effectively doubling the amount of TCMs available.
The LockStep-mode on previous SoCs could only use the Core0 TCMs.
This combined TCMs appear contiguous at the respective Core0 TCM
addresses.
Add the support to these clusters in the K3 R5F remoteproc driver
using J7200 specific compatibles and revised logic accounting for
the above IP features/differences.
Signed-off-by: Suman Anna <s-anna@ti.com>
Suman Anna [Mon, 17 Aug 2020 23:15:07 +0000 (18:15 -0500)]
dt-bindings: remoteproc: k3-r5f: Update bindings for J7200 SoCs
The K3 J7200 SoCs have two dual-core Arm R5F clusters/subsystems, with
2 R5F cores each, one in each of the MCU and MAIN voltage domains.
These clusters are a revised version compared to those present on
J721E SoCs. Update the K3 R5F remoteproc bindings with the compatible
info relevant to these R5F clusters/subsystems on K3 J7200 SoCs.
Signed-off-by: Suman Anna <s-anna@ti.com>
Suman Anna [Mon, 17 Aug 2020 21:57:36 +0000 (16:57 -0500)]
env: ti: j721e-evm: Limit scope of rproc env variables used by R5 SPL
The commit
316c927135d6 ("include: configs: j721e_evm: Add env variables
for mcu_r5fss0_core0 & main_r5fss0_core0") added four different new env
variables 'addr_mainr5f0_0load', 'name_mainr5f0_0fw', 'addr_mcur5f0_0load'
and 'name_mcur5f0_0fw' to the generic environment, but these are only
needed and used in R5 SPL for early-booting the MCU R5FSS0 and Main
R5FSS0 Core0 on J721E SoCs.
These are not really needed for A72 U-Boot, so limit the scope of
these variables only to R5 SPL. While at this, also fix the loadaddr
variable values to include the hex prefix like with other such env
variables.
Cc: Keerthy <j-keerthy@ti.com>
Signed-off-by: Suman Anna <s-anna@ti.com>
Suman Anna [Mon, 17 Aug 2020 21:57:35 +0000 (16:57 -0500)]
configs: j721e_evm: Add Main R5FSS1 Core1 to default rproc boot list
The default rproc list currently used by A72 U-Boot to boot various
remote processors include the Main R5FSS0 (Split-mode) Core1, Main
R5FSS1 (LockStep mode) Core0 and the three DSPs. The Main R5FSS1 cluster
is configured for Split mode by default in the dts now, so add the
Main R5FSS1 Core1 (rproc #5) to the default rproc boot list. This
core is now booted after the Main R5FSS1 Core0 and before the DSPs.
The order of the rprocs to boot can always be changed at runtime if
desired by overwriting the 'rproc_fw_binaries' environment variable
at U-boot prompt. Note that the R5FSS Core1 cannot be booted before
its associated Core0.
Signed-off-by: Suman Anna <s-anna@ti.com>
Suman Anna [Mon, 17 Aug 2020 21:57:34 +0000 (16:57 -0500)]
arm: dts: k3-j721e-main: Configure MAIN R5FSS1 for Split-mode
Switch the MAIN R5FSS1 cluster to be configured for Split-mode as the
default so that two different applications can be run on each of the
R5F cores in performance mode. LockStep-mode would be available only
on SoCs efused with the appropriate bit, and Split-mode is the mode
that is available on all J721E SoCs.
Signed-off-by: Suman Anna <s-anna@ti.com>
Vignesh Raghavendra [Thu, 13 Aug 2020 09:26:19 +0000 (14:56 +0530)]
configs: j721e_evm.h: Add U-Boot image address for HyperFlash boot
Add memory mapped address location of U-Boot images in HyperFlash boot
mode.
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Vignesh Raghavendra [Thu, 13 Aug 2020 09:26:18 +0000 (14:56 +0530)]
configs: j7200_evm_*_defconfig: Enable HyperFlash boot related configs
Enable configs required to support HyperFlash boot and detection of
onboard mux switch for HyperFlash selection
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Vignesh Raghavendra [Thu, 13 Aug 2020 09:26:17 +0000 (14:56 +0530)]
ARM: dts: k3-j7200-r5-common-proc-board: Enable HyperFlash
Enable HyperBus and HyperFlash to support HyperFlash boot.
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Vignesh Raghavendra [Thu, 13 Aug 2020 09:26:16 +0000 (14:56 +0530)]
board: ti: j721e: Add support for HyperFlash detection
On J7200 SoC OSPI and HypeFlash are muxed at HW level and only one of
them can be used at any time. J7200 EVM has both HyperFlash and OSPI
flash on board. There is a user switch (SW3.1) that can be toggled to
select OSPI flash vs HyperFlash.
Read the state of this switch via wkup_gpio0_6 line and fixup the DT
nodes to select OSPI vs HyperFlash
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Vignesh Raghavendra [Thu, 13 Aug 2020 09:26:15 +0000 (14:56 +0530)]
arm: mach-k3: Add HyperFlash boot mode support
HBMC controller on TI K3 SoC provides MMIO access to HyperFlash similar
to legacy Parallel CFI NOR flashes. Therefore alias HyperFlash bootmode
to NOR boot to enable SPL to load next stage using NOR boot flow.
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Tom Rini [Thu, 10 Sep 2020 18:37:45 +0000 (14:37 -0400)]
Merge branch '2020-09-09-assorted-soc-updates' into next
- Assorted improvements for MediaTek, Broadcom NS3 and ASPEED SoCs.
Thirupathaiah Annapureddy [Tue, 1 Sep 2020 20:42:45 +0000 (13:42 -0700)]
arm: dts: fix ast2500-evb inclusion for the correct soc family
Include ast2500-evb.dtb for CONFIG_ASPEED_AST2500 instead of
for all aspeed targets.
ast2400 is based on ARM926EJ-S processor (ARMv5-architecture).
ast2500 is based on ARM1176JZS processor (ARMv6-architecture).
ast2600 is based on Cortex A7 processor (ARMv7-A architecture).
Each of the above SOC is using a different ARM CPU(s) with different ARM
architecture revision. It is not possible to support all 3 of these
families in a single binary. So there is no need to build ast2500-evb.dtb
for other SOC families.
Signed-off-by: Thirupathaiah Annapureddy <thiruan@linux.microsoft.com>
Chuanjia Liu [Mon, 31 Aug 2020 07:53:12 +0000 (15:53 +0800)]
PCI: mediatek: Release the resource when PCIe enable port fail
On the mt7623 platform, if one port enable fail and other port
enable succeed. It will hang on when using pci enum
because the resource was not released correctly.
Signed-off-by: Chuanjia Liu <Chuanjia.Liu@mediatek.com>
Tested-by: Frank Wunderlich <frank-w@public-files.de>
Robert Marko [Tue, 1 Sep 2020 17:22:54 +0000 (19:22 +0200)]
dt-bindings: clock: import Qualcomm IPQ4019 bindings
Import Qualcomm IPQ4019 GCC bindings from Linux.
This will enable using bindings instead of raw clock numbers both in the driver and DTS like Linux does.
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
Cc: Luka Perkov <luka.perkov@sartura.hr>
Ryan Chen [Mon, 31 Aug 2020 06:03:05 +0000 (14:03 +0800)]
cosmetic: aspeed: Modify for SPDX-License
Modify SPDX-License for furture patch warning
Signed-off-by: Ryan Chen <ryan_chen@aspeedtech.com>
Reviewed-by: Chia-Wei, Wang <chiawei_wang@aspeedtech.com>
Ryan Chen [Mon, 31 Aug 2020 06:03:04 +0000 (14:03 +0800)]
clock:aspeed: Sync with Linux kernel clock header define
v2: modify title description aspeed:clock -> clock:aspeed
Use kernel include/dt-bindings/clock/aspeed-clock.h define
for clock driver.
Signed-off-by: Ryan Chen <ryan_chen@aspeedtech.com>
Reviewed-by: Chia-Wei, Wang <chiawei_wang@aspeedtech.com>
Ryan Chen [Mon, 31 Aug 2020 06:03:03 +0000 (14:03 +0800)]
cosmetic: aspeed: ast2500: Rename clock header
Rename the ast2500-scu.h to aspeed-clock.h.
Signed-off-by: Ryan Chen <ryan_chen@aspeedtech.com>
Reviewed-by: Chia-Wei, Wang <chiawei_wang@aspeedtech.com>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Rayagonda Kokatanur [Tue, 25 Aug 2020 17:46:37 +0000 (23:16 +0530)]
board: ns3: check bnxt chimp handshake status
Chimp is a core in Broadcom netxtream controller (bnxt).
Add support to check bnxt's chimp component status.
Signed-off-by: Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Rayagonda Kokatanur [Thu, 20 Aug 2020 15:11:08 +0000 (20:41 +0530)]
MAINTAINERS: update maintainers file for new files
Update MAINTAINERS file for new files.
Signed-off-by: Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Vladimir Olovyannikov [Thu, 20 Aug 2020 15:11:07 +0000 (20:41 +0530)]
board: ns3: kconfig: extend board kconfig with specific commands
Extend Kconfig for the board with board-specific commands selection.
Signed-off-by: Vladimir Olovyannikov <vladimir.olovyannikov@broadcom.com>
Signed-off-by: Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Bharat Kumar Reddy Gooty [Thu, 20 Aug 2020 15:11:06 +0000 (20:41 +0530)]
cmd: broadcom: add command for chimp handshake
Add command for chimp handshake.
Handshake is used to know chimp is loaded and booted successfully.
Signed-off-by: Bharat Kumar Reddy Gooty <bharat.gooty@broadcom.com>
Signed-off-by: Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Vikas Gupta [Thu, 20 Aug 2020 15:11:05 +0000 (20:41 +0530)]
cmd: broadcom: add cmd to update bnxt image env variables
Add command to update the environmental variables which
are used to read the data from QSPI offsets and load
the binaries to bnxt.
Signed-off-by: Vikas Gupta <vikas.gupta@broadcom.com>
Signed-off-by: Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Trac Hoang [Thu, 20 Aug 2020 15:11:04 +0000 (20:41 +0530)]
cmd: broadcom: add bnxt boot command
Chimp is a core in Broadcom netxtream controller (bnxt).
Add command to load binary to chimp and boot bnxt.
Signed-off-by: Trac Hoang <trac.hoang@broadcom.com>
Signed-off-by: Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tom Rini [Tue, 8 Sep 2020 01:00:47 +0000 (21:00 -0400)]
Merge branch '2020-09-14-btrfs-rewrite' into next
- Bring in the update to btrfs support that rewrites it based on
btrfs-progs.
Qu Wenruo [Wed, 24 Jun 2020 16:03:16 +0000 (18:03 +0200)]
MAINTAINERS: Add btrfs mailing list and myself as reviewer
Since the current code base is mostly from btrfs-progs, anyone
contributing to U-Boot btrfs code could also help us to improve
btrfs-progs and btrfs kernel module.
Also add myself as designated reviewer.
Signed-off-by: Qu Wenruo <wqu@suse.com>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Qu Wenruo [Wed, 24 Jun 2020 16:03:15 +0000 (18:03 +0200)]
fs: btrfs: Cleanup the old implementation
This cleans up the now unneeded code from the old btrfs implementation.
Signed-off-by: Qu Wenruo <wqu@suse.com>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Qu Wenruo [Wed, 24 Jun 2020 16:03:14 +0000 (18:03 +0200)]
fs: btrfs: Imeplement btrfs_list_subvols() using new infrastructure
Reimplement btrfs_list_subvols() to use new code.
Signed-off-by: Qu Wenruo <wqu@suse.com>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Qu Wenruo [Wed, 24 Jun 2020 16:03:13 +0000 (18:03 +0200)]
fs: btrfs: Introduce function to resolve the path of one subvolume
This patch introduces a new function, list_one_subvol(), which will
resolve the path to FS_TREE of one subvolume.
Signed-off-by: Qu Wenruo <wqu@suse.com>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Qu Wenruo [Wed, 24 Jun 2020 16:03:12 +0000 (18:03 +0200)]
fs: btrfs: Introduce function to resolve path in one subvolume
This patch introduces a new function, get_path_in_subvolume(), which
resolves inode number into path inside a subvolume.
This function will be later used for btrfs subvolume list functionality.
Signed-off-by: Qu Wenruo <wqu@suse.com>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Qu Wenruo [Wed, 24 Jun 2020 16:03:11 +0000 (18:03 +0200)]
fs: btrfs: Implement btrfs_file_read()
This version of btrfs_file_read() has the following new features:
- Tries all mirrors
- More handling on unaligned size
- Better compressed extent handling
The old implementation doesn't handle compressed extent with offset
properly: we need to read out the whole compressed extent, then
decompress the whole extent, and only then copy the requested part.
Signed-off-by: Qu Wenruo <wqu@suse.com>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Qu Wenruo [Wed, 24 Jun 2020 16:03:10 +0000 (18:03 +0200)]
fs: btrfs: Introduce lookup_data_extent() for later use
This implements lookup_data_extent() function for the incoming
new implementation of btrfs_file_read().
Signed-off-by: Qu Wenruo <wqu@suse.com>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Qu Wenruo [Wed, 24 Jun 2020 16:03:09 +0000 (18:03 +0200)]
fs: btrfs: Introduce btrfs_read_extent_inline() and btrfs_read_extent_reg()
These two functions are used to do sector aligned read, which will be
later used to implement btrfs_file_read().
Signed-off-by: Qu Wenruo <wqu@suse.com>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Qu Wenruo [Wed, 24 Jun 2020 16:03:08 +0000 (18:03 +0200)]
fs: btrfs: Rename btrfs_file_read() and its callees to avoid name conflicts
Rename btrfs_file_read() and its callees to avoid name conflicts with
the incoming new code.
Signed-off-by: Qu Wenruo <wqu@suse.com>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Qu Wenruo [Wed, 24 Jun 2020 16:03:07 +0000 (18:03 +0200)]
fs: btrfs: Use btrfs_lookup_path() to implement btrfs_exists() and btrfs_size()
After this the only remaining function that still utilizes
__btrfs_lookup_path() is btrfs_read().
Signed-off-by: Qu Wenruo <wqu@suse.com>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Qu Wenruo [Wed, 24 Jun 2020 16:03:06 +0000 (18:03 +0200)]
fs: btrfs: Use btrfs_iter_dir() to replace btrfs_readdir()
Use extent buffer based infrastructure to re-implement btrfs_readdir().
Along this rework, some small corner cases fixed:
- Subvolume tree mtime
Mtime of a subvolume tree is recorded in its root item, since there is
no INODE_ITEM for it.
This needs extra search from tree root.
- Output the unknown type
If the DIR_ITEM is corrupted, at least don't try to access the memory
out of boundary.
Signed-off-by: Qu Wenruo <wqu@suse.com>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Qu Wenruo [Wed, 24 Jun 2020 16:03:05 +0000 (18:03 +0200)]
fs: btrfs: Implement btrfs_lookup_path()
This is the extent buffer based path lookup routine.
To implement this, btrfs_lookup_dir_item() is crossported from
btrfs-progs, and implements btrfs_lookup_path() from scratch.
Unlike the existing __btrfs_lookup_path(), since btrfs_read_fs_root()
will check whether a root is a orphan at read time, there is no need to
check root backref, this makes the code a little easier to read.
Signed-off-by: Qu Wenruo <wqu@suse.com>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Qu Wenruo [Wed, 24 Jun 2020 16:03:04 +0000 (18:03 +0200)]
fs: btrfs: inode: Allow next_length() to return value > BTRFS_NAME_LEN
All existing next_length() caller handles return value > BTRFS_NAME_LEN,
so there is no need to do BTRFS_NAME_LEN check in next_length().
But still, we want to exit early if we're beyond BTRFS_NAME_LEN, so this
patch makes next_length() exit as soon as we're beyond BTRFS_NAME_LEN.
Signed-off-by: Qu Wenruo <wqu@suse.com>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Qu Wenruo [Wed, 24 Jun 2020 16:03:03 +0000 (18:03 +0200)]
fs: btrfs: Use btrfs_readlink() to implement __btrfs_readlink()
The existing __btrfs_readlink() can be easily re-implemented using the
extent buffer based btrfs_readlink().
This is the first step to re-implement U-Boot's btrfs code.
Signed-off-by: Qu Wenruo <wqu@suse.com>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Qu Wenruo [Wed, 24 Jun 2020 16:03:02 +0000 (18:03 +0200)]
fs: btrfs: Rename path resolve related functions to avoid name conflicts
Since the old code is using __btrfs_path/__btrfs_root which is different
from the regular extent buffer based one, we add "__" prefix for the old
implementation to avoid name conflicts for the incoming crossport.
Signed-off-by: Qu Wenruo <wqu@suse.com>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Qu Wenruo [Wed, 24 Jun 2020 16:03:01 +0000 (18:03 +0200)]
fs: btrfs: Crossport open_ctree_fs_info() from btrfs-progs
open_ctree_fs_info() is the main entry point to open btrfs.
This version is a simplfied version of __open_ctree_fd() of btrfs-progs,
the main differences are:
- Parameters on how to specify a block device
Instead of @fd and @path, U-Boot uses blk_desc and disk_partition_t.
- Remove open_ctree flags
There won't be multiple open ctree modes in U-Boot.
Otherwise functions structures are all kept the same.
With open_ctree_fs_info() implemented, also introduce the global
current_fs_info pointer to show the current opened btrfs.
Signed-off-by: Qu Wenruo <wqu@suse.com>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Qu Wenruo [Wed, 24 Jun 2020 16:03:00 +0000 (18:03 +0200)]
fs: btrfs: Crossport btrfs_read_sys_array() and btrfs_read_chunk_tree()
These two functions play a big role in btrfs bootstrap.
The following function is removed:
- Seed device support
Although in theory we can still support multiple devices, we don't have
a facility in U-Boot to do device scan without opening them.
Signed-off-by: Qu Wenruo <wqu@suse.com>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Qu Wenruo [Wed, 24 Jun 2020 16:02:59 +0000 (18:02 +0200)]
fs: btrfs: Crossport btrfs_search_slot() from btrfs-progs
This patch copies the core function, btrfs_search_slot(), from
btrfs-progs.
This version has the following functionality removed:
- The ability to COW tree block
Related code is commented out, and can be enabled in the future.
- The readahead functionality
This is abused in kernel. Remove it completely.
With the core function in place, btrfs developers should feel at home now.
This also crossports supporting code like btrfs_previous_item() to
ctree.[ch].
Signed-off-by: Qu Wenruo <wqu@suse.com>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Qu Wenruo [Wed, 24 Jun 2020 16:02:58 +0000 (18:02 +0200)]
fs: btrfs: Crossport struct btrfs_root to ctree.h
Crossport struct btrfs_root to ctree.h from btrfs-progs, with write
related members deleted.
Signed-off-by: Qu Wenruo <wqu@suse.com>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Qu Wenruo [Wed, 24 Jun 2020 16:02:57 +0000 (18:02 +0200)]
fs: btrfs: Rename btrfs_root to __btrfs_root
This is to avoid naming conflicts between extent buffer based
btrfs_root.
Signed-off-by: Qu Wenruo <wqu@suse.com>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Qu Wenruo [Wed, 24 Jun 2020 16:02:56 +0000 (18:02 +0200)]
fs: btrfs: Rename struct btrfs_path to struct __btrfs_path
To avoid name conflicting between the extent buffer based btrfs_path
from btrfs-progs, rename struct btrfs_path to struct __btrfs_path.
Also rename btrfs_free_path() to __btrfs_free_path() to avoid conflicts.
Signed-off-by: Qu Wenruo <wqu@suse.com>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Qu Wenruo [Wed, 24 Jun 2020 16:02:55 +0000 (18:02 +0200)]
fs: btrfs: Crossport read_tree_block() from btrfs-progs
This is the one of the basic stone function for btrfs, which:
- Resolves the chunk mappings
- Reads data from disk
- Does various sanity check
With read_tree_block(), we can finally crossport needed btrfs btree
operations to U-Boot.
Signed-off-by: Qu Wenruo <wqu@suse.com>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Qu Wenruo [Wed, 24 Jun 2020 16:02:54 +0000 (18:02 +0200)]
fs: btrfs: Crossport volumes.[ch] from btrfs-progs
This patch crossports volumes.[ch] from btrfs-progs, including:
- btrfs_map_block()
The core mechanism to map btrfs logical address to physical address.
This version includes multi-device support, along with RAID56 support.
- btrfs_scan_one_device()
This is the function to register one btrfs device to the list.
This is the main part of the multi-device btrfs assembling process.
Although we're not going to support multiple devices until U-Boot
allows us to scan one device without actually opening it.
Signed-off-by: Qu Wenruo <wqu@suse.com>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
[trini: Use %zu in a debug print to avoid warning]
Signed-off-by: Tom Rini <trini@konsulko.com>
Qu Wenruo [Wed, 24 Jun 2020 16:02:53 +0000 (18:02 +0200)]
fs: btrfs: Crossport structure accessor into ctree.h
This brings all structure accessors from btrfs-progs/ctree.h, as in
kernel's ctree.h.
All these accessors handle the endian convert at runtime, and since all
of them are defined as static inline functions, those which aren't used
won't take space in resulting binary.
Signed-off-by: Qu Wenruo <wqu@suse.com>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Qu Wenruo [Wed, 24 Jun 2020 16:02:52 +0000 (18:02 +0200)]
fs: btrfs: Crossport extent-io.[ch] from btrfs-progs
This brings the extent_io_tree infrastructure, with which we can finally
bring in proper btrfs_fs_info structure to ctree.h.
With read/write_extent_buffer() implemented we also backport
read/write_eb_member() to ctree.h.
Signed-off-by: Qu Wenruo <wqu@suse.com>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Qu Wenruo [Wed, 24 Jun 2020 16:02:51 +0000 (18:02 +0200)]
fs: btrfs: Crossport extent-cache.[ch] from btrfs-progs
This patch implements an infrastructure to insert/search/merge an extent
range (with variable length).
This provides the basis for later extent buffer cache used in btrfs.
Signed-off-by: Qu Wenruo <wqu@suse.com>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Qu Wenruo [Wed, 24 Jun 2020 16:02:50 +0000 (18:02 +0200)]
fs: btrfs: Crossport rbtree-utils from btrfs-progs
This is needed for incoming extent-cache infrastructure.
Signed-off-by: Qu Wenruo <wqu@suse.com>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Qu Wenruo [Wed, 24 Jun 2020 16:02:49 +0000 (18:02 +0200)]
fs: btrfs: Crossport btrfs_read_dev_super() from btrfs-progs
This patch uses generic code from btrfs-progs to read one super block
from block device.
To support the btrfs-progs coding style, the following is also
crossported:
- BTRFS_SETGET_FUNC for btrfs_super_block
- btrfs_check_super() function
- Move btrfs_read_superblock() to disk-io.[ch]
Since super.c only contains pretty small amount of code, and
the extra check will be covered in later root read patches.
Differences between this implementation and btrfs-progs:
- No sbflags/sb_bytenr support
Since we only need to read the primary super block (like kernel),
sbflags/sb_bytenr used by super block recovery is not needed.
This also changes the following behavior of U-Boot btrfs:
- Only reads the primary super block
The old implementation reads all 3 super blocks, and also one
non-existing backup.
This is not correct, especially if there is another filesystem created
on the device but old superblocks are not rewritten.
Just like kernel, we only check the primary super block.
Signed-off-by: Qu Wenruo <wqu@suse.com>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
[trini: Change error to be a define in compat.h]
Signed-off-by: Tom Rini <trini@konsulko.com>
Qu Wenruo [Wed, 24 Jun 2020 16:02:48 +0000 (18:02 +0200)]
fs: btrfs: Add more checksum algorithms
This mostly crossports crypto/hash.[ch] from btrfs-progs.
The differences are:
- No blake2 support
No blake2 related library in U-Boot yet.
- Use uboot xxhash/sha256 directly
No need to implement the code as U-Boot has already provided the
interface.
This adds the support for the following csums:
- SHA256
- XXHASH
Signed-off-by: Qu Wenruo <wqu@suse.com>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Qu Wenruo [Wed, 24 Jun 2020 16:02:47 +0000 (18:02 +0200)]
fs: btrfs: Sync btrfs_btree.h from kernel
This version includes all needed on-disk format from kernel.
Only need to modify the include headers for U-Boot, everything else is
untouched.
Also, since U-Boot btrfs is using a different endian convert timing (at
tree block read time), it needs some forced type conversion before
proper crossport.
Signed-off-by: Qu Wenruo <wqu@suse.com>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Tom Rini [Mon, 7 Sep 2020 18:31:00 +0000 (14:31 -0400)]
Merge branch 'remove-config-nr-dram-banks-v9-2020-08-26' of https://gitlab.denx.de/u-boot/custodians/u-boot-marvell into next
Tom Rini [Mon, 7 Sep 2020 18:17:33 +0000 (14:17 -0400)]
Prepare v2020.10-rc4
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Mon, 7 Sep 2020 18:05:55 +0000 (14:05 -0400)]
configs: Resync with savedefconfig
Rsync all defconfig files using moveconfig.py
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Mon, 7 Sep 2020 12:49:50 +0000 (08:49 -0400)]
Merge tag 'efi-2020-10-rc4' of https://gitlab.denx.de/u-boot/custodians/u-boot-efi
Pull request for UEFI sub-system for efi-2020-10-rc4
Bug fixes are provided in the following areas:
* convert file system debug and print messages go log messages
* convert UEFI booting messages to log messages
* UEFI related code clean up and simplification
Heinrich Schuchardt [Fri, 28 Aug 2020 06:15:37 +0000 (08:15 +0200)]
efi_selftest: simplify Makefile
CONFIG_EFI_LOADER cannot be selected for ARMv7-M CPUs. So don't check it in
the Makefile.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Heinrich Schuchardt [Thu, 27 Aug 2020 15:54:53 +0000 (17:54 +0200)]
efi_loader: remove duplicate image size check
The image size is checked in efi_load_pe(). Avoid checking it twice.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Heinrich Schuchardt [Thu, 27 Aug 2020 10:39:03 +0000 (12:39 +0200)]
efi: clean up efi command
* Eliminate superfluous enum value EFI_TABLE_END.
* Use correct variable type for the memory type.
* Check validity of memory type.
* Make efi_build_mem_table static.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Heinrich Schuchardt [Thu, 27 Aug 2020 15:51:32 +0000 (17:51 +0200)]
efi_loader: error message if image not authenticated
Currently if the bootefi command fails due to missing authentication, the
user gets no feedback.
Write a log message 'Image not authenticated' if LoadImage() fails due to
missing authentication.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Heinrich Schuchardt [Tue, 25 Aug 2020 17:51:20 +0000 (17:51 +0000)]
efi_loader: log function in image loader
Use log_err() for error messages.
Replace debug() by EFI_PRINT().
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Heinrich Schuchardt [Tue, 25 Aug 2020 17:54:05 +0000 (17:54 +0000)]
efi_loader: log messages for bootefi command
Write log messages when booting via the bootefi command to allow tracking
on the syslog server. Example messages are
Booting /snp.efi
or
Booting /MemoryMapped(0x0,0x4fe00000,0x35a40)
Loading image failed
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Heinrich Schuchardt [Tue, 25 Aug 2020 17:49:16 +0000 (17:49 +0000)]
fs: convert error and debug messages to log
Use log functions for error and debug messages of the file-system.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tom Rini [Fri, 4 Sep 2020 14:09:14 +0000 (10:09 -0400)]
Merge https://gitlab.denx.de/u-boot/custodians/u-boot-marvell
- Fix SATA issue on Armada 3720
- Enable more SPI NOR chips in espressobin defconfig
Konstantin Porotchkin [Mon, 31 Aug 2020 06:48:05 +0000 (08:48 +0200)]
defconfig: espressobin: Add support for ISSI SPI flashes
Enable support of ISSI SPI flashes found on EspressoBIN boards
Change-Id: I6de61c48f108fb4f410f321b9db45887d23212e5
Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>
Reviewed-on: http://vgitil04.il.marvell.com:8080/61455
Tested-by: iSoC Platform CI <ykjenk@marvell.com>
Reviewed-by: Grzegorz Jaszczyk <jaz@semihalf.com>
Reviewed-by: Stefan Chulski <stefanc@marvell.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Konstantin Porotchkin [Mon, 31 Aug 2020 06:48:04 +0000 (08:48 +0200)]
defconfig: espressobin: Include support for Gigadevice SPI
Include support for CONFIG_SPI_FLASH_GIGADEVICE for supporting
newly produces EspressoBin boards (v7)
Change-Id: I5d4b972cbe2ee5a9d52ce9908794ad4e1b59ee3b
Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>
Reviewed-on: http://vgitil04.il.marvell.com:8080/61236
Tested-by: iSoC Platform CI <ykjenk@marvell.com>
Reviewed-by: Igal Liberman <igall@marvell.com>
Reviewed-by: Stefan Roese <sr@denx.de>
zachary [Fri, 28 Aug 2020 14:56:29 +0000 (16:56 +0200)]
phy: marvell: a3700: add sata comphy on lane 2 with invert option
- This patch moves sata phy powerup from dedicate phy to compphy
and adds invert option for sata powerup routine.
Change-Id: I1b4e8753e2b2c14c6efa97bca2ffc7d2553d8a90
Signed-off-by: zachary <zhangzg@marvell.com>
Signed-off-by: Ken Ma <make@marvell.com>
Reviewed-on: http://vgitil04.il.marvell.com:8080/53601
Reviewed-by: Igal Liberman <igall@marvell.com>
Tested-by: Igal Liberman <igall@marvell.com>
[a.heider: adapt to mainline]
Signed-off-by: Andre Heider <a.heider@gmail.com>
Tested-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>