platform/kernel/linux-rpi.git
2 years agoMerge tag 'amlogic-arm64-dt-for-v5.18' of git://git.kernel.org/pub/scm/linux/kernel...
Arnd Bergmann [Fri, 25 Feb 2022 15:02:02 +0000 (16:02 +0100)]
Merge tag 'amlogic-arm64-dt-for-v5.18' of git://git./linux/kernel/git/amlogic/linux into arm/dt

Amlogic ARM64 DT changes for v5.18:
- New Boards:
 - Amediatek X96-AIR (Amlogic S905X3)
 - CYX A95XF3-AIR (Amlogic S905X3)
 - Haochuangy H96-Max (Amlogic S905X3)
 - Amlogic AQ222 (Amlogic S4)
 - OSMC Vero 4K+ (Amlogic S905D)
- Initial support for Amlogic S4
- Support for uart_ao_b & pwm_f on G12 SoCs

* tag 'amlogic-arm64-dt-for-v5.18' of git://git.kernel.org/pub/scm/linux/kernel/git/amlogic/linux:
  arm64: dts: meson: add support for OSMC Vero 4K+
  dt-bindings: arm: amlogic: add Vero 4K+ bindings
  dt-bindings: vendor-prefixes: add osmc prefix
  arm64: dts: meson-g12-common: add uart_ao_b pins muxing
  arm64: dts: meson-g12-common: add more pwm_f options
  arm64: dts: add support for S4 based Amlogic AQ222
  arm64: dts: meson: add initial device-tree for H96-Max
  dt-bindings: arm: amlogic: add H96-Max bindings
  dt-bindings: vendor-prefixes: add haochuangyi prefix
  arm64: dts: meson: add initial device-trees for A95XF3-AIR
  dt-bindings: arm: amlogic: add A95XF3-AIR bindings
  dt-bindings: vendor-prefixes: add cyx prefix
  arm64: dts: meson: add initial device-trees for X96-AIR
  dt-bindings: arm: amlogic: add X96-AIR bindings
  arm64: dts: meson: add common SM1 ac2xx dtsi
  arm64: dts: meson-sm1: add spdifin and pdifout nodes
  dt-bindings: arm: amlogic: add S4 based AQ222 bindings

Link: https://lore.kernel.org/r/a7cd9937-d441-3e1f-9709-8e80cc8814f1@baylibre.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2 years agoMerge tag 'nuvoton-5.18-devicetree' of git://git.kernel.org/pub/scm/linux/kernel...
Arnd Bergmann [Fri, 25 Feb 2022 14:59:09 +0000 (15:59 +0100)]
Merge tag 'nuvoton-5.18-devicetree' of git://git./linux/kernel/git/joel/bmc into arm/dt

Nuvoton device tree updates for 5.18

 * Additions to wpcm450 following the upstremaing of the pinctrl/gpio
   driver for this platform

 * Match more of the platform in MAINTAINERS

* tag 'nuvoton-5.18-devicetree' of git://git.kernel.org/pub/scm/linux/kernel/git/joel/bmc:
  MAINTAINERS: ARM/WPCM450: Add 'W:' line with wiki
  ARM: dts: wpcm450: Add pinmux information to UART0
  ARM: dts: wpcm450-supermicro-x9sci-ln4f: Add GPIO LEDs and buttons
  ARM: dts: wpcm450: Add pin functions
  ARM: dts: wpcm450: Add pinctrl and GPIO nodes
  ARM: dts: wpcm450: Add global control registers (GCR) node
  MAINTAINERS: Match all of bindings/arm/npcm/ as part of NPCM architecture
  dt-bindings: arm/npcm: Add binding for global control registers (GCR)

Link: https://lore.kernel.org/r/CACPK8XdjF6dG04hR+iMpUP8=LSJi5x-hRivgCGDaY7o_461eJw@mail.gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2 years agoMerge branch 'mstar-dt-next' of https://github.com/linux-chenxing/linux into arm/dt
Arnd Bergmann [Fri, 25 Feb 2022 14:51:12 +0000 (15:51 +0100)]
Merge branch 'mstar-dt-next' of https://github.com/linux-chenxing/linux into arm/dt

* 'mstar-dt-next' of https://github.com/linux-chenxing/linux:
  ARM: mstar: Extend opp_table for infinity2m
  ARM: mstar: Add OPP table for infinity3
  ARM: mstar: Add OPP table for infinity
  ARM: mstar: Link cpupll to second core
  ARM: mstar: Link cpupll to cpu
  ARM: mstar: Add cpupll to base dtsi
  dt-bindings: clk: mstar msc313 cpupll binding description
  ARM: dts: mstar: Add board for 100ask DongShanPiOne
  dt-bindings: arm: mstar: Add compatible for 100ask DongShanPiOne
  dt-bindings: vendor-prefixes: Add prefix for 100ask
  ARM: dts: mstar: Add a dts for Miyoo Mini
  dt-bindings: arm: mstar: Add compatible for Miyoo Mini
  dt-bindings: vendor-prefixes: Add prefix for Miyoo
  ARM: dts: mstar: Add the Wireless Tag IDO-SBC2D06-V1B-22W
  dt-bindings: add vendor prefix for Wireless Tag
  ARM: dts: mstar: Set gpio compatible for ssd20xd

Link: https://lore.kernel.org/r/20220216193131.59794-1-romain.perier@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2 years agoMerge tag 'sti-dt-for-v5.18-round1' of git://git.kernel.org/pub/scm/linux/kernel...
Arnd Bergmann [Fri, 25 Feb 2022 14:38:56 +0000 (15:38 +0100)]
Merge tag 'sti-dt-for-v5.18-round1' of git://git./linux/kernel/git/pchotard/sti into arm/dt

STi DT update:
- various DT fixes to avoid warnings when build with W=1
- DT clean-up

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2 years agoMerge tag 'ixp4xx-dts-v5.18' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw...
Arnd Bergmann [Fri, 25 Feb 2022 14:35:07 +0000 (15:35 +0100)]
Merge tag 'ixp4xx-dts-v5.18' of git://git./linux/kernel/git/linusw/linux-nomadik into arm/dt

IXP4xx patches for the v5.18 kernel cycle:

- Fix up the WG302 to support the v1 version (also tested)
- Fix up the syscon size
- Drop the alias for UART1 in GW7001

* tag 'ixp4xx-dts-v5.18' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-nomadik:
  ARM: dts: Drop serial 1 alias on GW7001
  ARM: dts: ixp42x: Expand syscon register range
  ARM: dts: ixp4xx: Fix up the Netgear WG302 device tree

Link: https://lore.kernel.org/r/CACRpkdaMk+XECwhXJYeiF8SMU6cQsj_dk8gGMoPE3zAURAPqTw@mail.gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2 years agoMerge tag 'ux500-dts-v5.18-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw...
Arnd Bergmann [Fri, 25 Feb 2022 14:33:17 +0000 (15:33 +0100)]
Merge tag 'ux500-dts-v5.18-1' of git://git./linux/kernel/git/linusw/linux-nomadik into arm/dt

Ux500 DTS updates for the v5.18 kernel cycle:

- Add battery thermal zones so we can monitor the battery temperature
- Enable charging options on AB8505
- Fix up all the AB8500 and AB8505 nodes in accordance with the new
  schema.
- Fix the mounting matrix for the Janice phone.

* tag 'ux500-dts-v5.18-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-nomadik:
  ARM: dts: ux500: Correct Janice accel mount matrix
  ARM: dts: ux500: Update AB850[05] nodes
  ARM: dts: AB8505: Enable charging options
  ARM: dts: ux500: Add battery thermal zones and NTCs

Link: https://lore.kernel.org/r/CACRpkdaDcEqtSnWzRBnBHVweh2n=Dj3meHG9LND+K0Czb9ORGg@mail.gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2 years agoMerge tag 'renesas-dt-bindings-for-v5.18-tag1' of git://git.kernel.org/pub/scm/linux...
Arnd Bergmann [Fri, 25 Feb 2022 14:30:42 +0000 (15:30 +0100)]
Merge tag 'renesas-dt-bindings-for-v5.18-tag1' of git://git./linux/kernel/git/geert/renesas-devel into arm/dt

Renesas DT binding updates for v5.18

  - Document support for the new RZ/V2L SoC and the RZ/V2L SMARC EVK
    board.

* tag 'renesas-dt-bindings-for-v5.18-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel:
  dt-bindings: power: renesas,rzg2l-sysc: Document RZ/V2L SoC
  dt-bindings: arm: renesas: Document Renesas RZ/V2L SoC on SMARC EVK

Link: https://lore.kernel.org/r/cover.1644587209.git.geert+renesas@glider.be
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2 years agoMerge tag 'renesas-arm-dt-for-v5.18-tag1' of git://git.kernel.org/pub/scm/linux/kerne...
Arnd Bergmann [Fri, 25 Feb 2022 14:23:11 +0000 (15:23 +0100)]
Merge tag 'renesas-arm-dt-for-v5.18-tag1' of git://git./linux/kernel/git/geert/renesas-devel into arm/dt

Renesas ARM DT updates for v5.18

  - External interrupt (INTC-EX) support for the R-Car V3U SoC,
  - Initial support for the RZ/G2LC and RZ/V2L SoCs, and the RZ/G2LC and
    RZ/V2L SMARC EVK development boards,
  - Support for MAX9286 GMSL deserializers and GSML cameras on the Eagle
    and Condor development boards,
  - NAND support for the RZ/N1D SoC,
  - DMA engine (SYS-DMAC) support for the R-Car S4-8 SoC,
  - LVDS support for the R-Car M3-W+ SoC,
  - HDMI output and 9-axis sensor support for the Kingfisher (ULCB
    extension) board,
  - MAX96712 GMSL serializer support for the Falcon development board,
  - MOST network support for the R-Car H3, M3-W, M3-W+, M3-N, E3, and D3
    SoCs,
  - Miscellaneous fixes and improvements.

* tag 'renesas-arm-dt-for-v5.18-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel: (27 commits)
  arm64: dts: renesas: rzg2lc-smarc: Use SW_SD0_DEV_SEL macro for eMMC/SDHI device selection
  arm64: dts: renesas: rzg2lc-smarc: Enable CANFD channel 1
  arm64: dts: renesas: rzg2lc-smarc: Enable SCIF1 on carrier board
  arm64: dts: renesas: rzg2lc-smarc: Add macros for DIP-Switch settings
  arm64: dts: renesas: rzg2l-smarc: Add common dtsi file
  arm64: dts: renesas: rzg2lc-smarc: Enable microSD on SMARC platform
  arm64: dts: renesas: rzg2lc-smarc-som: Enable eMMC on SMARC platform
  arm64: dts: renesas: Add initial device tree for RZ/V2L SMARC EVK
  arm64: dts: renesas: Add initial DTSI for RZ/V2L SoC
  dt-bindings: clock: Add R9A07G054 CPG Clock and Reset Definitions
  arm64: dts: renesas: ulcb/ulcb-kf: switch to use audio-graph-card2 for sound
  arm64: dts: renesas: rcar-gen3: Add MOST devices
  arm64: dts: renesas: Miscellaneous whitespace fixes
  arm64: dts: renesas: falcon-csi-dsi: Add and connect MAX96712
  arm64: dts: renesas: ulcb-kf: Add 9-asix sensor device
  arm64: dts: renesas: ulcb-kf: Add KF HDMI output
  arm64: dts: renesas: r8a77961: Add lvds0 device node
  arm64: dts: renesas: r8a779f0: Add sys-dmac nodes
  ARM: dts: r9a06g032: Describe the NAND controller
  arm64: dts: renesas: Add GMSL cameras .dtsi
  ...

Link: https://lore.kernel.org/r/cover.1644587200.git.geert+renesas@glider.be
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2 years agoMerge tag 'samsung-dt-pinctrl-5.18' of git://git.kernel.org/pub/scm/linux/kernel...
Arnd Bergmann [Fri, 25 Feb 2022 14:21:48 +0000 (15:21 +0100)]
Merge tag 'samsung-dt-pinctrl-5.18' of git://git./linux/kernel/git/krzk/linux into arm/dt

Samsung pinctrl DTS and driver changes for v5.18

Conversion of Samsung pinctrl bindings to dtschema followed up with
alignment of DTS files to the dtschema.

The entire work consists of three parts but everything should be merged
at once to avoid dtschema check errors:
1. Samsung pinctrl driver change necessary to accept new DTS (driver
   depends on node names and this has to be adjusted because of dtschema).
2. Conversion to dtschema which brings requirement of different naming
   of the GPIO nodes.
3. DTS commits depending on driver (1) above, which convert all GPIO pin
   bank names to new naming, required by dtschema.
   This also includes few cleanups around DTS which are here to avoid
   any merge conflicts.

The Samsung pinctrl driver changes are backwards compatible.  However
the DTS changes (renaming nodes) could cause problems in out-of-tree or
other project implementations of the driver.

* tag 'samsung-dt-pinctrl-5.18' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux: (28 commits)
  arm64: dts: exynos: use dedicated wake-up pinctrl compatible in ExynosAutov9
  ARM: dts: s5pv210: align pinctrl with dtschema
  ARM: dts: s3c64xx: align pinctrl with dtschema
  ARM: dts: s3c24xx: align pinctrl with dtschema
  arm64: dts: exynos: align pinctrl with dtschema in ExynosAutov9
  arm64: dts: exynos: align pinctrl with dtschema in Exynos7
  arm64: dts: exynos: align pinctrl with dtschema in Exynos5433
  ARM: dts: exynos: align pinctrl with dtschema in Exynos542x/5800
  ARM: dts: exynos: align pinctrl with dtschema in Exynos5410
  ARM: dts: exynos: align pinctrl with dtschema in Exynos5260
  ARM: dts: exynos: align pinctrl with dtschema in Exynos5250
  ARM: dts: exynos: align pinctrl with dtschema in Exynos4412
  ARM: dts: exynos: align pinctrl with dtschema in Exynos4210
  ARM: dts: exynos: align pinctrl with dtschema in Exynos3250
  ARM: dts: s3c64xx: drop unneeded pinctrl wake-up interrupt mapping
  ARM: dts: exynos: simplify PMIC DVS pin configuration in Peach Pi
  ARM: dts: exynos: override pins by label in Peach Pi
  ARM: dts: exynos: simplify PMIC DVS pin configuration in Peach Pit
  ARM: dts: exynos: override pins by label in Peach Pit
  ARM: dts: exynos: simplify PMIC DVS pin configuration in Odroid XU
  ...

Link: https://lore.kernel.org/r/20220129115352.13274-1-krzysztof.kozlowski@canonical.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2 years agoMerge tag 'socfpga_dts_update_for_v5.18_part1' of git://git.kernel.org/pub/scm/linux...
Arnd Bergmann [Fri, 25 Feb 2022 14:19:06 +0000 (15:19 +0100)]
Merge tag 'socfpga_dts_update_for_v5.18_part1' of git://git./linux/kernel/git/dinguyen/linux into arm/dt

SoCFPGA dts updates for v5.18, part 1
- Cleanup of Altera/Intel ARMv7 and ARMv8 DTS and bindings

* tag 'socfpga_dts_update_for_v5.18_part1' of git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux: (22 commits)
  ARM: dts: socfpga: cyclone5: align regulator node with dtschema
  ARM: dts: socfpga: arria10: align regulator node with dtschema
  arm64: dts: agilex: align pl330 node name with dtschema
  arm64: dts: stratix10: align pl330 node name with dtschema
  arm64: dts: intel: socfpga_agilex_socdk: align LED node names with dtschema
  arm64: dts: agilex: align mmc node names with dtschema
  arm64: dts: agilex: add board compatible for N5X DK
  arm64: dts: agilex: add board compatible for SoCFPGA DK
  arm64: dts: stratix10: align regulator node names with dtschema
  arm64: dts: stratix10: align mmc node names with dtschema
  arm64: dts: stratix10: move ARM timer out of SoC node
  arm64: dts: stratix10: add board compatible for SoCFPGA DK
  ARM: dts: arria10: add board compatible for SoCFPGA DK
  ARM: dts: arria10: add board compatible for Mercury AA1
  ARM: dts: arria5: add board compatible for SoCFPGA DK
  dt-bindings: clock: intel,stratix10: convert to dtschema
  dt-bindings: intel: document Agilex based board compatibles
  dt-bindings: altera: document Stratix 10 based board compatibles
  dt-bindings: altera: document VT compatibles
  dt-bindings: altera: document Arria 10 based board compatibles
  ...

Link: https://lore.kernel.org/r/20220211112556.98940-1-dinguyen@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2 years agoMerge tag 'samsung-dt64-5.18' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk...
Arnd Bergmann [Fri, 25 Feb 2022 14:15:05 +0000 (15:15 +0100)]
Merge tag 'samsung-dt64-5.18' of git://git./linux/kernel/git/krzk/linux into arm/dt

Samsung DTS ARM64 changes for v5.18

1. Minor improvements and dtschema fixes (node names, properties).
2. Fix issues pointed out by DT schema checks:
 - Add necessary clock controller inputs on Exynos7.
 - Add USB DWC3 supplies.
 - Drop old syscon phandle on Exynos5433.
3. Add initial Exynos850 support and WinLink E850-96 board using it.

* tag 'samsung-dt64-5.18' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
  arm64: dts: exynos: adjust USB DRD clocks with dtschema in Exynos7
  arm64: dts: exynos: drop unneeded syscon phandle in Exynos5433 LPASS
  arm64: dts: exynos: align pl330 node name with dtschema
  arm64: dts: exynos: Add initial E850-96 board support
  arm64: dts: exynos: Add initial Exynos850 SoC support
  arm64: dts: exynos: add USB DWC3 supplies to Espresso board
  arm64: dts: exynos: add necessary clock inputs in Exynos7
  arm64: dts: exynos: Align MAX77843 nodes with dtschema on TM2

Link: https://lore.kernel.org/r/20220209145226.184375-2-krzysztof.kozlowski@canonical.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2 years agoMerge tag 'samsung-dt-5.18' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk...
Arnd Bergmann [Fri, 25 Feb 2022 14:13:51 +0000 (15:13 +0100)]
Merge tag 'samsung-dt-5.18' of git://git./linux/kernel/git/krzk/linux into arm/dt

Samsung DTS ARM changes for v5.18

1. Minor improvements and dtschema fixes (node names, properties).
2. Fix issues pointed out by DT schema checks:
 - Add necessary clock controller inputs on Exynos5260.
 - Drop unsupported regulators on Odroid XU.
 - Add USB DWC3 supplies.
 - Drop old thermal properties from Exynos4210.
3. Add support for Samsung Chagall WiFi (Exynos5420, Samsung Galaxy Tab
   S 10.5", SM-T800 ) and a similar Samsung Klimt WiFi (Samsung Galaxy
   Tab S 8.4").
4. Add battery to Samsung P4Nnote (Exynos4412, Samsung Galaxy Note
   10.1).

* tag 'samsung-dt-5.18' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux: (22 commits)
  ARM: dts: exynos: use generic node name for LPDDR3 timings in Odroid
  ARM: dts: exynos: add charger and battery to p4note
  ARM: dts: exynos: update dma node name with dtschema
  ARM: dts: exynos: use define for TMU clock on Exynos4412
  ARM: dts: exynos: drop old thermal properties from Exynos4210
  ARM: dts: exynos: add fake USB DWC3 supplies to SMDK5410
  ARM: dts: exynos: add USB DWC3 supplies to SMDK5420
  ARM: dts: exynos: add USB DWC3 supplies to Chromebook Peach Pi
  ARM: dts: exynos: add USB DWC3 supplies to Chromebook Peach Pit
  ARM: dts: exynos: add USB DWC3 supplies to ArndaleOcta
  ARM: dts: exynos: add USB DWC3 supplies to Chromebook Spring
  ARM: dts: exynos: add USB DWC3 supplies to Chromebook Snow
  ARM: dts: exynos: add USB DWC3 supplies to SMDK5250
  ARM: dts: exynos: add USB DWC3 supplies to Arndale
  ARM: dts: exynos: Add support for Samsung Klimt WiFi
  dt-bindings: arm: samsung: document Klimt WiFi board binding
  ARM: dts: exynos: Add support for Samsung Chagall WiFi
  dt-bindings: arm: samsung: document Chagall WiFi board binding
  ARM: dts: exynos: drop unsupported MAX77802 regulators on Odroid XU
  ARM: dts: exynos: add necessary clock controller inputs in Exynos5260
  ...

Link: https://lore.kernel.org/r/20220209145226.184375-1-krzysztof.kozlowski@canonical.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2 years agoMerge tag 'tesla-dt64-5.18' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk...
Arnd Bergmann [Fri, 25 Feb 2022 14:12:11 +0000 (15:12 +0100)]
Merge tag 'tesla-dt64-5.18' of git://git./linux/kernel/git/krzk/linux into arm/dt

Tesla FSD ARM64 changes for v5.18

Add Tesla FSD SoC ARM64 platform: bindings, DTSI+DTS, maintainer's entry
and defconfig change.  This brings and enables this new platform.

This includes clock controller bindings (header files with clock IDs)
which are shared also with Tesla FSD SoC clock controller pull request.

* tag 'tesla-dt64-5.18' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
  arm64: dts: fsd: Add SPI device nodes
  arm64: defconfig: Enable Tesla FSD SoC
  arm64: dts: fsd: Add initial pinctrl support
  arm64: dts: fsd: Add initial device tree support
  dt-bindings: clock: Document FSD CMU bindings
  dt-bindings: clock: Add bindings definitions for FSD CMU blocks
  dt-bindings: arm: add Tesla FSD ARM SoC
  dt-bindings: add vendor prefix for Tesla

Link: https://lore.kernel.org/r/20220204154112.133723-2-krzysztof.kozlowski@canonical.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2 years agoarm64: dts: meson: add support for OSMC Vero 4K+
Christian Hewitt [Fri, 11 Feb 2022 10:53:11 +0000 (10:53 +0000)]
arm64: dts: meson: add support for OSMC Vero 4K+

The OSMC Vero 4K+ device is based on the Amlogic S905D (P230)
reference design with the following specifications:

- 2GB DDR4 RAM
- 16GB eMMC
- HDMI 2.1 video
- S/PDIF optical output
- AV output
- 10/100/1000 Ethernet
- AP6255 Wireless (802.11 a/b/g/n/ac, BT 4.2)
- 2x USB 2.0 ports (1x OTG)
- IR receiver (internal)
- IR extender port (external)
- 1x micro SD card slot
- 1x Power LED (red)
- 1x Reset button (in AV jack)

Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
Tested-by: Chad Wagner <wagnerch42@gmail.com>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Link: https://lore.kernel.org/r/20220211105311.30320-4-christianshewitt@gmail.com
2 years agodt-bindings: arm: amlogic: add Vero 4K+ bindings
Christian Hewitt [Fri, 11 Feb 2022 10:53:10 +0000 (10:53 +0000)]
dt-bindings: arm: amlogic: add Vero 4K+ bindings

Add the board binding for the OSMC Vero 4K+ STB device

Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Link: https://lore.kernel.org/r/20220211105311.30320-3-christianshewitt@gmail.com
2 years agodt-bindings: vendor-prefixes: add osmc prefix
Christian Hewitt [Fri, 11 Feb 2022 10:53:09 +0000 (10:53 +0000)]
dt-bindings: vendor-prefixes: add osmc prefix

Open Source Media Centre (Sam Nazarko Trading Ltd.) are a manufacturer
of Linux Set-Top Box devices.

Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Link: https://lore.kernel.org/r/20220211105311.30320-2-christianshewitt@gmail.com
2 years agoMAINTAINERS: ARM/WPCM450: Add 'W:' line with wiki
Jonathan Neuschäfer [Fri, 18 Feb 2022 16:08:34 +0000 (17:08 +0100)]
MAINTAINERS: ARM/WPCM450: Add 'W:' line with wiki

The wiki is a useful source of 3rd-party information about the SoC,
mostly hardware documentation.

Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Link: https://lore.kernel.org/r/20220218160834.320200-1-j.neuschaefer@gmx.net
Signed-off-by: Joel Stanley <joel@jms.id.au>
2 years agoARM: mstar: Extend opp_table for infinity2m
Romain Perier [Tue, 30 Nov 2021 17:54:49 +0000 (18:54 +0100)]
ARM: mstar: Extend opp_table for infinity2m

infinity2m are running up to 1.2Ghz, this extends opp_table with the
corresponding frequencies and enable operating-points table for cpu1

Signed-off-by: Romain Perier <romain.perier@gmail.com>
2 years agoARM: mstar: Add OPP table for infinity3
Daniel Palmer [Tue, 23 Feb 2021 06:18:29 +0000 (15:18 +0900)]
ARM: mstar: Add OPP table for infinity3

The infinity3 has a slightly higher max frequency
compared to the infinity so extend the OPP table.

Co-authored-by: Willy Tarreau <w@1wt.eu>
Signed-off-by: Daniel Palmer <daniel@0x0f.com>
Reviewed-by: Romain Perier <romain.perier@gmail.com>
2 years agoARM: mstar: Add OPP table for infinity
Daniel Palmer [Tue, 23 Feb 2021 06:18:28 +0000 (15:18 +0900)]
ARM: mstar: Add OPP table for infinity

Add an OPP table for the inifinity chips so
that cpu frequency scaling can happen.

Co-authored-by: Willy Tarreau <w@1wt.eu>
Signed-off-by: Daniel Palmer <daniel@0x0f.com>
Reviewed-by: Romain Perier <romain.perier@gmail.com>
2 years agoARM: mstar: Link cpupll to second core
Daniel Palmer [Tue, 23 Feb 2021 06:18:27 +0000 (15:18 +0900)]
ARM: mstar: Link cpupll to second core

The second core also sources it's clock from the CPU PLL.

Signed-off-by: Daniel Palmer <daniel@0x0f.com>
Reviewed-by: Romain Perier <romain.perier@gmail.com>
2 years agoARM: mstar: Link cpupll to cpu
Daniel Palmer [Tue, 23 Feb 2021 06:18:26 +0000 (15:18 +0900)]
ARM: mstar: Link cpupll to cpu

The CPU clock is sourced from the CPU PLL.
Link cpupll to the cpu so that frequency scaling can happen.

Signed-off-by: Daniel Palmer <daniel@0x0f.com>
Reviewed-by: Romain Perier <romain.perier@gmail.com>
2 years agoARM: mstar: Add cpupll to base dtsi
Daniel Palmer [Tue, 23 Feb 2021 06:18:25 +0000 (15:18 +0900)]
ARM: mstar: Add cpupll to base dtsi

All MStar/SigmaStar ARMv7 SoCs have the CPU PLL at the same
place so add it to the base dtsi.

Signed-off-by: Daniel Palmer <daniel@0x0f.com>
Reviewed-by: Romain Perier <romain.perier@gmail.com>
2 years agodt-bindings: clk: mstar msc313 cpupll binding description
Daniel Palmer [Tue, 23 Feb 2021 06:18:23 +0000 (15:18 +0900)]
dt-bindings: clk: mstar msc313 cpupll binding description

Add a binding description for the MStar/SigmaStar CPU PLL block.

Signed-off-by: Daniel Palmer <daniel@0x0f.com>
Reviewed-by: Rob Herring <robh@kernel.org>
2 years agoARM: dts: sti: move usb picophy nodes out of soc in stih418.dtsi
Alain Volmat [Fri, 11 Feb 2022 18:16:14 +0000 (19:16 +0100)]
ARM: dts: sti: move usb picophy nodes out of soc in stih418.dtsi

Move the usb2_picophy1 and usb2_picophy2 nodes out of the soc section.
Since they are controlled via syscfg, there is no reg property needed,
which is required when having the node within the soc section.

Signed-off-by: Alain Volmat <avolmat@me.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
2 years agoARM: dts: sti: move usb picophy nodes out of soc in stih410.dtsi
Alain Volmat [Fri, 11 Feb 2022 18:16:13 +0000 (19:16 +0100)]
ARM: dts: sti: move usb picophy nodes out of soc in stih410.dtsi

Move the usb2_picophy1 and usb2_picophy2 nodes out of the soc section.
Since they are controlled via syscfg, there is no reg property needed,
which is required when having the node within the soc section.

Modification is done within stih410.dtsi and within related board
dts files (stih410-b2120.dts, stih410-b2260.dts).

Signed-off-by: Alain Volmat <avolmat@me.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
2 years agoARM: dts: sti: remove delta node from stih410.dtsi
Alain Volmat [Fri, 11 Feb 2022 18:16:12 +0000 (19:16 +0100)]
ARM: dts: sti: remove delta node from stih410.dtsi

The delta0 node within stih410.dtsi is identical to the
one already written within stih407-family.dtsi and included
within stih410.dtsi.

Signed-off-by: Alain Volmat <avolmat@me.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
2 years agoARM: dts: sti: move some nodes out of the soc section in stih407-family.dtsi
Alain Volmat [Fri, 11 Feb 2022 18:16:11 +0000 (19:16 +0100)]
ARM: dts: sti: move some nodes out of the soc section in stih407-family.dtsi

Move all nodes without reg property out of the soc section of
stih407-family.dtsi and DT including stih407-family.dtsi.
This avoid to set a <0> reg property.

Signed-off-by: Alain Volmat <avolmat@me.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
2 years agoARM: dts: sti: ensure unique unit-address in stih418-clock
Alain Volmat [Fri, 11 Feb 2022 18:16:10 +0000 (19:16 +0100)]
ARM: dts: sti: ensure unique unit-address in stih418-clock

Move quadfs and a9-mux clocks nodes into clockgen nodes so
that they can get the reg property from the parent node and
ensure only one node has the address.

Signed-off-by: Alain Volmat <avolmat@me.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
2 years agoARM: dts: sti: ensure unique unit-address in stih410-clock
Alain Volmat [Fri, 11 Feb 2022 18:16:09 +0000 (19:16 +0100)]
ARM: dts: sti: ensure unique unit-address in stih410-clock

Move quadfs and a9-mux clocks nodes into clockgen nodes so
that they can get the reg property from the parent node and
ensure only one node has the address.

Signed-off-by: Alain Volmat <avolmat@me.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
2 years agoARM: dts: sti: ensure unique unit-address in stih407-clock
Alain Volmat [Fri, 11 Feb 2022 18:16:08 +0000 (19:16 +0100)]
ARM: dts: sti: ensure unique unit-address in stih407-clock

Move quadfs and a9-mux clocks nodes into clockgen nodes so
that they can get the reg property from the parent node and
ensure only one node has the address.

Signed-off-by: Alain Volmat <avolmat@me.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
2 years agoARM: dts: wpcm450: Add pinmux information to UART0
Jonathan Neuschäfer [Sat, 29 Jan 2022 11:52:28 +0000 (12:52 +0100)]
ARM: dts: wpcm450: Add pinmux information to UART0

UART0 always uses the same pins, so lets add the pinctrl information to
the common devicetree for WPCM450.

UART1 has different connection options, so I'm not adding the pinctrl
properties there.

Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Link: https://lore.kernel.org/r/20220129115228.2257310-10-j.neuschaefer@gmx.net
Signed-off-by: Joel Stanley <joel@jms.id.au>
2 years agoARM: dts: wpcm450-supermicro-x9sci-ln4f: Add GPIO LEDs and buttons
Jonathan Neuschäfer [Sat, 29 Jan 2022 11:52:27 +0000 (12:52 +0100)]
ARM: dts: wpcm450-supermicro-x9sci-ln4f: Add GPIO LEDs and buttons

The Supermicro X9SCi-LN4F server mainboard has a two LEDs and a button
under the control of the BMC. This patch makes them accessible under
Linux running on the BMC.

Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Link: https://lore.kernel.org/r/20220129115228.2257310-9-j.neuschaefer@gmx.net
Signed-off-by: Joel Stanley <joel@jms.id.au>
2 years agoARM: dts: wpcm450: Add pin functions
Jonathan Neuschäfer [Sat, 29 Jan 2022 11:52:26 +0000 (12:52 +0100)]
ARM: dts: wpcm450: Add pin functions

As done in nuvoton-common-npcm7xx.dtsi, this patch adds pinmux nodes for
all pin functions to nuvoton-wpcm450.dtsi.

Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Link: https://lore.kernel.org/r/20220129115228.2257310-8-j.neuschaefer@gmx.net
Signed-off-by: Joel Stanley <joel@jms.id.au>
2 years agoARM: dts: wpcm450: Add pinctrl and GPIO nodes
Jonathan Neuschäfer [Sat, 29 Jan 2022 11:52:25 +0000 (12:52 +0100)]
ARM: dts: wpcm450: Add pinctrl and GPIO nodes

This patch adds the pin controller and GPIO banks to the devicetree for the
WPCM450 SoC.

Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Link: https://lore.kernel.org/r/20220129115228.2257310-7-j.neuschaefer@gmx.net
Signed-off-by: Joel Stanley <joel@jms.id.au>
2 years agoARM: dts: wpcm450: Add global control registers (GCR) node
Jonathan Neuschäfer [Sat, 29 Jan 2022 11:52:22 +0000 (12:52 +0100)]
ARM: dts: wpcm450: Add global control registers (GCR) node

The Global Control Registers (GCR) are a block of registers in Nuvoton
SoCs that expose misc functionality such as chip model and version
information or pinmux settings.

This patch adds a GCR node to nuvoton-wpcm450.dtsi in preparation for
enabling pinctrl on this SoC.

Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Link: https://lore.kernel.org/r/20220129115228.2257310-4-j.neuschaefer@gmx.net
Signed-off-by: Joel Stanley <joel@jms.id.au>
2 years agoMAINTAINERS: Match all of bindings/arm/npcm/ as part of NPCM architecture
Jonathan Neuschäfer [Sat, 29 Jan 2022 11:52:21 +0000 (12:52 +0100)]
MAINTAINERS: Match all of bindings/arm/npcm/ as part of NPCM architecture

All files in Documentation/devicetree/bindings/arm/npcm/ belong to the
Nuvoton NPCM architecture, even when their names might not spell it out
explicitly.

Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Link: https://lore.kernel.org/r/20220129115228.2257310-3-j.neuschaefer@gmx.net
Signed-off-by: Joel Stanley <joel@jms.id.au>
2 years agodt-bindings: arm/npcm: Add binding for global control registers (GCR)
Jonathan Neuschäfer [Sat, 29 Jan 2022 11:52:20 +0000 (12:52 +0100)]
dt-bindings: arm/npcm: Add binding for global control registers (GCR)

A nuvoton,*-gcr node is present in nuvoton-common-npcm7xx.dtsi and will
be added to nuvoton-wpcm450.dtsi. It is necessary for the NPCM7xx and
WPCM450 pinctrl drivers, and may later be used to retrieve SoC model and
version information.

This patch adds a binding to describe this node.

Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20220129115228.2257310-2-j.neuschaefer@gmx.net
Signed-off-by: Joel Stanley <joel@jms.id.au>
2 years agoARM: dts: Drop serial 1 alias on GW7001
Linus Walleij [Tue, 1 Feb 2022 00:05:54 +0000 (01:05 +0100)]
ARM: dts: Drop serial 1 alias on GW7001

The Gateaway 7001 has a serial port alias for serial1, this has
proven detrimental on the WG302 so remove it on this machine
as well.

Drop in a small comment that this machine is based on IXP422.

Cc: Zoltan HERPAI <wigyori@uid0.hu>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2 years agoARM: dts: ixp42x: Expand syscon register range
Linus Walleij [Wed, 26 Jan 2022 00:26:01 +0000 (01:26 +0100)]
ARM: dts: ixp42x: Expand syscon register range

We have at least 0x30 registers in the IXP42x syscon as
register 0x2c is actively used to read platform features.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2 years agoARM: dts: ixp4xx: Fix up the Netgear WG302 device tree
Linus Walleij [Tue, 28 Dec 2021 00:08:39 +0000 (01:08 +0100)]
ARM: dts: ixp4xx: Fix up the Netgear WG302 device tree

The version we can support (because of access to the hardware)
is WG302v1, so rename the file and make the following
modifications:

- We have 32MB memory not 16MB
- The default console speed is 9600 baud so use this
- The device has no ATA disk nor USB so drop the /dev/sda1
  default mount, this needs to mount ramdisk or NFS
- Both serial0 and serial1 cannot be assigned with aliases,
  just assign serial0
- The Flash is just 8MB so augment the size
- The Flash FIS index is at eraseblock 0x3f
- The PHY is at MDIO address 30

Tested by bringing the Netgear WG302v1 up to userspace using
initramfs appended to the kernel and downloaded over TFTP,
then ifconfig to bring up eth0 and pinging the host. All
works fine including SSH into the device from the host.

Cc: Zoltan HERPAI <wigyori@uid0.hu>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2 years agoARM: dts: ux500: Correct Janice accel mount matrix
Linus Walleij [Sat, 20 Nov 2021 00:19:24 +0000 (01:19 +0100)]
ARM: dts: ux500: Correct Janice accel mount matrix

The Z axis is actually correct: do not invert it.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2 years agoARM: dts: ux500: Update AB850[05] nodes
Linus Walleij [Sat, 15 Jan 2022 00:27:43 +0000 (01:27 +0100)]
ARM: dts: ux500: Update AB850[05] nodes

The new YAML device tree bindings gives new and proper names
to several of the AB850[05] nodes and redefines the way we
use numbering on PWMs to use reg.

Update all the DTS nodes accordingly.

Add the missing thermal node to the AB8505.

Drop the debugfs nodes because these are not real devices.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2 years agoARM: dts: AB8505: Enable charging options
Linus Walleij [Wed, 5 Jan 2022 23:40:37 +0000 (00:40 +0100)]
ARM: dts: AB8505: Enable charging options

These are not disabled on the AB8500 and after testing we
see they work fine, so enable them on AB8505 too.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2 years agoARM: dts: mstar: Add board for 100ask DongShanPiOne
Daniel Palmer [Thu, 9 Dec 2021 11:15:20 +0000 (20:15 +0900)]
ARM: dts: mstar: Add board for 100ask DongShanPiOne

The DongShanPiOne is little SigmaStar SSD202D based module
from 100ask.

Add an initial dts for this board.

Link: http://linux-chenxing.org/infinity2/dongshanpione/
Signed-off-by: Daniel Palmer <daniel@0x0f.com>
2 years agodt-bindings: arm: mstar: Add compatible for 100ask DongShanPiOne
Daniel Palmer [Thu, 9 Dec 2021 10:44:31 +0000 (19:44 +0900)]
dt-bindings: arm: mstar: Add compatible for 100ask DongShanPiOne

The DongShanPiOne is a SigmaStar SSD202D based module.
Add a compatible for it to the list of infinity2m boards.

Link: http://linux-chenxing.org/infinity2/dongshanpione/
Signed-off-by: Daniel Palmer <daniel@0x0f.com>
Acked-by: Rob Herring <robh@kernel.org>
2 years agodt-bindings: vendor-prefixes: Add prefix for 100ask
Daniel Palmer [Thu, 9 Dec 2021 10:39:07 +0000 (19:39 +0900)]
dt-bindings: vendor-prefixes: Add prefix for 100ask

100ask is Linux SBC/module/training provider.
Add a prefix for them.

Link: https://www.100ask.net
Signed-off-by: Daniel Palmer <daniel@0x0f.com>
Acked-by: Rob Herring <robh@kernel.org>
2 years agoARM: dts: mstar: Add a dts for Miyoo Mini
Daniel Palmer [Mon, 13 Dec 2021 09:54:15 +0000 (18:54 +0900)]
ARM: dts: mstar: Add a dts for Miyoo Mini

Miyoo has released a portable retro games machine based
on the SigmaStar SSD202D. Add the initial device tree
for this machine. Just enough to get to an initramfs
shell.

Link: http://linux-chenxing.org/infinity2/miyoomini/
Signed-off-by: Daniel Palmer <daniel@0x0f.com>
2 years agodt-bindings: arm: mstar: Add compatible for Miyoo Mini
Daniel Palmer [Mon, 13 Dec 2021 09:54:10 +0000 (18:54 +0900)]
dt-bindings: arm: mstar: Add compatible for Miyoo Mini

The Miyoo Mini is a SigmaStar SSD202D based retro emulation
device.

Add a compatible for it to the list of infinity2m devices.

Link: http://linux-chenxing.org/infinity2/miyoomini/
Signed-off-by: Daniel Palmer <daniel@0x0f.com>
Acked-by: Rob Herring <robh@kernel.org>
2 years agodt-bindings: vendor-prefixes: Add prefix for Miyoo
Daniel Palmer [Mon, 13 Dec 2021 09:54:03 +0000 (18:54 +0900)]
dt-bindings: vendor-prefixes: Add prefix for Miyoo

Add a prefix for "miyoo". The only details I can find about
the company is their aliexpress store "miyoo global store":
https://www.aliexpress.com/store/912663639

Signed-off-by: Daniel Palmer <daniel@0x0f.com>
Acked-by: Rob Herring <robh@kernel.org>
2 years agoARM: dts: mstar: Add the Wireless Tag IDO-SBC2D06-V1B-22W
Romain Perier [Thu, 23 Sep 2021 17:07:47 +0000 (19:07 +0200)]
ARM: dts: mstar: Add the Wireless Tag IDO-SBC2D06-V1B-22W

The Wireless Tag IDO-SBC2D06-V1B-22W[1] is an SBC powered by SSD202D
with a dual Ethernet and a connector for a 4-inch and 7-inch display.
It embeds a System-On-Module IDO-SOM2D01[2] with an Mstar SSD202 SoC
dual-core Cortex-A7 CPU @ 1.2Ghz , 2D GPU, 128 MB DDR3 (on-chip) and
a 256MB SPI NAND flash. This commit adds basic definition for this
board.

1. http://linux-chenxing.org/infinity2/ido-sbc2d06
2. http://www.wireless-tag.com/portfolio/ido-som2d01

Signed-off-by: Romain Perier <romain.perier@gmail.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Daniel Palmer <daniel@0x0f.com>
2 years agodt-bindings: add vendor prefix for Wireless Tag
Romain Perier [Thu, 23 Sep 2021 17:07:46 +0000 (19:07 +0200)]
dt-bindings: add vendor prefix for Wireless Tag

This adds a vendor prefix for wireless tag boards and SOMs.

Signed-off-by: Romain Perier <romain.perier@gmail.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Daniel Palmer <daniel@0x0f.com>
2 years agoARM: dts: mstar: Set gpio compatible for ssd20xd
Daniel Palmer [Sat, 17 Jul 2021 04:56:22 +0000 (13:56 +0900)]
ARM: dts: mstar: Set gpio compatible for ssd20xd

Now there is gpio support for ssd20xd set the right compatible in the gpio node.

Signed-off-by: Daniel Palmer <daniel@0x0f.com>
Reviewed-by: Romain Perier <romain.perier@gmail.com>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
2 years agoARM: dts: socfpga: cyclone5: align regulator node with dtschema
Dinh Nguyen [Tue, 1 Feb 2022 17:12:08 +0000 (11:12 -0600)]
ARM: dts: socfpga: cyclone5: align regulator node with dtschema

Fixes dtbs_check warnings like:

'3-3-v-regulator' does not match any of the regexes: '.*-names$'

Cc: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>:wq
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
2 years agoARM: dts: socfpga: arria10: align regulator node with dtschema
Dinh Nguyen [Mon, 31 Jan 2022 16:05:31 +0000 (10:05 -0600)]
ARM: dts: socfpga: arria10: align regulator node with dtschema

Fixes dtbs_check warnings like:

'3-3-v-regulator' does not match any of the regexes: '.*-names$'

Cc: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Reported-by: kernel test robot <lkp@intel.com>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
---
v2: fix compile error

2 years agoarm64: dts: agilex: align pl330 node name with dtschema
Krzysztof Kozlowski [Sat, 29 Jan 2022 17:55:35 +0000 (18:55 +0100)]
arm64: dts: agilex: align pl330 node name with dtschema

Fixes dtbs_check warnings like:

  pdma@ffda0000: $nodename:0: 'pdma@ffda0000' does not match '^dma-controller(@.*)?$'

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
2 years agoarm64: dts: stratix10: align pl330 node name with dtschema
Krzysztof Kozlowski [Sat, 29 Jan 2022 17:55:34 +0000 (18:55 +0100)]
arm64: dts: stratix10: align pl330 node name with dtschema

Fixes dtbs_check warnings like:

  pdma@ffda0000: $nodename:0: 'pdma@ffda0000' does not match '^dma-controller(@.*)?$'

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
2 years agoarm64: dts: intel: socfpga_agilex_socdk: align LED node names with dtschema
Krzysztof Kozlowski [Wed, 26 Jan 2022 17:41:57 +0000 (18:41 +0100)]
arm64: dts: intel: socfpga_agilex_socdk: align LED node names with dtschema

Align the LED node names with dtschema to silence dtbs_check warnings
like:

    leds: 'hps0', 'hps1', 'hps2' do not match any of the regexes: '(^led-[0-9a-f]$|led)', 'pinctrl-[0-9]+'

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
2 years agoarm64: dts: agilex: align mmc node names with dtschema
Krzysztof Kozlowski [Mon, 27 Dec 2021 13:35:58 +0000 (14:35 +0100)]
arm64: dts: agilex: align mmc node names with dtschema

The Synopsys DW MSHC bindings require node name to be 'mmc':

  dwmmc0@ff808000: $nodename:0: 'dwmmc0@ff808000' does not match '^mmc(@.*)?$'

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
2 years agoarm64: dts: agilex: add board compatible for N5X DK
Krzysztof Kozlowski [Mon, 27 Dec 2021 13:35:57 +0000 (14:35 +0100)]
arm64: dts: agilex: add board compatible for N5X DK

The Intel SoCFPGA N5X SoC Development Kit is a board with
Agilex, so it needs its own compatible.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
2 years agoarm64: dts: agilex: add board compatible for SoCFPGA DK
Krzysztof Kozlowski [Mon, 27 Dec 2021 13:35:56 +0000 (14:35 +0100)]
arm64: dts: agilex: add board compatible for SoCFPGA DK

The Intel SoCFPGA Agilex 10 SoC Development Kit is a board with
Agilex, so it needs its own compatible.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
2 years agoarm64: dts: stratix10: align regulator node names with dtschema
Krzysztof Kozlowski [Mon, 27 Dec 2021 13:35:55 +0000 (14:35 +0100)]
arm64: dts: stratix10: align regulator node names with dtschema

The devicetree specification requires that node name should be generic.
The dtschema complains if name does not match pattern, so make the
0.33 V regulator node name more generic.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
2 years agoarm64: dts: stratix10: align mmc node names with dtschema
Krzysztof Kozlowski [Mon, 27 Dec 2021 13:35:54 +0000 (14:35 +0100)]
arm64: dts: stratix10: align mmc node names with dtschema

The Synopsys DW MSHC bindings require node name to be 'mmc':

  dwmmc0@ff808000: $nodename:0: 'dwmmc0@ff808000' does not match '^mmc(@.*)?$'

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
2 years agoarm64: dts: stratix10: move ARM timer out of SoC node
Krzysztof Kozlowski [Mon, 27 Dec 2021 13:35:53 +0000 (14:35 +0100)]
arm64: dts: stratix10: move ARM timer out of SoC node

The ARM timer is usually considered not part of SoC node, just like
other ARM designed blocks (PMU, PSCI).  This fixes dtbs_check warning:

  arch/arm64/boot/dts/altera/socfpga_stratix10_socdk.dt.yaml: soc: timer:
    {'compatible': ['arm,armv8-timer'], 'interrupts': [[1, 13, 3848], [1, 14, 3848], [1, 11, 3848], [1, 10, 3848]]} should not be valid under {'type': 'object'}
    From schema: dtschema/schemas/simple-bus.yaml

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
2 years agoarm64: dts: stratix10: add board compatible for SoCFPGA DK
Krzysztof Kozlowski [Mon, 27 Dec 2021 13:35:52 +0000 (14:35 +0100)]
arm64: dts: stratix10: add board compatible for SoCFPGA DK

The Altera SoCFPGA Stratix 10 SoC Development Kit is a board with
Stratix 10, so it needs its own compatible.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
2 years agoARM: dts: arria10: add board compatible for SoCFPGA DK
Krzysztof Kozlowski [Mon, 27 Dec 2021 13:35:51 +0000 (14:35 +0100)]
ARM: dts: arria10: add board compatible for SoCFPGA DK

The Altera SoCFPGA Arria 10 SoC Development Kit is a board with Arria 10,
so it needs its own compatible.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
2 years agoARM: dts: arria10: add board compatible for Mercury AA1
Krzysztof Kozlowski [Mon, 27 Dec 2021 13:35:50 +0000 (14:35 +0100)]
ARM: dts: arria10: add board compatible for Mercury AA1

The Enclustra Mercury AA1 is a module with Arria 10, so it needs its own
compatible.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
2 years agoARM: dts: arria5: add board compatible for SoCFPGA DK
Krzysztof Kozlowski [Mon, 27 Dec 2021 13:35:49 +0000 (14:35 +0100)]
ARM: dts: arria5: add board compatible for SoCFPGA DK

The Altera SoCFPGA Arria V SoC Development Kit is a board with Arria 5,
so it needs its own compatible.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
2 years agodt-bindings: clock: intel,stratix10: convert to dtschema
Krzysztof Kozlowski [Mon, 27 Dec 2021 13:35:47 +0000 (14:35 +0100)]
dt-bindings: clock: intel,stratix10: convert to dtschema

Convert the Intel Stratix 10 clock controller bindings to DT schema format.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
2 years agodt-bindings: intel: document Agilex based board compatibles
Krzysztof Kozlowski [Mon, 27 Dec 2021 13:35:46 +0000 (14:35 +0100)]
dt-bindings: intel: document Agilex based board compatibles

Add new compatible for Agilex based boards.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
2 years agodt-bindings: altera: document Stratix 10 based board compatibles
Krzysztof Kozlowski [Mon, 27 Dec 2021 13:35:32 +0000 (14:35 +0100)]
dt-bindings: altera: document Stratix 10 based board compatibles

Add new compatible for Stratix 10 based boards.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
2 years agodt-bindings: altera: document VT compatibles
Krzysztof Kozlowski [Mon, 27 Dec 2021 13:31:17 +0000 (14:31 +0100)]
dt-bindings: altera: document VT compatibles

Add new compatible for SoCFPGA VT boards/designs.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
2 years agodt-bindings: altera: document Arria 10 based board compatibles
Krzysztof Kozlowski [Mon, 27 Dec 2021 13:31:16 +0000 (14:31 +0100)]
dt-bindings: altera: document Arria 10 based board compatibles

Add new compatible for Arria 10 based boards.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
2 years agodt-bindings: altera: document Arria 5 based board compatibles
Krzysztof Kozlowski [Mon, 27 Dec 2021 13:31:15 +0000 (14:31 +0100)]
dt-bindings: altera: document Arria 5 based board compatibles

Add new compatible for Arria 5 based boards.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
2 years agodt-bindings: altera: document existing Cyclone 5 board compatibles
Krzysztof Kozlowski [Mon, 27 Dec 2021 13:31:14 +0000 (14:31 +0100)]
dt-bindings: altera: document existing Cyclone 5 board compatibles

Several Cyclone 5 SoCFPGA based boards have additional board compatibles
which are not documented in the bindings.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
2 years agoarm64: dts: renesas: rzg2lc-smarc: Use SW_SD0_DEV_SEL macro for eMMC/SDHI device...
Biju Das [Fri, 4 Feb 2022 14:31:32 +0000 (14:31 +0000)]
arm64: dts: renesas: rzg2lc-smarc: Use SW_SD0_DEV_SEL macro for eMMC/SDHI device selection

This patch replaces EMMC/SDHI macros with SW_SD0_DEV_SEL DIP-Switch
macro for eMMC/SDHI device selection.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Link: https://lore.kernel.org/r/20220204143132.3608-1-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2 years agoarm64: dts: renesas: rzg2lc-smarc: Enable CANFD channel 1
Biju Das [Thu, 3 Feb 2022 17:06:36 +0000 (17:06 +0000)]
arm64: dts: renesas: rzg2lc-smarc: Enable CANFD channel 1

On RZ/G2LC SMARC EVK, CAN0 is not populated.

CAN1 is multiplexed with SCIF1 using SW1[3] or RSPI using SW1[4].

This patch adds support for the CAN1 interface on RZ/G2LC SMARC EVK.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/20220203170636.7747-5-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2 years agoarm64: dts: renesas: rzg2lc-smarc: Enable SCIF1 on carrier board
Biju Das [Thu, 3 Feb 2022 17:06:35 +0000 (17:06 +0000)]
arm64: dts: renesas: rzg2lc-smarc: Enable SCIF1 on carrier board

SCIF1 interface is available on PMOD1 connector (CN7) on carrier board.

This patch adds pinmux and scif1 node to carrier board dtsi file for
RZ/G2LC SMARC EVK.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/20220203170636.7747-4-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2 years agoarm64: dts: renesas: rzg2lc-smarc: Add macros for DIP-Switch settings
Biju Das [Thu, 3 Feb 2022 17:06:34 +0000 (17:06 +0000)]
arm64: dts: renesas: rzg2lc-smarc: Add macros for DIP-Switch settings

RZ/G2LC SoM uses DIP-SWitch SW1 for various pin multiplexing functions.

This patch describes DIP-SWitch SW1 settings on SoM and adds the
corresponding macros for enabling pinmux functionality on RZ/G2LC
SMARC EVK.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/20220203170636.7747-3-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2 years agoarm64: dts: renesas: rzg2l-smarc: Add common dtsi file
Biju Das [Thu, 3 Feb 2022 17:06:33 +0000 (17:06 +0000)]
arm64: dts: renesas: rzg2l-smarc: Add common dtsi file

RZ/{G2L,V2L} and G2LC SoC use the same carrier board, but the SoM is
different.

Different pin mapping is possible on SoM. For eg:- RZ/G2L SMARC EVK
uses SCIF2, whereas RZ/G2LC uses SCIF1 for the serial interface available
on PMOD1.

This patch adds support for handling the pin mapping differences by moving
definitions common to RZ/G2L and RZ/G2LC to a common dtsi file.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/20220203170636.7747-2-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2 years agoLinux 5.17-rc3
Linus Torvalds [Sun, 6 Feb 2022 20:20:50 +0000 (12:20 -0800)]
Linux 5.17-rc3

2 years agoMerge tag 'ext4_for_linus_stable' of git://git.kernel.org/pub/scm/linux/kernel/git...
Linus Torvalds [Sun, 6 Feb 2022 18:34:45 +0000 (10:34 -0800)]
Merge tag 'ext4_for_linus_stable' of git://git./linux/kernel/git/tytso/ext4

Pull ext4 fixes from Ted Ts'o:
 "Various bug fixes for ext4 fast commit and inline data handling.

  Also fix regression introduced as part of moving to the new mount API"

* tag 'ext4_for_linus_stable' of git://git.kernel.org/pub/scm/linux/kernel/git/tytso/ext4:
  fs/ext4: fix comments mentioning i_mutex
  ext4: fix incorrect type issue during replay_del_range
  jbd2: fix kernel-doc descriptions for jbd2_journal_shrink_{scan,count}()
  ext4: fix potential NULL pointer dereference in ext4_fill_super()
  jbd2: refactor wait logic for transaction updates into a common function
  jbd2: cleanup unused functions declarations from jbd2.h
  ext4: fix error handling in ext4_fc_record_modified_inode()
  ext4: remove redundant max inline_size check in ext4_da_write_inline_data_begin()
  ext4: fix error handling in ext4_restore_inline_data()
  ext4: fast commit may miss file actions
  ext4: fast commit may not fallback for ineligible commit
  ext4: modify the logic of ext4_mb_new_blocks_simple
  ext4: prevent used blocks from being allocated during fast commit replay

2 years agoMerge tag 'perf-tools-fixes-for-v5.17-2022-02-06' of git://git.kernel.org/pub/scm...
Linus Torvalds [Sun, 6 Feb 2022 18:18:23 +0000 (10:18 -0800)]
Merge tag 'perf-tools-fixes-for-v5.17-2022-02-06' of git://git./linux/kernel/git/acme/linux

Pull perf tools fixes from Arnaldo Carvalho de Melo:

 - Fix display of grouped aliased events in 'perf stat'.

 - Add missing branch_sample_type to perf_event_attr__fprintf().

 - Apply correct label to user/kernel symbols in branch mode.

 - Fix 'perf ftrace' system_wide tracing, it has to be set before
   creating the maps.

 - Return error if procfs isn't mounted for PID namespaces when
   synthesizing records for pre-existing processes.

 - Set error stream of objdump process for 'perf annotate' TUI, to avoid
   garbling the screen.

 - Add missing arm64 support to perf_mmap__read_self(), the kernel part
   got into 5.17.

 - Check for NULL pointer before dereference writing debug info about a
   sample.

 - Update UAPI copies for asound, perf_event, prctl and kvm headers.

 - Fix a typo in bpf_counter_cgroup.c.

* tag 'perf-tools-fixes-for-v5.17-2022-02-06' of git://git.kernel.org/pub/scm/linux/kernel/git/acme/linux:
  perf ftrace: system_wide collection is not effective by default
  libperf: Add arm64 support to perf_mmap__read_self()
  tools include UAPI: Sync sound/asound.h copy with the kernel sources
  perf stat: Fix display of grouped aliased events
  perf tools: Apply correct label to user/kernel symbols in branch mode
  perf bpf: Fix a typo in bpf_counter_cgroup.c
  perf synthetic-events: Return error if procfs isn't mounted for PID namespaces
  perf session: Check for NULL pointer before dereference
  perf annotate: Set error stream of objdump process for TUI
  perf tools: Add missing branch_sample_type to perf_event_attr__fprintf()
  tools headers UAPI: Sync linux/kvm.h with the kernel sources
  tools headers UAPI: Sync linux/prctl.h with the kernel sources
  perf beauty: Make the prctl arg regexp more strict to cope with PR_SET_VMA
  tools headers cpufeatures: Sync with the kernel sources
  tools headers UAPI: Sync linux/perf_event.h with the kernel sources
  tools include UAPI: Sync sound/asound.h copy with the kernel sources

2 years agoMerge tag 'perf_urgent_for_v5.17_rc3' of git://git.kernel.org/pub/scm/linux/kernel...
Linus Torvalds [Sun, 6 Feb 2022 18:11:14 +0000 (10:11 -0800)]
Merge tag 'perf_urgent_for_v5.17_rc3' of git://git./linux/kernel/git/tip/tip

Pull perf fixes from Borislav Petkov:

 - Intel/PT: filters could crash the kernel

 - Intel: default disable the PMU for SMM, some new-ish EFI firmware has
   started using CPL3 and the PMU CPL filters don't discriminate against
   SMM, meaning that CPL3 (userspace only) events now also count EFI/SMM
   cycles.

 - Fixup for perf_event_attr::sig_data

* tag 'perf_urgent_for_v5.17_rc3' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
  perf/x86/intel/pt: Fix crash with stop filters in single-range mode
  perf: uapi: Document perf_event_attr::sig_data truncation on 32 bit architectures
  selftests/perf_events: Test modification of perf_event_attr::sig_data
  perf: Copy perf_event_attr::sig_data on modification
  x86/perf: Default set FREEZE_ON_SMI for all

2 years agoMerge tag 'objtool_urgent_for_v5.17_rc3' of git://git.kernel.org/pub/scm/linux/kernel...
Linus Torvalds [Sun, 6 Feb 2022 18:04:43 +0000 (10:04 -0800)]
Merge tag 'objtool_urgent_for_v5.17_rc3' of git://git./linux/kernel/git/tip/tip

Pull objtool fix from Borislav Petkov:
 "Fix a potential truncated string warning triggered by gcc12"

* tag 'objtool_urgent_for_v5.17_rc3' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
  objtool: Fix truncated string warning

2 years agoMerge tag 'irq_urgent_for_v5.17_rc3' of git://git.kernel.org/pub/scm/linux/kernel...
Linus Torvalds [Sun, 6 Feb 2022 18:00:40 +0000 (10:00 -0800)]
Merge tag 'irq_urgent_for_v5.17_rc3' of git://git./linux/kernel/git/tip/tip

Pull irq fix from Borislav Petkov:
 "Remove a bogus warning introduced by the recent PCI MSI irq affinity
  overhaul"

* tag 'irq_urgent_for_v5.17_rc3' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
  PCI/MSI: Remove bogus warning in pci_irq_get_affinity()

2 years agoMerge tag 'edac_urgent_for_v5.17_rc3' of git://git.kernel.org/pub/scm/linux/kernel...
Linus Torvalds [Sun, 6 Feb 2022 17:57:39 +0000 (09:57 -0800)]
Merge tag 'edac_urgent_for_v5.17_rc3' of git://git./linux/kernel/git/ras/ras

Pull EDAC fixes from Borislav Petkov:
 "Fix altera and xgene EDAC drivers to propagate the correct error code
  from platform_get_irq() so that deferred probing still works"

* tag 'edac_urgent_for_v5.17_rc3' of git://git.kernel.org/pub/scm/linux/kernel/git/ras/ras:
  EDAC/xgene: Fix deferred probing
  EDAC/altera: Fix deferred probing

2 years agoperf ftrace: system_wide collection is not effective by default
Changbin Du [Thu, 27 Jan 2022 13:20:10 +0000 (21:20 +0800)]
perf ftrace: system_wide collection is not effective by default

The ftrace.target.system_wide must be set before invoking
evlist__create_maps(), otherwise it has no effect.

Fixes: 53be50282269b46c ("perf ftrace: Add 'latency' subcommand")
Signed-off-by: Changbin Du <changbin.du@gmail.com>
Acked-by: Namhyung Kim <namhyung@gmail.com>
Cc: Ingo Molnar <mingo@redhat.com>
Cc: Jiri Olsa <jolsa@redhat.com>
Cc: Namhyung Kim <namhyung@kernel.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Link: https://lore.kernel.org/r/20220127132010.4836-1-changbin.du@gmail.com
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2 years agolibperf: Add arm64 support to perf_mmap__read_self()
Rob Herring [Tue, 1 Feb 2022 21:40:56 +0000 (15:40 -0600)]
libperf: Add arm64 support to perf_mmap__read_self()

Add the arm64 variants for read_perf_counter() and read_timestamp().
Unfortunately the counter number is encoded into the instruction, so the
code is a bit verbose to enumerate all possible counters.

Tested-by: Masayoshi Mizuma <m.mizuma@jp.fujitsu.com>
Signed-off-by: Rob Herring <robh@kernel.org>
Acked-by: Jiri Olsa <jolsa@redhat.com>
Tested-by: John Garry <john.garry@huawei.com>
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
Link: https://lore.kernel.org/r/20220201214056.702854-1-robh@kernel.org
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Arnaldo Carvalho de Melo <acme@kernel.org>
Cc: Namhyung Kim <namhyung@kernel.org>
Cc: Will Deacon <will@kernel.org>
Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Cc: Ingo Molnar <mingo@redhat.com>
Cc: linux-kernel@vger.kernel.org
Cc: linux-perf-users@vger.kernel.org
2 years agotools include UAPI: Sync sound/asound.h copy with the kernel sources
Arnaldo Carvalho de Melo [Wed, 12 Feb 2020 14:04:23 +0000 (11:04 -0300)]
tools include UAPI: Sync sound/asound.h copy with the kernel sources

Picking the changes from:

  06feec6005c9d950 ("ASoC: hdmi-codec: Fix OOB memory accesses")

Which entails no changes in the tooling side as it doesn't introduce new
SNDRV_PCM_IOCTL_ ioctls.

To silence this perf tools build warning:

  Warning: Kernel ABI header at 'tools/include/uapi/sound/asound.h' differs from latest version at 'include/uapi/sound/asound.h'
  diff -u tools/include/uapi/sound/asound.h include/uapi/sound/asound.h

Cc: Dmitry Osipenko <digetx@gmail.com>
Cc: Mark Brown <broonie@kernel.org>
Cc: Takashi Iwai <tiwai@suse.de>
Link: https://lore.kernel.org/lkml/Yf+6OT+2eMrYDEeX@kernel.org
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2 years agoperf stat: Fix display of grouped aliased events
Ian Rogers [Sat, 5 Feb 2022 01:09:41 +0000 (17:09 -0800)]
perf stat: Fix display of grouped aliased events

An event may have a number of uncore aliases that when added to the
evlist are consecutive.

If there are multiple uncore events in a group then
parse_events__set_leader_for_uncore_aliase will reorder the evlist so
that events on the same PMU are adjacent.

The collect_all_aliases function assumes that aliases are in blocks so
that only the first counter is printed and all others are marked merged.

The reordering for groups breaks the assumption and so all counts are
printed.

This change removes the assumption from collect_all_aliases
that the events are in blocks and instead processes the entire evlist.

Before:

  ```
  $ perf stat -e '{UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_REMOTE,UNC_CHA_TOR_INSERTS.IA_MISS_DRD_REMOTE},duration_time' -a -A -- sleep 1

   Performance counter stats for 'system wide':

  CPU0                  256,866      UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_REMOTE
  CPU36                 494,413      UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_REMOTE
  CPU0                      967      UNC_CHA_TOR_INSERTS.IA_MISS_DRD_REMOTE
  CPU36                   1,738      UNC_CHA_TOR_INSERTS.IA_MISS_DRD_REMOTE
  CPU0                  285,161      UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_REMOTE
  CPU36                 429,920      UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_REMOTE
  CPU0                      955      UNC_CHA_TOR_INSERTS.IA_MISS_DRD_REMOTE
  CPU36                   1,443      UNC_CHA_TOR_INSERTS.IA_MISS_DRD_REMOTE
  CPU0                  310,753      UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_REMOTE
  CPU36                 416,657      UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_REMOTE
  CPU0                    1,231      UNC_CHA_TOR_INSERTS.IA_MISS_DRD_REMOTE
  CPU36                   1,573      UNC_CHA_TOR_INSERTS.IA_MISS_DRD_REMOTE
  CPU0                  416,067      UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_REMOTE
  CPU36                 405,966      UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_REMOTE
  CPU0                    1,481      UNC_CHA_TOR_INSERTS.IA_MISS_DRD_REMOTE
  CPU36                   1,447      UNC_CHA_TOR_INSERTS.IA_MISS_DRD_REMOTE
  CPU0                  312,911      UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_REMOTE
  CPU36                 408,154      UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_REMOTE
  CPU0                    1,086      UNC_CHA_TOR_INSERTS.IA_MISS_DRD_REMOTE
  CPU36                   1,380      UNC_CHA_TOR_INSERTS.IA_MISS_DRD_REMOTE
  CPU0                  333,994      UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_REMOTE
  CPU36                 370,349      UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_REMOTE
  CPU0                    1,287      UNC_CHA_TOR_INSERTS.IA_MISS_DRD_REMOTE
  CPU36                   1,335      UNC_CHA_TOR_INSERTS.IA_MISS_DRD_REMOTE
  CPU0                  188,107      UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_REMOTE
  CPU36                 302,423      UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_REMOTE
  CPU0                      701      UNC_CHA_TOR_INSERTS.IA_MISS_DRD_REMOTE
  CPU36                   1,070      UNC_CHA_TOR_INSERTS.IA_MISS_DRD_REMOTE
  CPU0                  307,221      UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_REMOTE
  CPU36                 383,642      UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_REMOTE
  CPU0                    1,036      UNC_CHA_TOR_INSERTS.IA_MISS_DRD_REMOTE
  CPU36                   1,158      UNC_CHA_TOR_INSERTS.IA_MISS_DRD_REMOTE
  CPU0                  318,479      UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_REMOTE
  CPU36                 821,545      UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_REMOTE
  CPU0                    1,028      UNC_CHA_TOR_INSERTS.IA_MISS_DRD_REMOTE
  CPU36                   2,550      UNC_CHA_TOR_INSERTS.IA_MISS_DRD_REMOTE
  CPU0                  227,618      UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_REMOTE
  CPU36                 372,272      UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_REMOTE
  CPU0                      903      UNC_CHA_TOR_INSERTS.IA_MISS_DRD_REMOTE
  CPU36                   1,456      UNC_CHA_TOR_INSERTS.IA_MISS_DRD_REMOTE
  CPU0                  376,783      UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_REMOTE
  CPU36                 419,827      UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_REMOTE
  CPU0                    1,406      UNC_CHA_TOR_INSERTS.IA_MISS_DRD_REMOTE
  CPU36                   1,453      UNC_CHA_TOR_INSERTS.IA_MISS_DRD_REMOTE
  CPU0                  286,583      UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_REMOTE
  CPU36                 429,956      UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_REMOTE
  CPU0                      999      UNC_CHA_TOR_INSERTS.IA_MISS_DRD_REMOTE
  CPU36                   1,436      UNC_CHA_TOR_INSERTS.IA_MISS_DRD_REMOTE
  CPU0                  313,867      UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_REMOTE
  CPU36                 370,159      UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_REMOTE
  CPU0                    1,114      UNC_CHA_TOR_INSERTS.IA_MISS_DRD_REMOTE
  CPU36                   1,291      UNC_CHA_TOR_INSERTS.IA_MISS_DRD_REMOTE
  CPU0                  342,083      UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_REMOTE
  CPU36                 409,111      UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_REMOTE
  CPU0                    1,399      UNC_CHA_TOR_INSERTS.IA_MISS_DRD_REMOTE
  CPU36                   1,684      UNC_CHA_TOR_INSERTS.IA_MISS_DRD_REMOTE
  CPU0                  365,828      UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_REMOTE
  CPU36                 376,037      UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_REMOTE
  CPU0                    1,378      UNC_CHA_TOR_INSERTS.IA_MISS_DRD_REMOTE
  CPU36                   1,411      UNC_CHA_TOR_INSERTS.IA_MISS_DRD_REMOTE
  CPU0                  382,456      UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_REMOTE
  CPU36                 621,743      UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_REMOTE
  CPU0                    1,232      UNC_CHA_TOR_INSERTS.IA_MISS_DRD_REMOTE
  CPU36                   1,955      UNC_CHA_TOR_INSERTS.IA_MISS_DRD_REMOTE
  CPU0                  342,316      UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_REMOTE
  CPU36                 385,067      UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_REMOTE
  CPU0                    1,176      UNC_CHA_TOR_INSERTS.IA_MISS_DRD_REMOTE
  CPU36                   1,268      UNC_CHA_TOR_INSERTS.IA_MISS_DRD_REMOTE
  CPU0                  373,588      UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_REMOTE
  CPU36                 386,163      UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_REMOTE
  CPU0                    1,394      UNC_CHA_TOR_INSERTS.IA_MISS_DRD_REMOTE
  CPU36                   1,464      UNC_CHA_TOR_INSERTS.IA_MISS_DRD_REMOTE
  CPU0                  381,206      UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_REMOTE
  CPU36                 546,891      UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_REMOTE
  CPU0                    1,266      UNC_CHA_TOR_INSERTS.IA_MISS_DRD_REMOTE
  CPU36                   1,712      UNC_CHA_TOR_INSERTS.IA_MISS_DRD_REMOTE
  CPU0                  221,176      UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_REMOTE
  CPU36                 392,069      UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_REMOTE
  CPU0                      831      UNC_CHA_TOR_INSERTS.IA_MISS_DRD_REMOTE
  CPU36                   1,456      UNC_CHA_TOR_INSERTS.IA_MISS_DRD_REMOTE
  CPU0                  355,401      UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_REMOTE
  CPU36                 705,595      UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_REMOTE
  CPU0                    1,235      UNC_CHA_TOR_INSERTS.IA_MISS_DRD_REMOTE
  CPU36                   2,216      UNC_CHA_TOR_INSERTS.IA_MISS_DRD_REMOTE
  CPU0                  371,436      UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_REMOTE
  CPU36                 428,103      UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_REMOTE
  CPU0                    1,306      UNC_CHA_TOR_INSERTS.IA_MISS_DRD_REMOTE
  CPU36                   1,442      UNC_CHA_TOR_INSERTS.IA_MISS_DRD_REMOTE
  CPU0                  384,352      UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_REMOTE
  CPU36                 504,200      UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_REMOTE
  CPU0                    1,468      UNC_CHA_TOR_INSERTS.IA_MISS_DRD_REMOTE
  CPU36                   1,860      UNC_CHA_TOR_INSERTS.IA_MISS_DRD_REMOTE
  CPU0                  228,856      UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_REMOTE
  CPU36                 287,976      UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_REMOTE
  CPU0                      832      UNC_CHA_TOR_INSERTS.IA_MISS_DRD_REMOTE
  CPU36                   1,060      UNC_CHA_TOR_INSERTS.IA_MISS_DRD_REMOTE
  CPU0                  215,121      UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_REMOTE
  CPU36                 334,162      UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_REMOTE
  CPU0                      681      UNC_CHA_TOR_INSERTS.IA_MISS_DRD_REMOTE
  CPU36                   1,026      UNC_CHA_TOR_INSERTS.IA_MISS_DRD_REMOTE
  CPU0                  296,179      UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_REMOTE
  CPU36                 436,083      UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_REMOTE
  CPU0                    1,084      UNC_CHA_TOR_INSERTS.IA_MISS_DRD_REMOTE
  CPU36                   1,525      UNC_CHA_TOR_INSERTS.IA_MISS_DRD_REMOTE
  CPU0                  262,296      UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_REMOTE
  CPU36                 416,573      UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_REMOTE
  CPU0                      986      UNC_CHA_TOR_INSERTS.IA_MISS_DRD_REMOTE
  CPU36                   1,533      UNC_CHA_TOR_INSERTS.IA_MISS_DRD_REMOTE
  CPU0                  285,852      UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_REMOTE
  CPU36                 359,842      UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_REMOTE
  CPU0                    1,073      UNC_CHA_TOR_INSERTS.IA_MISS_DRD_REMOTE
  CPU36                   1,326      UNC_CHA_TOR_INSERTS.IA_MISS_DRD_REMOTE
  CPU0                  303,379      UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_REMOTE
  CPU36                 367,222      UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_REMOTE
  CPU0                    1,008      UNC_CHA_TOR_INSERTS.IA_MISS_DRD_REMOTE
  CPU36                   1,156      UNC_CHA_TOR_INSERTS.IA_MISS_DRD_REMOTE
  CPU0                  273,487      UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_REMOTE
  CPU36                 425,449      UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_REMOTE
  CPU0                      932      UNC_CHA_TOR_INSERTS.IA_MISS_DRD_REMOTE
  CPU36                   1,367      UNC_CHA_TOR_INSERTS.IA_MISS_DRD_REMOTE
  CPU0                  297,596      UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_REMOTE
  CPU36                 414,793      UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_REMOTE
  CPU0                    1,140      UNC_CHA_TOR_INSERTS.IA_MISS_DRD_REMOTE
  CPU36                   1,601      UNC_CHA_TOR_INSERTS.IA_MISS_DRD_REMOTE
  CPU0                  342,365      UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_REMOTE
  CPU36                 360,422      UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_REMOTE
  CPU0                    1,291      UNC_CHA_TOR_INSERTS.IA_MISS_DRD_REMOTE
  CPU36                   1,342      UNC_CHA_TOR_INSERTS.IA_MISS_DRD_REMOTE
  CPU0                  327,196      UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_REMOTE
  CPU36                 580,858      UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_REMOTE
  CPU0                    1,122      UNC_CHA_TOR_INSERTS.IA_MISS_DRD_REMOTE
  CPU36                   2,014      UNC_CHA_TOR_INSERTS.IA_MISS_DRD_REMOTE
  CPU0                  296,564      UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_REMOTE
  CPU36                 452,817      UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_REMOTE
  CPU0                    1,087      UNC_CHA_TOR_INSERTS.IA_MISS_DRD_REMOTE
  CPU36                   1,694      UNC_CHA_TOR_INSERTS.IA_MISS_DRD_REMOTE
  CPU0                  375,002      UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_REMOTE
  CPU36                 389,393      UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_REMOTE
  CPU0                    1,478      UNC_CHA_TOR_INSERTS.IA_MISS_DRD_REMOTE
  CPU36                   1,540      UNC_CHA_TOR_INSERTS.IA_MISS_DRD_REMOTE
  CPU0                  365,213      UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_REMOTE
  CPU36                 594,685      UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_REMOTE
  CPU0                    1,401      UNC_CHA_TOR_INSERTS.IA_MISS_DRD_REMOTE
  CPU36                   2,222      UNC_CHA_TOR_INSERTS.IA_MISS_DRD_REMOTE
  CPU0            1,000,749,060 ns   duration_time

         1.000749060 seconds time elapsed
  ```

After:

  ```
   Performance counter stats for 'system wide':

  CPU0               20,547,434      UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_REMOTE
  CPU36              45,202,862      UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_REMOTE
  CPU0                   82,001      UNC_CHA_TOR_INSERTS.IA_MISS_DRD_REMOTE
  CPU36                 159,688      UNC_CHA_TOR_INSERTS.IA_MISS_DRD_REMOTE
  CPU0            1,000,464,828 ns   duration_time

         1.000464828 seconds time elapsed
  ```

Fixes: 3cdc5c2cb924acb4 ("perf parse-events: Handle uncore event aliases in small groups properly")
Reviewed-by: Andi Kleen <ak@linux.intel.com>
Signed-off-by: Ian Rogers <irogers@google.com>
Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Cc: Alexandre Torgue <alexandre.torgue@foss.st.com>
Cc: Asaf Yaffe <asaf.yaffe@intel.com>
Cc: Caleb Biggers <caleb.biggers@intel.com>
Cc: Ingo Molnar <mingo@redhat.com>
Cc: James Clark <james.clark@arm.com>
Cc: Jiri Olsa <jolsa@redhat.com>
Cc: John Garry <john.garry@huawei.com>
Cc: Kan Liang <kan.liang@linux.intel.com>
Cc: Kshipra Bopardikar <kshipra.bopardikar@intel.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Maxime Coquelin <mcoquelin.stm32@gmail.com>
Cc: Namhyung Kim <namhyung@kernel.org>
Cc: Perry Taylor <perry.taylor@intel.com>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Stephane Eranian <eranian@google.com>
Cc: Vineet Singh <vineet.singh@intel.com>
Cc: Zhengjun Xing <zhengjun.xing@linux.intel.com>
Link: https://lore.kernel.org/r/20220205010941.1065469-1-irogers@google.com
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2 years agoperf tools: Apply correct label to user/kernel symbols in branch mode
German Gomez [Wed, 26 Jan 2022 10:59:26 +0000 (10:59 +0000)]
perf tools: Apply correct label to user/kernel symbols in branch mode

In branch mode, the branch symbols were being displayed with incorrect
cpumode labels. So fix this.

For example, before:
  # perf record -b -a -- sleep 1
  # perf report -b

  Overhead  Command  Source Shared Object  Source Symbol               Target Symbol
     0.08%  swapper  [kernel.kallsyms]     [k] rcu_idle_enter          [k] cpuidle_enter_state
 ==> 0.08%  cmd0     [kernel.kallsyms]     [.] psi_group_change        [.] psi_group_change
     0.08%  cmd1     [kernel.kallsyms]     [k] psi_group_change        [k] psi_group_change

After:
  # perf report -b

  Overhead  Command  Source Shared Object  Source Symbol               Target Symbol
     0.08%  swapper  [kernel.kallsyms]     [k] rcu_idle_enter          [k] cpuidle_enter_state
     0.08%  cmd0     [kernel.kallsyms]     [k] psi_group_change        [k] pei_group_change
     0.08%  cmd1     [kernel.kallsyms]     [k] psi_group_change        [k] psi_group_change

Reviewed-by: James Clark <james.clark@arm.com>
Signed-off-by: German Gomez <german.gomez@arm.com>
Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Cc: Jiri Olsa <jolsa@redhat.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Namhyung Kim <namhyung@kernel.org>
Link: https://lore.kernel.org/r/20220126105927.3411216-1-german.gomez@arm.com
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2 years agoperf bpf: Fix a typo in bpf_counter_cgroup.c
Masanari Iida [Sat, 25 Dec 2021 00:55:58 +0000 (09:55 +0900)]
perf bpf: Fix a typo in bpf_counter_cgroup.c

This patch fixes a spelling typo in error message.

Signed-off-by: Masanari Iida <standby24x7@gmail.com>
Acked-by: Namhyung Kim <namhyung@kernel.org>
Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Cc: Ingo Molnar <mingo@redhat.com>
Cc: Jiri Olsa <jolsa@redhat.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Peter Zijlstra <peterz@infradead.org>
Link: https://lore.kernel.org/r/20211225005558.503935-1-standby24x7@gmail.com
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2 years agoperf synthetic-events: Return error if procfs isn't mounted for PID namespaces
Leo Yan [Fri, 24 Dec 2021 12:40:13 +0000 (20:40 +0800)]
perf synthetic-events: Return error if procfs isn't mounted for PID namespaces

For perf recording, it retrieves process info by iterating nodes in proc
fs.  If we run perf in a non-root PID namespace with command:

  # unshare --fork --pid perf record -e cycles -a -- test_program

... in this case, unshare command creates a child PID namespace and
launches perf tool in it, but the issue is the proc fs is not mounted
for the non-root PID namespace, this leads to the perf tool gathering
process info from its parent PID namespace.

We can use below command to observe the process nodes under proc fs:

  # unshare --pid --fork ls /proc
1    137   1968  2128  3    342  48  62   78      crypto   kcore        net       uptime
10   138   2  2142  30   35  49  63   8      devices   keys        pagetypeinfo   version
11   139   20  2143  304  36  50  64   82      device-tree  key-users    partitions     vmallocinfo
12   14    2011  22    305  37  51  65   83      diskstats   kmsg        self       vmstat
128  140   2038  23    307  39  52  656  84      driver   kpagecgroup  slabinfo       zoneinfo
129  15    2074  24    309  4  53  67   9      execdomains  kpagecount   softirqs
13   16    2094  241   31   40  54  68   asound     fb   kpageflags   stat
130  164   2096  242   310  41  55  69   buddyinfo  filesystems  loadavg      swaps
131  17    2098  25    317  42  56  70   bus      fs   locks        sys
132  175   21  26    32   43  57  71   cgroups    interrupts   meminfo      sysrq-trigger
133  179   2102  263   329  44  58  75   cmdline    iomem   misc        sysvipc
134  1875  2103  27    330  45  59  76   config.gz  ioports   modules      thread-self
135  19    2117  29    333  46  6   77   consoles   irq   mounts       timer_list
136  1941  2121  298   34   47  60  773  cpuinfo    kallsyms   mtd        tty

So it shows many existed tasks, since unshared command has not mounted
the proc fs for the new created PID namespace, it still accesses the
proc fs of the root PID namespace.  This leads to two prominent issues:

- Firstly, PID values are mismatched between thread info and samples.
  The gathered thread info are coming from the proc fs of the root PID
  namespace, but samples record its PID from the child PID namespace.

- The second issue is profiled program 'test_program' returns its forked
  PID number from the child PID namespace, perf tool wrongly uses this
  PID number to retrieve the process info via the proc fs of the root
  PID namespace.

To avoid issues, we need to mount proc fs for the child PID namespace
with the option '--mount-proc' when use unshare command:

  # unshare --fork --pid --mount-proc perf record -e cycles -a -- test_program

Conversely, when the proc fs of the root PID namespace is used by child
namespace, perf tool can detect the multiple PID levels and
nsinfo__is_in_root_namespace() returns false, this patch reports error
for this case:

  # unshare --fork --pid perf record -e cycles -a -- test_program
  Couldn't synthesize bpf events.
  Perf runs in non-root PID namespace but it tries to gather process info from its parent PID namespace.
  Please mount the proc file system properly, e.g. add the option '--mount-proc' for unshare command.

Reviewed-by: James Clark <james.clark@arm.com>
Signed-off-by: Leo Yan <leo.yan@linaro.org>
Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Cc: Alexei Starovoitov <ast@kernel.org>
Cc: Andrii Nakryiko <andrii@kernel.org>
Cc: Daniel Borkmann <daniel@iogearbox.net>
Cc: Ian Rogers <irogers@google.com>
Cc: Ingo Molnar <mingo@redhat.com>
Cc: Jiri Olsa <jolsa@redhat.com>
Cc: John Fastabend <john.fastabend@gmail.com>
Cc: KP Singh <kpsingh@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Martin KaFai Lau <kafai@fb.com>
Cc: Namhyung Kim <namhyung@kernel.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Song Liu <songliubraving@fb.com>
Cc: Yonghong Song <yhs@fb.com>
Link: https://lore.kernel.org/r/20211224124014.2492751-1-leo.yan@linaro.org
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2 years agoperf session: Check for NULL pointer before dereference
Ameer Hamza [Tue, 25 Jan 2022 12:11:41 +0000 (17:11 +0500)]
perf session: Check for NULL pointer before dereference

Move NULL pointer check before dereferencing the variable.

Addresses-Coverity: 1497622 ("Derereference before null check")
Reviewed-by: James Clark <james.clark@arm.com>
Signed-off-by: Ameer Hamza <amhamza.mgc@gmail.com>
Cc: Adrian Hunter <adrian.hunter@intel.com>
Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Cc: Alexey Bayduraev <alexey.v.bayduraev@linux.intel.com>
Cc: German Gomez <german.gomez@arm.com>
Cc: Ingo Molnar <mingo@redhat.com>
Cc: Jiri Olsa <jolsa@redhat.com>
Cc: Leo Yan <leo.yan@linaro.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Namhyung Kim <namhyung@kernel.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Riccardo Mancini <rickyman7@gmail.com>
Link: https://lore.kernel.org/r/20220125121141.18347-1-amhamza.mgc@gmail.com
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2 years agoperf annotate: Set error stream of objdump process for TUI
Namhyung Kim [Wed, 2 Feb 2022 07:08:25 +0000 (23:08 -0800)]
perf annotate: Set error stream of objdump process for TUI

The stderr should be set to a pipe when using TUI.  Otherwise it'd
print to stdout and break TUI windows with an error message.

Signed-off-by: Namhyung Kim <namhyung@kernel.org>
Cc: Andi Kleen <ak@linux.intel.com>
Cc: Ian Rogers <irogers@google.com>
Cc: Jiri Olsa <jolsa@redhat.com>
Cc: Peter Zijlstra <peterz@infradead.org>
Link: http://lore.kernel.org/lkml/20220202070828.143303-2-namhyung@kernel.org
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2 years agoperf tools: Add missing branch_sample_type to perf_event_attr__fprintf()
Anshuman Khandual [Wed, 2 Feb 2022 10:57:23 +0000 (16:27 +0530)]
perf tools: Add missing branch_sample_type to perf_event_attr__fprintf()

This updates branch sample type with missing PERF_SAMPLE_BRANCH_TYPE_SAVE.

Suggested-by: James Clark <james.clark@arm.com>
Signed-off-by: Anshuman Khandual <anshuman.khandual@arm.com>
Acked-by: Jiri Olsa <jolsa@redhat.com>
Cc: James Clark <james.clark@arm.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: linux-arm-kernel@lists.infradead.org
Link: http://lore.kernel.org/lkml/1643799443-15109-1-git-send-email-anshuman.khandual@arm.com
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2 years agotools headers UAPI: Sync linux/kvm.h with the kernel sources
Arnaldo Carvalho de Melo [Sun, 9 May 2021 12:39:02 +0000 (09:39 -0300)]
tools headers UAPI: Sync linux/kvm.h with the kernel sources

To pick the changes in:

  f6c6804c43fa18d3 ("kvm: Move KVM_GET_XSAVE2 IOCTL definition at the end of kvm.h")

That just rebuilds perf, as these patches don't add any new KVM ioctl to
be harvested for the the 'perf trace' ioctl syscall argument
beautifiers.

This is also by now used by tools/testing/selftests/kvm/, a simple test
build succeeded.

This silences this perf build warning:

  Warning: Kernel ABI header at 'tools/include/uapi/linux/kvm.h' differs from latest version at 'include/uapi/linux/kvm.h'
  diff -u tools/include/uapi/linux/kvm.h include/uapi/linux/kvm.h

Cc: Janosch Frank <frankja@linux.ibm.com>
Cc: Paolo Bonzini <pbonzini@redhat.com>
Link: http://lore.kernel.org/lkml/Yf+4k5Fs5Q3HdSG9@kernel.org
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2 years agoMerge remote-tracking branch 'torvalds/master' into perf/urgent
Arnaldo Carvalho de Melo [Sun, 6 Feb 2022 11:28:34 +0000 (08:28 -0300)]
Merge remote-tracking branch 'torvalds/master' into perf/urgent

To check if more kernel API sync is needed and also to see if the perf
build tests continue to pass.

Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2 years agoMerge tag 'for-linus-5.17a-rc3-tag' of git://git.kernel.org/pub/scm/linux/kernel...
Linus Torvalds [Sat, 5 Feb 2022 18:40:17 +0000 (10:40 -0800)]
Merge tag 'for-linus-5.17a-rc3-tag' of git://git./linux/kernel/git/xen/tip

Pull xen fixes from Juergen Gross:

 - documentation fixes related to Xen

 - enable x2apic mode when available when running as hardware
   virtualized guest under Xen

 - cleanup and fix a corner case of vcpu enumeration when running a
   paravirtualized Xen guest

* tag 'for-linus-5.17a-rc3-tag' of git://git.kernel.org/pub/scm/linux/kernel/git/xen/tip:
  x86/Xen: streamline (and fix) PV CPU enumeration
  xen: update missing ioctl magic numers documentation
  Improve docs for IOCTL_GNTDEV_MAP_GRANT_REF
  xen: xenbus_dev.h: delete incorrect file name
  xen/x2apic: enable x2apic mode when supported for HVM