platform/upstream/llvm.git
3 years agoFix f6ee97d8271e1dfd9b6572222fefe8f40433952e:
James Y Knight [Tue, 6 Apr 2021 18:10:26 +0000 (14:10 -0400)]
Fix f6ee97d8271e1dfd9b6572222fefe8f40433952e:

PrintAddress needs to be false (as it was before), or this breaks sanitizer backtraces.

3 years ago[libcxx] [test] Allow C:\System Volume Information to be missing
Martin Storsjö [Tue, 9 Mar 2021 09:37:44 +0000 (11:37 +0200)]
[libcxx] [test] Allow C:\System Volume Information to be missing

If running in a Windows Container, there is no such directory at all.

If running from within bash on Windows Server, the directory seems to
be fully accessible. (The mechanics of this isn't fully understood, and
it doesn't seem to happen on desktop versions.)

If the directory isn't available with the expected behaviour, mark those
individual tests as unsupported. (The test as a whole is considered to
pass, but the unsupported test is mentioned in a test summary printed on
stdout.)

Differential Revision: https://reviews.llvm.org/D98960

3 years ago[GVN] Add missing ICF update
Arthur Eubanks [Tue, 6 Apr 2021 00:09:53 +0000 (17:09 -0700)]
[GVN] Add missing ICF update

performScalarPREInsertion() inserts instructions into blocks that we
need to tell ImplicitControlFlowTracking about, otherwise the ICF cache
may be invalid.

Fixes PR49193.

Reviewed By: nikic

Differential Revision: https://reviews.llvm.org/D99909

3 years ago[lldb] Fix else-after-return in AppleObjCRuntimeV2 (NFC)
Jonas Devlieghere [Tue, 6 Apr 2021 17:03:26 +0000 (10:03 -0700)]
[lldb] Fix else-after-return in AppleObjCRuntimeV2 (NFC)

Use early returns to associate the error message with the corresponding
condition and eliminate some else-after-returns in the process.

3 years ago[SimplifyInst] Use correct type for GEPs with vector indices.
Florian Hahn [Tue, 6 Apr 2021 16:34:21 +0000 (17:34 +0100)]
[SimplifyInst] Use correct type for GEPs with vector indices.

The current code does not properly handle vector indices unless they are
the first index.

At the moment LangRef gives the impression that the vector index must be
the one and only index (https://llvm.org/docs/LangRef.html#getelementptr-instruction).

But vector indices can appear at any position and according to the
verifier there may be multiple vector indices. If that's the case, the
number of elements must match.

This patch updates SimplifyGEPInst to properly handle those additional
cases.

Reviewed By: nikic

Differential Revision: https://reviews.llvm.org/D99961

3 years ago[mlir][python] Add missing affine map compression test
Nicolas Vasilache [Tue, 6 Apr 2021 16:52:06 +0000 (16:52 +0000)]
[mlir][python] Add missing affine map compression test

3 years ago[libcxx] Fix the type attribute for a couple templates
Martin Storsjö [Tue, 6 Apr 2021 07:55:33 +0000 (10:55 +0300)]
[libcxx] Fix the type attribute for a couple templates

Use `_LIBCPP_TEMPLATE_VIS` instead of `_LIBCPP_TYPE_VIS` for a template
class.

This fixes the nodiscard_extensions.pass.cpp and a couple
func.search.default test cases when built in MSVC/DLL configurations.

Differential Revision: https://reviews.llvm.org/D99932

3 years ago[libcxx] [test] Use dedicated types for the invocable concept tests for multiple...
Martin Storsjö [Tue, 6 Apr 2021 07:20:59 +0000 (10:20 +0300)]
[libcxx] [test] Use dedicated types for the invocable concept tests for multiple overloads

This should be clearer, instead of relying on rules for implicit
conversions regarding built in float/integer types.

Differential Revision: https://reviews.llvm.org/D99928

3 years ago[RISCV] Add helper function to share some of the code for isel of vector load/store...
Craig Topper [Tue, 6 Apr 2021 05:06:24 +0000 (22:06 -0700)]
[RISCV] Add helper function to share some of the code for isel of vector load/store intrinsics.

Many of the operands are handled the same or in the same order
for all these intrinsics. Factor out the code for selecting and
pushing them into the Operands vector.

Differential Revision: https://reviews.llvm.org/D99923

3 years ago[AMDGPU] SIFoldOperands: use isUseMIInFoldList. NFC.
Jay Foad [Tue, 6 Apr 2021 16:48:31 +0000 (17:48 +0100)]
[AMDGPU] SIFoldOperands: use isUseMIInFoldList. NFC.

3 years ago[lldb] Format Plugins/Language/ObjC/Cocoa.cpp (NFC)
Jonas Devlieghere [Tue, 6 Apr 2021 16:47:46 +0000 (09:47 -0700)]
[lldb] Format Plugins/Language/ObjC/Cocoa.cpp (NFC)

3 years ago[libcxx] adds remaining callable concepts
Christopher Di Bella [Wed, 31 Mar 2021 05:28:25 +0000 (05:28 +0000)]
[libcxx] adds remaining callable concepts

* `std::predicate`
* `std::relation`
* `std::equivalence_relation`
* `std::strict_weak_order`

Implements parts of:
    - P0898R3 Standard Library Concepts
    - P1754 Rename concepts to standard_case for C++20, while we still can

Differential Revision: https://reviews.llvm.org/D96477

3 years ago[llvm-reduce] Remove unwanted module inline asm
Arthur Eubanks [Tue, 6 Apr 2021 04:09:18 +0000 (21:09 -0700)]
[llvm-reduce] Remove unwanted module inline asm

We can clear line by line, but that's likely not very important.

Reviewed By: hans

Differential Revision: https://reviews.llvm.org/D99921

3 years agoPass -fcrash-diagnostics-dir along to LLVM
Paul Robinson [Tue, 23 Mar 2021 17:45:37 +0000 (10:45 -0700)]
Pass -fcrash-diagnostics-dir along to LLVM

This allows frontend and backend diagnostic files to all go into the
same place.  Have it control the Windows (mini-)dump location.

Differential Revision: https://reviews.llvm.org/D99199

3 years ago[mlir][linalg] Add helpers for linalg.tiled_loop [nfc].
Alexander Belyaev [Tue, 6 Apr 2021 16:13:46 +0000 (18:13 +0200)]
[mlir][linalg] Add helpers for linalg.tiled_loop [nfc].

Differential Revision: https://reviews.llvm.org/D99968

3 years ago[lldb] Fix bug where memory read --outfile is not truncating the file
Jonas Devlieghere [Tue, 6 Apr 2021 15:39:03 +0000 (08:39 -0700)]
[lldb] Fix bug where memory read --outfile is not truncating the file

The memory read --outfile command should truncate the output when unless
--append-outfile. Fix the bug and add a test.

rdar://76062318

Differential revision: https://reviews.llvm.org/D99890

3 years ago[Sanitizer] Adopt Python 3 for iOS simulator test scripts
Julian Lettner [Tue, 6 Apr 2021 00:57:02 +0000 (17:57 -0700)]
[Sanitizer] Adopt Python 3 for iOS simulator test scripts

Differential Revision: https://reviews.llvm.org/D99911

3 years ago[index] Improve macro indexing support
Ben Langmuir [Tue, 23 Mar 2021 22:22:58 +0000 (15:22 -0700)]
[index] Improve macro indexing support

The major change here is to index macro occurrences in more places than
before, specifically

* In non-expansion references such as `#if`, `#ifdef`, etc.
* When the macro is a reference to a builtin macro such as __LINE__.
* When using the preprocessor state instead of callbacks, we now include
  all definition locations and undefinitions instead of just the latest
  one (which may also have had the wrong location previously).
* When indexing an existing module file (.pcm), we now include module
  macros, and we no longer report unrelated preprocessor macros during
  indexing the module, which could have caused duplication.

Additionally, we now correctly obey the system symbol filter for macros,
so by default in system headers only definition/undefinition occurrences
are reported, but it can be configured to report references as well if
desired.

Extends FileIndexRecord to support occurrences of macros. Since the
design of this type is to keep a single list of entities organized by
source location, we incorporate macros into the existing DeclOccurrence
struct.

Differential Revision: https://reviews.llvm.org/D99758

3 years ago[test, GVN] Fix use of var defined in CHECK-NOT
Thomas Preud'homme [Sun, 28 Mar 2021 00:03:37 +0000 (00:03 +0000)]
[test, GVN] Fix use of var defined in CHECK-NOT

Commit 22ce5eb051591b828b1ce4238624b6e95d334a5b, changed checks in
GVN/big-endian.ll into CHECK-NOT. The intent was to check that a
succession of lines does not occur but each CHECK-NOT is checked
independently. In other word, one CHECK-NOT uses a variable defined
in a pattern (the one defining the variable) that should not occur in
the input. The bug was then copied over in NewGVN/big-endian.ll.

This commit only checks for the absence of i16 load which rules out the
presence of the whole sequence and does not involve an undefined
variable.

Reviewed By: nikic

Differential Revision: https://reviews.llvm.org/D99581

3 years ago[MLIR, test] Fix use of undef FileCheck var
Thomas Preud'homme [Sun, 28 Mar 2021 00:03:37 +0000 (00:03 +0000)]
[MLIR, test] Fix use of undef FileCheck var

MLIR test Transforms/canonicalize.mlir tries to check for the absence of
a sequence of instructions with several CHECK-NOT with one of those
directives using a variable defined in another. However CHECK-NOT are
checked independently so that is using a variable defined in a pattern
that should not occur in the input.

This commit removes the dependency between those CHECK-NOT by replacing
occurences of variables by the regex that were used to define them.

Reviewed By: pifon2a

Differential Revision: https://reviews.llvm.org/D99958

3 years ago[AIX][TLS] Add support for TLS variables to XCOFF object writer
Victor Huang [Tue, 6 Apr 2021 14:58:39 +0000 (09:58 -0500)]
[AIX][TLS] Add support for TLS variables to XCOFF object writer

This patch adds support for TLS variables to the XCOFF object writer:
- Add TData and TBSS sections
- Add CsectGroups for the mapping classes XCOFF::XMC_TL and XCOFF::XMC_UL
- Add XMC_UL in the enum entry of CsectStorageMapping class to print the string
  while reading the symbol properties for TLS variables
- Fix the starting address of TData and TBSS sections

Reviewed by: hubert.reinterpretcast, DiggerLin

Differential Revision: https://reviews.llvm.org/D98946

3 years ago[X86][SSE] canonicalizeShuffleWithBinOps - add MOVSD/MOVSS handling.
Simon Pilgrim [Tue, 6 Apr 2021 15:26:47 +0000 (16:26 +0100)]
[X86][SSE] canonicalizeShuffleWithBinOps - add MOVSD/MOVSS handling.

3 years ago[mlir][Linalg] Fix fusion on tensors operands / bbArg mismatch
Nicolas Vasilache [Tue, 6 Apr 2021 15:23:47 +0000 (15:23 +0000)]
[mlir][Linalg] Fix fusion on tensors operands / bbArg mismatch

Linalg fusion on tensors has mismatching assumptions on the operand side than on the region bbArg side.
Relax the behavior on the operand/indexing map side so that we better support output operands that may also be read from.

Differential revision: https://reviews.llvm.org/D99499

3 years ago[SystemZ][z/OS] correct rc and errno within nanosleep()
Zbigniew Sarbinowski [Tue, 6 Apr 2021 15:17:06 +0000 (15:17 +0000)]
[SystemZ][z/OS] correct rc and errno within nanosleep()

This patch fixes rc and errno within nanosleep(). It also updates __rem parameter as well it introduces cast to handle conversions from long into unsigned int to avoid warnings.

Reviewed By: Mordante

Differential Revision: https://reviews.llvm.org/D99373

3 years agoMove GCRelocateInst and GCResultInst to IntrinsicInst.h [nfc]
Philip Reames [Tue, 6 Apr 2021 15:32:13 +0000 (08:32 -0700)]
Move GCRelocateInst and GCResultInst to IntrinsicInst.h [nfc]

These two are part of the IntrinsicInst class hierarchy and it helps to cut down on some redundant includes.

3 years ago[CMake][Compiler-rt] Make it possible to configure standalone compiler-rt without...
Dan Liew [Tue, 30 Mar 2021 20:47:07 +0000 (13:47 -0700)]
[CMake][Compiler-rt] Make it possible to configure standalone compiler-rt without `LLVMConfig.cmake`.

Previously it wasn't possible to configure a standalone compiler-rt
build if the `LLVMConfig.cmake` file isn't present in a shipped
toolchain.

This patch adds a fallback behaviour for when `LLVMConfig.cmake` is not
available in the toolchain being used for configure. The fallback
behaviour mocks out the bare minimum required to make a configure
succeed when the host is Darwin. Support for other platforms could
be added in future patches.

The new code path is taken either in one of the following cases:

* `llvm-config` is not available.
* `llvm-config` is available but it provides an invalid path for the CMake files.

The motivation here is to be able to generate the compiler-rt lit test
suites for an arbitrary LLVM toolchain and then run the tests against
it.

The invocation to do this looks something like.

```
CC=/path/to/cc \
CXX=/path/to/c++ \
cmake \
  -G Ninja \
  -DLLVM_CONFIG_PATH=/path/to/llvm-config \
  -DCOMPILER_RT_INCLUDE_TESTS=ON \
  /path/to/llvm-project/compiler-rt

 # Note we don't compile compiler-rt in this workflow.
bin/llvm-lit -v test/path/to/generated/test_suite
```

A possible alternative approach is to configure the
`cmake/modules/LLVMConfig.cmake.in` file in the LLVM source tree
and then include it. This approach was not taken because it is more
complicated.

An interesting side benefit of this patch is that it is now
possible to configure on Darwin without `llvm-config` being available
by configuring with `-DLLVM_CONFIG_PATH=""`. This moves us a step
closer to a world where no LLVM build artefacts are required to
build compiler-rt.

rdar://76016632

Differential Revision: https://reviews.llvm.org/D99621

3 years ago[CMake][Compiler-rt] Compute `LLVM_MAIN_SRC_DIR` assuming the monorepo
Dan Liew [Tue, 30 Mar 2021 19:50:59 +0000 (12:50 -0700)]
[CMake][Compiler-rt] Compute `LLVM_MAIN_SRC_DIR` assuming the monorepo
layout.

When doing a standalone compiler-rt build we currently rely on
getting information from the `llvm-config` binary. Previously
we would rely on calling `llvm-config --src-root` to find the
LLVM sources. Unfortunately the returned path could easily be wrong
if the sources were built on another machine.

Now that compiler-rt is part of a monorepo we can easily fix this
problem by finding the LLVM source tree next to `compiler-rt` in
the monorepo. We do this regardless of whether or not the `llvm-config`
binary is available which moves us one step closer to not requiring
`llvm-config` to be available.

To try avoid anyone breaking anyone who relies on the current behavior,
if the path assuming the monorepo layout doesn't exist we invoke
`llvm-config --src-root` to get the path. A deprecation warning is
emitted if this path is taken because we should remove this path
in the future given that other runtimes already assume the monorepo
layout.

We also now emit a warning if `LLVM_MAIN_SRC_DIR` does not exist.
The intention is that this should be a hard error in future but
to avoid breaking existing users we'll keep this as a warning
for now.

rdar://76016632

Differential Revision: https://reviews.llvm.org/D99620

3 years ago[MLIR, test] Fix use of undef FileCheck var
Thomas Preud'homme [Tue, 6 Apr 2021 12:57:28 +0000 (13:57 +0100)]
[MLIR, test] Fix use of undef FileCheck var

MLIR test Dialect/Linalg/tile-indexed-generic.mlir has a CHECK-NOT
directive referring to a variable only defined in a CHECK directive with
a different prefix, and thus undefined in the CHECK-NOT.

This commit removes the variable reference altogether to error on any
content it might have.

Reviewed By: pifon2a

Differential Revision: https://reviews.llvm.org/D99956

3 years ago[clang][clangd] Avoid inconsistent target creation
oToToT [Tue, 6 Apr 2021 15:21:19 +0000 (23:21 +0800)]
[clang][clangd] Avoid inconsistent target creation

As proposed in D97109, I tried to make target creation consistent in `clang` and `clangd` by replacing the original procedure with a single function introduced in D97493.

This also helps `clangd` works with CUDA, OpenMP, etc.

Reviewed By: kadircet

Differential Revision: https://reviews.llvm.org/D98128

3 years ago[ObjC] Add a command line flag that disables recognition of objc_direct for testability
Erik Pilkington [Mon, 5 Apr 2021 23:23:27 +0000 (19:23 -0400)]
[ObjC] Add a command line flag that disables recognition of objc_direct for testability

Programmers would like to be able to test direct methods by calling them from a
different linkage unit or mocking them, both of which are impossible. This
patch adds a flag that effectively disables the attribute, which will fix this
when enabled in testable builds. rdar://71190891

Differential revision: https://reviews.llvm.org/D95845

3 years agoAMDGPU: Add isBranch=1 to SOPP branch instructions
Konstantin Zhuravlyov [Tue, 6 Apr 2021 14:54:20 +0000 (10:54 -0400)]
AMDGPU: Add isBranch=1 to SOPP branch instructions

Differential Revision: https://reviews.llvm.org/D99955

3 years agoRemove last remnants of PR49607 migration [NFC]
Philip Reames [Tue, 6 Apr 2021 14:54:13 +0000 (07:54 -0700)]
Remove last remnants of PR49607 migration [NFC]

The key change (4f5e92c) to switch gc.result and gc.relocate to being readnone landed nearly two weeks ago, and we haven't seen any fallout.  Time to remove the code added to make reverting easy.

3 years ago[Windows] Turn off text mode correctly in Rewriter to stop CRLF translation
Abhina Sreeskantharajan [Tue, 6 Apr 2021 14:48:40 +0000 (10:48 -0400)]
[Windows] Turn off text mode correctly in Rewriter to stop CRLF translation

I incorrectly changed the RewriteTestAction::ExecuteAction's file to binary instead of the proper RewriteIncludesAction::BeginSourceFileAction in https://reviews.llvm.org/rGbc5d4bcc2deb71ab647270c9754a83484b3d6f87. In the original commit, I actually changed RewriteIncludesAction::BeginSourceFileAction in https://reviews.llvm.org/rGfdb640ea30d416368b76b68b106deda580c6aced. This should fix the issue @aganea is facing.

Reviewed By: aganea

Differential Revision: https://reviews.llvm.org/D99837

3 years agoRevert "[IR] Ignore bitcasts of function pointers which are only used as callees...
Jan Svoboda [Tue, 6 Apr 2021 14:33:28 +0000 (16:33 +0200)]
Revert "[IR] Ignore bitcasts of function pointers which are only used as callees in callbase instruction"

This reverts commit 167ea67d

This causes a bunch of build failures:
* http://lab.llvm.org:8011/#/builders/121/builds/6287
* http://green.lab.llvm.org/green/job/clang-stage1-RA/19915

3 years agoAvoid unused variable warning in Release builds
Benjamin Kramer [Tue, 6 Apr 2021 14:25:19 +0000 (16:25 +0200)]
Avoid unused variable warning in Release builds

3 years ago[AMDGPU] SIFoldOperands: use MachineRegisterInfo::hasOneNonDBGUser
Jay Foad [Tue, 6 Apr 2021 09:59:02 +0000 (10:59 +0100)]
[AMDGPU] SIFoldOperands: use MachineRegisterInfo::hasOneNonDBGUser

NFC.

3 years ago[AMDGPU] SIFoldOperands: use range-based loops and make_early_inc_range
Jay Foad [Tue, 6 Apr 2021 09:27:10 +0000 (10:27 +0100)]
[AMDGPU] SIFoldOperands: use range-based loops and make_early_inc_range

NFC.

3 years ago[AMDGPU] SIFoldOperands: rename tryFoldInst to tryFoldCndMask
Jay Foad [Wed, 31 Mar 2021 12:50:31 +0000 (13:50 +0100)]
[AMDGPU] SIFoldOperands: rename tryFoldInst to tryFoldCndMask

This follows the pattern of the other tryFold* functions. NFC.

3 years ago[AMDGPU] SIFoldOperands: use getVRegDef instead of getUniqueVRegDef
Jay Foad [Wed, 31 Mar 2021 12:48:37 +0000 (13:48 +0100)]
[AMDGPU] SIFoldOperands: use getVRegDef instead of getUniqueVRegDef

We are in SSA so getVRegDef is equivalent but simpler. NFC.

3 years ago[llvm-symbolizer] Don't use the same 'OutputStyle' name for the enum type and instanc...
Simon Pilgrim [Tue, 6 Apr 2021 14:21:34 +0000 (15:21 +0100)]
[llvm-symbolizer] Don't use the same 'OutputStyle' name for the enum type and instance. NFCI.

This was causing some buildbot problems, e.g. http://lab.llvm.org:8011/#/builders/110/builds/2306

3 years ago[AMDGPU][SDag] Add IMG init also for image_gather4 instructions
Jay Foad [Tue, 6 Apr 2021 13:31:24 +0000 (14:31 +0100)]
[AMDGPU][SDag] Add IMG init also for image_gather4 instructions

This fixes an oversight in D99747 which moved the IMG init code from
SIAddIMGInit to AdjustInstrPostInstrSelection, but did not set the
hasPostISelHook flag on gather4 instructions.

Differential Revision: https://reviews.llvm.org/D99953

3 years ago[LoopVectorize] Add strict in-order reduction support for fixed-width vectorization
Kerry McLaughlin [Tue, 6 Apr 2021 12:28:14 +0000 (13:28 +0100)]
[LoopVectorize] Add strict in-order reduction support for fixed-width vectorization

Previously we could only vectorize FP reductions if fast math was enabled, as this allows us to
reorder FP operations. However, it may still be beneficial to vectorize the loop by moving
the reduction inside the vectorized loop and making sure that the scalar reduction value
be an input to the horizontal reduction, e.g:

  %phi = phi float [ 0.0, %entry ], [ %reduction, %vector_body ]
  %load = load <8 x float>
  %reduction = call float @llvm.vector.reduce.fadd.v8f32(float %phi, <8 x float> %load)

This patch adds a new flag (IsOrdered) to RecurrenceDescriptor and makes use of the changes added
by D75069 as much as possible, which already teaches the vectorizer about in-loop reductions.
For now in-order reduction support is off by default and controlled with the `-enable-strict-reductions` flag.

Reviewed By: david-arm

Differential Revision: https://reviews.llvm.org/D98435

3 years ago[InstCombine] Add PR38929 test case
Simon Pilgrim [Tue, 6 Apr 2021 13:42:30 +0000 (14:42 +0100)]
[InstCombine] Add PR38929 test case

Fold (~x & y) | ~(x | y) --> ~x

3 years ago[X86] Improve optimizeCompareInstr for signed comparisons after ANDN instructions
Simon Pilgrim [Tue, 6 Apr 2021 13:15:59 +0000 (14:15 +0100)]
[X86] Improve optimizeCompareInstr for signed comparisons after ANDN instructions

Extend D94856 to handle 'andn' instructions as well

3 years ago[NFC][Clang] Speculative fix for builtins-ppc-quadword-noi128.c
Roman Lebedev [Tue, 6 Apr 2021 13:15:23 +0000 (16:15 +0300)]
[NFC][Clang] Speculative fix for builtins-ppc-quadword-noi128.c

3 years ago[InstCombine] Fold `((X - Y) - Z)` to `X - (Y + Z)` (PR49858)
Roman Lebedev [Tue, 6 Apr 2021 12:02:53 +0000 (15:02 +0300)]
[InstCombine] Fold `((X - Y) - Z)` to `X - (Y + Z)` (PR49858)

https://alive2.llvm.org/ce/z/67w-wQ

We prefer `add`s over `sub`, and this particular xform
allows further folds to happen:

Fixes https://bugs.llvm.org/show_bug.cgi?id=49858

3 years ago[NFC][InstCombine] Add tests for '((X - Y) - Z)' pattern (PR49858)
Roman Lebedev [Tue, 6 Apr 2021 11:58:21 +0000 (14:58 +0300)]
[NFC][InstCombine] Add tests for '((X - Y) - Z)' pattern (PR49858)

3 years ago[X86] Add ANDN test case for PR48768
Simon Pilgrim [Tue, 6 Apr 2021 12:52:20 +0000 (13:52 +0100)]
[X86] Add ANDN test case for PR48768

D94856 covered the BMI cases where we had existing tests, this adds a missing ANDN test case

3 years ago[lldb][NFC] Fix misleading indentation in Cocoa.cpp
Raphael Isemann [Tue, 6 Apr 2021 12:30:27 +0000 (14:30 +0200)]
[lldb][NFC] Fix misleading indentation in Cocoa.cpp

3 years ago[AMDGPU] Fix dubious regexes with unescaped brackets. NFC.
Jay Foad [Tue, 6 Apr 2021 12:17:29 +0000 (13:17 +0100)]
[AMDGPU] Fix dubious regexes with unescaped brackets. NFC.

3 years ago[InstCombine] Add PR45984 test case
Simon Pilgrim [Tue, 6 Apr 2021 11:35:55 +0000 (12:35 +0100)]
[InstCombine] Add PR45984 test case

Fold (a ^ b) | ~(a | b) --> ~(a & b)

3 years ago[mlir] Fix support for lowering non-32-bit affine reductions.
Alex Zinenko [Tue, 6 Apr 2021 10:53:04 +0000 (12:53 +0200)]
[mlir] Fix support for lowering non-32-bit affine reductions.

The existing implementation was always creating 32-bit constants for
floating-point and integer reductions regardless of the actual type, which
resulted in invalid IR being generated for any types other than f32 and i32
when lowering affine.parallel to SCF. Use the actual type instead.

Reviewed By: chelini

Differential Revision: https://reviews.llvm.org/D99942

3 years ago[AMDGPU] Fix typo in regular expression checks. NFC.
Jay Foad [Tue, 6 Apr 2021 11:29:48 +0000 (12:29 +0100)]
[AMDGPU] Fix typo in regular expression checks. NFC.

3 years agoLoopFlatten - CanWidenIV - Fix uninitialized variable warnings and use for-range...
Simon Pilgrim [Tue, 6 Apr 2021 11:24:04 +0000 (12:24 +0100)]
LoopFlatten - CanWidenIV - Fix uninitialized variable warnings and use for-range loop. NFCI.

Fix static analysis uninitialized variable warnings, and use for-range loop iteration across WideIVs array.

3 years agoDon't directly dereference getAs<> casts to avoid potential null dereferences. NFCI.
Simon Pilgrim [Tue, 6 Apr 2021 11:04:01 +0000 (12:04 +0100)]
Don't directly dereference getAs<> casts to avoid potential null dereferences. NFCI.

Replace with castAs<> which asserts the cast is valid.

Fixes a number of static analyzer warnings.

3 years ago[SystemZ][z/OS][Windows] Add new OF_TextWithCRLF flag and use this flag instead of...
Abhina Sreeskantharajan [Tue, 6 Apr 2021 11:22:41 +0000 (07:22 -0400)]
[SystemZ][z/OS][Windows] Add new OF_TextWithCRLF flag and use this flag instead of OF_Text

Problem:
On SystemZ we need to open text files in text mode. On Windows, files opened in text mode adds a CRLF '\r\n' which may not be desirable.

Solution:
This patch adds two new flags

  - OF_CRLF which indicates that CRLF translation is used.
  - OF_TextWithCRLF = OF_Text | OF_CRLF indicates that the file is text and uses CRLF translation.

Developers should now use either the OF_Text or OF_TextWithCRLF for text files and OF_None for binary files. If the developer doesn't want carriage returns on Windows, they should use OF_Text, if they do want carriage returns on Windows, they should use OF_TextWithCRLF.

So this is the behaviour per platform with my patch:

z/OS:
OF_None: open in binary mode
OF_Text : open in text mode
OF_TextWithCRLF: open in text mode

Windows:
OF_None: open file with no carriage return
OF_Text: open file with no carriage return
OF_TextWithCRLF: open file with carriage return

The Major change is in llvm/lib/Support/Windows/Path.inc to only set text mode if the OF_CRLF is set.
```
  if (Flags & OF_CRLF)
    CrtOpenFlags |= _O_TEXT;
```

These following files are the ones that still use OF_Text which I left unchanged. I modified all these except raw_ostream.cpp in recent patches so I know these were previously in Binary mode on Windows.
./llvm/lib/Support/raw_ostream.cpp
./llvm/lib/TableGen/Main.cpp
./llvm/tools/dsymutil/DwarfLinkerForBinary.cpp
./llvm/unittests/Support/Path.cpp
./clang/lib/StaticAnalyzer/Core/HTMLDiagnostics.cpp
./clang/lib/Frontend/CompilerInstance.cpp
./clang/lib/Driver/Driver.cpp
./clang/lib/Driver/ToolChains/Clang.cpp

Reviewed By: MaskRay

Differential Revision: https://reviews.llvm.org/D99426

3 years agoSilence -Woverloaded-virtual warnings from generated code; NFC
Aaron Ballman [Tue, 6 Apr 2021 11:18:24 +0000 (07:18 -0400)]
Silence -Woverloaded-virtual warnings from generated code; NFC

3 years ago[LoopVectorize] Change the identity element for FAdd
Kerry McLaughlin [Tue, 6 Apr 2021 09:51:08 +0000 (10:51 +0100)]
[LoopVectorize] Change the identity element for FAdd

Changes getRecurrenceIdentity to always return a neutral value of -0.0 for FAdd.

Reviewed By: dmgreen, spatel

Differential Revision: https://reviews.llvm.org/D98963

3 years ago[VPlan] Print VPValue operands for VPWidenPHI if possible.
Florian Hahn [Tue, 6 Apr 2021 10:54:23 +0000 (11:54 +0100)]
[VPlan] Print VPValue operands for VPWidenPHI if possible.

For VPWidenPHIRecipes that model all incoming values as VPValue
operands, print those operands instead of printing the original PHI.

D99294 updates recipes of reduction PHIs to use the VPValue for the
incoming value from the loop backedge, making use of this new printing.

3 years ago[AMDGPU][MC][GFX9] Corrected SMEM decoding
Dmitry Preobrazhensky [Tue, 6 Apr 2021 11:07:45 +0000 (14:07 +0300)]
[AMDGPU][MC][GFX9] Corrected SMEM decoding

Corrected SMEM decoding when IMM=0 and OFFSET>127

Fixed bug 49819 (https://bugs.llvm.org/show_bug.cgi?id=49819)

Differential Revision: https://reviews.llvm.org/D99804

3 years ago[CMake] Fix Python 3 lookup when building LLVM with tests
Dominik Montada [Thu, 1 Apr 2021 10:28:39 +0000 (12:28 +0200)]
[CMake] Fix Python 3 lookup when building LLVM with tests

Remove the find_package(Python3 ...) call from Tooling/CMakeLists.txt as
it would override the python 3 version determined in llvm/CMakeLists.txt.
This call did not respect the LLVM_MINIMUM_PYTHON_VERSION.

This fixes the check-all target when building LLVM on a system where the
default python version is not the minimum required version for running tests.

Reviewed By: serge-sans-paille

Differential Revision: https://reviews.llvm.org/D99715

3 years ago[LLDB] Fix building for aarch64 windows after d6d3d21cd1cb1567eaf7ff8c0867b07227a19d99
Martin Storsjö [Sat, 3 Apr 2021 21:15:48 +0000 (00:15 +0300)]
[LLDB] Fix building for aarch64 windows after d6d3d21cd1cb1567eaf7ff8c0867b07227a19d99

Differential Revision: https://reviews.llvm.org/D99847

3 years ago[CostModel][X86] Improve accuracy of vXi8 multiply reduction costs
Simon Pilgrim [Tue, 6 Apr 2021 10:40:37 +0000 (11:40 +0100)]
[CostModel][X86] Improve accuracy of vXi8 multiply reduction costs

After rG47321c311bdbe0145b9bf45d822185c37b19fa50 we promote vXi8 reductions to vXi16 to create a much faster PMULLW mul reduction, followed by a (free) truncation. This avoids the high cost of repeated vXi8 multiplications (which extend+multiply+truncate to/from vXi16 types....).

Fixes the missing vXi8 mul reduction vectorization in PR42674 (Comment #20) 'mul16' test case.

3 years ago[AMDGPU] Regenerate checks to fix prefixes broken in D96340. NFC.
Jay Foad [Tue, 6 Apr 2021 10:41:56 +0000 (11:41 +0100)]
[AMDGPU] Regenerate checks to fix prefixes broken in D96340. NFC.

3 years ago[rt] Update DIPrinter usage in 'sanitizer_symbolize.cpp`.
Alexander Belyaev [Tue, 6 Apr 2021 10:27:44 +0000 (12:27 +0200)]
[rt] Update DIPrinter usage in 'sanitizer_symbolize.cpp`.

These changes were required after
https://github.com/llvm/llvm-project/commit/5f57793c4fe47aa3486a755768b43189351cbd15

Differential Revision: https://reviews.llvm.org/D99937

3 years ago[lsan][test] Disable many_tls_keys_pthread.cpp on AArch64
David Spickett [Tue, 6 Apr 2021 10:25:52 +0000 (11:25 +0100)]
[lsan][test] Disable many_tls_keys_pthread.cpp on AArch64

Partially reverts 04dbb63400c5fa2f263d7473272509be572a367a.

This test requires 9be8f8b34d9b150cd1811e3556fe9d0cd735ae29
which is/has been reverted a few times but this test was
left enabled.

Currently that change is reverted and this test is failing:
http://lab.llvm.org:8011/#/builders/7/builds/2327

3 years ago[RISCV][Clang] Add all RVV Fixed-Point Arithmetic intrinsic functions.
Zakk Chen [Tue, 30 Mar 2021 17:12:07 +0000 (10:12 -0700)]
[RISCV][Clang] Add all RVV Fixed-Point Arithmetic intrinsic functions.

Reviewed By: HsiangKai

Authored-by: Roger Ferrer Ibanez <rofirrim@gmail.com>
Co-Authored-by: Zakk Chen <zakk.chen@sifive.com>
Differential Revision: https://reviews.llvm.org/D99610

3 years ago[RISCV][Clang] Add more RVV Integer intrinsic functions.
Zakk Chen [Tue, 30 Mar 2021 15:59:07 +0000 (08:59 -0700)]
[RISCV][Clang] Add more RVV Integer intrinsic functions.

Support below instructions.
1. Vector Integer Add-with-Carry / Subtract-with-Borrow Instructions
2. Vector Integer Comparison Instructions
3. Vector Widening Integer Multiply-Add Instructions

Reviewed By: HsiangKai

Authored-by: Roger Ferrer Ibanez <rofirrim@gmail.com>
Co-Authored-by: Zakk Chen <zakk.chen@sifive.com>
Differential Revision: https://reviews.llvm.org/D99528

3 years ago[RISCV][Clang] Add RVV Widening Integer Extension intrinsic functions.
Zakk Chen [Tue, 30 Mar 2021 15:55:46 +0000 (08:55 -0700)]
[RISCV][Clang] Add RVV Widening Integer Extension intrinsic functions.

Reviewed By: HsiangKai

Authored-by: Roger Ferrer Ibanez <rofirrim@gmail.com>
Co-Authored-by: Zakk Chen <zakk.chen@sifive.com>
Differential Revision: https://reviews.llvm.org/D99527

3 years ago[RISCV][Clang] Add RVV vnsra, vnsrl and vwmul intrinsic functions.
Zakk Chen [Mon, 29 Mar 2021 16:38:55 +0000 (09:38 -0700)]
[RISCV][Clang] Add RVV vnsra, vnsrl and vwmul intrinsic functions.

Reviewed By: craig.topper

Authored-by: Roger Ferrer Ibanez <rofirrim@gmail.com>
Co-Authored-by: Zakk Chen <zakk.chen@sifive.com>
Differential Revision: https://reviews.llvm.org/D99525

3 years ago[RISCV][Clang] Add some RVV Integer intrinsic functions.
Zakk Chen [Mon, 29 Mar 2021 14:37:29 +0000 (07:37 -0700)]
[RISCV][Clang] Add some RVV Integer intrinsic functions.

1. Rename RVVBinBuiltin to RVVOutputOp1Builtin because it is not related
to the number of operand.
2. Add RVV Integer instuctions which use RVVOutputOp1Builtin.

Reviewed By: craig.topper

Authored-by: Roger Ferrer Ibanez <rofirrim@gmail.com>
Co-Authored-by: Zakk Chen <zakk.chen@sifive.com>
Differential Revision: https://reviews.llvm.org/D99524

3 years ago[lldb] Improve CPUInfo test predicate
David Spickett [Thu, 1 Apr 2021 14:30:16 +0000 (15:30 +0100)]
[lldb] Improve CPUInfo test predicate

Use a with block for reading the cpuinfo file.

When loading the file fails (or we're not on Linux)
return an empty string. Since all the callers are
going to do "x in self.getCPUInfo()".

Reviewed By: omjavaid

Differential Revision: https://reviews.llvm.org/D99729

3 years ago[test, AArch64] Fix use of var defined in CHECK-NOT
Thomas Preud'homme [Sun, 28 Mar 2021 00:03:37 +0000 (00:03 +0000)]
[test, AArch64] Fix use of var defined in CHECK-NOT

LLVM test CodeGen/AArch64/aarch64-tbz.ll tries to check for the absence
of a sequence of instructions with several CHECK-NOT with one of those
directives using a variable defined in another. However CHECK-NOT are
checked independently so that is using a variable defined in a pattern
that should not occur in the input.

This commit removes the definition and uses of variable to check each
line independently, making the check stronger than the current one. It
also removes unnecessary regex match for labels.

Reviewed By: dmgreen

Differential Revision: https://reviews.llvm.org/D99602

3 years ago[PhaseOrdering] Add PR45687 test coverage
Simon Pilgrim [Tue, 6 Apr 2021 09:31:27 +0000 (10:31 +0100)]
[PhaseOrdering] Add PR45687 test coverage

This is a mixture of instcombine/simplfycfg/instcombine to recognise and then remove the abs pattern

3 years ago[IR] Ignore bitcasts of function pointers which are only used as callees in callbase...
madhur13490 [Thu, 18 Mar 2021 18:15:51 +0000 (18:15 +0000)]
[IR] Ignore bitcasts of function pointers which are only used as callees in callbase instruction

This patch enhances hasAddressTaken() to ignore bitcasts as a
callee in callbase instruction. Such bitcast usage doesn't really take
the address in a useful meaningful way.

Reviewed By: rampitec

Differential Revision: https://reviews.llvm.org/D98884

3 years ago[KnownBits] Rename KnownBits::computeForMul to KnownBits::mul. NFCI.
Simon Pilgrim [Thu, 25 Mar 2021 17:04:47 +0000 (17:04 +0000)]
[KnownBits] Rename KnownBits::computeForMul to KnownBits::mul. NFCI.

As promised in D98866

3 years ago[clang][Checkers] Fix PthreadLockChecker state cleanup at dead symbol.
Balázs Kéri [Tue, 6 Apr 2021 08:26:52 +0000 (10:26 +0200)]
[clang][Checkers] Fix PthreadLockChecker state cleanup at dead symbol.

It is possible that an entry in 'DestroyRetVal' lives longer
than an entry in 'LockMap' if not removed at checkDeadSymbols.
The added test case demonstrates this.

Reviewed By: NoQ

Differential Revision: https://reviews.llvm.org/D98504

3 years ago[AArch64] Default to zero-cycle-zeroing FP registers
Sjoerd Meijer [Tue, 6 Apr 2021 07:53:42 +0000 (08:53 +0100)]
[AArch64] Default to zero-cycle-zeroing FP registers

It is generally beneficial to prefer "movi d0, #0" over "fmov s0, wzr" as this
is most efficient across all cores; it is recognised as a zeroing idiom. For
newer cores, fmov instructions can also be eliminated early and there is no
difference with movi, but some implementations lack this so is not true for
other/older cores. Thus this standardises on using movi as this should always
gives the same or better performance than the fmov with wzr.

Differential Revision: https://reviews.llvm.org/D99586

3 years ago[clang][tooling] Create SourceManager for DiagnosticsEngine before command-line parsing
Jan Svoboda [Tue, 6 Apr 2021 08:38:19 +0000 (10:38 +0200)]
[clang][tooling] Create SourceManager for DiagnosticsEngine before command-line parsing

In D84673, we started using `DiagnosticsEngine` during command-line parsing in more contexts.

When using `ToolInvocation`, a custom `DiagnosticsConsumer` can be specified and it might expect `SourceManager` to be present on the emitted diagnostics.

This patch ensures the `SourceManager` is set up in such scenarios.

Test authored by Jordan Rupprecht.

Reviewed By: rupprecht

Differential Revision: https://reviews.llvm.org/D99414

3 years agoRevert "[flang] Improve constant folding for type parameter inquiries"
Kiran Chandramohan [Tue, 6 Apr 2021 07:39:19 +0000 (08:39 +0100)]
Revert "[flang] Improve constant folding for type parameter inquiries"

This reverts commit 8c7bf2f93da9b64b07509f67552d592a86260ff5.

3 years ago[NFC][WebAssembly] Removed mangled name from test.
Sam Parker [Tue, 6 Apr 2021 07:55:27 +0000 (08:55 +0100)]
[NFC][WebAssembly] Removed mangled name from test.

3 years ago[AArch64] Use 64-bit movi for zeroing halfs/floats
Sjoerd Meijer [Thu, 1 Apr 2021 08:47:35 +0000 (09:47 +0100)]
[AArch64] Use 64-bit movi for zeroing halfs/floats

This was using the .2d variant which zeros 128 bits, but using the .2s variant
that zeros 64 bits is faster on some cores.

This is a prep step for D99586 to always using movi for zeroing floats.

Differential Revision: https://reviews.llvm.org/D99710

3 years ago[AMDGPU] Add some missing testing for new subtargets gfx90a and gfx90c
Jay Foad [Wed, 31 Mar 2021 10:39:25 +0000 (11:39 +0100)]
[AMDGPU] Add some missing testing for new subtargets gfx90a and gfx90c

Differential Revision: https://reviews.llvm.org/D99647

3 years ago[clang][cli] Ensure plugin args are generated in deterministic order
Jan Svoboda [Mon, 5 Apr 2021 10:15:50 +0000 (12:15 +0200)]
[clang][cli] Ensure plugin args are generated in deterministic order

The '-plugin-arg' command-line arguments are not being generated in deterministic order.

This patch changes the storage from `std::unordered_map` to `std::map` to enforce ordering.

Reviewed By: dexonsmith

Differential Revision: https://reviews.llvm.org/D99879

3 years ago[NewPM] Fix unused lambda capture build error
Yevgeny Rouban [Tue, 6 Apr 2021 06:14:16 +0000 (13:14 +0700)]
[NewPM] Fix unused lambda capture build error

Fixes commit 39e3e3aa51d: Redesign of PreserveCFG Checker

3 years ago[NewPM] Redesign of PreserveCFG Checker
Yevgeny Rouban [Tue, 6 Apr 2021 04:55:18 +0000 (11:55 +0700)]
[NewPM] Redesign of PreserveCFG Checker

The reason for the NewPM redesign is described in the commit
  cba3e783389a: [NewPM] Disable PreservedCFGChecker ...

The checker introduces an internal custom CFG analysis that tracks
current up-to date CFG snapshot. The analysis is invalidated along
any other CFG related analysis (the key is CFGAnalyses). If the CFG
analysis is not invalidated at a functional pass exit then the checker
asserts that the CFG snapshot taken from this analysis is equals to
a snapshot of the current CFG.

Along the way:
- the function CFG::printDiff() is simplified by removing function
  name calculation. The name is printed by the caller;
- fixed CFG invalidated condition (see CFG::invalidate());
- StandardInstrumentations::registerCallbacks() gets additional
  optional parameter of type FunctionAnalysisManager*, which is
  needed by the checker to get the custom CFG analysis;
- several PM related tests updated to explicitly set
  -verify-cfg-preserved=1 as they need.

This patch is safe to land as the CFGChecker is left switched off
(the options -verify-cfg-preserved is false by default). It will be
switched on by a separate patch to minimize possible reverts.

Reviewed By: skatkov, kuhar

Differential Revision: https://reviews.llvm.org/D91327

3 years ago[MLIR][docs] Fixes to operation syntax in Lang Ref
Geoffrey Martin-Noble [Tue, 6 Apr 2021 04:32:23 +0000 (21:32 -0700)]
[MLIR][docs] Fixes to operation syntax in Lang Ref

Reviewed By: rriddle

Differential Revision: https://reviews.llvm.org/D99922

3 years ago[Statepoint] Factor-out utility function to get non-foldable area of STATEPOINT like...
Serguei Katkov [Mon, 5 Apr 2021 03:21:46 +0000 (10:21 +0700)]
[Statepoint] Factor-out utility function to get non-foldable area of STATEPOINT like instructions. NFC

Reviewers: reames, dantrushin
Reviewed By: reames
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D99875

3 years ago[NewPM] Change tests to run them without PreserveCFGChecker. NFC
Yevgeny Rouban [Tue, 6 Apr 2021 04:31:07 +0000 (11:31 +0700)]
[NewPM] Change tests to run them without PreserveCFGChecker. NFC

Change several pass sequence sensitive tests to be indifferent
to the PreserveCFGChecker by explicitly settting the option
-verify-cfg-preserved=0. It is a preparation step that allows
a redesign of PreserveCFGChecker.

Reviewed By: skatkov

Differential Revision: https://reviews.llvm.org/D99878

3 years ago[RISCV] When custom iseling masked stores, copy the mask into V0 instead of virtual...
Craig Topper [Tue, 6 Apr 2021 04:25:52 +0000 (21:25 -0700)]
[RISCV] When custom iseling masked stores, copy the mask into V0 instead of virtual register.

I missed a few intrinsics in 3dd4aa7d09599507d1f801ffe4bec4c9eebbb8da
when I did this for masked loads and masked segment loads/stores.

Found while trying to share more code between these custom isel
functions.

3 years agoComment adjustments for a rename
Philip Reames [Tue, 6 Apr 2021 04:05:40 +0000 (21:05 -0700)]
Comment adjustments for a rename

3 years ago[SROA] Allow SROA on pointers with invariant group intrinsic uses
Arthur Eubanks [Tue, 30 Mar 2021 00:02:41 +0000 (17:02 -0700)]
[SROA] Allow SROA on pointers with invariant group intrinsic uses

When we are able to SROA an alloca, we know all uses of it, meaning we
don't have to preserve the invariant group intrinsics and metadata.

It's possible that we could lose information regarding redundant
loads/stores, but that's unlikely to have any real impact since right
now the only user is Clang and vtables.

Reviewed By: rnk

Differential Revision: https://reviews.llvm.org/D99760

3 years agoExact ashr/lshr don't loose any set bits and are thus trivially invertible
Philip Reames [Tue, 6 Apr 2021 02:21:38 +0000 (19:21 -0700)]
Exact ashr/lshr don't loose any set bits and are thus trivially invertible

Use that fact to improve isKnownNonEqual.

3 years ago[Polly] Refactoring isInnermost() from isl to use the C++ wrapper
patacca [Sat, 3 Apr 2021 22:04:52 +0000 (17:04 -0500)]
[Polly] Refactoring isInnermost() from isl to use the C++ wrapper

Polly use algorithms from the Integer Set Library (isl), which is a library written in C and which is incompatible with the rest of the LLVM as it is written in C++.

Changes made:
 - Refactoring isInnermost() to take C++ bindings instead of the plain isl C api.
 - Addition of manage_copy() when needed to get the reference for the isl_ast_node object

Reviewed By: Meinersbur

Differential Revision: https://reviews.llvm.org/D99841

3 years ago[libcxx] moves `std::invoke` into `__functional_base`
Christopher Di Bella [Sun, 21 Mar 2021 18:48:24 +0000 (18:48 +0000)]
[libcxx] moves `std::invoke` into `__functional_base`

Including `<concepts>` in other standard library headers (such as
`<iterator>`) creates circular dependencies due to `<functional>`.
Since `<concepts>` only needs `std::invoke` from `<functional>`, the
easiest, fastest, and cleanest way to eliminate the circular dep is to
move `std::invoke` into `__functional_base`.

This has the added advantage of `<concepts>` not transitively importing
`<functional>`.

Differential Revision: https://reviews.llvm.org/D99041

3 years agoAddress minor post commit feedback on 0e59dd
Philip Reames [Tue, 6 Apr 2021 01:22:01 +0000 (18:22 -0700)]
Address minor post commit feedback on 0e59dd

3 years agoRevert "Revert "Add support for fetching signed values from tagged pointers.""
Jim Ingham [Mon, 5 Apr 2021 17:29:21 +0000 (10:29 -0700)]
Revert "Revert "Add support for fetching signed values from tagged pointers.""

This reverts commit 602ab188a7e18b97d9af95e17271e8fbee129081.

The patch replicated an lldbassert for a certain type of NSNumber for tagged
pointers.  This really shouldn't be an assert since we don't do anything wrong
with these numbers, we just don't print a summary.  So this patch changed the
lldbassert to a log message in reverting the revert.

3 years agoCopy syncscope when expanding atomicrmw into cmpxchg loop
Stanislav Mekhanoshin [Mon, 5 Apr 2021 21:45:33 +0000 (14:45 -0700)]
Copy syncscope when expanding atomicrmw into cmpxchg loop

Fixes: SWDEV-280070

Differential Revision: https://reviews.llvm.org/D99902

3 years ago[RISCV] Add more RV32 vslide1up intrinsic test cases. NFC
Craig Topper [Tue, 6 Apr 2021 00:02:27 +0000 (17:02 -0700)]
[RISCV] Add more RV32 vslide1up intrinsic test cases. NFC

For some reason we only had 1 test case. This synchronizes the
test with vslide1down so we have the same number of tests for both.

3 years ago[mlir][Linalg] Add callbacks to fusion of elementwise operations to control fusion.
MaheshRavishankar [Mon, 5 Apr 2021 22:44:07 +0000 (15:44 -0700)]
[mlir][Linalg] Add callbacks to fusion of elementwise operations to control fusion.

Right now Elementwise operations fusion in Linalg fuses everything it
can. This can run up against resource limits of the target hardware
without some checks. This patch adds a callback function that clients
can use to implement a cost function. When two elementwise operations
are deemed structurally fusable, the callback can be used to control
if the fusion applies.

Differential Revision: https://reviews.llvm.org/D99820