Shoaib Meenai [Tue, 23 Oct 2018 01:19:18 +0000 (01:19 +0000)]
[ELF] Split up emulation.s per backend
emulation.s is testing multiple architectures, which means it needs all
the corresponding backends enabled, which might not be true for all
developers (for example, I don't have PPC or MIPS enabled). Rather than
marking the entire test as unsupported for such developers, split it up
per backend to get better testing granularity.
Differential Revision: https://reviews.llvm.org/D53544
llvm-svn: 344986
Kostya Serebryany [Tue, 23 Oct 2018 00:50:40 +0000 (00:50 +0000)]
[hwasan] add stack frame descriptions.
Summary:
At compile-time, create an array of {PC,HumanReadableStackFrameDescription}
for every function that has an instrumented frame, and pass this array
to the run-time at the module-init time.
Similar to how we handle pc-table in SanitizerCoverage.
The run-time is dummy, will add the actual logic in later commits.
Reviewers: morehouse, eugenis
Reviewed By: eugenis
Subscribers: srhines, llvm-commits, kubamracek
Differential Revision: https://reviews.llvm.org/D53227
llvm-svn: 344985
Shoaib Meenai [Tue, 23 Oct 2018 00:34:34 +0000 (00:34 +0000)]
[ELF] Actually fix test from r344976
I don't think the offsets and flags are particularly relevant to the
test; the machine type is what matters.
llvm-svn: 344984
Jonas Devlieghere [Tue, 23 Oct 2018 00:32:22 +0000 (00:32 +0000)]
[dsymutil] Improve error reporting when we cannot create output file.
Before this patch we were returning an empty string in case we couldn't
create the output file. Now we return an expected string so we can
return and print the proper issue. We now return errors instead of bools
and defer printing to the call site.
llvm-svn: 344983
Davide Italiano [Tue, 23 Oct 2018 00:31:46 +0000 (00:31 +0000)]
[ValueObject] Stop assuming types are non-zero sized.
Some backends might violate this assumption. No test case
upstream unfortunately as this is not the case with C++,
but I'm going to add a test in swift language support.
<rdar://problem/
40962410>
llvm-svn: 344982
Heejin Ahn [Tue, 23 Oct 2018 00:28:14 +0000 (00:28 +0000)]
[WebAssembly] Fix assembly printing of br_table
Summary: In `br_table's stack version asm string, \t was missing.
Reviewers: aardappel
Subscribers: dschuff, sbc100, jgravelle-google, sunfish, llvm-commits
Differential Revision: https://reviews.llvm.org/D53516
llvm-svn: 344981
Shoaib Meenai [Tue, 23 Oct 2018 00:27:27 +0000 (00:27 +0000)]
[ELF] Fix test from r344976
Turns out I wasn't actually running this test locally, since I don't
build the PPC and MIPS backends. Whoops.
Perhaps this test should be split up per-architecture?
llvm-svn: 344980
Jonas Devlieghere [Tue, 23 Oct 2018 00:18:27 +0000 (00:18 +0000)]
Fix typo in ASSERT_MODULE_LOCK macro definition
llvm-svn: 344979
Craig Topper [Tue, 23 Oct 2018 00:15:37 +0000 (00:15 +0000)]
[X86] Remove 'rtm' feature from KNL.
I'm unsure if KNL has this feature, but the backend never thought it did, only clang did. The predefined-arch-macros test lost the check for __RTM__ on KNL when it was removed Skylake CPUs in r344117.
I think we want to drop it from KNL for consistency with Skylake anyway regardless of how we got here.
llvm-svn: 344978
Wouter van Oortmerssen [Tue, 23 Oct 2018 00:12:49 +0000 (00:12 +0000)]
[WebAssembly] Added test for inline assembly roundtrip.
Summary:
Due to previous work to make WebAssembly MC by default stack-only
inline assembly now "just works" (previously it didn't since it had
no way to know types of registers), so no further work required.
So far we only have tests (in inline-asm.ll) which test with
non-existing instructions, so this adds a test that roundtrips
both the inline assembly and its surrounding code thru the assembler.
Reviewers: dschuff, sunfish
Subscribers: sbc100, jgravelle-google, eraman, aheejin, llvm-commits
Differential Revision: https://reviews.llvm.org/D52914
llvm-svn: 344977
Shoaib Meenai [Mon, 22 Oct 2018 23:56:10 +0000 (23:56 +0000)]
[ELF] Handle elf32-littlearm in OUTPUT_FORMAT
We need this to support 32-bit ARM. Add test cases for emulation
handling for this architecture as well.
Differential Revision: https://reviews.llvm.org/D53539
llvm-svn: 344976
Marshall Clow [Mon, 22 Oct 2018 23:52:09 +0000 (23:52 +0000)]
Added more notes to the issues.
llvm-svn: 344975
Fangrui Song [Mon, 22 Oct 2018 23:43:53 +0000 (23:43 +0000)]
[ELF] Don't warn on two legitimate cases when reading .llvm.call-graph-profile
Summary:
Before, superfluous warnings were emitted for the following two cases:
1) When from symbol was in a discarded section.
The profile should be thought of as affiliated to the section.
It makes sense to ignore the profile if the section is discarded.
2) When to symbol was in a shared object.
The object file containing the profile may not know about the to
symbol, which can reside in another object file (useful profile) or a
shared object (not useful as symbols in the shared object are fixed
and unorderable). It makes sense to ignore the profile from the object
file.
Note, the warning when to symbol was undefined was suppressed in
D53044, which is still useful for --symbol-ordering-file=
This patch silences the warnings. The check is actually more relaxed (no
warnings if either From or To is not Defined) for simplicity and I don't
see a compelling reason to warn on more cases.
Reviewers: ruiu, davidxl, espindola, Bigcheese
Reviewed By: ruiu
Subscribers: emaste, arichardson, llvm-commits
Differential Revision: https://reviews.llvm.org/D53470
llvm-svn: 344974
Saleem Abdulrasool [Mon, 22 Oct 2018 23:34:24 +0000 (23:34 +0000)]
X86: fix a comment copy-paste issue (NFC)
The comment was copy-pasted but not updated. NFC.
llvm-svn: 344973
Craig Topper [Mon, 22 Oct 2018 23:14:55 +0000 (23:14 +0000)]
[X86] Remove unused entries from the X86ProcFamily enum. Add a note to discourage creation of new enum entries.
As we've learned multiple times, a coarse grained enum like this is not scalable and we should be migrating away from it.
llvm-svn: 344972
Leonard Chan [Mon, 22 Oct 2018 23:08:40 +0000 (23:08 +0000)]
[Intrinsic] Unigned Saturation Addition Intrinsic
Add an intrinsic that takes 2 integers and perform unsigned saturation
addition on them.
This is a part of implementing fixed point arithmetic in clang where some of
the more complex operations will be implemented as intrinsics.
Differential Revision: https://reviews.llvm.org/D53340
llvm-svn: 344971
Matthias Braun [Mon, 22 Oct 2018 22:52:23 +0000 (22:52 +0000)]
X86: Do not optimize branches with undef eflags inputs
analyzeBranch()/insertBranch() etc. do not properly deal with an undef
flag on the eflags input and used to produce invalid MIR. I don't see
this ever affecting real world inputs (I don't think it is possible to
produce undef flags with llvm IR), so I simply changed the code to bail
out in this case.
rdar://
42122367
llvm-svn: 344970
Sanjay Patel [Mon, 22 Oct 2018 22:50:27 +0000 (22:50 +0000)]
[Reassociate] remove bogus tests; NFC
I was trying to provide test coverage for D53533
with rL344964, but these don't do it...and I don't
think they add any value, so deleting.
llvm-svn: 344969
Benjamin Kramer [Mon, 22 Oct 2018 22:43:17 +0000 (22:43 +0000)]
[clang-tidy] Fix typo abls->absl.
llvm-svn: 344968
Reid Kleckner [Mon, 22 Oct 2018 22:29:09 +0000 (22:29 +0000)]
[MC] Shrink MCAsmParser by grouping bools, add const, NFC
I was considering adding another boolean here. I standardized on bools
since they allow default member initializers in the class definition.
This makes ShowParsedOperands protected instead of private, but that's
probably fine.
Reduce the SmallVector size while we're at it, since the common case is
that there is never a pending error.
llvm-svn: 344967
Simon Pilgrim [Mon, 22 Oct 2018 22:26:00 +0000 (22:26 +0000)]
[ARM] Regenerate reverse shuffle costs
Came about while cleaning up general shuffle costs for PR39368
llvm-svn: 344966
Craig Topper [Mon, 22 Oct 2018 22:14:05 +0000 (22:14 +0000)]
Recommit r344877 "[X86] Stop promoting integer loads to vXi64"
I've included a fix to DAGCombiner::ForwardStoreValueToDirectLoad that I believe will prevent the previous miscompile.
Original commit message:
Theoretically this was done to simplify the amount of isel patterns that were needed. But it also meant a substantial number of our isel patterns have to match an explicit bitcast. By making the vXi32/vXi16/vXi8 types legal for loads, DAG combiner should be able to change the load type to rem
I had to add some additional plain load instruction patterns and a few other special cases, but overall the isel table has reduced in size by ~12000 bytes. So it looks like this promotion was hurting us more than helping.
I still have one crash in vector-trunc.ll that I'm hoping @RKSimon can help with. It seems to relate to using getTargetConstantFromNode on a load that was shrunk due to an extract_subvector combine after the constant pool entry was created. So we end up decoding more mask elements than the lo
I'm hoping this patch will simplify the number of patterns needed to remove the and/or/xor promotion.
Reviewers: RKSimon, spatel
Reviewed By: RKSimon
Subscribers: llvm-commits, RKSimon
Differential Revision: https://reviews.llvm.org/D53306
llvm-svn: 344965
Sanjay Patel [Mon, 22 Oct 2018 22:04:13 +0000 (22:04 +0000)]
[Reassociate] add vector tests with undef elements; NFC
Also, regenerate checks for these files. We should do better
on the vector tests by using the PatternMatch API instead of
BinaryOperator::isNot/isNeg.
llvm-svn: 344964
Dan Albert [Mon, 22 Oct 2018 21:58:22 +0000 (21:58 +0000)]
Revert "[Driver] Reland again: Default Android toolchains to libc++."
More compiler-rt test bot breakages...
llvm-svn: 344963
Thomas Lively [Mon, 22 Oct 2018 21:55:26 +0000 (21:55 +0000)]
[WebAssembly][NFC] Remove WebAssemblyStackifier TableGen backend
Summary:
Replace its functionality with a TableGen InstrInfo relational
instruction mapping. Although arguably more complex than the TableGen
backend, the relational mapping is a smaller maintenance burden than a
TableGen backend.
Reviewers: aardappel, aheejin, dschuff
Subscribers: mgorny, sbc100, jgravelle-google, sunfish, llvm-commits
Differential Revision: https://reviews.llvm.org/D53307
llvm-svn: 344962
Vlad Tsyrklevich [Mon, 22 Oct 2018 21:51:58 +0000 (21:51 +0000)]
Revert "Ensure sanitizer check function calls have a !dbg location"
This reverts commit r344915. It was causing exceptions on the
x86_64-linux-ubsan bot.
llvm-svn: 344961
Vedant Kumar [Mon, 22 Oct 2018 21:44:21 +0000 (21:44 +0000)]
[DWARF] Use a function-local offset for AT_call_return_pc
Logs provided by @stella.stamenova indicate that on Linux, lldb adds a
spurious slide offset to the return PC it loads from AT_call_return_pc
attributes (see the list thread: "[PATCH] D50478: Add support for
artificial tail call frames").
This patch side-steps the issue by getting rid of the load address
calculation in lldb's CallEdge::GetReturnPCAddress.
The idea is to have the DWARF writer emit function-local offsets to the
instruction after a call. I.e. return-pc = label-after-call-insn -
function-entry. LLDB can simply add this offset to the base address of a
function to get the return PC.
Differential Revision: https://reviews.llvm.org/D53469
llvm-svn: 344960
Sanjay Patel [Mon, 22 Oct 2018 21:37:02 +0000 (21:37 +0000)]
[Reassociate] add 'using namespace' to reduce bloat; NFC
llvm-svn: 344959
Nick Desaulniers [Mon, 22 Oct 2018 21:25:53 +0000 (21:25 +0000)]
[Driver] fix broken test
Summary:
Fixes test from r344941 which was broken on Windows. We want to check
the selected toolchain rather than the found toolchain anyways.
Reviewers: srhines, danalbert
Reviewed By: srhines
Subscribers: cfe-commits, bogner, pirama
Differential Revision: https://reviews.llvm.org/D53529
llvm-svn: 344958
Erich Keane [Mon, 22 Oct 2018 21:20:45 +0000 (21:20 +0000)]
Give Multiversion-inline functions linkonce linkage
Since multiversion variant functions can be inline, in C they become
available-externally linkage. This ends up causing the variants to not
be emitted, and not available to the linker.
The solution is to make sure that multiversion functions are always
emitted by marking them linkonce.
Change-Id: I897aa37c7cbba0c1eb2c57ee881d5000a2113b75
llvm-svn: 344957
Lang Hames [Mon, 22 Oct 2018 21:17:56 +0000 (21:17 +0000)]
[ORC] Guard access to the MemMgrs vector in RTDyldObjectLinkingLayer.
Otherwise we can end up with a data-race when linking concurrently.
This should fix an intermittent failure in the multiple-compile-threads-basic.ll
testcase.
llvm-svn: 344956
Sanjay Patel [Mon, 22 Oct 2018 21:11:15 +0000 (21:11 +0000)]
[x86] add test for PR25498 and complete checks; NFC
Might as well test the actual codegen instead of just the absence of crashing.
llvm-svn: 344955
Kuba Mracek [Mon, 22 Oct 2018 20:54:48 +0000 (20:54 +0000)]
[interception] Switch to _type suffix instead of _f, NFC.
Some Darwin functions have pairs like dispatch_apply and dispatch_apply_f so the added _f to interceptor types causes a clash. Let's add _type suffix instead.
Differential Revision: https://reviews.llvm.org/D53167
llvm-svn: 344954
Marshall Clow [Mon, 22 Oct 2018 20:50:06 +0000 (20:50 +0000)]
Update commnents to reflect the changes for LWG#3127. NFC
llvm-svn: 344953
Rui Ueyama [Mon, 22 Oct 2018 20:50:01 +0000 (20:50 +0000)]
Add OUTPUT_FORMAT linker script directive support.
This patch adds a support for OUTPUT_FORMAT linker script directive.
Since I'm not 100% confident with BFD names you can use in the directive
for all architectures, I added only a few in this patch. We can add
other names for other archtiectures later.
We still do not support triple-style OUTPUT_FORMAT directive, namely,
OUTPUT_FORMAT(bfdname, big, little). If you pass -EL (little endian)
or -EB (big endian) to the linker, GNU linkers pick up big or little
as a BFD name, correspondingly, so that you can use a single linker
script for bi-endian processor. I'm not sure if we really need to
support that, so I'll leave it alone for now.
Note that -m takes precedence over OUTPUT_FORAMT, but we always parse
a BFD name given to OUTPUT_FORMAT for error checking. You cannot write
an invalid name in the OUTPUT_FORMAT directive.
Differential Revision: https://reviews.llvm.org/D53495
llvm-svn: 344952
Marshall Clow [Mon, 22 Oct 2018 20:49:50 +0000 (20:49 +0000)]
Update commnents to reflect the changes for LWG#3127. NFC
llvm-svn: 344951
Marshall Clow [Mon, 22 Oct 2018 20:44:37 +0000 (20:44 +0000)]
Update commnents to reflect the changes for LWG#3122. NFC
llvm-svn: 344950
Tim Northover [Mon, 22 Oct 2018 20:38:13 +0000 (20:38 +0000)]
X86: add alias for pushfw/popfw in Intel mode
A while ago we changed pushf and popf in Intel mode to generate pushfq
and popfq. Unfortunately that left us with no way to get the 16-bit
encoding in Intel mode so this patch adds pushfw and popfw as aliases
there.
llvm-svn: 344949
Fangrui Song [Mon, 22 Oct 2018 20:30:06 +0000 (20:30 +0000)]
[ELF][PPC64] Fix a split-stack comment in rLLD344622
The blt- instruction (predicted not to be taken) uses cr7, not the default cr0.
llvm-svn: 344948
Jonas Toth [Mon, 22 Oct 2018 20:29:15 +0000 (20:29 +0000)]
[clang-tidy] tryfix windows build
llvm-svn: 344947
Dan Albert [Mon, 22 Oct 2018 20:16:21 +0000 (20:16 +0000)]
[Driver] Reland again: Default Android toolchains to libc++.
Some of the test data went missing last time I tried to submit this,
causing the tests to fail when the build did not include libc++.
Original review was https://reviews.llvm.org/D53109.
llvm-svn: 344946
Jonas Devlieghere [Mon, 22 Oct 2018 20:14:36 +0000 (20:14 +0000)]
[SymbolFile] Add the module lock where necessary and assert that we own it.
As discussed with Greg at the dev meeting, we need to ensure we have the
module lock in the SymbolFile. Usually the symbol file is accessed
through the symbol vendor which ensures that the necessary locks are
taken. However, there are a few methods that are accessed by the
expression parser and were lacking the lock.
This patch adds the locking where necessary and everywhere else asserts
that we actually already own the lock.
Differential revision: https://reviews.llvm.org/D52543
llvm-svn: 344945
Artem Dergachev [Mon, 22 Oct 2018 20:11:10 +0000 (20:11 +0000)]
[analyzer] Fix dumping for SymbolConjured conjured at no particular statement.
llvm-svn: 344944
Eugene Zelenko [Mon, 22 Oct 2018 19:55:52 +0000 (19:55 +0000)]
[Documentation] Fix grammar related to Clang-tidy cppcoreguidelines-macro-usage.
llvm-svn: 344943
Justin Bogner [Mon, 22 Oct 2018 19:51:31 +0000 (19:51 +0000)]
Reapply "[MachineCopyPropagation] Reimplement CopyTracker in terms of register units"
Recommits r342942, which was reverted in r343189, with a fix for an
issue where we would propagate unsafely if we defined only the upper
part of a register.
Original message:
Change the copy tracker to keep a single map of register units
instead of 3 maps of registers. This gives a very significant
compile time performance improvement to the pass. I measured a
30-40% decrease in time spent in MCP on x86 and AArch64 and much
more significant improvements on out of tree targets with more
registers.
llvm-svn: 344942
Nick Desaulniers [Mon, 22 Oct 2018 19:48:08 +0000 (19:48 +0000)]
[Driver] allow Android triples to alias for non Android targets
Summary:
Partial revert of r330873 ('[Driver] Reland "Android triples are not
aliases for other triples."')
While we don't want `-target *-linux-android` to alias to non
*-linux-android libs and binaries, it turns out we do want the
opposite. Ie. We would like for `-target *-linux-gnu` to still be
able to use *-android libs and binaries.
In fact, this is used to cross assemble and link the Linux kernel for
Android devices.
`-target *-linux-gnu` needs to be used for the Linux kernel when
using the android binutils prebuilts (*-linux-android).
The use of `-target *-linux-android` on C source files will cause
Clang to perform optimizations based on the presence of bionic (due to
r265481 ('Faster stack-protector for Android/AArch64.')) which is
invalid within the Linux kernel and will produce a non-bootable kernel
image.
Of course, you could just use the standard binutils (*-linux-gnu),
but Android does not distribute these. So this patch fixes a problem
that only occurs when cross assembling and linking a Linux kernel with
the Android provided binutils, which is what is done within Android's
build system.
Reviewers: srhines, pirama, danalbert
Reviewed By: srhines, danalbert
Subscribers: javed.absar, kristof.beyls, cfe-commits
Differential Revision: https://reviews.llvm.org/D53463
llvm-svn: 344941
Jonas Toth [Mon, 22 Oct 2018 19:20:01 +0000 (19:20 +0000)]
[clang-tidy] implement cppcoreguidelines macro rules
Summary:
In short macros are discouraged by multiple rules (and sometimes reference randomly). [Enum.1], [ES.30], [ES.31]
This check allows only headerguards and empty macros for annotation.
Reviewers: aaron.ballman, hokein
Reviewed By: aaron.ballman
Subscribers: jbcoe, Eugene.Zelenko, klimek, nemanjai, mgorny, xazax.hun, kbarton, cfe-commits
Differential Revision: https://reviews.llvm.org/D41648
llvm-svn: 344940
Sylvestre Ledru [Mon, 22 Oct 2018 19:07:29 +0000 (19:07 +0000)]
Hopefully fix the documentation generation issue
llvm-svn: 344939
Teresa Johnson [Mon, 22 Oct 2018 19:06:42 +0000 (19:06 +0000)]
[hot-cold-split] Add opt remark on success
Summary: Emit optimization remark on successful hot cold split.
Reviewers: sebpop, hiraditya
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D53512
llvm-svn: 344938
Simon Pilgrim [Mon, 22 Oct 2018 19:01:25 +0000 (19:01 +0000)]
Revert rL344931 from llvm/trunk: [X86][SSE] getTargetShuffleMaskIndices - allow opt-in support for whole undef shuffle mask elements
We can't safely assume that certain RawMask entries are UNDEF as most variable shuffles ignore non-index bits - PSHUFB only works on i8 elts so it'd be safe to use but I'm intending to come up with an alternative approach that works for all.
........
Enable this for PSHUFB constant mask decoding and remove the ConstantPool DecodePSHUFBMask
llvm-svn: 344937
Simon Pilgrim [Mon, 22 Oct 2018 18:58:32 +0000 (18:58 +0000)]
Revert rL344933 from llvm/trunk: [X86][SSE] Tidyup DecodeVPERMILPMask shuffle mask decoding
We can't safely assume that certain RawMask entries are UNDEF as most variable shuffles ignore non-index bits.
........
Add support for UNDEF raw mask elements and remove the ConstantPool DecodeVPERMILPMask usage in X86ISelLowering.cpp
llvm-svn: 344936
Aaron Ballman [Mon, 22 Oct 2018 18:51:29 +0000 (18:51 +0000)]
Revert r344930 as it broke some of the bots on Windows.
http://lab.llvm.org:8011/builders/clang-x64-windows-msvc/builds/739
llvm-svn: 344935
Sylvestre Ledru [Mon, 22 Oct 2018 18:48:58 +0000 (18:48 +0000)]
Generate ClangFormatStyleOptions.rst from Format.h (using docs/tools/dump_format_style.py)
llvm-svn: 344934
Simon Pilgrim [Mon, 22 Oct 2018 18:35:13 +0000 (18:35 +0000)]
[X86][SSE] Tidyup DecodeVPERMILPMask shuffle mask decoding
Add support for UNDEF raw mask elements and remove the ConstantPool DecodeVPERMILPMask usage in X86ISelLowering.cpp
llvm-svn: 344933
Fangrui Song [Mon, 22 Oct 2018 18:20:18 +0000 (18:20 +0000)]
[ELF] Format PPC64.cpp, NFC
Mainly two mis-indented places. The changes are local so should not interfere with in-review revisions
llvm-svn: 344932
Simon Pilgrim [Mon, 22 Oct 2018 18:09:02 +0000 (18:09 +0000)]
[X86][SSE] getTargetShuffleMaskIndices - allow opt-in support for whole undef shuffle mask elements
Enable this for PSHUFB constant mask decoding and remove the ConstantPool DecodePSHUFBMask
llvm-svn: 344931
Joel E. Denny [Mon, 22 Oct 2018 18:00:49 +0000 (18:00 +0000)]
[SourceMgr][FileCheck] Obey -color by extending WithColor
While this change specifically targets FileCheck, it affects any tool
using the same SourceMgr facilities.
Previously, -color was documented in FileCheck's -help output, but
-color had no effect. Now, -color obeys its documentation: it forces
colors to be used in FileCheck diagnostics even when stderr is not a
terminal.
-color is especially helpful when combined with FileCheck's -v, which
can produce a long series of diagnostics that you might wish to pipe
to a pager, such as less -R. The WithColor extensions here will also
help to clean up color usage in FileCheck's annotated dump of input,
which is proposed in D52999.
Reviewed By: JDevlieghere
Differential Revision: https://reviews.llvm.org/D53419
llvm-svn: 344930
Craig Topper [Mon, 22 Oct 2018 17:59:58 +0000 (17:59 +0000)]
[X86] Add new features to the priority list for target attribute multiversioning.
llvm-svn: 344929
Teresa Johnson [Mon, 22 Oct 2018 17:57:02 +0000 (17:57 +0000)]
[hot-cold-split] Add missing FileCheck invocations
Summary:
r344558 added some CHECK statements to split-cold-2.ll, but didn't add
any invocations of FileCheck. Add those here.
Reviewers: sebpop
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D53505
llvm-svn: 344928
Fangrui Song [Mon, 22 Oct 2018 17:52:31 +0000 (17:52 +0000)]
[llvm-exegesis] Fix name lookup ambiguity in MSVC after 344922
llvm-svn: 344927
Simon Pilgrim [Mon, 22 Oct 2018 17:43:33 +0000 (17:43 +0000)]
[X86] getTargetConstantBitsFromNode - handle extraction from larger constant pool entries
First step towards removing X86ShuffleDecodeConstantPool usage from X86ISelLowering.cpp
llvm-svn: 344924
Fangrui Song [Mon, 22 Oct 2018 17:10:47 +0000 (17:10 +0000)]
[llvm-exegesis] Move namespace exegesis inside llvm::
Summary:
This allows simplifying references of llvm::foo with foo when the needs
come in the future.
Reviewers: courbet, gchatelet
Reviewed By: gchatelet
Subscribers: javed.absar, tschuett, llvm-commits
Differential Revision: https://reviews.llvm.org/D53455
llvm-svn: 344922
Craig Topper [Mon, 22 Oct 2018 16:59:24 +0000 (16:59 +0000)]
Revert r344877 "[X86] Stop promoting integer loads to vXi64"
Sam McCall reported miscompiles in some tensorflow code. Reverting while I try to figure out.
llvm-svn: 344921
Vedant Kumar [Mon, 22 Oct 2018 16:50:24 +0000 (16:50 +0000)]
[test] Relax test/Other/opt-hot-cold-split.ll
On some ARM bots, 'Target Pass Configuration' does not run after 'Target
Transform Info'. Relax this pipeline test to allow that.
This is the same fix as in r328167.
Bot URL: http://lab.llvm.org:8011/builders/clang-cmake-armv7-quick/builds/4611
llvm-svn: 344919
Andrea Di Biagio [Mon, 22 Oct 2018 16:28:07 +0000 (16:28 +0000)]
[llvm-mca] Remove a couple of using directives and a bunch of redundant namespace llvm prefixes. NFC
llvm-svn: 344916
Adrian Prantl [Mon, 22 Oct 2018 16:27:41 +0000 (16:27 +0000)]
Ensure sanitizer check function calls have a !dbg location
Function calls without a !dbg location inside a function that has a
DISubprogram make it impossible to construct inline information and
are rejected by the verifier. This patch ensures that sanitizer check
function calls have a !dbg location, by carrying forward the location
of the preceding instruction or by inserting an artificial location if
necessary.
This fixes a crash when compiling the attached testcase with -Os.
rdar://problem/
45311226
Differential Revision: https://reviews.llvm.org/D53459
llvm-svn: 344915
Matt Arsenault [Mon, 22 Oct 2018 16:27:27 +0000 (16:27 +0000)]
DAG: Change behavior of fminnum/fmaxnum nodes
Introduce new versions that follow the IEEE semantics
to help with legalization that may need quieted inputs.
There are some regressions from inserting unnecessary
canonicalizes when these are matched from fast math
fcmp + select which should be fixed in a future commit.
llvm-svn: 344914
Zachary Turner [Mon, 22 Oct 2018 16:19:07 +0000 (16:19 +0000)]
Some cleanups to the native pdb plugin [NFC].
This is mostly some cleanup done in the process of implementing
some basic support for types. I tried to split up the patch a
bit to get some of the NFC portion of the patch out into a separate
commit, and this is the result of that. It moves some code around,
deletes some spurious namespace qualifications, removes some
unnecessary header includes, forward declarations, etc.
llvm-svn: 344913
Eric Liu [Mon, 22 Oct 2018 15:37:58 +0000 (15:37 +0000)]
[clangd] Support URISchemes configuration in BackgroundIndex.
Reviewers: sammccall
Subscribers: ilya-biryukov, MaskRay, jkorous, arphaman, kadircet, cfe-commits
Differential Revision: https://reviews.llvm.org/D53503
llvm-svn: 344912
Andrea Di Biagio [Mon, 22 Oct 2018 15:36:15 +0000 (15:36 +0000)]
[llvm-mca] Use llvm::ArrayRef in class SourceMgr. NFCI
Class SourceMgr now uses type ArrayRef<MCInst> to reference the
sequence of code from a "CodeRegion".
llvm-svn: 344911
Simon Pilgrim [Mon, 22 Oct 2018 15:33:30 +0000 (15:33 +0000)]
[X86][SSE] getTargetShuffleMask - pull out repeated shuffle mask element size. NFCI.
llvm-svn: 344910
Aleksandr Urakov [Mon, 22 Oct 2018 15:30:48 +0000 (15:30 +0000)]
Revert "[PDB] Extend IPDBSession's interface to retrieve frame data"
This reverts commit
b5c7e2f9a4dbb34e3667c4bb4972735eadd3247a.
llvm-svn: 344909
Sanjay Patel [Mon, 22 Oct 2018 15:26:27 +0000 (15:26 +0000)]
[InstCombine] add tests for shuffle+insert folds; NFC
llvm-svn: 344908
Guillaume Chatelet [Mon, 22 Oct 2018 15:06:10 +0000 (15:06 +0000)]
[llvm-exegesis] Crash when assembling invalid Operand
llvm-svn: 344907
Guillaume Chatelet [Mon, 22 Oct 2018 14:55:43 +0000 (14:55 +0000)]
[llvm-exegesis] Mark x86 segment register instructions as unsupported.
Reviewers: courbet
Subscribers: tschuett, llvm-commits
Differential Revision: https://reviews.llvm.org/D53499
llvm-svn: 344906
Guillaume Chatelet [Mon, 22 Oct 2018 14:46:08 +0000 (14:46 +0000)]
[llvm-exegesis] Reject x86 instructions that use non uniform memory accesses
Reviewers: courbet
Subscribers: tschuett, llvm-commits
Differential Revision: https://reviews.llvm.org/D53438
llvm-svn: 344905
Roman Lebedev [Mon, 22 Oct 2018 14:12:44 +0000 (14:12 +0000)]
[X86] X86DAGToDAGISel: handle BZHI selection too, not just BEXTR.
Summary:
As discussed in D52304 / IRC, we now have pattern matching for
'bit extract' in two places - tablegen and `X86DAGToDAGISel`.
There are 4 patterns.
And we will have a problem with `x & (-1 >> (32 - y))` pattern.
* If the mask is one-use, then it is always unfolded into `x << (32 - y) >> (32 - y)` first.
Thus, the existing test coverage is already broken.
* If it is not one-use, then it is not unfolded, and is matched as BZHI.
* If it is not one-use, we will not match it as BEXTR. And if it is one-use, it will have been unfolded already.
So we will either not handle that pattern for BEXTR, or not have test coverage for it.
This is bad.
As discussed with @craig.topper, let's unify this matching, and do everything in `X86DAGToDAGISel`.
Then we will not have code duplication, and will have proper test coverage.
This indeed does not affect any tests, and this is great.
It means that for these two patterns, the `X86DAGToDAGISel` is identical to the tablegen version.
Please review carefully, i'm not fully sure about that intrinsic change, and introduction of the new `X86ISD` opcode.
Reviewers: craig.topper, RKSimon, spatel
Reviewed By: craig.topper
Subscribers: llvm-commits, craig.topper
Differential Revision: https://reviews.llvm.org/D53164
llvm-svn: 344904
David Greene [Mon, 22 Oct 2018 14:04:13 +0000 (14:04 +0000)]
Document bisect-skip-count
Provide an example of how to use bisect-skip count to find bugs.
Differential revision: https://reviews.llvm.org/D52314
llvm-svn: 344903
Roman Lebedev [Mon, 22 Oct 2018 13:54:17 +0000 (13:54 +0000)]
[X86][BMI1]: X86DAGToDAGISel: select BEXTR from x & ((1 << nbits) + (-1)) pattern
Summary:
Trivial continuation of D52304.
While this pattern is not canonical, we do select it in the BZHI case,
so this should not be any different.
Reviewers: RKSimon, craig.topper, spatel
Reviewed By: RKSimon
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D52348
llvm-svn: 344902
David Greene [Mon, 22 Oct 2018 13:46:12 +0000 (13:46 +0000)]
Always search sysroot for GCC installs
Previously, if clang was configured with -DGCC_INSTALL_PREFIX, then it
would not search a provided sysroot for a gcc install. This caused a
number of regression tests to fail. If a sysroot is given, skip
searching GCC_INSTALL_PREFIX as it is likely not valid for the
provided sysroot.
llvm-svn: 344901
Petar Avramovic [Mon, 22 Oct 2018 13:27:50 +0000 (13:27 +0000)]
Test commit: change comment.
llvm-svn: 344900
Rui Ueyama [Mon, 22 Oct 2018 13:15:19 +0000 (13:15 +0000)]
Fix typo in a test file name.
llvm-svn: 344899
Aaron Ballman [Mon, 22 Oct 2018 13:05:53 +0000 (13:05 +0000)]
Silence the -Wshadow warning for enumerators shadowing a type.
Amends r344259 so that enumerators shadowing types are not diagnosed, as shadowing under those circumstances is rarely (if ever) an issue in practice.
llvm-svn: 344898
Eric Liu [Mon, 22 Oct 2018 12:48:49 +0000 (12:48 +0000)]
[change-namespace] Enhance detection of conflicting namespaces.
Summary:
For example:
```
namespace util { class Base; }
namespace new {
namespace util { class Internal; }
}
namespace old {
util::Base b1;
}
```
When changing `old::` to `new::`, `util::` in namespace "new::" will conflict
with "new::util::" unless a leading "::" is added.
Reviewers: hokein
Subscribers: cfe-commits
Differential Revision: https://reviews.llvm.org/D53489
llvm-svn: 344897
George Rimar [Mon, 22 Oct 2018 12:18:30 +0000 (12:18 +0000)]
[llvm-dwarfdump] - Fix win10 build bot failture.
Bot failed:
http://lab.llvm.org:8011/builders/llvm-clang-lld-x86_64-scei-ps4-windows10pro-fast/builds/20877/steps/test/logs/stdio
This was broken after the
r344895 "[llvm-dwarfdump] - Add the support of parsing .debug_loclists."
because of wrong formatting specifiers used.
llvm-svn: 344896
George Rimar [Mon, 22 Oct 2018 11:30:54 +0000 (11:30 +0000)]
[llvm-dwarfdump] - Add the support of parsing .debug_loclists.
This teaches llvm-dwarfdump to dump the content of .debug_loclists sections.
It converts the DWARFDebugLocDWO class to DWARFDebugLoclists,
teaches llvm-dwarfdump about .debug_loclists section and
adds the implementation for parsing the DW_LLE_offset_pair entries.
Differential revision: https://reviews.llvm.org/D53364
llvm-svn: 344895
Nemanja Ivanovic [Mon, 22 Oct 2018 11:22:59 +0000 (11:22 +0000)]
[PowerPC][NFC] Fix bugs in r+r to r+i conversion
The D-Form VSX loads introduced in ISA 3.0 are not direct D-Form equivalent of
the corresponding X-Forms since they only target the Altivec registers.
Namely LXSSPX can load into any of the 64 VSX registers whereas LXSSP can only
load into the upper 32 VSX registers. Similarly with the remaining affected
instructions.
There is currently no way that I can see to trigger the bug, but as we add other
ways of exploiting these instructions, there may very well be instances that do.
This is an NFC patch in practical terms since the changes it introduces can not
be triggered without an MIR test.
Differential revision: https://reviews.llvm.org/D53323
llvm-svn: 344894
Benjamin Kramer [Mon, 22 Oct 2018 10:51:34 +0000 (10:51 +0000)]
[CGProfile] Turn constant-size SmallVector into array
No functionality change.
llvm-svn: 344893
Simon Pilgrim [Mon, 22 Oct 2018 10:46:37 +0000 (10:46 +0000)]
Fix MSVC "not all control paths return a value" warning. NFCI.
llvm-svn: 344892
Marco Antognini [Mon, 22 Oct 2018 10:41:07 +0000 (10:41 +0000)]
[OpenCL] Fix definitions of __builtin_(add|sub|mul)_overflow
Ensure __builtin_(add|sub|mul)_overflow return bool instead of void as per
specification (LanguageExtensions).
Differential Revision: https://reviews.llvm.org/D52875
llvm-svn: 344891
Peter Smith [Mon, 22 Oct 2018 10:40:52 +0000 (10:40 +0000)]
[ARM][AArch64] Add LLVM_FALLTHROUGH to silence warning [NFC]
A follow up to D52784 to add in LLVM_FALLTHROUGH where there is an
intentional fall through in a switch statement. This will hopefully silence
a GCC warning.
Differential Revision: https://reviews.llvm.org/D52784
llvm-svn: 344890
Eric Liu [Mon, 22 Oct 2018 08:47:31 +0000 (08:47 +0000)]
[CodeComplete] Fix accessibility of protected members when accessing members implicitly.
Reviewers: ilya-biryukov
Subscribers: arphaman, cfe-commits
Differential Revision: https://reviews.llvm.org/D53369
llvm-svn: 344889
Sam Clegg [Mon, 22 Oct 2018 08:35:39 +0000 (08:35 +0000)]
Use llvm::arrayRefFromStringRef
Differential Revision: https://reviews.llvm.org/D53432
llvm-svn: 344888
Sam Clegg [Mon, 22 Oct 2018 08:34:37 +0000 (08:34 +0000)]
[WebAssembly] Simplify --help message
Update wasm to match ELF changes made rL333596.
Differential Revision: https://reviews.llvm.org/D53421
llvm-svn: 344887
Aleksandr Urakov [Mon, 22 Oct 2018 07:18:08 +0000 (07:18 +0000)]
[PDB] Extend IPDBSession's interface to retrieve frame data
Summary:
This patch just extends the `IPDBSession` interface to allow retrieving
of frame data through it, and adds an implementation over DIA. It is needed
for an implementation (for now with DIA) of the conversion from FPO programs
to DWARF expressions mentioned in D53086.
Reviewers: zturner, asmith, rnk
Reviewed By: asmith
Subscribers: mgorny, aprantl, JDevlieghere, llvm-commits
Differential Revision: https://reviews.llvm.org/D53324
llvm-svn: 344886
Miklos Vajna [Mon, 22 Oct 2018 06:36:30 +0000 (06:36 +0000)]
ReleaseNotes: move readability-redundant-smartptr-get part down below new checks
llvm-svn: 344885
Craig Topper [Mon, 22 Oct 2018 06:30:22 +0000 (06:30 +0000)]
[X86] Add patterns for vector and/or/xor/andn with other types than vXi64.
This makes fast isel treat all legal vector types the same way. Previously only vXi64 was in the fast-isel tables.
This unfortunately prevents matching of andn by fast-isel for these types since the requires SelectionDAG. But we already had this issue for vXi64. So at least we're consistent now.
Interestinly it looks like fast-isel can't handle instructions with constant vector arguments so the the not part of the andn patterns is selected with SelectionDAG. This explains why VPTERNLOG shows up in some of the tests.
This is a subset of D53268. As I make progress on that, I will try to reduce the number of lines in the tablegen files.
llvm-svn: 344884
Dorit Nuzman [Mon, 22 Oct 2018 06:17:09 +0000 (06:17 +0000)]
[IAI,LV] Avoid creating a scalar epilogue due to gaps in interleave-groups when
optimizing for size
LV is careful to respect -Os and not to create a scalar epilog in all cases
(runtime tests, trip-counts that require a remainder loop) except for peeling
due to gaps in interleave-groups. This patch fixes that; -Os will now have us
invalidate such interleave-groups and vectorize without an epilog.
The patch also removes a related FIXME comment that is now obsolete, and was
also inaccurate:
"FIXME: return None if loop requiresScalarEpilog(<MaxVF>), or look for a smaller
MaxVF that does not require a scalar epilog."
(requiresScalarEpilog() has nothing to do with VF).
Reviewers: Ayal, hsaito, dcaballe, fhahn
Reviewed By: Ayal
Differential Revision: https://reviews.llvm.org/D53420
llvm-svn: 344883
Dean Michael Berris [Mon, 22 Oct 2018 06:11:50 +0000 (06:11 +0000)]
[XRay] Account for virtual memory re-use
Change the assumption when releasing memory to a buffer queue that new
generations might not be able to re-use the memory mapped addresses.
llvm-svn: 344882
Dean Michael Berris [Mon, 22 Oct 2018 04:53:58 +0000 (04:53 +0000)]
[XRay][compiler-rt] Generational Buffer Management
Summary:
This change updates the buffer queue implementation to support using a
generation number to identify the lifetime of buffers. This first part
introduces the notion of the generation number, without changing the way
we handle the buffers yet.
What's missing here is the cleanup of the buffers. Ideally we'll keep
the two most recent generations. We need to ensure that before we do any
writes to the buffers, that we check the generation number(s) first.
Those changes will follow-on from this change.
Depends on D52588.
Reviewers: mboerger, eizan
Subscribers: llvm-commits, jfb
Differential Revision: https://reviews.llvm.org/D52974
llvm-svn: 344881