zink: export PIPE_CAP_SHADER_ATOMIC_INT64

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18144>

zink: export PIPE_CAP_IMAGE_ATOMIC_FLOAT_ADD

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18144>

zink: handle 64bit float atomics

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18144>

zink: fix atomic ssbo indexing with non-32bit values

this has to adjust using dest size, not hardcoded as uint32

Fixes: 5a95c6b3282 ("zink: rewrite atomic ssbo intrinsics as atomic derefs")

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18144>

zink: emit Aliased decoration for aliased bo descriptors

this is required any time two variables point to the same descriptor,
as is needed when multiple bitsizes are used

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18144>

zink: simplify ntv shader descriptor emission

these can be emitted directly

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18144>

zink: always set var used by get_ssbo_size to the 32bit var

avoid depending on iteration ordering

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18144>

zink: remove special-casing for 64bit runtime array emission

this should be fine normally

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18144>

zink: uncap ssbo size

since the transition to UINT pipe cap, this no longer needs to be
restricted to appease gallium

fixes #7103

cc: mesa-stable

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18144>

radv: remove unnecessary .align_mul=4

The builders can pick a default using the component size.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18465>

radv: use nir_ubfe_imm

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18465>

radv: shrink zero-initialization in vkCmdSetVertexInputEXT

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18465>

radv: disable EXT_vertex_input_dynamic_state when using DGC

This simplifies the DGC path and removes some untested code. The only user
of the partial DGC implementation (vkd3d-proton) doesn't use
EXT_vertex_input_dynamic_state.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18465>

pvr: Implement vkCmdWaitEvents2 API.

Signed-off-by: Rajnesh Kanwal <rajnesh.kanwal@imgtec.com>
Reviewed-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18612>

pvr: Implement vkCmdResetEvent2 API.

Signed-off-by: Rajnesh Kanwal <rajnesh.kanwal@imgtec.com>
Reviewed-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18612>

pvr: Implement vkCmdSetEvent2 API.

Signed-off-by: Rajnesh Kanwal <rajnesh.kanwal@imgtec.com>
Reviewed-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18612>

pvr: Implement vkCreateEvent and vkDestroyEvent APIs.

Signed-off-by: Rajnesh Kanwal <rajnesh.kanwal@imgtec.com>
Reviewed-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18612>

pvr: Add basic skeleton for event sub cmd.

Signed-off-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Reviewed-by: Sarah Walker <Sarah.Walker@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18612>

Revert "radv: upload the PS epilog in the existing pipeline BO"

This is completely broken because the PS epilog has refcount and
radv_upload_shaders() updates its VA.

This reverts commit 7c34b31db25e71625c78bf232c543caad84dda55.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18632>

v3dv: fix program id for binning shaders

We had a comment stating that we were using different program ids for render
and binning but this isn't true. We were only assigning ids to the render
stages and then we would create the binning stages and not assign a program id
to them at all, so they would remain with a program id of 0.

This change removes the comment and makes sure we assign the same program
id to the binning and render stages of the pipeline, which makes it a lot
easier to match render and binning shaders when debugging.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18630>

ac/nir/ngg: support gs streamout

Port from radeonsi.

Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17654>

ac/nir/ngg: support multi stream per output slot for gs

radeonsi may pack multi stream output to same slot.

Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17654>

ac/nir/ngg: ngg_gs_load_out_vtx_primflag support stream

Streamout need primflag for any stream.

Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17654>

ac/nir/ngg: nogs support streamout

Port from radeonsi.

Works on both GFX11 and GFX10. Although GFX10 can do atomic
GDS add on all threads, now we just disable the NGG streamout
for GFX10, so it's OK.

There's a difference for the GFX11 implementation with radeonsi
that we do all 4 buffer/stream info calc on a single thread.
It's just because this is simple, we need to update GDS on a
single thread anyway, and streamout is not that performance
critical to loss a small amount of instruction. We may change
to a better implementation when using register based streamout.

When streamout enabled, ES threads need to save all vertex
attributes to LDS besides position. This is because we don't
know where in the streamout buffer to export the attributes to
and wheter there are space in the streamout buffer.

Streamout is done in primitives, so we need to check if there
is space and where the current primitive should be written to
by GDS atomic add, then in GS threads do the streamout.

Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17654>

ac/nir/ngg: cleanup prim id to prepare for streamout

Streamout also need barrier after culling, so move the
prim id barrier up to after culling.

Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17654>

ac/llvm: implement nir_intrinsic_ordered_xfb_counter_add_amd

Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17654>

nir: add nir_intrinsic_ordered_xfb_counter_add_amd

Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17654>

nir,ac/llvm: add nir_intrinsic_load_ordered_id_amd

Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17654>

nir: add nir_intrinsic_load_streamout_buffer_amd

Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17654>

nir: add nir_intrinsic_load_num_vertices_per_primitive_amd

This is used in streamout as radeonsi pass this value for VS
by arg.

Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17654>

nir: fix nir_xfb_info buffer_to_stream length

Fixes: 19064b8c3a8 ("nir: Add a pass for gathering transform feedback info")
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17654>

radv: do not remove PSIZ for VS when the topology is unknown

When compiling only the pre-rast stages in a library, the input
assembly state might not be present and the topology would be 0.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18519>

radv: enable the VS prologs cache if graphicsPipelineLibrary is enabled

GPL will re-use most of the VS prologs code.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18519>

radv: bind the VS input state for prologs created with GPL

If we have a VS that needs a prolog without using the dynamic state,
that means that it comes from a library, so we can overwrite the
cmdbuf VS input state.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18519>

radv: prepare the VS input state for prologs created with GPL

This state will be bound at pipeline bind time.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18519>

radv: rename radv_pipeline_key::vs::dynamic_vs_input to has_prolog

With GPL it's possible to create VS prologs without this dynamic state,
so it seems better to rename.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18519>

radv: disable VK_EXT_graphics_pipeline_library with LLVM

Epilogs/prologs aren't supported at all.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18609>

v3dv: don't return incompatible driver if GPU is not present

Instead, we should just return VK_SUCCESS. The physical device
won't be initialized and vkEnumeratePhysicalDevices will not
list it as available, which is the expected behavior here.

Also, VK_ERROR_INCOMPATIBLE_DRIVER is not a valid return code
from vkEnumeratePhysicalDevices, so never return that, instead
we return VK_ERROR_INITIALIZATION_FAILED if a valid device was
found but we failed to create the physical device for it.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Tested-By: Ryan Houdek <Sonicadvance1@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18591>

turnip: Keep a host copy of push descriptor sets.

Otherwise, the back-copy on same-layout push descriptor updates would read
from WC memory, which is absurdly slow.  Improves performance of
vkoverhead's descriptor_template_12ubo_push from 760k/sec to 2876k/sec.
Improves submit-disabled gfxbench gl_driver2 performance on zink from 79.6
fps to 103.6.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18561>

turnip: Ignore pDescriptorCounts[] for non-variable-count layouts.

The spec says "If VkDescriptorSetAllocateInfo::pSetLayouts[i] does not
include a variable-sized descriptor binding, then pDescriptorCounts[i] is
ignored."  So, make sure that we ignore it unless there is a
variable-sized binding.  And, we can keep it simple just taking the
variable-sized path for variable-sized bindings with the 0 variable_count
value to handle "If descriptorSetCount is zero or this structure is not
included in the pNext chain, then the variable lengths are considered to
be zero."

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18561>

drm-shim: drop gnu99 override

If we override with gnu99 here, we effectively down-grade from C11,
meaning we can no longer assume static_assert support.

Fixes: 45fb815a756 ("util: implement STATIC_ASSERT using c++11 / c11 primitives")

Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Suggested-by: Chia-I Wu <olvaffe@gmail.com>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Reviewed-by: Eric Engestrom <eric@igalia.com>
Reviewed-by: Chia-I Wu <olvaffe@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18611>

turnip: Skip rather than invalidate LRZ on gl_FragDepth writes.

As long as the direction is still compatible, if we skip the LRZ use and
updates for this draw, then we can keep using LRZ later in the scene, as
whatever gl_FragDepth will get written by the shader later will still have
to move the depth in the right direction.

Similarly, the no_earlyz flag that contributes to DISABLE_LRZ just wants
to make sure we don't kill fragments before dispatch, not change what Z
eventually lands.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18606>

turnip: Don't look at RB.Z_READ_ENABLE for setting LRZ.Z_TEST_ENABLE.

It will always be set in HW when RB.Z_WRITE_ENABLE is set (since that
implies RB.Z_TEST_ENABLE), but in the case of dynamic Z the flag gets
computed at emit time and not stored to cmd->state.rb_depth_cntl.  This
bug effectively disabled LRZ for zink.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18606>

turnip: Ignore dynamic color write enables past our number of attachments.

We were always disabling LRZ writes on zink+turnip because it sets all the
color write enables (translating directly from GL turning them all on).

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18606>

turnip: Add some missing LRZ disable debug.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18606>

u_transfer_helper: Pack Z24S8 to Z24-in-Z32F and S8

On Asahi needed to pass

   dEQP-GLES3.functional.texture.specification.texsubimage2d_depth.depth24_stencil8

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Acked-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18136>

u_transfer_helper: Handle Z24X8 for drivers that don't use the
interleaved transfer_map

Fixes
dEQP-GLES3.functional.texture.format.sized.2d.depth_component24_pot on
Asahi.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Acked-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18136>

radv: Cleanup radv_GetInstanceProcAddr

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18600>

venus: use buffer cache for vkGetDeviceBufferMemoryRequirements

Align with vkGetBufferMemoryRequirements2 and utilize the cache for
retrieving memory requirements before trying the host call.

Fixes
dEQP-VK.api.invariance.memory_requirements_matching
dEQP-VK.memory.requirements.create_info.buffer.regular

Signed-off-by: Juston Li <justonli@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18603>

vulkan: update comments to device enumeration callbacks

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18607>

radv: Implement VK_EXT_mutable_descriptor_type.

Trivial promotion from VALVE, just rename enums and types.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18610>

vulkan: Update to 1.3.228 headers.

Acked-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18610>

d3d12: d3d12_video_buffer_create_impl make resident after checking for resource creation

Reviewed-by: Giancarlo Devich <gdevich@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18328>

d3d12: Add VPBlit processor check for D3D12_FEATURE_VIDEO_PROCESS_MAX_INPUT_STREAMS

Reviewed-by: Giancarlo Devich <gdevich@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18328>

d3d12: Allow video processing for formats other than NV12

Reviewed-by: Giancarlo Devich <gdevich@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18328>

d3d12: Allow formats other than NV12 in d3d12_video_buffer

Reviewed-by: Giancarlo Devich <gdevich@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18328>

d3d12: Add support for importing d3d12_video_buffer from handle

Reviewed-by: Giancarlo Devich <gdevich@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18328>

d3d12: Fix leak in d3d12_resource_from_resource and usage in d3d12 video dec, enc

Reviewed-by: Giancarlo Devich <gdevich@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18328>

d3d12: Fix winsys displaytarget leak in d3d12_resource

Reviewed-by: Giancarlo Devich <gdevich@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18328>

d3d12: Fix leak in d3d12_video_proc when re-creating ID3D12VideoProcessor

Reviewed-by: Giancarlo Devich <gdevich@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18328>

d3d12: Fill feedback in d3d12_video_encoder_encode_bitstream so vaSyncSurface properly populates buf->coded_size

Reviewed-by: Giancarlo Devich <gdevich@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18328>

d3d12: Avoid heap allocations on hot path d3d12_video_decoder_dxva_picparams_from_pipe_picparams_hevc

Using pre-allocated storage now.

Reviewed-by: Giancarlo Devich <gdevich@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18328>

d3d12: Avoid local allocations for D3D12_RESOURCE_BARRIER on hot paths

Reviewed-by: Giancarlo Devich <gdevich@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18328>

d3d12: Avoid extra allocation, copies when generating DXVA_Slice_Hxxx_Short arrays

Reviewed-by: Giancarlo Devich <gdevich@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18328>

d3d12: Add HEVC Decode/Encode

Reviewed-by: Giancarlo Devich <gdevich@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18328>

gallium/vl: Rename s_addr variable in vl_idct.c as it conflicts with windows existing inaddr.h keyword definition

Reviewed-by: Giancarlo Devich <gdevich@microsoft.com>
Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18328>

gallium/vl: Allow vl_zscan.h to be included from C++

Reviewed-by: Giancarlo Devich <gdevich@microsoft.com>
Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18328>

d3d12/va: Name convention rename PIPE_VIDEO_SUPPORTS_CONTIGUOUS_PLANES_MAP to PIPE_VIDEO_CAP_SUPPORTS_CONTIGUOUS_PLANES_MAP

Reviewed-by: Giancarlo Devich <gdevich@microsoft.com>
Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18328>

frontends/va: Support HEVC caps regarding features, block sizes, prediction direction

Add new pipe structures: PIPE_VIDEO_CAP_ENC_HEVC_BLOCK_SIZES, PIPE_VIDEO_CAP_ENC_HEVC_FEATURE_FLAGS, PIPE_VIDEO_CAP_ENC_HEVC_PREDICTION_DIRECTION
Implement new VA caps VAConfigAttribEncHEVCFeatures, VAConfigAttribEncHEVCBlockSizes, VAConfigAttribPredictionDirection

Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18328>

frontends/va: Extend single to multiple L0-L1 references for HEVC Encode

Also fixing refactored variable name for L0/L1 lists in drivers/radeonsi to avoid build break.

Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18328>

frontends/va: Add HEVC Encode support multi slice and extend pipe args

Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18328>

frontends/va: Mark IsLongTerm in HEVC decode args

Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18328>

frontends/omx: Fill HEVC Decode param IntraPicFlag

Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18328>

frontends/vdpau: Fill HEVC Decode param IntraPicFlag

Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18328>

frontends/va: Add HEVC decode args: IntraPicFlag, no_pic_reordering_flag, no_bipred_flag

Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18328>

frontends/va: Add HEVC decode slice descriptors

Adds HEVC decoded slice descriptors to the pipe interface and also to the VA frontend

Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18328>

radv/ci: move some tests from the renoir fail to its flake list

This mirrors the change we made for vega10 (6bbe3c6d3) in August...
Seems like the chances of a PASS are indeed slim, but possible.

Signed-off-by: Martin Roukala (né Peres) <martin.roukala@mupuf.org>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18590>

panfrost: do not fake rgtc-support

Panfrost doesn't expose LATC format support at all, so RGTC
state-tracker level RGTC support is sufficient to drop the fake RGTC
flag on Panfrost.

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Acked-by: Eric Engestrom <eric@igalia.com>
Tested-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18248>

mesa/st: enable rgtc extension with fallback

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Acked-by: Eric Engestrom <eric@igalia.com>
Tested-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18248>

mesa/st: do not fall back to uncompressed for rgtc

This logic doesn't really do what it pretends to; we don't expose the
RGTC features unless we actually have RGTC support. This is about to
change, but for that logic to work, we need to be able to tell if we're
using a fallback-format or not, and we can't do that unless we keep the
format as RGTC.

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Acked-by: Eric Engestrom <eric@igalia.com>
Tested-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18248>

mesa/st: implement fallback for rgtc

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Acked-by: Eric Engestrom <eric@igalia.com>
Tested-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18248>

mesa/main: add _mesa_unpack_rgtc

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Acked-by: Eric Engestrom <eric@igalia.com>
Tested-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18248>

util/format: implement rgtc -> r8 / r8g8 unpack

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Acked-by: Eric Engestrom <eric@igalia.com>
Tested-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18248>

util/format: allow unpacking less than a block from rgtc

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Acked-by: Eric Engestrom <eric@igalia.com>
Tested-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18248>

util/format: fix broken indentation

This file had a mixture of tabs and spaces for indent.

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Acked-by: Eric Engestrom <eric@igalia.com>
Tested-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18248>

mesa: add format-helper for rgtc

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Acked-by: Eric Engestrom <eric@igalia.com>
Tested-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18248>

mesa/st: add context-flag for rgtc

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Acked-by: Eric Engestrom <eric@igalia.com>
Tested-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18248>

radv/ci: cleanup lists of failures/flakes

When tests are already in the flakes list, it's useless to mark them
as expected failures.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Martin Roukala (né Peres) <martin.roukala@mupuf.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18592>

turnip: use vk_descriptor_set_layout

Mainly for vk_descriptor_set_layout_{ref,unref}.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18588>

turnip: use vk_buffer

Mainly for vk_buffer_range.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18588>

freedreno: We really don't need aligned vbo's

The logic was inverted, we don't need aligned for later gens.

Fixes: 60912f1ebd3 ("freedreno: we don't need aligned vbo's")
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18605>

freedreno/drm/virtio: Handle read after upload

If we get CPU access (such as a read) after an upload transfer, we need
to ensure that the host has handled the upload.  Do this by stalling
when the buffer is mapped.  (The previous commit ensures we don't try to
do a pointless upload for an already mapped buffer.)

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18604>

freedreno/drm/virtio: Don't prefer upload for mapped buffers

The upload path is intended to avoid stalling on host in order to mmap
recently allocated buffers.  But if we already had to mmap it, no point
in taking the upload path.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18604>

freedreno/virtio: Don't upload if we have valid range

A transfer that only partially writes the staging buffer could overwrite
valid buffer contents, unless we are told that it is ok to discard the
entire range.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18604>

mesa: Lower mediump temps and CS shared when the driver supports FP16+INT16.

Typically GLSL mediump lowering will have lowered all the ALU ops
generating the values to 16-bit, and once vars_to_ssa happens the mediump
temps disappear.  However, if they don't disappear (for example, the var
gets indirected and eventually gets lowered to scratch or indirect
lowering), then you don't want the storage upconverted to 32-bit.

Also, if a CS shared var is declared mediump, then storing it as 16 bit
prevents conversions around the load store assuming the ALU ops related to
them are 16 bit.  For gfxbench aztec ruins, the CS shared var sizes are
cut in half, improving overall perf by 0.805549% +/- 0.0953482% (n=6) on
gl-5-normal.

freedreno shader-db:
total instructions in shared programs: 2917577 -> 2917743 (<.01%)
instructions in affected programs: 46141 -> 46307 (0.36%)
total last-baryf in shared programs: 109712 -> 109492 (-0.20%)
last-baryf in affected programs: 638 -> 418 (-34.48%)
total full in shared programs: 190275 -> 190218 (-0.03%)
full in affected programs: 156 -> 99 (-36.54%)
total constlen in shared programs: 492596 -> 492600 (<.01%)
constlen in affected programs: 8 -> 12 (50.00%)

total cat6 in shared programs: 33019 -> 33107 (0.27%)
cat6 in affected programs: 3604 -> 3692 (2.44%)
total stp in shared programs: 3626 -> 3670 (1.21%)
stp in affected programs: 3336 -> 3380 (1.32%)
total ldp in shared programs: 1718 -> 1762 (2.56%)
ldp in affected programs: 1680 -> 1724 (2.62%)
(this is all in aztec ruins)

total sstall in shared programs: 195656 -> 195182 (-0.24%)
sstall in affected programs: 3249 -> 2775 (-14.59%)
total (ss) in shared programs: 52823 -> 52966 (0.27%)
(ss) in affected programs: 1733 -> 1876 (8.25%)
total systall in shared programs: 507928 -> 508687 (0.15%)
systall in affected programs: 103010 -> 103769 (0.74%)
total (sy) in shared programs: 23185 -> 23196 (0.05%)
(sy) in affected programs: 1276 -> 1287 (0.86%)
total waves in shared programs: 435290 -> 435302 (<.01%)
waves in affected programs: 12 -> 24 (100.00%)
total loops in shared programs: 407 -> 405 (-0.49%)
loops in affected programs: 9 -> 7 (-22.22%)

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18452>

nir/lower_mediump_vars: Don't lower mediump shared vars with atomic access.

I don't know of any GPUs doing 16-bit atomic accesses, nor do I know of
anybody wanting that in shaders.  But deqp has GLES CTS cases that set
mediump on shared variables, so just skip lowering for those vars.

Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18452>

freedreno/ir3: Consistently lower mediump inputs to 16-bit (when we can).

If every use was a conversion to 16, then ir3_cf would fold it into the
bary instruction.  But if something had generated a highp comparison of
the mediump input with a mediump op result, it would get stuck as highp,
even though we could have used 16-bit values without upconverting.

This fixes dEQP-GLES2.functional.shaders.algorithm.rgb_to_hsl_fragment on
ANGLE on turnip, closing #7043.  fossil-db results are mixed:

fossil-db:
Totals from 697 (4.65% of 14988) affected shaders:
MaxWaves: 10712 -> 10736 (+0.22%)
Instrs: 82394 -> 83572 (+1.43%); split: -1.31%, +2.74%
CodeSize: 178280 -> 180118 (+1.03%); split: -0.46%, +1.49%
NOPs: 15887 -> 16067 (+1.13%); split: -7.48%, +8.61%
MOVs: 1297 -> 1328 (+2.39%); split: -6.86%, +9.25%
Full: 3730 -> 3842 (+3.00%); split: -1.80%, +4.80%
(ss): 1877 -> 1849 (-1.49%); split: -5.59%, +4.10%
(sy): 1249 -> 1255 (+0.48%); split: -1.04%, +1.52%
(ss)-stall: 6809 -> 6364 (-6.54%); split: -13.85%, +7.31%
(sy)-stall: 17059 -> 17257 (+1.16%); split: -6.51%, +7.67%
Cat0: 17220 -> 17400 (+1.05%); split: -6.90%, +7.94%
Cat1: 5307 -> 6366 (+19.95%); split: -6.93%, +26.89%
Cat2: 39138 -> 39101 (-0.09%); split: -0.31%, +0.22%
Cat3: 16772 -> 16741 (-0.18%)
Cat5: 1269 -> 1276 (+0.55%)

I tried to pick some apps to test that looked the most impacted, and
indeed the results are mixed:

cookie_run_kingdom:         +0.275514% +/- 0.0883816% (n=68)
trex_200:                   +0.0943847% +/- 0.0297073% (n=1463)
command_and_conquer_rivals: no difference (n=131)
war_planet_online:          no difference (n=120)
lego_legacy:                -0.192131% +/- 0.152083% (n=99)
among_us:                   -0.625227% +/- 0.385419% (n=60)

Given that the perf results are small and go both ways, and apparently
we're an outlier in not always lowering mediump inputs to 16-bit, just do
it for consistency with other drivers.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18506>

intel/compiler/fs: Use DF to load constants when has_64bit_int is not supported

This was already been done to gen7 platforms, so now extending to all
platforms without has_64bit_int.

Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18577>

intel/compiler/fs: Fix compilation of shaders with SHADER_OPCODE_SHUFFLE of float64 type

During the lower_regioning() optimization, required_exec_type() is
returning BRW_REGISTER_TYPE_UQ type when processing
SHADER_OPCODE_SHUFFLE instructions of type BRW_REGISTER_TYPE_DF but
MTL has float64 support but lacks int64 support causing shader
compilation to fail.

To fix that we could make required_exec_type() return
BRW_REGISTER_TYPE_DF in such case but SHADER_OPCODE_SHUFFLE virtual
instruction runs in the integer pipeline(inferred_exec_pipe()).

So here replacing the has_64bit check by has_64bit_int, this will
properly handle older and newer cases making this function return
BRW_REGISTER_TYPE_UD.
Then lower_exec_type() will take care to generate 2 32bits operations
to accomplish the same.

While at it also dropping the 'devinfo->verx10 == 70' check as
GFX7_FEATURES fall into the same category as MTL, has float64 but no
int64 support.

Fixes at least this crucible tests:
func.uniform-subgroup.exclusive.fadd64.q0
func.uniform-subgroup.exclusive.fmin64.q0
func.uniform-subgroup.exclusive.fmax64.q0

Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18577>

radv: stop checking for NULL pipelines in radv_CmdBindPipeline()

This should never happen now.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18567>