Tom Rix [Wed, 8 Mar 2023 14:09:43 +0000 (09:09 -0500)]
drm/amd/display: remove unused variable res_pool
With gcc and W=1, there is this error
drivers/gpu/drm/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm_mst_types.c:1214:31:
error: variable ‘res_pool’ set but not used [-Werror=unused-but-set-variable]
1214 | struct resource_pool *res_pool;
| ^~~~~~~~
Since res_pool is unused, remove it.
Signed-off-by: Tom Rix <trix@redhat.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Bjorn Helgaas [Tue, 7 Mar 2023 20:22:21 +0000 (14:22 -0600)]
drm/amdgpu: Drop redundant pci_enable_pcie_error_reporting()
pci_enable_pcie_error_reporting() enables the device to send ERR_*
Messages. Since
f26e58bf6f54 ("PCI/AER: Enable error reporting when AER is
native"), the PCI core does this for all devices during enumeration, so the
driver doesn't need to do it itself.
Remove the redundant pci_enable_pcie_error_reporting() call from the
driver.
Note that this only controls ERR_* Messages from the device. An ERR_*
Message may cause the Root Port to generate an interrupt, depending on the
AER Root Error Command register managed by the AER service driver.
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
David Tadokoro [Tue, 7 Mar 2023 19:14:17 +0000 (16:14 -0300)]
drm/amd/display: add prefix to amdgpu_dm_crtc.h functions
Some amdgpu_dm_crtc.h functions didn't have names that indicated where
they were declared.
To better filter results in debug tools like ftrace, prefix these
functions with 'amdgpu_dm_crtc_'.
Signed-off-by: David Tadokoro <davidbtadokoro@usp.br>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Deucher [Wed, 8 Mar 2023 14:29:37 +0000 (09:29 -0500)]
Revert "drm/amd/display: Pass proper parent for DM backlight device registration"
This reverts commit
d24b77e444bef83155557ebf4c2b3c551f198926.
This does not work as expected.
Bug: https://gitlab.gnome.org/GNOME/gnome-settings-daemon/-/issues/730
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Veerabadhran Gopalakrishnan [Wed, 8 Mar 2023 14:03:53 +0000 (19:33 +0530)]
drm/amdgpu/soc21: Add video cap query support for VCN_4_0_4
Added the video capability query support for VCN version 4_0_4
Signed-off-by: Veerabadhran Gopalakrishnan <veerabadhran.gopalakrishnan@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
David Tadokoro [Tue, 7 Mar 2023 22:53:41 +0000 (19:53 -0300)]
drm/amd/display: remove legacy fields of dc_plane_cap struct
The fields blends_with_above and blends_with_below of struct
dc_plane_cap (defined in dc/dc.h) are boolean and set to true by
default. All instances of a dc_plane_cap maintain the default values of
both. Also, there is only one if statement that checks those fields and
there would be the same effect if it was deleted (assuming that those
fields are always going to be true).
For this reason, considering both fields as legacy ones, this commit
removes them and the aforementioned if statement.
Reviewed-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: David Tadokoro <davidbtadokoro@usp.br>
Signed-off-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Deucher [Tue, 28 Feb 2023 19:54:43 +0000 (14:54 -0500)]
Revert "drm/amdgpu/display: change pipe policy for DCN 2.1"
This reverts commit
fa458eb10dc7218146a84e6d2e072424e64d188a.
The issue is no longer present even with this commit present
as verified by the original reporter.
Reviewed-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Link: https://gitlab.freedesktop.org/drm/amd/-/issues/1849#note_1759599
Signed-off-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Peter Foley [Fri, 13 Jan 2023 04:30:07 +0000 (23:30 -0500)]
amdgpu: Avoid building on UML
The amdgpu driver tries to use fields not supported by UML's cpuinfo
struct. Disable the driver when targeting UML to avoid tripping up
allyesconfig.
e.g.
../drivers/gpu/drm/amd/amdgpu/../pm/powerplay/hwmgr/smu7_hwmgr.c: In function ‘intel_core_rkl_chk’:
../drivers/gpu/drm/amd/amdgpu/../pm/powerplay/hwmgr/smu7_hwmgr.c:1742:33: error: initialization of ‘struct cpuinfo_x86 *’ from incompatible pointer type ‘struct cpuinfo_um *’ [-Werror=incompatible-pointer-types
]
../drivers/gpu/drm/amd/amdgpu/../amdkfd/kfd_topology.c: In function ‘kfd_cpumask_to_apic_id’:
../drivers/gpu/drm/amd/amdgpu/../amdkfd/kfd_topology.c:2157:48: error: ‘struct cpuinfo_um’ has no member named ‘apicid’
Acked-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Peter Foley <pefoley2@pefoley.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Husain Alshehhi [Sun, 5 Mar 2023 21:24:22 +0000 (21:24 +0000)]
drivers/gpu: fix typo in comment
Replace "isntance" with "instance".
Signed-off-by: Husain Alshehhi <husain@alshehhi.io>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
David Tadokoro [Mon, 6 Mar 2023 02:24:27 +0000 (23:24 -0300)]
drm/amd/display: add prefix to amdgpu_dm_plane.h functions
The amdgpu_dm_plane.h functions didn't have names that indicated where
they were declared.
To better filter results in debug tools like ftrace, prefix these
functions with 'amdgpu_dm_plane_'.
Note that we may want to make this same change in other files like
amdgpu_dm_crtc.h.
Signed-off-by: David Tadokoro <davidbtadokoro@usp.br>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Deucher [Tue, 7 Mar 2023 13:59:13 +0000 (08:59 -0500)]
drm/amdgpu: fix error checking in amdgpu_read_mm_registers for nv
Properly skip non-existent registers as well.
Bug: https://gitlab.freedesktop.org/drm/amd/-/issues/2442
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Deucher [Mon, 6 Mar 2023 15:35:34 +0000 (10:35 -0500)]
drm/amdgpu: fix error checking in amdgpu_read_mm_registers for soc21
Properly skip non-existent registers as well.
Bug: https://gitlab.freedesktop.org/drm/amd/-/issues/2442
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Deucher [Mon, 6 Mar 2023 15:34:20 +0000 (10:34 -0500)]
drm/amdgpu: fix error checking in amdgpu_read_mm_registers for soc15
Properly skip non-existent registers as well.
Bug: https://gitlab.freedesktop.org/drm/amd/-/issues/2442
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Tom Rix [Sun, 5 Mar 2023 12:52:26 +0000 (07:52 -0500)]
drm/amd/display: change several dcn30 variables storage-class-specifier to static
smatch reports these similar problems in dcn30
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn30/dcn30_dwb.c:223:25:
warning: symbol 'dcn30_dwbc_funcs' was not declared. Should it be static?
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn30/dcn30_mmhubbub.c:214:28:
warning: symbol 'dcn30_mmhubbub_funcs' was not declared. Should it be static?
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn30/dcn30_mpc.c:1402:24:
warning: symbol 'dcn30_mpc_funcs' was not declared. Should it be static?
All of these are only used in their definition file, so they should be static
Signed-off-by: Tom Rix <trix@redhat.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Tom Rix [Sat, 4 Mar 2023 16:22:13 +0000 (11:22 -0500)]
drm/amd/display: change several dcn20 variables storage-class-specifier to static
smatch reports these similar problems in dcn20
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_dsc.c:53:24:
warning: symbol 'dcn20_dsc_funcs' was not declared. Should it be static?
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_dwb.c:304:25:
warning: symbol 'dcn20_dwbc_funcs' was not declared. Should it be static?
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_mmhubbub.c:300:28:
warning: symbol 'dcn20_mmhubbub_funcs' was not declared. Should it be static?
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_mpc.c:545:24:
warning: symbol 'dcn20_mpc_funcs' was not declared. Should it be static?
All of these are only used in their definition file, so they should be static
Signed-off-by: Tom Rix <trix@redhat.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Tom Rix [Sat, 4 Mar 2023 15:26:40 +0000 (10:26 -0500)]
drm/amd/display: change several dcn201 variables storage-class-specifier to static
smatch reports these similar problems in dcn201
drivers/gpu/drm/amd/amdgpu/../display/dc/clk_mgr/dcn201/dcn201_clk_mgr.c:165:22:
warning: symbol 'dcn201_funcs' was not declared. Should it be static?
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn201/dcn201_resource.c:77:30:
warning: symbol 'dcn201_ip' was not declared. Should it be static?
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn201/dcn201_resource.c:139:37:
warning: symbol 'dcn201_soc' was not declared. Should it be static?
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn201/dcn201_mpc.c:79:24:
warning: symbol 'dcn201_mpc_funcs' was not declared. Should it be static?
All of these are only used in their definition file, so they should be static
Signed-off-by: Tom Rix <trix@redhat.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Lijo Lazar [Thu, 2 Mar 2023 22:06:39 +0000 (17:06 -0500)]
drm/amd/pm: Add SMU 13.0.6 support
Add initial SMU 13.0.6 implementation.
v1:
Initial implementation to support SMU 13.0.6.
v2:
Add driver interface version check.
v3: rebase (Alex)
v4: Enable i2c for avoid warning (Alex)
v5: sqaush in cleanups up through (Alex)
"drm/amd/pm: Ignore EIO error on SMUv13.0.6"
Signed-off-by: Lijo Lazar <lijo.lazar@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
lyndonli [Fri, 3 Mar 2023 06:55:05 +0000 (14:55 +0800)]
drm/amdgpu: Fix the warning info when removing amdgpu device
Actually, the drm_dev_enter in psp_cmd_submit_buf does not
protect anything. If DRM device is unplugged, it will always
check the condition in WARN_ON. So drop drm_dev_enter and
drm_dev_exit in psp_cmd_submit_buf.
When removing amdgpu, the calling order is as follows:
amdgpu_pci_remove
drm_dev_unplug
amdgpu_driver_unload_kms
amdgpu_device_fini_hw
amdgpu_device_ip_fini_early
psp_hw_fini
psp_ras_terminate
psp_ta_unloadye
psp_cmd_submit_buf
[ 4507.740388] Call Trace:
[ 4507.740389] <TASK>
[ 4507.740391] psp_ta_unload+0x44/0x70 [amdgpu]
[ 4507.740485] psp_ras_terminate+0x4d/0x70 [amdgpu]
[ 4507.740575] psp_hw_fini+0x28/0xa0 [amdgpu]
[ 4507.740662] amdgpu_device_fini_hw+0x328/0x442 [amdgpu]
[ 4507.740791] amdgpu_driver_unload_kms+0x51/0x60 [amdgpu]
[ 4507.740875] amdgpu_pci_remove+0x5a/0x140 [amdgpu]
[ 4507.740962] ? _raw_spin_unlock_irqrestore+0x27/0x43
[ 4507.740965] ? __pm_runtime_resume+0x60/0x90
[ 4507.740968] pci_device_remove+0x39/0xb0
[ 4507.740971] device_remove+0x46/0x70
[ 4507.740972] device_release_driver_internal+0xd1/0x160
[ 4507.740974] driver_detach+0x4a/0x90
[ 4507.740975] bus_remove_driver+0x6c/0xf0
[ 4507.740976] driver_unregister+0x31/0x50
[ 4507.740977] pci_unregister_driver+0x40/0x90
[ 4507.740978] amdgpu_exit+0x15/0x120 [amdgpu]
v2: fix commit message style issue
Signed-off-by: lyndonli <Lyndon.Li@amd.com>
Reviewed-by: Guchun Chen <guchun.chen@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Felix Kuehling [Wed, 1 Mar 2023 02:28:59 +0000 (21:28 -0500)]
drm/amdgpu: Optimize end of non-contig VA ranges
Treat the last page in a non-contiguous range as part of the following
contiguous range.
Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>
Reviewed-by: Philip Yang <Philip.Yang@amd.com>
Reviewed-and-tested-by: Rajneesh Bhardwaj <rajneesh.bhardwaj@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Lijo Lazar [Thu, 2 Mar 2023 22:00:34 +0000 (17:00 -0500)]
drm/amd/pm: Add PMFW headers for SMU 13.0.6
Initial version of PMFW interface and message
headers for SMU 13.0.6 support.
v2: squash in location fixes (Alex)
v3: squash in updates (Alex)
Signed-off-by: Lijo Lazar <lijo.lazar@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Hawking Zhang [Sun, 24 Apr 2022 06:34:17 +0000 (14:34 +0800)]
drm/amdgpu: add mp v13_0_6 ip headers
Add mp v13_0_6 register offset and shift masks
header files
v2: update headers (Alex)
Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Le Ma <Le.Ma@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Orlando Chamberlain [Fri, 3 Mar 2023 11:34:25 +0000 (22:34 +1100)]
drm/amdgpu: register a vga_switcheroo client for MacBooks with apple-gmux
Commit
3840c5bcc245 ("drm/amdgpu: disentangle runtime pm and
vga_switcheroo") made amdgpu only register a vga_switcheroo client for
GPU's with PX, however AMD GPUs in dual gpu Apple Macbooks do need to
register, but don't have PX. Instead of AMD's PX, they use apple-gmux.
Use apple_gmux_detect() to identify these gpus, and
pci_is_thunderbolt_attached() to ensure eGPUs connected to Dual GPU
Macbooks don't register with vga_switcheroo.
Fixes:
3840c5bcc245 ("drm/amdgpu: disentangle runtime pm and vga_switcheroo")
Link: https://lore.kernel.org/amd-gfx/20230210044826.9834-10-orlandoch.dev@gmail.com/
Signed-off-by: Orlando Chamberlain <orlandoch.dev@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Aric Cyr [Mon, 27 Feb 2023 02:54:21 +0000 (21:54 -0500)]
drm/amd/display: 3.2.226
In this new version there are two major changes:
1) Transitioning to the new DC commit sequence
There is an extended effort to migrate to the new DC commit sequence
that better adheres to the DCN hardware constraints. Most of the code
was upstreamed already but not connected to amdgpu_dm, and in this new
DC version, our DM finally started to use it for all ASICs. This should
improve stability and enable us to improve how pipe split works.
2) Drop old CONFIG_DRM_AMD_DC_DCN in favor of new CONFIG_DRM_AMD_DC_FP
For historical reasons, we created CONFIG_DRM_AMD_DC_DCN to isolate
FPU-related code to only be used for DCN. Over the years, we lost
control over this guard, and it was spread in multiple areas. In this
new DC version, there is an effort to remove all unnecessary
CONFIG_DRM_AMD_DC_DCN and replace the others for CONFIG_DRM_AMD_DC_FP,
which better describes which type of code this guard is intended for.
Finally, this version brings along the following:
- Enable HostVM based on rIOMMU active
- Keep PHY active for dp confi
- Improves Z8
- Update clock table
- Code and directives clean up
Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com>
Signed-off-by: Aric Cyr <aric.cyr@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Rodrigo Siqueira [Thu, 16 Feb 2023 16:49:22 +0000 (09:49 -0700)]
drm/amd/display: Ensure that planes are in the same order
The function dc_update_planes_and_stream handles multiple cases where DC
needs to remove and add planes in the commit tail phase. After Linux
started to use this function, some of the IGT kms_plane started to fail;
one good example to illustrate why the new sequence regressed IGT is the
subtest plane-position-hole which has the following diagram as a
template:
+--------------------+ +-----------------------+
| +-----+ | | +-----+ |
| | | | | | +-----+ |
| | +--+ | ==> | | | | | |
| |__| | | +-|---+ | |
| | | +-----+ |
| | | |
+--------------------+ +-----------------------+
(a) Final image (b) Composed image
IGT expects image (a) as the final result of two plane compositions as
described in figure (b). After the migration to the new sequence, the
last plane order is changed, and DC generates the following image:
+---------------------+
| +-----+ |
| | | |
| | | |
| +-----+ |
| |
+---------------------+
Notice that the generated image by DC is different because the small
square that should be composed on top of the primary plane is below the
primary plane. For this reason, the CRC will mismatch with the expected
value. Since the function dc_add_all_planes_for_stream re-append all the
new planes back to the dc_validation_set, this commit ensures that the
original sequence is maintained. After this change, all CI tests in all
ASICs start to pass again.
Reviewed-by: Harry Wentland <Harry.Wentland@amd.com>
Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com>
Suggested-by: Melissa Wen <mwen@igalia.com>
Signed-off-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Rodrigo Siqueira [Thu, 23 Feb 2023 18:36:08 +0000 (11:36 -0700)]
drm/amd/display: Add wrapper to call planes and stream update
[Why & How]
This commit is part of a sequence of changes that replaces the commit
sequence used in the DC with a new one. As a result of this transition,
we moved some specific parts from the commit sequence and brought them
to amdgpu_dm. This commit adds a wrapper inside DM that enable our
drivers to do any necessary preparation or change before we offload the
plane/stream update to DC.
Reviewed-by: Harry Wentland <Harry.Wentland@amd.com>
Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com>
Signed-off-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Rodrigo Siqueira [Tue, 1 Nov 2022 14:20:09 +0000 (10:20 -0400)]
drm/amd/display: Use DC_LOG_DC in the trasform pixel function
[Why & How]
DC now uses a new commit sequence which is more robust since it
addresses cases where we need to reorganize pipes based on planes and
other parameters. As a result, this new commit sequence reset the DC
state by cleaning plane states and re-creating them accordingly with the
need. For this reason, the dce_transform_set_pixel_storage_depth can be
invoked after a plane state is destroyed and before its re-creation. In
this situation and on DCE devices, DC will hit a condition that will
trigger a dmesg log that looks like this:
Console: switching to colour frame buffer device 240x67
------------[ cut here ]------------
[..]
Hardware name: System manufacturer System Product Name/PRIME X370-PRO, BIOS 5603 07/28/2020
RIP: 0010:dce_transform_set_pixel_storage_depth+0x3f8/0x480 [amdgpu]
[..]
RSP: 0018:
ffffc9000202b850 EFLAGS:
00010293
RAX:
ffffffffa081d100 RBX:
ffff888110790000 RCX:
000000000000000c
RDX:
ffff888100bedbf8 RSI:
0000000000001a50 RDI:
ffff88810463c900
RBP:
0000000000000000 R08:
0000000000000000 R09:
0000000000000007
R10:
0000000000000001 R11:
0000000000000f00 R12:
ffff88810f500010
R13:
ffff888100bedbf8 R14:
ffff88810f515688 R15:
0000000000000000
FS:
00007ff0159249c0(0000) GS:
ffff88840e940000(0000) knlGS:
0000000000000000
CS: 0010 DS: 0000 ES: 0000 CR0:
0000000080050033
CR2:
00007ff01528e550 CR3:
0000000002a10000 CR4:
00000000003506e0
Call Trace:
<TASK>
? dm_write_reg_func+0x21/0x80 [amdgpu
340dadd3f7c8cf4be11cf0bdc850245e99abe0e8]
dc_stream_set_dither_option+0xfb/0x130 [amdgpu
340dadd3f7c8cf4be11cf0bdc850245e99abe0e8]
amdgpu_dm_crtc_configure_crc_source+0x10b/0x190 [amdgpu
340dadd3f7c8cf4be11cf0bdc850245e99abe0e8]
amdgpu_dm_atomic_commit_tail+0x20a8/0x2a90 [amdgpu
340dadd3f7c8cf4be11cf0bdc850245e99abe0e8]
? free_unref_page_commit+0x98/0x170
? free_unref_page+0xcc/0x150
commit_tail+0x94/0x120
drm_atomic_helper_commit+0x10f/0x140
drm_atomic_commit+0x94/0xc0
? drm_plane_get_damage_clips.cold+0x1c/0x1c
drm_client_modeset_commit_atomic+0x203/0x250
drm_client_modeset_commit_locked+0x56/0x150
drm_client_modeset_commit+0x21/0x40
drm_fb_helper_lastclose+0x42/0x70
amdgpu_driver_lastclose_kms+0xa/0x10 [amdgpu
340dadd3f7c8cf4be11cf0bdc850245e99abe0e8]
drm_release+0xda/0x110
__fput+0x89/0x240
task_work_run+0x5c/0x90
do_exit+0x333/0xae0
do_group_exit+0x2d/0x90
__x64_sys_exit_group+0x14/0x20
do_syscall_64+0x5b/0x80
? exit_to_user_mode_prepare+0x1e/0x140
entry_SYSCALL_64_after_hwframe+0x44/0xae
RIP: 0033:0x7ff016ceaca1
Code: Unable to access opcode bytes at RIP 0x7ff016ceac77.
RSP: 002b:
00007ffe7a2357e8 EFLAGS:
00000246 ORIG_RAX:
00000000000000e7
RAX:
ffffffffffffffda RBX:
00007ff016e15a00 RCX:
00007ff016ceaca1
RDX:
000000000000003c RSI:
00000000000000e7 RDI:
0000000000000000
RBP:
0000000000000000 R08:
ffffffffffffff78 R09:
0000000000000000
R10:
0000000000000000 R11:
0000000000000246 R12:
00007ff016e15a00
R13:
0000000000000000 R14:
00007ff016e1aee8 R15:
00007ff016e1af00
</TASK>
Since this issue only happens in a transition state on DC, this commit
replace BREAK_TO_DEBUGGER with DC_LOG_DC.
Reviewed-by: Harry Wentland <Harry.Wentland@amd.com>
Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com>
Signed-off-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Rodrigo Siqueira [Thu, 6 Oct 2022 20:40:55 +0000 (16:40 -0400)]
drm/amd/display: Use dc_update_planes_and_stream
[Why & How]
The old dc_commit_updates_for_stream lacks manipulation for many corner
cases where the DC feature requires special attention; as a result, it
starts to show its limitation (e.g., the SubVP feature is not supported
by it, among other cases). To modernize and unify our internal API, this
commit replaces the old dc_commit_updates_for_stream with
dc_update_planes_and_stream, which has more features.
Reviewed-by: Harry Wentland <Harry.Wentland@amd.com>
Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com>
Signed-off-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Rodrigo Siqueira [Thu, 6 Oct 2022 18:57:31 +0000 (14:57 -0400)]
drm/amd/display: Drop dc_commit_state in favor of dc_commit_streams
[Why & How]
There are two functions responsible for handling the DC commit state:
dc_commit_state and dc_commit_streams. Both have the same goal, but
dc_commit_streams surpess dc_commit_state in terms of completeness. For
this reason, maintaining these two functions makes maintainability
unnecessarily complicated. This commit replaces the old dc_commit_state
in favor of dc_commit_streams, and removes the old dc_commit_state.
Reviewed-by: Harry Wentland <Harry.Wentland@amd.com>
Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com>
Signed-off-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Rodrigo Siqueira [Fri, 24 Feb 2023 18:35:43 +0000 (11:35 -0700)]
drm/amd/display: Ensure vmin and vmax adjust for DCE
[Why & How]
In the commit
32953485c558 ("drm/amd/display: Do not update DRR while
BW optimizations pending"), a modification was added to avoid adjusting
DRR if optimized bandwidth is set. This change was only intended for
DCN, but one part of the patch changed the code path for DCE devices and
caused regressions to the kms_vrr test. To address this problem, this
commit adds a modification in which dc_stream_adjust_vmin_vmax will be
fully executed in DCE devices.
Fixes:
32953485c558 ("drm/amd/display: Do not update DRR while BW optimizations pending")
Reviewed-by: Aric Cyr <Aric.Cyr@amd.com>
Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com>
Signed-off-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alvin Lee [Fri, 24 Feb 2023 15:39:17 +0000 (10:39 -0500)]
drm/amd/display: Pass tg and hubp inst instead of pipe index for SubVP
[Description]
- For pipe harvesting cases, the pipe index does not necessarily
match up with the OTG instance, so pass index by OTG Instance instead
- For pipe split cases pass HUBP instance, since the split index is
only used for HUBP programming
- Also check for OPP ID when accessing opp for pipe harvesting cases
Reviewed-by: Jun Lei <Jun.Lei@amd.com>
Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com>
Signed-off-by: Alvin Lee <Alvin.Lee2@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Gabe Teeger [Thu, 23 Feb 2023 16:30:31 +0000 (11:30 -0500)]
drm/amd/display: Enable HostVM based on rIOMMU active
[Why]
There is underflow and flickering occuring. The
underflow stops when hostvm is forced to active.
According to policy, hostvm should be enabled if riommu
is active, but this is not taken into account when
deciding whether to enable hostvm.
[What]
For DCN314, set hostvm to true if riommu is active.
Reviewed-by: Nicholas Kazlauskas <Nicholas.Kazlauskas@amd.com>
Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com>
Signed-off-by: Gabe Teeger <gabe.teeger@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Wayne Lin [Fri, 17 Feb 2023 05:26:56 +0000 (13:26 +0800)]
drm/amd/display: Pass the right info to drm_dp_remove_payload
[Why & How]
drm_dp_remove_payload() interface was changed. Correct amdgpu dm code
to pass the right parameter to the drm helper function.
Reviewed-by: Jerry Zuo <Jerry.Zuo@amd.com>
Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com>
Signed-off-by: Wayne Lin <Wayne.Lin@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alvin Lee [Fri, 24 Feb 2023 14:45:36 +0000 (09:45 -0500)]
drm/amd/display: Update to correct min FCLK when construction BB
[Description]
- For min FCLK, choose the min of 300Mhz and PMFW requirement
- Also only apply min DET check in DML for non-UR cases
Reviewed-by: Jun Lei <Jun.Lei@amd.com>
Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com>
Signed-off-by: Alvin Lee <Alvin.Lee2@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Harry Wentland [Tue, 14 Feb 2023 19:14:49 +0000 (14:14 -0500)]
drm/amd/display: Rename DCN config to FP
[Why & How]
The only reason we have the DCN config is for
floating point support. Rename it to make that
clear and (hopefully) avoid misuse of the config
in the future.
Reviewed-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com>
Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Harry Wentland [Mon, 13 Feb 2023 22:58:22 +0000 (17:58 -0500)]
drm/amd/display: Drop unnecessary DCN guards
[Why & How]
DC is littered with many DCN guards that are not needed.
Drop them.
Reviewed-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com>
Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Harry Wentland [Mon, 13 Feb 2023 22:46:45 +0000 (17:46 -0500)]
drm/amd/display: Drop unnecessary DCN guards
[Why]
DM is littered with DCN guards leading to frequent
breakages on non-DCN builds when new code is added.
[How]
Remove all guards that are not needed.
Reviewed-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com>
Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Agustin Gutierrez [Tue, 21 Feb 2023 21:08:15 +0000 (16:08 -0500)]
drm/amd/display: Keep PHY active for dp config
[Why]
Current hotplug sequence causes temporary hang at the re-entry of the
optimized power state.
[How]
Keep a PHY active when detecting DP signal + DPMS active
Reviewed-by: Nicholas Kazlauskas <Nicholas.Kazlauskas@amd.com>
Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com>
Signed-off-by: Agustin Gutierrez <agustin.gutierrez@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Chris Park [Thu, 23 Feb 2023 06:07:23 +0000 (01:07 -0500)]
drm/amd/display: Simplify register offsets
[Why]
Runtime initialization of register addresses define
duplicate register offsets in resource file, and makes
register offsets in sub-block defined for compile
time initialization obsolete.
[How]
Remove obsolete sub block register offsets that is
no longer referenced.
Reviewed-by: Martin Leung <Martin.Leung@amd.com>
Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com>
Signed-off-by: Chris Park <chris.park@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Wenjing Liu [Thu, 16 Feb 2023 21:22:01 +0000 (16:22 -0500)]
drm/amd/display: replace all dc_link function call in link with link functions
[why]
Link components should not reply on dc_link_exports to access link function in
other link components.
Reviewed-by: Jun Lei <Jun.Lei@amd.com>
Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com>
Signed-off-by: Wenjing Liu <wenjing.liu@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Wenjing Liu [Wed, 15 Feb 2023 17:50:59 +0000 (12:50 -0500)]
drm/amd/display: move dc_link functions in protocols folder to dc_link_exports
[why]
link component should only have one interface serving dc.
[how]
We are moving dc_link functions exposed to DM to dc_link_exports
and unify link component interface in link.h with function pointer
to match the style of other dc component. This is the third step to move
dc_link functions under protocols folder to dc_link_exports.
Reviewed-by: Jun Lei <Jun.Lei@amd.com>
Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com>
Signed-off-by: Wenjing Liu <wenjing.liu@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Wenjing Liu [Wed, 15 Feb 2023 21:03:09 +0000 (16:03 -0500)]
drm/amd/display: link link_dp_dpia_bw.o in makefile
[Why & How]
- We have added link_dp_dpia_bw code but it is not currently
added in makefile. We are adding this to makefile so it would
be built.
- Remove unused dc_link.h
Reviewed-by: Jun Lei <Jun.Lei@amd.com>
Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com>
Signed-off-by: Wenjing Liu <wenjing.liu@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Wenjing Liu [Tue, 14 Feb 2023 17:16:55 +0000 (12:16 -0500)]
drm/amd/display: move dc_link functions in link root folder to dc_link_exports
[why]
link component should only have one interface serving dc.
[how]
We are moving dc_link functions exposed to DM to dc_link_exports
and unify link component interface in link.h with function pointer
to match the style of other dc component. This is the second step to move
dc_link functions under link root folder to dc_link_exports.
Reviewed-by: Jun Lei <Jun.Lei@amd.com>
Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com>
Signed-off-by: Wenjing Liu <wenjing.liu@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Wenjing Liu [Tue, 14 Feb 2023 16:24:01 +0000 (11:24 -0500)]
drm/amd/display: move dc_link functions in accessories folder to dc_link_exports
[why]
link component should only have one interface serving dc.
[how]
We are moving dc_link functions exposed to DM to dc_link_exports
and unify link component interface in link.h with function pointer
to match the style of other dc component. This is the first step to move
dc_link functions under accessories folder to dc_link_exports.
Reviewed-by: Jun Lei <Jun.Lei@amd.com>
Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com>
Signed-off-by: Wenjing Liu <wenjing.liu@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Harry Wentland [Mon, 13 Feb 2023 20:29:06 +0000 (15:29 -0500)]
drm/amd/display: Build DSC without DCN config
[Why & How]
DSC needs DCN but we are trying reduce the usage of the
DCN flag. It's easier to build the DSC code sprinkled
around DC core and the DMs and just guard the place where
DSC uses floating point code.
Since DSC is never enabled on non-DCN ASICs this won't
have any effect.
Reviewed-by: Hamza Mahfooz <Hamza.Mahfooz@amd.com>
Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com>
Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Harry Wentland [Mon, 13 Feb 2023 22:36:55 +0000 (17:36 -0500)]
drm/amd/display: call remove_stream_from_ctx from res_pool funcs
[Why & How]
DM should never use a non-interface function to call into
DC. The original code is incorrect on ASICs that don't
use DCN20's remove_stream_from_ctx function.
Reviewed-by: Aurabindo Pillai <Aurabindo.Pillai@amd.com>
Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com>
Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Harry Wentland [Mon, 13 Feb 2023 16:19:31 +0000 (11:19 -0500)]
drm/amd/display: Drop CONFIG_DRM_AMD_DC_HDCP
[Why & How]
There is no reason we still need a config option for this.
Reviewed-by: Wenjing Liu <Wenjing.Liu@amd.com>
Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com>
Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Mike Hsieh [Mon, 20 Feb 2023 03:48:26 +0000 (11:48 +0800)]
drm/amd/display: fix typo in dc_dsc_config_options structure
[WHY]
There is a typo in dc_dsc_config_options structure
[HOW]
Fix the typo
Reviewed-by: Wenjing Liu <Wenjing.Liu@amd.com>
Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com>
Signed-off-by: Mike Hsieh <Mike.Hsieh@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Harry Wentland [Mon, 13 Feb 2023 20:17:29 +0000 (15:17 -0500)]
drm/amd/display: Fix no-DCN build
[Why & How]
This fixes a couple misplaced CONFIG_DRM_AMD_DC_DCN
blocks.
Reviewed-by: Sun peng Li <Sunpeng.Li@amd.com>
Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com>
Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Harry Wentland [Mon, 13 Feb 2023 16:35:20 +0000 (11:35 -0500)]
drm/amd/display: Drop CONFIG_DRM_AMD_DC_HDR
[Why & How]
Remove dead code.
Reviewed-by: Sun peng Li <Sunpeng.Li@amd.com>
Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com>
Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Nicholas Kazlauskas [Tue, 21 Feb 2023 15:27:10 +0000 (10:27 -0500)]
drm/amd/display: Update minimum stutter residency for DCN314 Z8
[Why]
Block periods that are too short as they have the potential to
currently cause hangs in other firmware components on the system.
[How]
Update the threshold, mostly targeting a block of 4k and downscaling.
Reviewed-by: Jun Lei <Jun.Lei@amd.com>
Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com>
Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Nicholas Kazlauskas [Fri, 17 Feb 2023 16:17:50 +0000 (11:17 -0500)]
drm/amd/display: Add minimum Z8 residency debug option
[Why]
Allows finer control and tuning for debug and profiling.
[How]
Add the debug option into DC. The default remains the same as before
for now.
Reviewed-by: Jun Lei <Jun.Lei@amd.com>
Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com>
Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Aric Cyr [Mon, 20 Feb 2023 01:42:43 +0000 (20:42 -0500)]
drm/amd/display: 3.2.225
This version brings along the following:
- Correct way to find OPP index
- Unify DC logging for BW Alloc
- Add height granularity limitation for dsc slice height calculation
Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com>
Signed-off-by: Aric Cyr <aric.cyr@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alvin Lee [Fri, 17 Feb 2023 22:54:01 +0000 (17:54 -0500)]
drm/amd/display: When blanking during init loop to find OPP index
[Description]
For pipe harvesting cases we cannot rely on array index
to get the correct OPP instance, we must loop through
each instance to find the correct one.
Reviewed-by: Jun Lei <Jun.Lei@amd.com>
Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com>
Signed-off-by: Alvin Lee <Alvin.Lee2@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Mustapha Ghaddar [Wed, 15 Feb 2023 15:05:53 +0000 (10:05 -0500)]
drm/amd/display: Unify DC logging for BW Alloc
[WHY]
To keep all logging within DC unified
[HOW]
Use the standard DC Logging functions
Reviewed-by: Wenjing Liu <Wenjing.Liu@amd.com>
Reviewed-by: Meenakshikumar Somasundaram <Meenakshikumar.Somasundaram@amd.com>
Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com>
Signed-off-by: Mustapha Ghaddar <mghaddar@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Mike Hsieh [Tue, 10 Jan 2023 02:52:03 +0000 (10:52 +0800)]
drm/amd/display: Add height granularity limitation for dsc slice height calculation
[WHY]
eDP add new limitation for Y granularity for selected update feature.
DSC does not include this limitation while calculating slice height.
[HOW]
Add new limitation while looking for DSC slice height.
Reviewed-by: Cruise Hung <Cruise.Hung@amd.com>
Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com>
Signed-off-by: Mike Hsieh <Mike.Hsieh@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Perry Yuan [Thu, 23 Feb 2023 07:10:45 +0000 (15:10 +0800)]
drm/amdgpu: skip the invalid workload type
If some invalid workload types exposed by the power profile sysfs node,
it will be failed to set the unsuported profiles.
So we can skip to show the invalid workload type in the profiles list to
avoid that failure happen.
Acked-by: Kenneth Feng <kenneth.feng@amd.com>
Reviewed-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Perry Yuan <perry.yuan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Perry Yuan [Thu, 16 Feb 2023 09:16:51 +0000 (17:16 +0800)]
drm/amdgpu: map new capped and uncapped mode power profiles for Vangogh
Capped and Uncapped workload types are supported, each workload type
has different performance thresholds and pstate conditions.
* capped mode is used by power centric workload
* uncapped mode is used by perf centric workload
Acked-by: Kenneth Feng <kenneth.feng@amd.com>
Reviewed-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Perry Yuan <perry.yuan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Perry Yuan [Thu, 16 Feb 2023 09:18:20 +0000 (17:18 +0800)]
drm/amdgpu/pm: add capped/uncapped power profile modes
Capped and uncapped workload types switching are supported on Vangogh,
User can switch the power profile and check current type with below commands.
1) switch to capped mode:
`# echo 8 > /sys/class/drm/card0/device/pp_power_profile_mode`
2) switch to uncapped mode:
`# echo 9 > /sys/class/drm/card0/device/pp_power_profile_mode`
3) check current mode:
$ cat /sys/class/drm/card0/device/pp_power_profile_mode
1 3D_FULL_SCREEN
3 VIDEO
4 VR
5 COMPUTE
6 CUSTOM
8 CAPPED
9 UNCAPPED*
Acked-by: Kenneth Feng <kenneth.feng@amd.com>
Reviewed-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Perry Yuan <perry.yuan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Shashank Sharma [Mon, 27 Feb 2023 14:42:28 +0000 (15:42 +0100)]
drm/amdgpu: fix return value check in kfd
This patch fixes a return value check in kfd doorbell handling.
This function should return 0(error) only when the ida_simple_get
returns < 0(error), return > 0 is a success case.
Cc: Felix Kuehling <Felix.Kuehling@amd.com>
Cc: Alex Deucher <alexander.deucher@amd.com>
Fixes:
16f0013157bf ("drm/amdkfd: Allocate doorbells only when needed")
Acked-by: Christian Koenig <chriatian.koenig@amd.com>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Shashank Sharma <shashank.sharma@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Christian König [Mon, 16 Jan 2023 19:49:23 +0000 (20:49 +0100)]
drm/amdgpu: simplify amdgpu_uvd_send_msg
We only need one offset and not an array of it.
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Hawking Zhang [Mon, 3 Oct 2022 19:40:54 +0000 (15:40 -0400)]
drm/amdgpu: add PSP ip block for PSP 13.0.6
Add PSP IP handling for PSP 13.0.6
Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Le Ma <Le.Ma@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Hawking Zhang [Mon, 30 May 2022 02:58:35 +0000 (10:58 +0800)]
drm/amdgpu: initialize ta ucode for psp v13_0_6
Initialize ta ucode for psp v13_0_6
Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Lijo Lazar <lijo.lazar@amd.com>
Reviewed-by: Le Ma <Le.Ma@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Hawking Zhang [Sat, 28 Aug 2021 09:26:37 +0000 (17:26 +0800)]
drm/amdgpu: init sos microcode for psp v13_0_6
parse psp_v13_0_6_sos.bin and initialze various
psp ucode arraies respectively
Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Le Ma <le.ma@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Hawking Zhang [Sat, 28 Aug 2021 06:52:32 +0000 (14:52 +0800)]
drm/amdgpu: add psp early init for PSP 13.0.6
Initialize psp ip callbacks for PSP 13.0.6.
Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Le Ma <le.ma@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Le Ma [Tue, 7 Sep 2021 05:36:56 +0000 (13:36 +0800)]
drm/amdgpu: set sdma v4_4_2 ip block
Use sdma 4.4.2 IP block for chips with sdma 4.4.2 hardware.
Signed-off-by: Le Ma <le.ma@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Le Ma [Tue, 17 May 2022 16:20:21 +0000 (00:20 +0800)]
drm/amdgpu: add sdma v4_4_2 support (v4)
Add support for SDMA 4.4.2.
v1: Create sdma_v4_4_2.[c|h] for initial support (Le)
v2: update amdgpu_ring_init call with atomic score (Hawking)
v3: Squash in sdma_start fixes (Alex)
v4: Comment out currently unused RAS code (Alex)
Signed-off-by: Le Ma <le.ma@amd.com>
Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Hawking Zhang [Wed, 11 May 2022 07:01:19 +0000 (15:01 +0800)]
drm/amdgpu: add sdma v4_4_2 ip headers
Add sdma v4_4_2 register offset and shift masks
header files
v2: update headers (Alex)
Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Le Ma <Le.Ma@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Hawking Zhang [Mon, 3 Oct 2022 19:45:33 +0000 (15:45 -0400)]
drm/amdgpu: add HDP ip block for HDP 4.4.2
Add HDP IP handling for HDP 4.4.2
Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Le Ma <Le.Ma@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Le Ma [Tue, 31 Aug 2021 05:32:20 +0000 (13:32 +0800)]
drm/amdgpu: skip hdp invalidation for HDP 4.4.2
No mmHDP_READ_CACHE_INVALIDATE register on HDP 4.4.2.
Signed-off-by: Le Ma <le.ma@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Hawking Zhang [Sun, 24 Apr 2022 06:28:44 +0000 (14:28 +0800)]
drm/amdgpu: add hdp v4_4_2 ip headers
Add hdp v4_4_2 register offset and shift masks
header files
v2: update headers (Alex)
Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Le Ma <Le.Ma@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Hawking Zhang [Mon, 3 Oct 2022 19:39:41 +0000 (15:39 -0400)]
drm/amdgpu: add IH ip block for IH 4.4.2
Add IH IP handling for IH 4.4.2
Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Le Ma <Le.Ma@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Le Ma [Tue, 20 Jul 2021 09:16:46 +0000 (17:16 +0800)]
drm/amdgpu: skip ih2 rb allocation for IH 4.4.2
No ih2 hardware on IH 4.4.2.
Signed-off-by: Le Ma <le.ma@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Le Ma [Wed, 28 Apr 2021 06:50:21 +0000 (14:50 +0800)]
drm/amdgpu: set ih chicken bit for IH 4.4.2
Share same register address with IH 4.4.0.
Signed-off-by: Le Ma <le.ma@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Muhammad Usama Anjum [Fri, 3 Mar 2023 12:02:32 +0000 (17:02 +0500)]
drm/amdgpu: remove dead code
The less than zero comparison of unsigned variable "value" is never
true. Remove dead code.
Fixes:
c3ed0e72c872 ("drm/amdgpu: added a sysfs interface for thermal throttling")
Signed-off-by: Muhammad Usama Anjum <usama.anjum@collabora.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Deepak R Varma [Sun, 15 Jan 2023 10:00:38 +0000 (15:30 +0530)]
drm/amd/display: Simplify same effect if/else blocks
The if / else block code has same effect irrespective of the logical
evaluation. Hence, simply the implementation by removing the unnecessary
conditional evaluation. While at it, also fix the long line checkpatch
complaint. Issue identified using cond_no_effect.cocci Coccinelle
semantic patch script.
Fixes:
9114b55fabae ("drm/amd/display: Fix SubVP control flow in the MPO context")
Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Deepak R Varma <drv@mailo.com>
Signed-off-by: Hamza Mahfooz <hamza.mahfooz@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Daniel Phillips [Wed, 1 Mar 2023 22:28:26 +0000 (14:28 -0800)]
amdkfd: Memory availability can never be negative
Our assumptions about how much KFD memory is currently available for
allocation may be violated by various complexities so we define the
reported value as advisory, however we should never report negative
availability.
Signed-off-by: Daniel Phillips <daniel.phillips@amd.com>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Mario Limonciello [Wed, 1 Mar 2023 15:36:06 +0000 (09:36 -0600)]
drm/amd: Fix initialization mistake for NBIO 7.3.0
The same strapping initialization issue that happened on NBIO 7.5.1
appears to be happening on NBIO 7.3.0.
Apply the same fix to 7.3.0 as well.
Note: This workaround relies upon the integrated GPU being enabled
in BIOS. If the integrated GPU is disabled in BIOS a different
workaround will be required.
Reported-by: Thomas Glanzmann <thomas@glanzmann.de>
Cc: Basavaraj Natikar <Basavaraj.Natikar@amd.com>
Link: https://lore.kernel.org/linux-usb/Y%2Fz9GdHjPyF2rNG3@glanzmann.de/T/#u
Signed-off-by: Mario Limonciello <mario.limonciello@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
lyndonli [Thu, 2 Mar 2023 06:18:12 +0000 (14:18 +0800)]
drm/amdgpu: Fix call trace warning and hang when removing amdgpu device
On GPUs with RAS enabled, below call trace and hang are observed when
shutting down device.
v2: use DRM device unplugged flag instead of shutdown flag as the check to
prevent memory wipe in shutdown stage.
[ +0.000000] RIP: 0010:amdgpu_vram_mgr_fini+0x18d/0x1c0 [amdgpu]
[ +0.000001] PKRU:
55555554
[ +0.000001] Call Trace:
[ +0.000001] <TASK>
[ +0.000002] amdgpu_ttm_fini+0x140/0x1c0 [amdgpu]
[ +0.000183] amdgpu_bo_fini+0x27/0xa0 [amdgpu]
[ +0.000184] gmc_v11_0_sw_fini+0x2b/0x40 [amdgpu]
[ +0.000163] amdgpu_device_fini_sw+0xb6/0x510 [amdgpu]
[ +0.000152] amdgpu_driver_release_kms+0x16/0x30 [amdgpu]
[ +0.000090] drm_dev_release+0x28/0x50 [drm]
[ +0.000016] devm_drm_dev_init_release+0x38/0x60 [drm]
[ +0.000011] devm_action_release+0x15/0x20
[ +0.000003] release_nodes+0x40/0xc0
[ +0.000001] devres_release_all+0x9e/0xe0
[ +0.000001] device_unbind_cleanup+0x12/0x80
[ +0.000003] device_release_driver_internal+0xff/0x160
[ +0.000001] driver_detach+0x4a/0x90
[ +0.000001] bus_remove_driver+0x6c/0xf0
[ +0.000001] driver_unregister+0x31/0x50
[ +0.000001] pci_unregister_driver+0x40/0x90
[ +0.000003] amdgpu_exit+0x15/0x120 [amdgpu]
Signed-off-by: lyndonli <Lyndon.Li@amd.com>
Reviewed-by: Guchun Chen <guchun.chen@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
bobzhou [Thu, 2 Mar 2023 05:56:59 +0000 (13:56 +0800)]
drm/amdgpu: remove unused variable
building with gcc and W=1 reports
drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c:7292:11: error:
unused variable 'tmp' [-Werror=unused-variable]
uint32_t tmp;
^~~
tmp is not used so remove it.
Signed-off-by: bobzhou <bob.zhou@amd.com>
Reviewed-by: Guchun Chen <guchun.chen@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Xiaogang Chen [Wed, 1 Mar 2023 16:21:06 +0000 (10:21 -0600)]
drm/amdkfd: Fix BO offset for multi-VMA page migration
svm_migrate_ram_to_vram migrates a prange from sys ram to vram. The prange may
cross multiple vma. Need remember current dst vram offset in the TTM resource for
each migration.
v2: squash in warning fix (Alex)
Signed-off-by: Xiaogang Chen <Xiaogang.Chen@amd.com>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Swapnil Patel [Wed, 1 Mar 2023 19:33:33 +0000 (14:33 -0500)]
drm/amd/display: Update clock table to include highest clock setting
[Why]
Currently, the clk manager matches SocVoltage with voltage from
fused settings (dfPstate clock table). And then corresponding clocks
are selected.
However in certain situations, this leads to clk manager not
including at least one entry with highest supported clock setting.
[How]
Update the clk manager to include at least one entry with highest
supported clock setting.
Reviewed-by: Pavle Kotarac <pavle.kotarac@amd.com>
Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com>
Signed-off-by: Swapnil Patel <Swapnil.Patel@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Christian König [Mon, 16 Jan 2023 19:49:23 +0000 (20:49 +0100)]
drm/amdgpu: stop waiting in amdgpu_uvd_send_msg
We have a wait in the amdgpu_bo_kmap() code for quite a while now, so
waiting here isn't needed any more.
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Candice Li [Mon, 16 Jan 2023 08:23:21 +0000 (16:23 +0800)]
drm/amd/pm: Enable ecc_info table support for smu v13_0_10
Support EccInfoTable which includes umc ras error count and
error address.
Signed-off-by: Candice Li <candice.li@amd.com>
Reviewed-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Stanley.Yang <Stanley.Yang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Candice Li [Fri, 24 Feb 2023 09:26:33 +0000 (17:26 +0800)]
drm/amdgpu: Support umc node harvest config on umc v8_10
Don't need to query error count and error address on harvest umc nodes.
v2: Fix code bug, use active_mask instead of harvsest_config
and remove unnecessary argument in LOOP macro.
v3: Leave adev->gmc.num_umc unchanged.
Signed-off-by: Candice Li <candice.li@amd.com>
Reviewed-by: Tao Zhou <tao.zhou1@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Kun Liu [Wed, 1 Mar 2023 01:53:33 +0000 (09:53 +0800)]
drm/amdgpu: fix no previous prototype warning
add static prefix for vangogh_set_apu_thermal_limit function
Signed-off-by: Kun Liu <Kun.Liu2@amd.com>
Reported-by: kernel test robot <lkp@intel.com>
Link: https://lore.kernel.org/oe-kbuild-all/202303010827.c2N0yBGT-lkp@intel.com
Reviewed-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
leiyaoyao [Mon, 27 Feb 2023 05:24:03 +0000 (13:24 +0800)]
drm/amdgpu: Stop clearing kiq position during fini
Do not clear kiq position in RLC_CP_SCHEDULER so that CP could perform
IDLE-SAVE after VF fini.
Otherwise it could cause GFX hang if another Win guest is rendering.
Signed-off-by: leiyaoyao <yaoyao.lei@amd.com>
Acked-by: ZhenGuo Yin <zhenguo.yin@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Harry Wentland [Fri, 13 Jan 2023 16:24:09 +0000 (11:24 -0500)]
drm/connector: print max_requested_bpc in state debugfs
This is useful to understand the bpc defaults and
support of a driver.
Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Cc: Pekka Paalanen <ppaalanen@gmail.com>
Cc: Sebastian Wick <sebastian.wick@redhat.com>
Cc: Vitaly.Prosyak@amd.com
Cc: Uma Shankar <uma.shankar@intel.com>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Cc: Joshua Ashton <joshua@froggi.es>
Cc: Jani Nikula <jani.nikula@linux.intel.com>
Cc: dri-devel@lists.freedesktop.org
Cc: amd-gfx@lists.freedesktop.org
Reviewed-By: Joshua Ashton <joshua@froggi.es>
Link: https://patchwork.freedesktop.org/patch/msgid/20230113162428.33874-3-harry.wentland@amd.com
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Harry Wentland [Fri, 13 Jan 2023 16:24:08 +0000 (11:24 -0500)]
drm/display: Don't block HDR_OUTPUT_METADATA on unknown EOTF
The EDID of an HDR display defines EOTFs that are supported
by the display and can be set in the HDR metadata infoframe.
Userspace is expected to read the EDID and set an appropriate
HDR_OUTPUT_METADATA.
In drm_parse_hdr_metadata_block the kernel reads the supported
EOTFs from the EDID and stores them in the
drm_connector->hdr_sink_metadata. While doing so it also
filters the EOTFs to the EOTFs the kernel knows about.
When an HDR_OUTPUT_METADATA is set it then checks to
make sure the EOTF is a supported EOTF. In cases where
the kernel doesn't know about a new EOTF this check will
fail, even if the EDID advertises support.
Since it is expected that userspace reads the EDID to understand
what the display supports it doesn't make sense for DRM to block
an HDR_OUTPUT_METADATA if it contains an EOTF the kernel doesn't
understand.
This comes with the added benefit of future-proofing metadata
support. If the spec defines a new EOTF there is no need to
update DRM and an compositor can immediately make use of it.
Bug: https://gitlab.freedesktop.org/wayland/weston/-/issues/609
v2: Distinguish EOTFs defind in kernel and ones defined
in EDID in the commit description (Pekka)
v3: Rebase; drm_hdmi_infoframe_set_hdr_metadata moved
to drm_hdmi_helper.c
Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Cc: Pekka Paalanen <ppaalanen@gmail.com>
Cc: Sebastian Wick <sebastian.wick@redhat.com>
Cc: Vitaly.Prosyak@amd.com
Cc: Uma Shankar <uma.shankar@intel.com>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Cc: Joshua Ashton <joshua@froggi.es>
Cc: Jani Nikula <jani.nikula@linux.intel.com>
Cc: dri-devel@lists.freedesktop.org
Cc: amd-gfx@lists.freedesktop.org
Acked-by: Pekka Paalanen <pekka.paalanen@collabora.com>
Reviewed-By: Joshua Ashton <joshua@froggi.es>
Link: https://patchwork.freedesktop.org/patch/msgid/20230113162428.33874-2-harry.wentland@amd.com
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Aric Cyr [Sun, 12 Feb 2023 23:15:18 +0000 (18:15 -0500)]
drm/amd/display: Promote DAL to 3.2.224
This version brings along the following:
- Correct DML calculation
- Extend Freesync over Pcon support
- Fixes in pstate hang and more
- Code cleanup for dc_link.h and dc_link.c
Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com>
Signed-off-by: Aric Cyr <aric.cyr@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Aurabindo Pillai [Tue, 21 Feb 2023 23:35:14 +0000 (18:35 -0500)]
drm/amd/display: fix clock sequence logic for DCN32
[Why&How]
The newer commit sequence on DCN32 onwards did not finish clock
optimization sequence since the newer sequence did not end up calling
dc_post_update_surfaces_to_stream() which resets dc->optimized_required.
Call this function before passing control on to the new commit sequence.
Reviewed-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com>
Signed-off-by: Aurabindo Pillai <aurabindo.pillai@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Aric Cyr [Thu, 9 Feb 2023 00:51:42 +0000 (19:51 -0500)]
drm/amd/display: Do not update DRR while BW optimizations pending
[why]
While bandwidth optimizations are pending, it's possible a pstate change
will occur. During this time, VSYNC handler should not also try to update
DRR parameters causing pstate hang
[how]
Do not adjust DRR if optimize bandwidth is set.
Reviewed-by: Aric Cyr <aric.cyr@amd.com>
Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com>
Signed-off-by: Aric Cyr <aric.cyr@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Aric Cyr [Sat, 11 Feb 2023 15:03:22 +0000 (10:03 -0500)]
drm/amd/display: Only wait for blank completion if OTG active
[why]
If OTG is not active, waiting for blank completion will always fail and
timeout resulting in unnecessary driver delays.
[how]
Check that OTG is enabled before waiting for blank.
Reviewed-by: Alvin Lee <Alvin.Lee2@amd.com>
Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com>
Signed-off-by: Aric Cyr <aric.cyr@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Samson Tam [Fri, 27 Jan 2023 23:30:08 +0000 (18:30 -0500)]
drm/amd/display: enable DPG when disabling plane for phantom pipe
[Why]
In disable_dangling_plane, for phantom pipes, we enable OTG so
disable programming gets the double buffer update. But this
causes an underflow to occur.
[How]
Enable DPG prior to enabling OTG.
Reviewed-by: Alvin Lee <Alvin.Lee2@amd.com>
Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com>
Signed-off-by: Samson Tam <samson.tam@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Wenjing Liu [Tue, 14 Feb 2023 19:11:00 +0000 (14:11 -0500)]
drm/amd/display: remove empty dc_link.c
[why]
We kept an empty dc_link.c file due to external
build dependency. Now the last build dependency has
been removed. We can safely delete this file.
Reviewed-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com>
Signed-off-by: Wenjing Liu <wenjing.liu@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Paul Hsieh [Fri, 10 Feb 2023 04:00:16 +0000 (12:00 +0800)]
drm/amd/display: Correct DML calculation to align HW formula
[Why]
In 2560x1440@240p eDP panel, some use cases will enable MPC
combine with RGB MPO then underflow happened. This case is
not allowed from HW formula.
[How]
Correct eDP, DP and DP2 output bpp calculation to align HW
formula.
Reviewed-by: Nicholas Kazlauskas <Nicholas.Kazlauskas@amd.com>
Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com>
Signed-off-by: Paul Hsieh <Paul.Hsieh@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
bobzhou [Mon, 27 Feb 2023 07:30:54 +0000 (15:30 +0800)]
drm/amdgpu/vcn: fix compilation issue with legacy gcc
This patch is used to fix following compilation issue with legacy gcc
error: ‘for’ loop initial declarations are only allowed in C99 mode
for (int i = 0; i < adev->vcn.num_vcn_inst; ++i) {
Signed-off-by: bobzhou <bob.zhou@amd.com>
Reviewed-by: Guchun Chen <guchun.chen@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Felix Kuehling [Wed, 17 Nov 2021 04:15:55 +0000 (23:15 -0500)]
drm/amdkfd: Implement DMA buf fd export from KFD
Exports a DMA buf fd of a given KFD buffer handle. This is intended for
being able to import KFD BOs into GEM contexts to leverage the
amdgpu_bo_va API for more flexible virtual address mappings. It will
also be used for the new upstreamable RDMA solution coming to UCX and
RCCL.
The corresponding user mode change (Thunk API and kfdtest) is here:
https://github.com/fxkamd/ROCT-Thunk-Interface/commits/fxkamd/dmabuf
Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Xiaogang Chen <Xiaogang.Chen@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Felix Kuehling [Wed, 17 Nov 2021 02:03:23 +0000 (21:03 -0500)]
drm/amdgpu: Generalize KFD dmabuf import
Use proper amdgpu_gem_prime_import function to handle all kinds of
imports. Remember the dmabuf reference to enable proper multi-GPU
attachment to multiple VMs without erroneously re-exporting the
underlying BO multiple times.
Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Wenjing Liu [Mon, 6 Feb 2023 22:58:52 +0000 (17:58 -0500)]
drm/amd/display: merge dc_link.h into dc.h and dc_types.h
[why]
Remove the need to include dc_link.h separately. dc.h should contain
everything needed on DM side.
[How]
Merge dc_link.h into dc.h and dc_types.h so DM only needs to include
dc.h to use all link public functions.
Reviewed-by: Jun Lei <Jun.Lei@amd.com>
Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com>
Signed-off-by: Wenjing Liu <wenjing.liu@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Mustapha Ghaddar [Mon, 13 Feb 2023 13:07:17 +0000 (08:07 -0500)]
drm/amd/display: Update BW ALLOCATION Function declaration
[WHY & HOW]
Update the declaration to give a better idea of what the
function does.
Reviewed-by: Wenjing Liu <Wenjing.Liu@amd.com>
Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com>
Signed-off-by: Mustapha Ghaddar <mghaddar@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>