Arnd Bergmann [Mon, 21 Nov 2022 10:06:42 +0000 (11:06 +0100)]
Merge tag 'imx-bindings-6.2' of git://git./linux/kernel/git/shawnguo/linux into soc/dt
i.MX dt-bindings update for 6.2:
- New vendor prefix for Cloos and InnoComm.
- New compatible for Cloos PHG board, InnoComm WB15 EVK and Kobo Aura 2.
- Improve snvs-lpgpr bindings schema regarding i.MX8M SNVS LPGRP
compatible strings.
- Improve fsl-imx-cspi bindings schema for i.MX8MP ECSPI.
- Add bindings schema for i.MX8M ANATOP device.
- Update SCU firmware resource ID header by syncing with the latest
available SCFW kit version 1.13.0.
* tag 'imx-bindings-6.2' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
dt-bindings: arm: fsl: Add an entry for Cloos PHG board
dt-bindings: vendor-prefixes: Add an entry for Cloos
dt-bindings: nvmem: snvs-lpgpr: Fix i.MX8M compatible strings
dt-bindings: spi: fsl-imx-cspi: update i.MX8MP binding
dt-bindings: arm: fsl: add compatible string for Kobo Aura 2
dt-bindings: clock: add i.MX8M Anatop
dt-bindings: arm: fsl: Add InnoComm WB15 EVK
dt-bindings: vendor-prefixes: Add prefix for InnoComm
dt-bindings: firmware: imx: sync with SCFW kit v1.13.0
Link: https://lore.kernel.org/r/20221119125733.32719-3-shawnguo@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Mon, 21 Nov 2022 10:01:48 +0000 (11:01 +0100)]
Merge branch 'dt/dtbo-rename' of git://git./linux/kernel/git/robh/linux into soc/dt
* 'dt/dtbo-rename' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux:
kbuild: Cleanup DT Overlay intermediate files as appropriate
staging: pi433: overlay: Rename overlay source file from .dts to .dtso
of: overlay: rename overlay source files from .dts to .dtso
kbuild: Allow DTB overlays to built into .dtbo.S files
kbuild: Allow DTB overlays to built from .dtso named source files
Link: https://lore.kernel.org/r/20221118211103.GA1334449-robh@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Mon, 21 Nov 2022 09:57:29 +0000 (10:57 +0100)]
Merge tag 'sunxi-dt-for-6.2-1' of https://git./linux/kernel/git/sunxi/linux into soc/dt
- Added H616 USB node
- Enabled bluetooth on Pinebook A64
- Added f1c100s PWM, I2C, CIR and LRADC nodes
- Added USB HCI0 PHYs property to H3/H5
* tag 'sunxi-dt-for-6.2-1' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux:
ARM: dts: sunxi: H3/H5: Add phys property to USB HCI0
ARM: dts: suniv: f1c100s: add LRADC node
ARM: dts: suniv: f1c100s: add CIR DT node
dt-bindings: media: IR: Add F1C100s IR compatible string
ARM: dts: suniv: f1c100s: add I2C DT nodes
ARM: dts: suniv: f1c100s: add PWM node
dt-bindings: pwm: allwinner,sun4i-a10: Add F1C100s compatible
arm64: dts: allwinner: a64: enable Bluetooth on Pinebook
arm64: dts: allwinner: h616: X96 Mate: Add USB nodes
arm64: dts: allwinner: h616: OrangePi Zero 2: Add USB nodes
arm64: dts: allwinner: h616: Add USB nodes
dt-bindings: usb: Add H616 compatible string
ARM: dts: axp22x/axp809: Add GPIO controller nodes
ARM: dts: axp803/axp81x: Drop GPIO LDO pinctrl nodes
Link: https://lore.kernel.org/r/Y3fuAosinWbrj+Dy@jernej-laptop
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Mon, 21 Nov 2022 09:56:43 +0000 (10:56 +0100)]
Merge tag 'at91-dt-6.2-2' of https://git./linux/kernel/git/at91/linux into soc/dt
AT91 DT for 6.2 #2
It contains:
- one typo fix for a SAMA7G5 pin; the pin is not used anywhere in the
device trees.
* tag 'at91-dt-6.2-2' of https://git.kernel.org/pub/scm/linux/kernel/git/at91/linux:
ARM: dts: at91: sama7g5: fix signal name of pin PD8
Link: https://lore.kernel.org/r/20221118131214.301678-1-claudiu.beznea@microchip.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Kunihiko Hayashi [Thu, 17 Nov 2022 16:32:19 +0000 (01:32 +0900)]
ARM: dts: uniphier: Add Pro5 board support
Initial version of devicetree sources for Pro5 EPCORE and ProEX boards.
These boards have UART, I2C, USB, eMMC and PCI endpoint in common.
Pro5 EPCORE board is a kind of Pro5 reference board with PCIe endpoint
card edge connector.
ProEX board shares peripherals with Linux and other systems, and some
of these ports are available in Linux.
Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Link: https://lore.kernel.org/r/20221117163219.3673-3-hayashi.kunihiko@socionext.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Kunihiko Hayashi [Thu, 17 Nov 2022 16:32:18 +0000 (01:32 +0900)]
dt-bindings: arm: uniphier: Add Pro5 boards
Add compatible string for Pro5 EP-Core board and ProEX board support.
Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20221117163219.3673-2-hayashi.kunihiko@socionext.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Mon, 21 Nov 2022 09:53:52 +0000 (10:53 +0100)]
Merge tag 'samsung-dt64-6.2' of https://git./linux/kernel/git/krzk/linux into soc/dt
Samsung DTS ARM64 changes for v6.2
Correct pin drive strength macros (names) and values used on Tesla FSD
SoC.
* tag 'samsung-dt64-6.2' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
arm64: dts: fsd: fix drive strength values as per FSD HW UM
arm64: dts: fsd: fix drive strength macros as per FSD HW UM
Link: https://lore.kernel.org/r/20221116093010.18515-2-krzysztof.kozlowski@linaro.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Aakarsh Jain [Wed, 16 Nov 2022 09:30:09 +0000 (10:30 +0100)]
ARM: dts: exynos: Add new SoC specific compatible string for Exynos3250 SoC
Exynos3250 and Exynos5420 are using same compatible string for MFC codec
device but they have different clock hierarchy and complexity. Add new
compatible string followed by mfc-v7 fallback for Exynos3250 SoC.
Suggested-by: Alim Akhtar <alim.akhtar@samsung.com>
Signed-off-by: Aakarsh Jain <aakarsh.jain@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Tommaso Merciai <tommaso.merciai@amarulasolutions.com>
Link: https://lore.kernel.org/r/20221114115024.69591-4-aakarsh.jain@samsung.com
Link: https://lore.kernel.org/r/20221116093010.18515-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Andrew Davis [Mon, 14 Nov 2022 20:59:39 +0000 (14:59 -0600)]
kbuild: Cleanup DT Overlay intermediate files as appropriate
%.dtbo.o and %.dtbo.S files are used to build-in DT Overlay. They should
should not be removed by Make or the kernel will be needlessly rebuilt.
These should be removed by "clean" and ignored by git like other
intermediate files.
Reported-by: Andy Shevchenko <andriy.shevchenko@intel.com>
Signed-off-by: Andrew Davis <afd@ti.com>
Fixes:
941214a512d8 ("kbuild: Allow DTB overlays to built into .dtbo.S files")
Tested-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: Masahiro Yamada <masahiroy@kernel.org>
Link: https://lore.kernel.org/r/20221114205939.27994-1-afd@ti.com
Signed-off-by: Rob Herring <robh@kernel.org>
Mihai Sain [Thu, 17 Nov 2022 13:30:18 +0000 (15:30 +0200)]
ARM: dts: at91: sama7g5: fix signal name of pin PD8
The signal name of pin PD8 with function D is A22_NANDCLE
as it is defined in the datasheet.
Signed-off-by: Mihai Sain <mihai.sain@microchip.com>
[claudiu.beznea: rebased on top of 6.1-rc1, removed fixes tag]
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Link: https://lore.kernel.org/r/20221114151035.2926-1-mihai.sain@microchip.com
Andre Przywara [Thu, 10 Nov 2022 00:55:07 +0000 (00:55 +0000)]
ARM: dts: sunxi: H3/H5: Add phys property to USB HCI0
As many other Allwinner SoCs from the last years, the first USB host
controller pair in the Allwinner H3 and H5 chips share a USB PHY with
the MUSB OTG controller. This is probably the reason why we didn't have
a "phys" property in those host controller nodes.
This works fine as long as the MUSB controller driver is loaded, as this
takes care of the proper PHY setup, including the muxing between MUSB
and the HCI.
However this requires the MUSB driver to be enabled and loaded, and also
upsets U-Boot, which cannot use a HCI port without a "phys" property.
Similar to what we did in commit
cc72570747e4 ("arm64: dts: allwinner:
A64: properly connect USB PHY to port 0"), add the "phys" property to
the OHCI0 and EHCI0 DT nodes in the shared H3/H5 .dtsi file.
This is not only the proper description of the hardware, but also avoids
a nasty error message in U-Boot triggered by a recent patch. (The port
never worked in host mode, but the error was suppressed due to a bug.)
When using the MUSB port in OTG mode, this also fixes host mode
switching, so people can use OTG adapters to connect a USB device to
port 0.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Link: https://lore.kernel.org/r/20221110005507.19464-1-andre.przywara@arm.com
Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Andre Przywara [Mon, 7 Nov 2022 00:54:30 +0000 (00:54 +0000)]
ARM: dts: suniv: f1c100s: add LRADC node
The Allwinner F1C100s series of SoCs contain a LRADC (aka. KEYADC)
compatible to the version in other SoCs.
The manual doesn't mention the ratio of the input voltage that is used,
but comparing actual measurements with the values in the register
suggests that it is 3/4 of Vref.
Add the DT node describing the base address and interrupt. As in the
older SoCs, there is no explicit reset or clock gate, also there is a
dedicated, non-multiplexed pin, so need for more properties.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Link: https://lore.kernel.org/r/20221107005433.11079-8-andre.przywara@arm.com
Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Andre Przywara [Mon, 7 Nov 2022 00:54:29 +0000 (00:54 +0000)]
ARM: dts: suniv: f1c100s: add CIR DT node
The CIR (infrared receiver) controller in the Allwinner F1C100s series
of SoCs is compatible to the ones used in other Allwinner SoCs.
Add the DT node describing the resources of the controller.
There are multiple possible pinmuxes, but none as them seem to be an
obvious choice, so refrain from adding any pincontroller subnodes for
now.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Link: https://lore.kernel.org/r/20221107005433.11079-7-andre.przywara@arm.com
Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Andre Przywara [Mon, 7 Nov 2022 00:54:28 +0000 (00:54 +0000)]
dt-bindings: media: IR: Add F1C100s IR compatible string
The CIR controller in the Allwinner F1C100s series of SoCs is compatible
to the ones used in other Allwinner SoCs.
Add the respective compatible name to the existing IR binding, and pair
it with the A31 fallback compatible string.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20221107005433.11079-6-andre.przywara@arm.com
Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Andre Przywara [Mon, 7 Nov 2022 00:54:26 +0000 (00:54 +0000)]
ARM: dts: suniv: f1c100s: add I2C DT nodes
The Allwinner F1C100s series of SoCs contain three I2C controllers
compatible to the ones used in other Allwinner SoCs.
Add the DT nodes describing the resources of the controllers.
At least one board connects an on-board I2C chip to PD0/PD12 (I2C0), so
include those pins already, to simplify referencing them later.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Link: https://lore.kernel.org/r/20221107005433.11079-4-andre.przywara@arm.com
Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Andre Przywara [Mon, 7 Nov 2022 00:54:25 +0000 (00:54 +0000)]
ARM: dts: suniv: f1c100s: add PWM node
The Allwinner F1C100s family of SoCs contain a PWM controller compatible
to the one used in the A20 chip.
Add the DT node so that any users can simply enable it in their board
DT.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Thierry Reding <thierry.reding@gmail.com>
Reviewed-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Link: https://lore.kernel.org/r/20221107005433.11079-3-andre.przywara@arm.com
Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Andre Przywara [Mon, 7 Nov 2022 00:54:24 +0000 (00:54 +0000)]
dt-bindings: pwm: allwinner,sun4i-a10: Add F1C100s compatible
The PWM controller in the Allwinner F1C100s series of SoCs is the same
as in the A20 SoCs, so allow using that as the fallback name.
Join the V3s compatible string in an enum on the way.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Rob Herring <robh@kernel.org>
Acked-by: Thierry Reding <thierry.reding@gmail.com>
Acked-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Link: https://lore.kernel.org/r/20221107005433.11079-2-andre.przywara@arm.com
Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Arnd Bergmann [Thu, 27 Oct 2022 16:09:46 +0000 (18:09 +0200)]
Merge tag 'ux500-dts-for-v6.2' of git://git./linux/kernel/git/linusw/linux-nomadik into arm/dt
Some Ux500 DTS updates for v6.2:
- Some cleanups from Krzysztof for the SPI nodes.
- Fix up the NFC chip in Janice.
- Drop a bogus power domain regulator that isn't used for
the crypto blocks. (We use proper power domains now.)
- Add GPS to the Kyle.
* tag 'ux500-dts-for-v6.2' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-nomadik:
ARM: dts: ux500: Add GPS to the Kyle
ARM: dts: DBx500 cryp and hash uses power domain
ARM: dts: ux500: Fix up the Janice NFC chip
ARM: dts: ste: ux500: align SPI node name with dtschema
Link: https://lore.kernel.org/r/CACRpkdaXmmZWsGdTG5tqNragkoefcTeUHjR+ZwNyNaa0S7s-7Q@mail.gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Thu, 27 Oct 2022 16:11:02 +0000 (18:11 +0200)]
Merge tag 'asahi-soc-dt-6.2' of https://github.com/AsahiLinux/linux into arm/dt
Apple SoC DT updates for 6.2.
This includes new device trees for Apple M1 Pro/Max/Ultra SoCs and the
devices that contain them, as well as some audio-related changes.
* tag 'asahi-soc-dt-6.2' of https://github.com/AsahiLinux/linux:
arm64: dts: apple: Add ADMAC resets on t8103/t600x
dt-bindings: dma: apple,admac: Add reset
arm64: dts: apple: t600x: Add MCA and its support
arm64: dts: apple: t8103: Add MCA and its support
arm64: dts: apple: t8103: Add AUDIO_P parent to the SIO_ADMA power domain
arm64: dts: apple: Add J375 devicetrees
arm64: dts: apple: Add J314 and J316 devicetrees
arm64: dts: apple: Add initial t6000/t6001/t6002 DTs
arm64: dts: apple: Fix j45x model years
dt-bindings: arm: apple: Add t6001/t6002 Mac Studio compatibles
dt-bindings: apple,aic2: Add CPU PMU per-cpu pseudo-interrupts
dt-bindings: iommu: dart: add t6000 compatible
Link: https://lore.kernel.org/r/dea10860-2870-3a9e-fa51-21e493b1573a@marcan.st
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Kory Maincent [Wed, 2 Nov 2022 17:10:09 +0000 (18:10 +0100)]
arm: dts: spear600: Add ssp controller nodes
The SPEAr600 has three Synchronous serial port to enables synchronous
serial communication with slave or master peripherals (SPI). Lets add these
nodes to be able to use them.
Signed-off-by: Kory Maincent <kory.maincent@bootlin.com>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Kory Maincent [Wed, 2 Nov 2022 17:10:06 +0000 (18:10 +0100)]
arm: dts: spear600: Fix clcd interrupt
Interrupt 12 of the Interrupt controller belongs to the SMI controller,
the right one for the display controller is the interrupt 13.
Fixes:
8113ba917dfa ("ARM: SPEAr: DT: Update device nodes")
Signed-off-by: Kory Maincent <kory.maincent@bootlin.com>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Mon, 14 Nov 2022 14:34:40 +0000 (15:34 +0100)]
Merge tag 'at91-dt-6.2' of https://git./linux/kernel/git/at91/linux into soc/dt
AT91 DT for 6.2
It contains:
- interrupt support for ethernet PHYs on pcb8290 board
- thermal management support for SAMA7G5 by adding OTP controller
(that keeps temperature sensor calibration data), proper ADC
bindings and describing thermal zones
- securam node from SAMA7G5 is now described with generic name (sram)
- remove of status = "okay" from SAM9X60-EK regulators
* tag 'at91-dt-6.2' of https://git.kernel.org/pub/scm/linux/kernel/git/at91/linux:
ARM: dts: at91: sam9x60ek: remove status = "okay" for regulators
ARM: dts: at91: sama7g5: use generic name for securam
ARM: dts: at91: sama7g5: add thermal zones node
ARM: dts: at91: sama7g5: add temperature sensor
ARM: dts: at91: sama7g5: add cells for temperature calibration
ARM: dts: at91: sama7g5: add io-channel-cells to adc node
ARM: dts: at91: sama7g5: add otpc node
ARM: dts: lan966x: Add interrupt support for PHYs on pcb8290
Link: https://lore.kernel.org/r/20221110115431.180908-1-claudiu.beznea@microchip.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Mon, 14 Nov 2022 14:08:57 +0000 (15:08 +0100)]
Merge tag 'dt-cleanup-6.2' of https://git./linux/kernel/git/krzk/linux-dt into soc/dt
Minor improvements in ARM DTS for v6.2
1. Aspeed: fix qcom,dc-scm-v1-bmc compatible in the bindings.
2. Marvell: include bindings in maintainers entry.
3. Cleanup DTS according to bindings (panel endpoint unit address,
incorrect spi-max-frequency, generic node names).
4. Few indentation fixes.
* tag 'dt-cleanup-6.2' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-dt:
dt-bindings: arm: aspeed: adjust qcom,dc-scm-v1-bmc compatible after rename
ARM: dts: sunxi: correct indentation
ARM: dts: omap: correct indentation
ARM: dts: kirkwood: correct indentation
ARM: dts: armada: correct indentation
ARM: dts: ti: correct indentation
ARM: dts: aspeed: align SPI node name with dtschema
MAINTAINERS: ARM: marvell: include bindings
ARM: dts: sunplus: sp7021: drop incorrect spi-max-frequency
ARM: dts: am335x: drop panel endpoint unit address
Link: https://lore.kernel.org/r/20221110092111.18581-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Mon, 14 Nov 2022 14:00:55 +0000 (15:00 +0100)]
Merge tag 'renesas-dt-bindings-for-v6.2-tag1' of git://git./linux/kernel/git/geert/renesas-devel into soc/dt
Renesas DT binding updates for v6.2
- Move renesas.yaml from arm to soc, and document RZ/Five support.
* tag 'renesas-dt-bindings-for-v6.2-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel:
dt-bindings: soc: renesas: renesas.yaml: Document Renesas RZ/Five SoC
dt-bindings: soc: renesas: Move renesas.yaml from arm to soc
Link: https://lore.kernel.org/r/cover.1667558749.git.geert+renesas@glider.be
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Mon, 14 Nov 2022 13:55:43 +0000 (14:55 +0100)]
Merge tag 'renesas-arm-dt-for-v6.2-tag1' of git://git./linux/kernel/git/geert/renesas-devel into soc/dt
Renesas ARM DT updates for v6.2
- DMA, SPI (MSIOF), external interrupt (INTC-EX), PWM (PWM and TPU),
SDHI, HyperFLASH/QSPI (RPC), and serial ((H)SCIF) support for the
R-Car V4H SoC,
- I/O expander, eMMC, and QSPI FLASH support for the White Hawk
development board,
- Preparatory work to share r9a07g043.dtsi between the ARM-based
RZ/G2UL (R9A07G043U) and the RISC-V-based RZ/Five (R9A07G043F) SoCs,
- Miscellaneous fixes and improvements.
* tag 'renesas-arm-dt-for-v6.2-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel: (21 commits)
arm64: dts: renesas: r9a07g043: Split out RZ/G2UL SoC specific parts
arm64: dts: renesas: r9a07g043: Introduce SOC_PERIPHERAL_IRQ() macro to specify interrupt property
ARM: dts: renesas: Miscellaneous whitespace fixes
arm64: dts: renesas: r8a779a0: Update to R-Car Gen4 compatible values
arm64: dts: renesas: r8a779g0: Add remaining HSCIF nodes
arm64: dts: renesas: r8a779g0: Add SCIF nodes
arm64: dts: renesas: white-hawk-cpu: Add QSPI FLASH support
arm64: dts: renesas: r8a779g0: Add RPC node
arm64: dts: renesas: white-hawk-cpu: Add eMMC support
arm64: dts: renesas: r8a779g0: Add SDHI node
arm64: dts: renesas: rzg2l: Drop WDT2 nodes
arm64: dts: renesas: r8a779g0: Add TPU device node
arm64: dts: renesas: r8a779g0: Add PWM device nodes
arm64: dts: renesas: r8a779g0: Fix HSCIF0 "brg_int" clock
arm64: dts: renesas: condor-common: Add missing bootargs
arm64: dts: renesas: white-hawk-cpu: Add PCA9654 I/O Expander
arm64: dts: renesas: r8a779g0: Add INTC-EX node
arm64: dts: renesas: r8a779g0: Add MSIOF nodes
arm64: dts: renesas: r8a779g0: Add DMA support
arm64: dts: renesas: rzg2ul-smarc: Move spi1 pinmux to carrier board DTSI
...
Link: https://lore.kernel.org/r/cover.1667558740.git.geert+renesas@glider.be
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Fabio Estevam [Sun, 13 Nov 2022 12:44:58 +0000 (09:44 -0300)]
dt-bindings: arm: fsl: Add an entry for Cloos PHG board
Add an entry for the i.MX8MM Cloos PHG board.
Signed-off-by: Fabio Estevam <festevam@denx.de>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Fabio Estevam [Sun, 13 Nov 2022 12:44:57 +0000 (09:44 -0300)]
dt-bindings: vendor-prefixes: Add an entry for Cloos
Carl Cloos Schweisstechnik GmbH develops, manufactures and delivers
welding industrial solutions:
https://www.cloos.de/de-en/
Add a vendor prefix entry for it.
Signed-off-by: Fabio Estevam <festevam@denx.de>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Marek Vasut [Wed, 2 Nov 2022 22:25:43 +0000 (23:25 +0100)]
dt-bindings: nvmem: snvs-lpgpr: Fix i.MX8M compatible strings
The compatible strings for "fsl,imx8m*-snvs-lpgpr" always contain
the fallback "fsl,imx7d-snvs-lpgpr" compatible in DTs too, since
the fallback compatible is what the driver matches on, this way:
compatible = "fsl,imx8mm-snvs-lpgpr", "fsl,imx7d-snvs-lpgpr"
The older "fsl,imx7d-snvs-lpgpr" and "fsl,imx6*-snvs-lpgpr" used
only that single compatible string.
Document both options in the binding document.
Signed-off-by: Marek Vasut <marex@denx.de>
Acked-by: Alexander Stein <alexander.stein@ew.tq-group.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Krzysztof Kozlowski [Thu, 11 Aug 2022 06:29:53 +0000 (09:29 +0300)]
dt-bindings: arm: aspeed: adjust qcom,dc-scm-v1-bmc compatible after rename
The Nuvia DC-SCM BMC board compatible was renamed in commit
7f058112873e ("ARM: dts: aspeed: nuvia: rename vendor nuvia to qcom"),
so adjust the bindings as well.
Fixes:
f77024c80147 ("dt-bindings: arm: aspeed: document board compatibles")
Acked-by: Jae Hyun Yoo <quic_jaehyoo@quicinc.com>
Acked-by: Rob Herring <robh@kernel.org>
Acked-by: Andrew Jeffery <andrew@aj.id.au>
Link: https://lore.kernel.org/r/20220811062953.5976-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Vasily Khoruzhick [Sat, 5 Nov 2022 15:33:19 +0000 (16:33 +0100)]
arm64: dts: allwinner: a64: enable Bluetooth on Pinebook
Pinebook has an RTL8723CS WiFi + BT chip. BT is connected to UART1
and uses PL5 as device wake GPIO and PL6 as host wake GPIO.
Enable it in the device tree.
Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
Signed-off-by: Bastian Germann <bage@debian.org>
Reviewed-by: Samuel Holland <samuel@sholland.org>
Link: https://lore.kernel.org/r/20221105153319.19345-2-bage@debian.org
Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Andre Przywara [Mon, 31 Oct 2022 11:13:58 +0000 (11:13 +0000)]
arm64: dts: allwinner: h616: X96 Mate: Add USB nodes
The X96 Mate TV box has two USB-A ports, VBUS is always on and connected
to the DC input.
Since USB port 0 is connected to an USB-A receptable, we configure it
as a host port. Using it as a peripheral is dangerous, because VBUS is
always on.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Link: https://lore.kernel.org/r/20221031111358.3387297-8-andre.przywara@arm.com
Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Andre Przywara [Mon, 31 Oct 2022 11:13:57 +0000 (11:13 +0000)]
arm64: dts: allwinner: h616: OrangePi Zero 2: Add USB nodes
The OrangePi Zero 2 has one USB-A host port, VBUS is provided by
a GPIO controlled regulator.
The USB-C port is meant to power the board, but is also connected to
the USB 0 port, which we configure as an MUSB peripheral.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Link: https://lore.kernel.org/r/20221031111358.3387297-7-andre.przywara@arm.com
Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Andre Przywara [Mon, 31 Oct 2022 11:13:56 +0000 (11:13 +0000)]
arm64: dts: allwinner: h616: Add USB nodes
Add the nodes for the MUSB and the four USB host controllers to the SoC
.dtsi, along with the PHY node needed to bind all of them together.
EHCI/OHCI and MUSB are compatible to previous SoCs, but the PHY requires
some quirks (handled in the driver).
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Link: https://lore.kernel.org/r/20221031111358.3387297-6-andre.przywara@arm.com
Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Andre Przywara [Mon, 31 Oct 2022 11:13:52 +0000 (11:13 +0000)]
dt-bindings: usb: Add H616 compatible string
The Allwinner H616 contains four fully OHCI/EHCI compatible USB host
controllers, so just add their compatible strings to the list of
generic OHCI/EHCI controllers.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20221031111358.3387297-2-andre.przywara@arm.com
Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Claudiu Beznea [Wed, 26 Oct 2022 12:41:14 +0000 (15:41 +0300)]
ARM: dts: at91: sam9x60ek: remove status = "okay" for regulators
Remove status = "okay" for sam9x60ek regulator as okay is the default
status.
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Link: https://lore.kernel.org/r/20221026124114.985876-12-claudiu.beznea@microchip.com
Claudiu Beznea [Wed, 26 Oct 2022 12:41:13 +0000 (15:41 +0300)]
ARM: dts: at91: sama7g5: use generic name for securam
Use generic sram name for securam.
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Link: https://lore.kernel.org/r/20221026124114.985876-11-claudiu.beznea@microchip.com
Claudiu Beznea [Wed, 26 Oct 2022 12:41:09 +0000 (15:41 +0300)]
ARM: dts: at91: sama7g5: add thermal zones node
Add thermal zones node with its associated trips and cooling-maps.
It uses CPUFreq as cooling device for temperatures in the interval
[90, 100) degrees Celsius and describe the temperature of 100 degrees
Celsius as critical temperature. System will be is shutting down when
reaching critical temperature.
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Link: https://lore.kernel.org/r/20221026124114.985876-7-claudiu.beznea@microchip.com
Claudiu Beznea [Wed, 26 Oct 2022 12:41:08 +0000 (15:41 +0300)]
ARM: dts: at91: sama7g5: add temperature sensor
Add temperature sensor node.
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Link: https://lore.kernel.org/r/20221026124114.985876-6-claudiu.beznea@microchip.com
Claudiu Beznea [Wed, 26 Oct 2022 12:41:07 +0000 (15:41 +0300)]
ARM: dts: at91: sama7g5: add cells for temperature calibration
Add NVMEM cell to ADC for temperature calibration data.
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Link: https://lore.kernel.org/r/20221026124114.985876-5-claudiu.beznea@microchip.com
Claudiu Beznea [Wed, 26 Oct 2022 12:41:06 +0000 (15:41 +0300)]
ARM: dts: at91: sama7g5: add io-channel-cells to adc node
Add io-channel-cell to ADC node. It is necessary for DT users of ADC.
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Link: https://lore.kernel.org/r/20221026124114.985876-4-claudiu.beznea@microchip.com
Claudiu Beznea [Wed, 26 Oct 2022 12:41:05 +0000 (15:41 +0300)]
ARM: dts: at91: sama7g5: add otpc node
Add OTPC node along with temperature calibration cell.
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Link: https://lore.kernel.org/r/20221026124114.985876-3-claudiu.beznea@microchip.com
Peng Fan [Thu, 20 Oct 2022 10:31:57 +0000 (18:31 +0800)]
dt-bindings: spi: fsl-imx-cspi: update i.MX8MP binding
i.MX8MP ECSPI is derived from i.MX6UL, so update the binding.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Lad Prabhakar [Tue, 20 Sep 2022 18:48:58 +0000 (19:48 +0100)]
dt-bindings: soc: renesas: renesas.yaml: Document Renesas RZ/Five SoC
Document Renesas RZ/Five (R9A07G043) SoC.
More info about RZ/Five SoC:
https://www.renesas.com/us/en/products/microcontrollers-microprocessors/rz-mpus/rzfive-risc-v-general-purpose-microprocessors-risc-v-cpu-core-andes-ax45mp-single-10-ghz-2ch-gigabit-ethernet
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20220920184904.90495-5-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Lad Prabhakar [Tue, 20 Sep 2022 18:48:55 +0000 (19:48 +0100)]
dt-bindings: soc: renesas: Move renesas.yaml from arm to soc
renesas.yaml lists out all the Renesas SoC's and the platforms/EVK's which
is either ARM32/ARM64. It would rather make sense if we move renesas.yaml
to the soc/renesas folder instead. This is in preparation for adding a new
SoC (RZ/Five) from Renesas which is based on RISC-V.
While at it drop the old entry for renesas.yaml from MAINTAINERS file and
there is no need to update the new file path of renesas.yaml as we already
have an entry for Documentation/devicetree/bindings/soc/renesas/ folder.
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20220920184904.90495-2-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Lad Prabhakar [Tue, 25 Oct 2022 22:06:29 +0000 (23:06 +0100)]
arm64: dts: renesas: r9a07g043: Split out RZ/G2UL SoC specific parts
Move RZ/G2UL SoC specific parts to r9a07g043u.dtsi so that
r9a07g043.dtsi can be shared with RZ/Five (RISC-V SoC).
Below are the changes due to which SoC specific parts are moved to
r9a07g043u.dtsi:
- RZ/G2UL has Cortex-A55 (ARM64) whereas RZ/Five has AX45MP (RISC-V),
- RZ/G2UL has GICv3 as interrupt controller whereas RZ/Five has PLIC,
- RZ/G2UL has interrupts for SYSC block whereas interrupts are missing
for SYSC block on RZ/Five,
- RZ/G2UL has armv8-timer whereas RZ/Five has riscv-timer,
- RZ/G2UL has PSCI whereas RZ/Five have OpenSBI.
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/20221025220629.79321-3-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Lad Prabhakar [Tue, 25 Oct 2022 22:06:28 +0000 (23:06 +0100)]
arm64: dts: renesas: r9a07g043: Introduce SOC_PERIPHERAL_IRQ() macro to specify interrupt property
Introduce SOC_PERIPHERAL_IRQ() macro to specify interrupt property so
that we can share the common parts of the SoC DTSI with the RZ/Five
(RISC-V) SoC and the RZ/G2UL (ARM64) SoC.
This patch adds a new file r9a07g043u.dtsi to separate out RZ/G2UL
(ARM64) SoC specific parts. No functional changes (same DTB).
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://lore.kernel.org/r/20221025220629.79321-2-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Geert Uytterhoeven [Mon, 24 Oct 2022 10:06:28 +0000 (12:06 +0200)]
ARM: dts: renesas: Miscellaneous whitespace fixes
Remove superfluous spaces near properties and equal signs.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/1666adade07e16b77af1f03c55799b2ad1378e60.1666605877.git.geert+renesas@glider.be
Geert Uytterhoeven [Mon, 24 Oct 2022 10:03:52 +0000 (12:03 +0200)]
arm64: dts: renesas: r8a779a0: Update to R-Car Gen4 compatible values
Despite the name, R-Car V3U is the first member of the R-Car Gen4
family. Hence update the compatible properties in various device nodes
to include family-specific compatible values for R-Car Gen4 instead of
R-Car Gen3:
- EtherAVB,
- MSIOF.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/387168aef20d399d4f4318f4ecab9c3b016fd6f2.1666605756.git.geert+renesas@glider.be
Samuel Holland [Fri, 16 Sep 2022 04:27:51 +0000 (23:27 -0500)]
ARM: dts: axp22x/axp809: Add GPIO controller nodes
These PMICs all contain a GPIO controller. Now that the binding for this
variant is documented, wire up the controller in the device tree.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Acked-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Link: https://lore.kernel.org/r/20220916042751.47906-3-samuel@sholland.org
Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Samuel Holland [Fri, 16 Sep 2022 04:27:50 +0000 (23:27 -0500)]
ARM: dts: axp803/axp81x: Drop GPIO LDO pinctrl nodes
The "ldo-io0" and "ldo-io1" regulators are enabled/disabled by toggling
the pinmux between two functions. This happens in the regulator driver.
Setting the pinmux to "ldo" in the DT is inappropriate because it would
enable the regulator before the driver has a chance to set the correct
initial voltage.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Link: https://lore.kernel.org/r/20220916042751.47906-2-samuel@sholland.org
Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Krzysztof Kozlowski [Sun, 2 Oct 2022 09:19:59 +0000 (11:19 +0200)]
ARM: dts: sunxi: correct indentation
Do not use spaces for indentation.
Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Link: https://lore.kernel.org/r/20221002091959.68815-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Krzysztof Kozlowski [Sun, 2 Oct 2022 09:20:02 +0000 (11:20 +0200)]
ARM: dts: omap: correct indentation
Do not use spaces for indentation.
Link: https://lore.kernel.org/r/20221002092002.68880-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Krzysztof Kozlowski [Sun, 2 Oct 2022 09:20:05 +0000 (11:20 +0200)]
ARM: dts: kirkwood: correct indentation
Do not use spaces for indentation.
Link: https://lore.kernel.org/r/20221002092007.68955-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Krzysztof Kozlowski [Sun, 2 Oct 2022 09:20:08 +0000 (11:20 +0200)]
ARM: dts: armada: correct indentation
Do not use spaces for indentation.
Link: https://lore.kernel.org/r/20221002092008.69003-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Krzysztof Kozlowski [Sun, 2 Oct 2022 09:20:10 +0000 (11:20 +0200)]
ARM: dts: ti: correct indentation
Do not use spaces for indentation.
Link: https://lore.kernel.org/r/20221002092010.69030-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Andrew Davis [Mon, 24 Oct 2022 17:34:34 +0000 (12:34 -0500)]
staging: pi433: overlay: Rename overlay source file from .dts to .dtso
DTB Overlays (.dtbo) can now be built from source files with the
extension (.dtso). This makes it clear what is the content of the files
and differentiates them from base DTB source files.
Rename the pi433-overlay.dts file to pi433-overlay.dtso and update
the information file pi433.txt for the same.
Signed-off-by: Andrew Davis <afd@ti.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20221024173434.32518-8-afd@ti.com
Signed-off-by: Rob Herring <robh@kernel.org>
Frank Rowand [Mon, 24 Oct 2022 17:34:30 +0000 (12:34 -0500)]
of: overlay: rename overlay source files from .dts to .dtso
In drivers/of/unittest-data/:
- Rename .dts overlay source files to use .dtso suffix.
Modify driver/of/unitest.c to use .dtbo.o based symbols instead of .dtb.o
Signed-off-by: Frank Rowand <frank.rowand@sony.com>
Signed-off-by: Andrew Davis <afd@ti.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Tested-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Frank Rowand <frowand.list@gmail.com>
Tested-by: Frank Rowand <frowand.list@gmail.com>
Link: https://lore.kernel.org/r/20221024173434.32518-4-afd@ti.com
Signed-off-by: Rob Herring <robh@kernel.org>
Andrew Davis [Mon, 24 Oct 2022 17:34:29 +0000 (12:34 -0500)]
kbuild: Allow DTB overlays to built into .dtbo.S files
DTB files can be built into the kernel by converting them to assembly
files then assembling them into object files. We extend this here
for DTB overlays with the .dtso extensions.
We change the start and end delimiting tag prefix to make it clear that
this data came from overlay files.
[Based on patch by Frank Rowand <frank.rowand@sony.com>]
Signed-off-by: Andrew Davis <afd@ti.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Tested-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Frank Rowand <frowand.list@gmail.com>
Tested-by: Frank Rowand <frowand.list@gmail.com>
Link: https://lore.kernel.org/r/20221024173434.32518-3-afd@ti.com
Signed-off-by: Rob Herring <robh@kernel.org>
Andrew Davis [Mon, 24 Oct 2022 17:34:28 +0000 (12:34 -0500)]
kbuild: Allow DTB overlays to built from .dtso named source files
Currently DTB Overlays (.dtbo) are build from source files with the same
extension (.dts) as the base DTs (.dtb). This may become confusing and
even lead to wrong results. For example, a composite DTB (created from a
base DTB and a set of overlays) might have the same name as one of the
overlays that create it.
Different files should be generated from differently named sources.
.dtb <-> .dts
.dtbo <-> .dtso
We do not remove the ability to compile DTBO files from .dts files here,
only add a new rule allowing the .dtso file name. The current .dts named
overlays can be renamed with time. After all have been renamed we can
remove the other rule.
Signed-off-by: Andrew Davis <afd@ti.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Tested-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Frank Rowand <frowand.list@gmail.com>
Tested-by: Frank Rowand <frowand.list@gmail.com>
Link: https://lore.kernel.org/r/20221024173434.32518-2-afd@ti.com
Signed-off-by: Rob Herring <robh@kernel.org>
Horatiu Vultur [Thu, 15 Sep 2022 06:41:12 +0000 (08:41 +0200)]
ARM: dts: lan966x: Add interrupt support for PHYs on pcb8290
Add interrupt support for the PHYs found on pcb8290. They are all
sharing the same interrupt line towards lan966x.
Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com>
Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Link: https://lore.kernel.org/r/20220915064112.1935051-1-horatiu.vultur@microchip.com
Geert Uytterhoeven [Fri, 21 Oct 2022 14:13:05 +0000 (16:13 +0200)]
arm64: dts: renesas: r8a779g0: Add remaining HSCIF nodes
Add device nodes for the remaining High Speed Serial Communication
Interfaces with FIFO (HSCIF) on the Renesas R-Car V4H (R8A779G0) SoC,
including DMA support.
Reformat the existing HSCIF0 node for consistency.
Based on patches in the BSP by Takeshi Kihara and Vinh Nguyen.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Link: https://lore.kernel.org/r/64c15b2d13439b2072cde0b588a251cb54f7dc01.1666361314.git.geert+renesas@glider.be
Geert Uytterhoeven [Fri, 21 Oct 2022 14:13:04 +0000 (16:13 +0200)]
arm64: dts: renesas: r8a779g0: Add SCIF nodes
Add device nodes for the Serial Communication Interfaces with FIFO
(SCIF) on the Renesas R-Car V4H (R8A779G0) SoC, including DMA support.
Based on patches in the BSP by Takeshi Kihara and Vinh Nguyen.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Link: https://lore.kernel.org/r/3f0ad7ce0fedfca2783001a6eb3eca96aea72115.1666361314.git.geert+renesas@glider.be
Martin Povišer [Sun, 18 Sep 2022 09:58:43 +0000 (11:58 +0200)]
arm64: dts: apple: Add ADMAC resets on t8103/t600x
There's a shared reset for the ADMAC and MCA peripherals. The MCA node
already describes it, and being a shared reset it is important we
describe it on the ADMAC node too.
Signed-off-by: Martin Povišer <povik+lin@cutebit.org>
Signed-off-by: Hector Martin <marcan@marcan.st>
Martin Povišer [Sun, 18 Sep 2022 09:58:42 +0000 (11:58 +0200)]
dt-bindings: dma: apple,admac: Add reset
On the SoCs there is usually a shared audio reset line, so add
a property for that.
Signed-off-by: Martin Povišer <povik+lin@cutebit.org>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Hector Martin <marcan@marcan.st>
Janne Grunau [Fri, 16 Sep 2022 14:25:50 +0000 (16:25 +0200)]
arm64: dts: apple: t600x: Add MCA and its support
Add the MCA I2S transceiver and its supporting ADMAC and NCO nodes.
Signed-off-by: Janne Grunau <j@jannau.net>
Acked-by: Marc Zyngier <maz@kernel.org>
Signed-off-by: Hector Martin <marcan@marcan.st>
Martin Povišer [Fri, 16 Sep 2022 14:25:49 +0000 (16:25 +0200)]
arm64: dts: apple: t8103: Add MCA and its support
Add the MCA I2S transceiver node and its supporting NCO, ADMAC nodes.
Signed-off-by: Martin Povišer <povik+lin@cutebit.org>
Signed-off-by: Janne Grunau <j@jannau.net>
Acked-by: Marc Zyngier <maz@kernel.org>
Signed-off-by: Hector Martin <marcan@marcan.st>
Martin Povišer [Fri, 16 Sep 2022 14:25:48 +0000 (16:25 +0200)]
arm64: dts: apple: t8103: Add AUDIO_P parent to the SIO_ADMA power domain
The SIO_ADMA is a power domain of the Audio DMA Controller. In addition
to it, the AUDIO_P domain must be on for the controller's MMIO registers
to be accessible.
On t600x and t8112, AUDIO_P is a parent of SIO_ADMA. On t8103, it isn't
so, at least as far as Apple's firmware goes. To make our life easier,
add the parent-child relationship on t8103 also.
Signed-off-by: Martin Povišer <povik+lin@cutebit.org>
Signed-off-by: Janne Grunau <j@jannau.net>
Acked-by: Marc Zyngier <maz@kernel.org>
Signed-off-by: Hector Martin <marcan@marcan.st>
Janne Grunau [Fri, 16 Sep 2022 14:25:47 +0000 (16:25 +0200)]
arm64: dts: apple: Add J375 devicetrees
These are the Mac Studio devices with M1 Max (t6001) and
M1 Ultra (t6002).
Signed-off-by: Janne Grunau <j@jannau.net>
Acked-by: Marc Zyngier <maz@kernel.org>
Signed-off-by: Hector Martin <marcan@marcan.st>
Hector Martin [Fri, 16 Sep 2022 14:25:46 +0000 (16:25 +0200)]
arm64: dts: apple: Add J314 and J316 devicetrees
These are the 14-inch and 16-inch 2021 MacBooks, in both M1 Pro and M1
Max variants (t6000 and t6001).
Signed-off-by: Janne Grunau <j@jannau.net>
Acked-by: Marc Zyngier <maz@kernel.org>
Signed-off-by: Hector Martin <marcan@marcan.st>
Hector Martin [Fri, 16 Sep 2022 14:25:45 +0000 (16:25 +0200)]
arm64: dts: apple: Add initial t6000/t6001/t6002 DTs
These SoCs are found in Apple devices with M1 Pro (t6000), M1 Max
(t6001) and M1 Ultra (t6002).
t6000 is a cut-down version of t6001, so the former just includes the
latter and disables the missing bits (This is currently just one PMGR
node and all of its domains.
t6002 is two connected t6001 dies. The implementation seems to use
t6001 with blocks disabled (mostly on the second die). MMIO addresses on
the second die have a constant offset. The interrupt controller is
multi-die aware. This setup can be represented in the device tree with
two top level "soc" nodes. The MMIO offset is applied via "ranges" and
devices are included with preproceesor macros to make the node labels
unique and to specify the die number for the interrupt definition.
Device nodes are distributed over dtsi files based on whether they are
present on both dies or just on the first die. The only execption is the
NVMe controller which resides on the second die. Its nodes are in a
separate file.
Co-developed-by: Janne Grunau <j@jannau.net>
Signed-off-by: Janne Grunau <j@jannau.net>
Acked-by: Marc Zyngier <maz@kernel.org>
Signed-off-by: Hector Martin <marcan@marcan.st>
Hector Martin [Fri, 16 Sep 2022 14:25:44 +0000 (16:25 +0200)]
arm64: dts: apple: Fix j45x model years
The Apple silicon iMac models were released in April 2021.
Signed-off-by: Janne Grunau <j@jannau.net>
Acked-by: Marc Zyngier <maz@kernel.org>
Signed-off-by: Hector Martin <marcan@marcan.st>
Janne Grunau [Fri, 16 Sep 2022 14:25:43 +0000 (16:25 +0200)]
dt-bindings: arm: apple: Add t6001/t6002 Mac Studio compatibles
This adds the following apple,t6001 platform:
- apple,j375c - Mac Studio (M1 Max, 2022)
And the initial apple,t6002 platform:
- apple,j375d - Mac Studio (M1 Ultra, 2022)
Signed-off-by: Janne Grunau <j@jannau.net>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Acked-by: Marc Zyngier <maz@kernel.org>
Signed-off-by: Hector Martin <marcan@marcan.st>
Janne Grunau [Fri, 16 Sep 2022 14:25:42 +0000 (16:25 +0200)]
dt-bindings: apple,aic2: Add CPU PMU per-cpu pseudo-interrupts
Advertise the two pseudo-interrupts that tied to the two PMU
flavours present in the Apple M1 Pro/Max/Ultra SoC.
We choose the expose two different pseudo-interrupts to the OS
as the e-core PMU is obviously different from the p-core one,
effectively presenting two different devices.
Imported from "apple,aic".
Signed-off-by: Janne Grunau <j@jannau.net>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Acked-by: Marc Zyngier <maz@kernel.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Hector Martin <marcan@marcan.st>
Sven Peter [Fri, 16 Sep 2022 09:41:48 +0000 (11:41 +0200)]
dt-bindings: iommu: dart: add t6000 compatible
The M1 Max/Pro SoCs come with a new DART variant that is incompatible with
the previous one. Add a new compatible for those.
Signed-off-by: Sven Peter <sven@svenpeter.dev>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Janne Grunau <j@jannau.net>
Signed-off-by: Hector Martin <marcan@marcan.st>
Andreas Kemnade [Fri, 23 Sep 2022 22:11:11 +0000 (00:11 +0200)]
dt-bindings: arm: fsl: add compatible string for Kobo Aura 2
This adds a compatible string for the Kobo Aura 2 eBook reader.
Signed-off-by: Andreas Kemnade <andreas@kemnade.info>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Peng Fan [Fri, 23 Sep 2022 07:49:42 +0000 (15:49 +0800)]
dt-bindings: clock: add i.MX8M Anatop
i.MX8M Family features an anatop module the produces PLL to clock
control module(CCM) root clock. Add the missing yaml file.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Linus Torvalds [Sun, 23 Oct 2022 22:27:33 +0000 (15:27 -0700)]
Linux 6.1-rc2
Linus Torvalds [Sun, 23 Oct 2022 22:00:43 +0000 (15:00 -0700)]
Merge tag 'for-linus' of git://git./virt/kvm/kvm
Pull kvm fixes from Paolo Bonzini:
"RISC-V:
- Fix compilation without RISCV_ISA_ZICBOM
- Fix kvm_riscv_vcpu_timer_pending() for Sstc
ARM:
- Fix a bug preventing restoring an ITS containing mappings for very
large and very sparse device topology
- Work around a relocation handling error when compiling the nVHE
object with profile optimisation
- Fix for stage-2 invalidation holding the VM MMU lock for too long
by limiting the walk to the largest block mapping size
- Enable stack protection and branch profiling for VHE
- Two selftest fixes
x86:
- add compat implementation for KVM_X86_SET_MSR_FILTER ioctl
selftests:
- synchronize includes between include/uapi and tools/include/uapi"
* tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvm:
tools: include: sync include/api/linux/kvm.h
KVM: x86: Add compat handler for KVM_X86_SET_MSR_FILTER
KVM: x86: Copy filter arg outside kvm_vm_ioctl_set_msr_filter()
kvm: Add support for arch compat vm ioctls
RISC-V: KVM: Fix kvm_riscv_vcpu_timer_pending() for Sstc
RISC-V: Fix compilation without RISCV_ISA_ZICBOM
KVM: arm64: vgic: Fix exit condition in scan_its_table()
KVM: arm64: nvhe: Fix build with profile optimization
KVM: selftests: Fix number of pages for memory slot in memslot_modification_stress_test
KVM: arm64: selftests: Fix multiple versions of GIC creation
KVM: arm64: Enable stack protection and branch profiling for VHE
KVM: arm64: Limit stage2_apply_range() batch size to largest block
KVM: arm64: Work out supported block level at compile time
Jason A. Donenfeld [Sat, 8 Oct 2022 15:47:00 +0000 (09:47 -0600)]
Revert "mfd: syscon: Remove repetition of the regmap_get_val_endian()"
This reverts commit
72a95859728a7866522e6633818bebc1c2519b17.
It broke reboots on big-endian MIPS and MIPS64 malta QEMU instances,
which use the syscon driver. Little-endian is not effected, which means
likely it's important to handle regmap_get_val_endian() in this function
after all.
Fixes:
72a95859728a ("mfd: syscon: Remove repetition of the regmap_get_val_endian()")
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Cc: Lee Jones <lee@kernel.org>
Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Linus Torvalds [Sun, 23 Oct 2022 19:01:01 +0000 (12:01 -0700)]
kernel/utsname_sysctl.c: Fix hostname polling
Commit
bfca3dd3d068 ("kernel/utsname_sysctl.c: print kernel arch") added
a new entry to the uts_kern_table[] array, but didn't update the
UTS_PROC_xyz enumerators of older entries, breaking anything that used
them.
Which is admittedly not many cases: it's really just the two uses of
uts_proc_notify() in kernel/sys.c. But apparently journald-systemd
actually uses this to detect hostname changes.
Reported-by: Torsten Hilbrich <torsten.hilbrich@secunet.com>
Fixes:
bfca3dd3d068 ("kernel/utsname_sysctl.c: print kernel arch")
Link: https://lore.kernel.org/lkml/0c2b92a6-0f25-9538-178f-eee3b06da23f@secunet.com/
Link: https://linux-regtracking.leemhuis.info/regzbot/regression/0c2b92a6-0f25-9538-178f-eee3b06da23f@secunet.com/
Cc: Petr Vorel <pvorel@suse.cz>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Linus Torvalds [Sun, 23 Oct 2022 17:14:45 +0000 (10:14 -0700)]
Merge tag 'perf_urgent_for_v6.1_rc2' of git://git./linux/kernel/git/tip/tip
Pull perf fixes from Borislav Petkov:
- Fix raw data handling when perf events are used in bpf
- Rework how SIGTRAPs get delivered to events to address a bunch of
problems with it. Add a selftest for that too
* tag 'perf_urgent_for_v6.1_rc2' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
bpf: Fix sample_flags for bpf_perf_event_output
selftests/perf_events: Add a SIGTRAP stress test with disables
perf: Fix missing SIGTRAPs
Linus Torvalds [Sun, 23 Oct 2022 17:10:55 +0000 (10:10 -0700)]
Merge tag 'sched_urgent_for_v6.1_rc2' of git://git./linux/kernel/git/tip/tip
Pull scheduler fixes from Borislav Petkov:
- Adjust code to not trip up CFI
- Fix sched group cookie matching
* tag 'sched_urgent_for_v6.1_rc2' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
sched: Introduce struct balance_callback to avoid CFI mismatches
sched/core: Fix comparison in sched_group_cookie_match()
Linus Torvalds [Sun, 23 Oct 2022 17:07:01 +0000 (10:07 -0700)]
Merge tag 'objtool_urgent_for_v6.1_rc2' of git://git./linux/kernel/git/tip/tip
Pull objtool fix from Borislav Petkov:
- Fix ORC stack unwinding when GCOV is enabled
* tag 'objtool_urgent_for_v6.1_rc2' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
x86/unwind/orc: Fix unreliable stack dump with gcov
Linus Torvalds [Sun, 23 Oct 2022 17:01:34 +0000 (10:01 -0700)]
Merge tag 'x86_urgent_for_v6.0_rc2' of git://git./linux/kernel/git/tip/tip
Pull x86 fixes from Borislav Petkov:
"As usually the case, right after a major release, the tip urgent
branches accumulate a couple more fixes than normal. And here is the
x86, a bit bigger, urgent pile.
- Use the correct CPU capability clearing function on the error path
in Intel perf LBR
- A CFI fix to ftrace along with a simplification
- Adjust handling of zero capacity bit mask for resctrl cache
allocation on AMD
- A fix to the AMD microcode loader to attempt patch application on
every logical thread
- A couple of topology fixes to handle CPUID leaf 0x1f enumeration
info properly
- Drop a -mabi=ms compiler option check as both compilers support it
now anyway
- A couple of fixes to how the initial, statically allocated FPU
buffer state is setup and its interaction with dynamic states at
runtime"
* tag 'x86_urgent_for_v6.0_rc2' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
x86/fpu: Fix copy_xstate_to_uabi() to copy init states correctly
perf/x86/intel/lbr: Use setup_clear_cpu_cap() instead of clear_cpu_cap()
ftrace,kcfi: Separate ftrace_stub() and ftrace_stub_graph()
x86/ftrace: Remove ftrace_epilogue()
x86/resctrl: Fix min_cbm_bits for AMD
x86/microcode/AMD: Apply the patch early on every logical thread
x86/topology: Fix duplicated core ID within a package
x86/topology: Fix multiple packages shown on a single-package system
hwmon/coretemp: Handle large core ID value
x86/Kconfig: Drop check for -mabi=ms for CONFIG_EFI_STUB
x86/fpu: Exclude dynamic states from init_fpstate
x86/fpu: Fix the init_fpstate size check with the actual size
x86/fpu: Configure init_fpstate attributes orderly
Linus Torvalds [Sun, 23 Oct 2022 16:55:50 +0000 (09:55 -0700)]
Merge tag 'io_uring-6.1-2022-10-22' of git://git.kernel.dk/linux
Pull io_uring follow-up from Jens Axboe:
"Currently the zero-copy has automatic fallback to normal transmit, and
it was decided that it'd be cleaner to return an error instead if the
socket type doesn't support it.
Zero-copy does work with UDP and TCP, it's more of a future proofing
kind of thing (eg for samba)"
* tag 'io_uring-6.1-2022-10-22' of git://git.kernel.dk/linux:
io_uring/net: fail zc sendmsg when unsupported by socket
io_uring/net: fail zc send when unsupported by socket
net: flag sockets supporting msghdr originated zerocopy
Sascha Hauer [Thu, 22 Sep 2022 08:13:46 +0000 (10:13 +0200)]
dt-bindings: arm: fsl: Add InnoComm WB15 EVK
Add board compatibles for the InnoComm WB15 EVK board.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Sascha Hauer [Thu, 22 Sep 2022 08:13:45 +0000 (10:13 +0200)]
dt-bindings: vendor-prefixes: Add prefix for InnoComm
This adds a vendor prefix for InnoComm Mobile Technology Corp.,
see https://www.innocomm.com/.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Viorel Suman [Wed, 21 Sep 2022 14:36:03 +0000 (17:36 +0300)]
dt-bindings: firmware: imx: sync with SCFW kit v1.13.0
Sync defines with the latest available SCFW kit version 1.13.0,
may be found at the address below:
https://www.nxp.com/webapp/Download?colCode=L5.15.32_2.0.0_SCFWKIT-1.13.0&appType=license
Signed-off-by: Viorel Suman <viorel.suman@nxp.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Linus Torvalds [Sat, 22 Oct 2022 23:04:34 +0000 (16:04 -0700)]
Merge tag 'hwmon-for-v6.1-rc2' of git://git./linux/kernel/git/groeck/linux-staging
Pull hwmon fixes from Guenter Roeck:
- corsair-psu: Fix typo in USB id description, and add USB ID for new
PSU
- pwm-fan: Fix fan power handling when disabling fan control
* tag 'hwmon-for-v6.1-rc2' of git://git.kernel.org/pub/scm/linux/kernel/git/groeck/linux-staging:
hwmon: (corsair-psu) Add USB id of the new HX1500i psu
hwmon: (pwm-fan) Explicitly switch off fan power when setting pwm1_enable to 0
hwmon: (corsair-psu) fix typo in USB id description
Linus Torvalds [Sat, 22 Oct 2022 22:59:46 +0000 (15:59 -0700)]
Merge tag 'i2c-for-6.1-rc2' of git://git./linux/kernel/git/wsa/linux
Pull i2c fixes from Wolfram Sang:
"RPM fix for qcom-cci, platform module alias for xiic, build warning
fix for mlxbf, typo fixes in comments"
* tag 'i2c-for-6.1-rc2' of git://git.kernel.org/pub/scm/linux/kernel/git/wsa/linux:
i2c: mlxbf: depend on ACPI; clean away ifdeffage
i2c: fix spelling typos in comments
i2c: qcom-cci: Fix ordering of pm_runtime_xx and i2c_add_adapter
i2c: xiic: Add platform module alias
Linus Torvalds [Sat, 22 Oct 2022 22:52:36 +0000 (15:52 -0700)]
Merge tag 'pci-v6.1-fixes-2' of git://git./linux/kernel/git/helgaas/pci
Pull pci fixes from Bjorn Helgaas:
- Revert a simplification that broke pci-tegra due to a masking error
- Update MAINTAINERS for Kishon's email address change and TI
DRA7XX/J721E maintainer change
* tag 'pci-v6.1-fixes-2' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci:
MAINTAINERS: Update Kishon's email address in PCI endpoint subsystem
MAINTAINERS: Add Vignesh Raghavendra as maintainer of TI DRA7XX/J721E PCI driver
Revert "PCI: tegra: Use PCI_CONF1_EXT_ADDRESS() macro"
Linus Torvalds [Sat, 22 Oct 2022 22:30:15 +0000 (15:30 -0700)]
Merge tag 'media/v6.1-2' of git://git./linux/kernel/git/mchehab/linux-media
Pull missed media updates from Mauro Carvalho Chehab:
"It seems I screwed-up my previous pull request: it ends up that only
half of the media patches that were in linux-next got merged in -rc1.
The script which creates the signed tags silently failed due to
5.19->6.0 so it ended generating a tag with incomplete stuff.
So here are the missing parts:
- a DVB core security fix
- lots of fixes and cleanups for atomisp staging driver
- old drivers that are VB1 are being moved to staging to be
deprecated
- several driver updates - mostly for embedded systems, but there are
also some things addressing issues with some PC webcams, in the UVC
video driver"
* tag 'media/v6.1-2' of git://git.kernel.org/pub/scm/linux/kernel/git/mchehab/linux-media: (163 commits)
media: sun6i-csi: Move csi buffer definition to main header file
media: sun6i-csi: Introduce and use video helper functions
media: sun6i-csi: Add media ops with link notify callback
media: sun6i-csi: Remove controls handler from the driver
media: sun6i-csi: Register the media device after creation
media: sun6i-csi: Pass and store csi device directly in video code
media: sun6i-csi: Tidy up video code
media: sun6i-csi: Tidy up v4l2 code
media: sun6i-csi: Tidy up Kconfig
media: sun6i-csi: Use runtime pm for clocks and reset
media: sun6i-csi: Define and use variant to get module clock rate
media: sun6i-csi: Always set exclusive module clock rate
media: sun6i-csi: Tidy up platform code
media: sun6i-csi: Refactor main driver data structures
media: sun6i-csi: Define and use driver name and (reworked) description
media: cedrus: Add a Kconfig dependency on RESET_CONTROLLER
media: sun8i-rotate: Add a Kconfig dependency on RESET_CONTROLLER
media: sun8i-di: Add a Kconfig dependency on RESET_CONTROLLER
media: sun4i-csi: Add a Kconfig dependency on RESET_CONTROLLER
media: sun6i-csi: Add a Kconfig dependency on RESET_CONTROLLER
...
Pavel Begunkov [Fri, 21 Oct 2022 10:16:41 +0000 (11:16 +0100)]
io_uring/net: fail zc sendmsg when unsupported by socket
The previous patch fails zerocopy send requests for protocols that don't
support it, do the same for zerocopy sendmsg.
Signed-off-by: Pavel Begunkov <asml.silence@gmail.com>
Link: https://lore.kernel.org/r/0854e7bb4c3d810a48ec8b5853e2f61af36a0467.1666346426.git.asml.silence@gmail.com
Signed-off-by: Jens Axboe <axboe@kernel.dk>
Pavel Begunkov [Fri, 21 Oct 2022 10:16:40 +0000 (11:16 +0100)]
io_uring/net: fail zc send when unsupported by socket
If a protocol doesn't support zerocopy it will silently fall back to
copying. This type of behaviour has always been a source of troubles
so it's better to fail such requests instead.
Cc: <stable@vger.kernel.org> # 6.0
Signed-off-by: Pavel Begunkov <asml.silence@gmail.com>
Link: https://lore.kernel.org/r/2db3c7f16bb6efab4b04569cd16e6242b40c5cb3.1666346426.git.asml.silence@gmail.com
Signed-off-by: Jens Axboe <axboe@kernel.dk>
Pavel Begunkov [Fri, 21 Oct 2022 10:16:39 +0000 (11:16 +0100)]
net: flag sockets supporting msghdr originated zerocopy
We need an efficient way in io_uring to check whether a socket supports
zerocopy with msghdr provided ubuf_info. Add a new flag into the struct
socket flags fields.
Cc: <stable@vger.kernel.org> # 6.0
Signed-off-by: Pavel Begunkov <asml.silence@gmail.com>
Acked-by: Jakub Kicinski <kuba@kernel.org>
Link: https://lore.kernel.org/r/3dafafab822b1c66308bb58a0ac738b1e3f53f74.1666346426.git.asml.silence@gmail.com
Signed-off-by: Jens Axboe <axboe@kernel.dk>
Wilken Gottwalt [Sat, 8 Oct 2022 11:35:34 +0000 (11:35 +0000)]
hwmon: (corsair-psu) Add USB id of the new HX1500i psu
Also update the documentation accordingly.
Signed-off-by: Wilken Gottwalt <wilken.gottwalt@posteo.net>
Link: https://lore.kernel.org/r/Y0FghqQCHG/cX5Jz@monster.localdomain
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
Paolo Bonzini [Sat, 22 Oct 2022 11:43:52 +0000 (07:43 -0400)]
tools: include: sync include/api/linux/kvm.h
Provide a definition of KVM_CAP_DIRTY_LOG_RING_ACQ_REL.
Fixes:
17601bfed909 ("KVM: Add KVM_CAP_DIRTY_LOG_RING_ACQ_REL capability and config option")
Cc: Marc Zyngier <maz@kernel.org>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Alexander Graf [Mon, 17 Oct 2022 18:45:41 +0000 (20:45 +0200)]
KVM: x86: Add compat handler for KVM_X86_SET_MSR_FILTER
The KVM_X86_SET_MSR_FILTER ioctls contains a pointer in the passed in
struct which means it has a different struct size depending on whether
it gets called from 32bit or 64bit code.
This patch introduces compat code that converts from the 32bit struct to
its 64bit counterpart which then gets used going forward internally.
With this applied, 32bit QEMU can successfully set MSR bitmaps when
running on 64bit kernels.
Reported-by: Andrew Randrianasulu <randrianasulu@gmail.com>
Fixes:
1a155254ff937 ("KVM: x86: Introduce MSR filtering")
Signed-off-by: Alexander Graf <graf@amazon.com>
Message-Id: <
20221017184541.2658-4-graf@amazon.com>
Cc: stable@vger.kernel.org
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Alexander Graf [Mon, 17 Oct 2022 18:45:40 +0000 (20:45 +0200)]
KVM: x86: Copy filter arg outside kvm_vm_ioctl_set_msr_filter()
In the next patch we want to introduce a second caller to
set_msr_filter() which constructs its own filter list on the stack.
Refactor the original function so it takes it as argument instead of
reading it through copy_from_user().
Signed-off-by: Alexander Graf <graf@amazon.com>
Message-Id: <
20221017184541.2658-3-graf@amazon.com>
Cc: stable@vger.kernel.org
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Alexander Graf [Mon, 17 Oct 2022 18:45:39 +0000 (20:45 +0200)]
kvm: Add support for arch compat vm ioctls
We will introduce the first architecture specific compat vm ioctl in the
next patch. Add all necessary boilerplate to allow architectures to
override compat vm ioctls when necessary.
Signed-off-by: Alexander Graf <graf@amazon.com>
Message-Id: <
20221017184541.2658-2-graf@amazon.com>
Cc: stable@vger.kernel.org
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
projects / platform / kernel / linux-rpi.git / log