clover: add support for opencl C features

This adds support to the compiler and api for this CL 3.0 feature.

fixes CTS compiler features_macro

Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7520>

clover/spirv: avoid strings for version handling

This is extracted from Pierre's WIP versioning patch.

Reviewed-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7520>

clover/llvm: don't use strings for version handling.

This is extracted from Pierre's WIP versioning patch.

Reviewed-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7520>

clover: add platform supported extensions with version

Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7520>

clover: add support for versioned device extensions

Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7520>

clover: report device CLC versions for 3.0

Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7520>

clover: add CL_PLATFORM_NUMERIC_VERSION support

This is part of CL 3.0

Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7520>

clover/platform: move versioning to core object.

This reads the env var once at constructor time and stores it
in the platform object.

Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7520>

clover: add CL 3.0 CL_DEVICE_NUMERIC_VERSION support

Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7520>

clover/device: store version in device at constructor.

This reads the env vars once and stores the value, and converts
to strings when needed

Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7520>

util: add a env getter for versions

This lets us parse a standard major.minor version.

Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7520>

clover: rename platform/device apis using strings

Just add as_string to these to faciliate the non-string ones.

(extracted by airlied from pmoreau patch).

Reviewed-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7520>

clover/queue: Flush automatically if applications do not flush themselves

With the image_read_write OpenCL CTS we can get a stack overflow handling
all the events as the application itself never flushes.

We need to address this in two ways:
1. flush the queue once an abritary amoung of events piled up.
2. Drop event deps once they get a fence assigned.

Signed-off-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7460>

mesa/bufferobj: Fix valgrind complaints

==328537== Mutex reinitialization: mutex 0x1281afb0, recursion count 0, owner 0.
==328537==    at 0x486FD34: pthread_mutex_init_intercept (drd_pthread_intercepts.c:826)
==328537==    by 0x486FD34: pthread_mutex_init (drd_pthread_intercepts.c:835)
==328537==    by 0x117DA107: mtx_init (threads_posix.h:207)
==328537==    by 0x117DA2BB: simple_mtx_init (simple_mtx.h:132)
==328537==    by 0x117DB86B: _mesa_init_buffer_objects (bufferobj.c:878)
==328537==    by 0x117E8C6F: init_attrib_groups (context.c:840)
==328537==    by 0x117E942F: _mesa_initialize_context (context.c:1225)
==328537==    by 0x1173C323: st_create_context (st_context.c:1019)
==328537==    by 0x11720A9F: st_api_create_context (st_manager.c:930)
==328537==    by 0x1170E2CF: dri_create_context (dri_context.c:163)
==328537==    by 0x11FB9DC3: driCreateContextAttribs (dri_util.c:480)
==328537==    by 0x8E9D3DF: dri3_create_context_attribs (dri3_glx.c:316)
==328537==    by 0x8E9D49B: dri3_create_context (dri3_glx.c:347)
==328537== mutex 0x1281afb0 was first observed at:
==328537==    at 0x486FD34: pthread_mutex_init_intercept (drd_pthread_intercepts.c:826)
==328537==    by 0x486FD34: pthread_mutex_init (drd_pthread_intercepts.c:835)
==328537==    by 0x117DA107: mtx_init (threads_posix.h:207)
==328537==    by 0x117DA2BB: simple_mtx_init (simple_mtx.h:132)
==328537==    by 0x117DB86B: _mesa_init_buffer_objects (bufferobj.c:878)
==328537==    by 0x117E8C6F: init_attrib_groups (context.c:840)
==328537==    by 0x117E942F: _mesa_initialize_context (context.c:1225)
==328537==    by 0x1173C323: st_create_context (st_context.c:1019)
==328537==    by 0x11720A9F: st_api_create_context (st_manager.c:930)
==328537==    by 0x1170E2CF: dri_create_context (dri_context.c:163)
==328537==    by 0x11FB9DC3: driCreateContextAttribs (dri_util.c:480)
==328537==    by 0x8E9D3DF: dri3_create_context_attribs (dri3_glx.c:316)
==328537==    by 0x8E9D49B: dri3_create_context (dri3_glx.c:347)

Signed-off-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7517>

mesa/fbo: Fix valgrind complaints

Just statically initialize the dummy/incomplete framebuffer/renderbuffer
to avoid re-intializing their mutex.

==328537== Mutex reinitialization: mutex 0x1281bd28, recursion count 0, owner 0.
==328537==    at 0x486FD34: pthread_mutex_init_intercept (drd_pthread_intercepts.c:826)
==328537==    by 0x486FD34: pthread_mutex_init (drd_pthread_intercepts.c:835)
==328537==    by 0x118F9727: mtx_init (threads_posix.h:207)
==328537==    by 0x118F983B: simple_mtx_init (simple_mtx.h:132)
==328537==    by 0x118FA087: _mesa_init_fbobjects (fbobject.c:93)
==328537==    by 0x117E8CB7: init_attrib_groups (context.c:849)
==328537==    by 0x117E942F: _mesa_initialize_context (context.c:1225)
==328537==    by 0x1173C323: st_create_context (st_context.c:1019)
==328537==    by 0x11720A9F: st_api_create_context (st_manager.c:930)
==328537==    by 0x1170E2CF: dri_create_context (dri_context.c:163)
==328537==    by 0x11FB9DC3: driCreateContextAttribs (dri_util.c:480)
==328537==    by 0x8E9D3DF: dri3_create_context_attribs (dri3_glx.c:316)
==328537==    by 0x8E9D49B: dri3_create_context (dri3_glx.c:347)
==328537== mutex 0x1281bd28 was first observed at:
==328537==    at 0x486FD34: pthread_mutex_init_intercept (drd_pthread_intercepts.c:826)
==328537==    by 0x486FD34: pthread_mutex_init (drd_pthread_intercepts.c:835)
==328537==    by 0x118F9727: mtx_init (threads_posix.h:207)
==328537==    by 0x118F983B: simple_mtx_init (simple_mtx.h:132)
==328537==    by 0x118FA087: _mesa_init_fbobjects (fbobject.c:93)
==328537==    by 0x117E8CB7: init_attrib_groups (context.c:849)
==328537==    by 0x117E942F: _mesa_initialize_context (context.c:1225)
==328537==    by 0x1173C323: st_create_context (st_context.c:1019)
==328537==    by 0x11720A9F: st_api_create_context (st_manager.c:930)
==328537==    by 0x1170E2CF: dri_create_context (dri_context.c:163)
==328537==    by 0x11FB9DC3: driCreateContextAttribs (dri_util.c:480)
==328537==    by 0x8E9D3DF: dri3_create_context_attribs (dri3_glx.c:316)
==328537==    by 0x8E9D49B: dri3_create_context (dri3_glx.c:347)

Signed-off-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7517>

util/threaded_context: use driver's ubo alignment for constant buffer uploads

this is another case where the hardcoded value was specific to radeon drivers

Reviewed-by: Adam Jackson <ajax@redhat.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7475>

freedreno: Protect gmem_cache ralloc allocations

Since the ralloc context for cache_key allocation is shared between all
the contexts hanging off a screen, we need to allocate the key under the
screen->lock.

Fixes: 91f9bb99c5e ("freedreno: add gmem state cache")
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7342>

freedreno/drm: Rework APPEND() macro

In particular I wanted the nr_foo increment to be after assignment..
mostly just to track down a potential race.  (This wasn't it, but I
like this color for the bikeshed better.)

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7342>

freedreno/batch: Cleanup submit immediately after flush

No reason to keep these around if the batch is not immediately unref'd.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7342>

freedreno/drm: Drop growable submit_bos table

Since we are not tracking reloc flags per submit, we can just construct
this table at flush time, rather than using a second growable table that
is in sync with msm_submit->bos.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7342>

freedreno: Add submit lock

Add a lock to synchronize batch flush (which can be triggered from a
different ctx) with cmdstream emit.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7342>

freedreno: Make fd_context_batch() return a reference

This protects better against another context triggering a batch flush
and unref while the first context is doing resource tracking.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7342>

freedreno/batch: Move fd_batch_get_prologue()

To keep fd_batch_flush() and it's internal helper batch_flush()
together.  Also update an obsolete comment.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7342>

freedreno/drm: Make ring refcnt atomic again

In general, rings are not shared across contexts/threads.  But this
can happen with texture stateobjs, which can be invalidated by other
contexts.

And while we're here, lets convert the rest of freedreno/drm to
u_atomic

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7342>

freedreno: Use ctx seqno in batch cache key

It is smaller than a pointer, and doesn't run into problems of context
destroy/create cycle ending up with the same address.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7342>

freedreno/a6xx: Texture cache locking

Originally the tex cache was never touched from other contexts, but
rebind_resource() changed that.  Add some locking to protect tex cache
against multi-threaded access.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7342>

freedreno: batch-cache locking

Move the locking slightly to protect hashtable lookups as well.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7342>

freedreno: Fix spurious flush

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7342>

freedreno: Convert to mesa_log*()

debug_printf() isn't terribly great in multi-threaded situations.. but
since we now have a simple util/log.h, which even plays nicely with
logcat on android, lets use that instead.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7342>

freedreno: debug cleanup

Fix an extra \n and remove a useless trace (I guess after 7yrs it is no
longer actually TODO)

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7342>

freedreno/drm: Convert to simple_mtx

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7342>

freedreno: Drop fd_context_lock() and friends

These were actually just wrappers for the screen->lock, left over from
moving things around a long time ago.  Lets drop them to make things
more explicit (that we are locking the screen, not the context).

Involves a bit of shuffling things around to untangle header deps, but
no functional change.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7342>

st/mesa: fix use-after-free when updating shader info in st_link_nir

Fixes: 549ae5f8 "st/mesa: make sure prog->info is up to date for NIR (v2)"

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3756
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3685

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7516>

d3d12: avoid searching twice for bos

Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7477>

d3d12: ensure all compoents of clip-distances are written

This fixes a regression that happened after rebasing on master, where we
end up not writing all components of the clip-distance array, which the
DXIL validation code in the D3D12 runtime treats as an error.

To ensure we don't end up overwriting a previous wrire, enable
nir_shader_compiler_options::lower_all_io_to_temps as well.

Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7477>

d3d12: introduce d3d12 gallium driver

This driver will allow running OpenGL and OpenCL on top of Gallium
for any hardware supporting Microsoft's Direct3D 12 on Windows 10.

This is the combination of a lot of commits from our development branch,
containing code from several authors.

Co-authored-by: Bill Kristiansen <billkris@microsoft.com>
Co-authored-by: Gert Wollny <gert.wollny@collabora.com>
Co-authored-by: Jesse Natalie <jenatali@microsoft.com>
Co-authored-by: Louis-Francis Ratté-Boulianne <lfrb@collabora.com>
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7477>

microsoft: add resource state manager utility code

The code originates from this repository:
https://github.com/microsoft/D3D12TranslationLayer

It will be used in the next commit.

Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7477>

microsoft/compiler: translate nir to dxil

Here's the code to emit DXIL code from NIR. It's big and bulky as-is,
and it needs to be split up a bit.

This is the combination of a lot of commits from our development branch,
containing code by several authors.

Co-authored-by: Bill Kristiansen <billkris@microsoft.com>
Co-authored-by: Boris Brezillon <boris.brezillon@collabora.com>
Co-authored-by: Daniel Stone <daniels@collabora.com>
Co-authored-by: Gert Wollny <gert.wollny@collabora.com>
Co-authored-by: Jesse Natalie <jenatali@microsoft.com>
Co-authored-by: Louis-Francis Ratté-Boulianne <lfrb@collabora.com>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7477>

microsoft/compiler: add dxil-util code

This is support-code to emit the DirectX Intermediate Language, which is
a dialect of LLVM 3.7 bitcode. Because modern versions of LLVM doesn't
support emitting bitcode for older versions, and we can't rely on an old
LLVM version because we need the OpenCL support from Clang later on, we
instead implement our own LLVM bitcode encoder as part of this work.

See the official DXIL documentation for more details on DXIL:
https://github.com/Microsoft/DirectXShaderCompiler/blob/master/docs/DXIL.rst

The reason this comes as a separate library, is because we're also using
this code as the basis for an OpenCL C compiler, which will follow as a
separate merge-request later.

This is the combination of more than 230 commits from our development
branch, including the work from several authors.

Co-authored-by: Bill Kristiansen <billkris@microsoft.com>
Co-authored-by: Boris Brezillon <boris.brezillon@collabora.com>
Co-authored-by: Daniel Stone <daniels@collabora.com>
Co-authored-by: Gert Wollny <gert.wollny@collabora.com>
Co-authored-by: Jesse Natalie <jenatali@microsoft.com>
Co-authored-by: Louis-Francis Ratté-Boulianne <lfrb@collabora.com>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7477>

compiler: add SYSTEM_BIT_FRONT_FACE

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7477>

gallium: Wrap some header files into "extern C"

Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7477>

nir/print: print GS extra info

Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7477>

util/format_zs: Add C++ include handling

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7477>

gallium/util: Wrap suballoc.h into extern C

Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7477>

util/slab: allow usage from c++ code

Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7477>

gallium/nir: Wrap tgsi_to_nir header in extern C

Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7477>

softpipe: correct signature of get_compiler_options

This gets rid of a harmless but annoying compiler warning on MSVC.

Fixes: 73bafb5ee38 ("gallium: s/unsigned/enum pipe_shader_type/ for get_compiler_options()")
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7524>

panfrost: Fix ->reads_frag_coord assignment

Let's assign ->reads_frag_coord only once to handle the sysval case
(used on Bifrost) correctly.

Fixes: f1de952b695b ("panfrost: Use shader_info harder")
Cc: 20.3 <mesa-stable>
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7527>

panfrost: Fix Bifrost blend descriptor emission

Format conversion only works if the num_comps field is set to 4,
probably because the tile buffer always store those 4 components
internally.

Fixes: edd98aac3f16 ("panfrost: Add support for native wallpapering on Bifrost")
Fixes: 8389976b7c09 ("panfrost: XML-ify the blend descriptors")
Cc: 20.3 <mesa-stable>
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7527>

pan/bi: Model writemasks correctly

We don't handle partial write masks in the backend yet, so for now we
can't pretend we do, else we'll have RA bugs. Fixes

dEQP-GLES2.functional.fragment_ops.blend.rgb_func_alpha_func.src.constant_color_dst_alpha

Fixes: b2c6cf2b6db1 ("pan/bi: Eliminate writemasks in the IR")
Cc: 20.3 <mesa-stable>
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reported-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Tested-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7527>

intel/dump_gpu: add support for MMAP_OFFSET ioctl

Our driver started using this method to mmap the BOs and we need to
hook it to track the dirtiness of the BO.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Tested-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7528>

panfrost: Fix AFBC blits of resources with faked RGTC

Because u_transfer_helper changes resources back from the real format
to the emulated format after creation, we need to fix the format enum
for resources with fake compression when doing blits to/from AFBC.

Fixes: acb8dcfebdd ("panfrost: Choose AFBC when available")
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7400>

zink: setup version dependent VkPhysicalDeviceVulkan*Features and VkPhysicalDeviceVulkan*Properties.

Adds template support to zink_device_info.py for setting up the VkPhysicalDeviceVulkan* version Features and Properties structures.
When the next Vulkan version with newer structure is released a single like should only need to be added.
Note, the 11 structures where not added until Vk 1.2, so that is not a typo.
This code does not stop the use of clonflicting extensions or other VkPhysicalDevice*Features structures with VkPhysicalDeviceVulkan*Features structures when calling vkCreateDevice()

Acked-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Reviewed-by: Hoe Hao Cheng <haochengho12907@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7496>

rbug: Handle non-TGSI shaders

NIR shaders aren't yet transferred over the wire, but at least they
don't cause a crash.

Acked-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7495>

rbug: Forward get_compiler_options to pipe driver

Acked-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7495>

aco: fix combining add/sub to b2i if a new dest needs to be allocated

The uses vector needs to be expanded to avoid out of bounds access
and to make sure the number of uses is initialized to 0.

This fixes combining more v_and(a, v_subbrev_co_u32).

fossilds-db (Vega10):
Totals from 4574 (3.28% of 139517) affected shaders:
SGPRs: 291625 -> 292217 (+0.20%); split: -0.01%, +0.21%
VGPRs: 276368 -> 276188 (-0.07%); split: -0.07%, +0.01%
SpillSGPRs: 455 -> 533 (+17.14%)
SpillVGPRs: 76 -> 78 (+2.63%)
CodeSize: 23327500 -> 23304152 (-0.10%); split: -0.17%, +0.07%
MaxWaves: 22044 -> 22066 (+0.10%)
Instrs: 4583064 -> 4576301 (-0.15%); split: -0.15%, +0.01%
Cycles: 47925276 -> 47871968 (-0.11%); split: -0.13%, +0.01%
VMEM: 1599363 -> 1597473 (-0.12%); split: +0.08%, -0.19%
SMEM: 331461 -> 331126 (-0.10%); split: +0.08%, -0.18%
VClause: 80639 -> 80696 (+0.07%); split: -0.02%, +0.09%
SClause: 155992 -> 155993 (+0.00%); split: -0.02%, +0.02%
Copies: 333482 -> 333318 (-0.05%); split: -0.12%, +0.07%
Branches: 70967 -> 70968 (+0.00%)
PreSGPRs: 187078 -> 187711 (+0.34%); split: -0.01%, +0.35%
PreVGPRs: 244918 -> 244785 (-0.05%)

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7513>

turnip: Remove pipeline NULL check.

pipeline cannot be NULL since pipeline->layout->num_sets was just
checked.

Fix defect reported by Coverity Scan.

Dereference before null check (REVERSE_INULL)
check_after_deref: Null-checking pipeline suggests that it may be
null, but it has already been dereferenced on all paths leading to
the check.

Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7521>

swr: Initialize FetchJit member mpFetchInfo in constructor.

Fix defect reported by Coverity Scan.

Uninitialized pointer field (UNINIT_CTOR)
uninit_member: Non-static class member mpFetchInfo is not
initialized in this constructor nor in any functions that it
calls.

Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Jan Zielinski <jan.zielinski@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7359>

Reset new features for 21.0 development cycle

Bump version for 21.0 devel

intel: Pointer to SCISSOR_RECT array should be 64B aligned

v2: Apply the workaround to all gen hardawre

Ref: GEN:BUG:1409725701
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7463>

broadcom/compiler: Allow spills of temporaries from TMU reads

Since spills and fills use the TMU, special care has to be taken to
avoid putting one between a TMU setup instruction and the corresponding
reads or writes. This change adds logic to move fills up and move spills
down to avoid interrupting such sequences.

This allows compiling 6 more programs from shader-db. Other stats:

total spills in shared programs: 446 -> 446 (0.00%)
spills in affected programs: 0 -> 0
helped: 0
HURT: 0

total fills in shared programs: 606 -> 610 (0.66%)
fills in affected programs: 38 -> 42 (10.53%)
helped: 0
HURT: 2

total instructions in shared programs: 19330 -> 19363 (0.17%)
instructions in affected programs: 3299 -> 3332 (1.00%)
helped: 0
HURT: 5

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6606>

nir/algebraic: optimize bitfield_select(a, b, 0) to iand(a, b)

(src0 & src1) | (~src0 & src2) to (src0 & src1).

fossils-db (Polaris10):
Totals from 873 (0.63% of 138014) affected shaders:
SGPRs: 33781 -> 33733 (-0.14%)
VGPRs: 37704 -> 37520 (-0.49%); split: -0.51%, +0.02%
CodeSize: 3861460 -> 3853424 (-0.21%); split: -0.21%, +0.00%
MaxWaves: 5306 -> 5305 (-0.02%)
Instrs: 743798 -> 743486 (-0.04%); split: -0.04%, +0.00%
Cycles: 10962244 -> 10960936 (-0.01%); split: -0.01%, +0.00%
VMEM: 128309 -> 128350 (+0.03%); split: +0.33%, -0.30%
SMEM: 44797 -> 44113 (-1.53%); split: +0.02%, -1.54%
Copies: 71875 -> 71674 (-0.28%); split: -0.31%, +0.03%
PreSGPRs: 23484 -> 23479 (-0.02%)
PreVGPRs: 34582 -> 34529 (-0.15%)

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7479>

pan/bi: Add support for load_instance_id

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7472>

pan/bi: Add support for load_vertex_id

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7472>

panfrost: Allow linear ZS resources on Bifrost

Linear Z/S buffers should be handled correctly now.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7472>

pan/bi: Add support for ushr

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7472>

pan/bi: Add support for ishr

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7472>

pan/bi: Fix ARSHIFT definitions

src1 exists, and must be set to ZERO. If we don't add this source,
lane2 refers to src2 which does not exists.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7472>

pan/bi: Move bitwise op packing out of bi_pack_fma()

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7472>

pan/bi: Get rid of bi_emit_ld_uniform()

Now that we lower uniforms to UBO we can get rid of bi_emit_ld_uniform().

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7472>

pan/bi: Lower uniforms to UBO

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7472>

pan/bi: Add support for load_ubo

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7472>

pan/bi: Fix swizzle handling in bi_copy_src()

The number of src swizzle to initialize depends on the number of source
properties (size and number of components) not the destination ones.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7472>

pan/bi: Support centroid and sample interpolations

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7472>

pan/bi: Extract LD_VAR sample field from ins->load_vary.interp_mode

So we can extend bi_emit_ld_vary() to support centroid and sample modes.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7472>

panfrost: Expose GLES3 features on Bifrost when PAN_MESA_DEBUG=deqp

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7472>

panfrost: Force late pixel kill when depth/stencil is written from the FS

If we don't do that, pixels might be killed early thus preventing the
fragment shader from being called and updating the depth/stencil value.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7501>

radeon/vcn : Corrected dpb_size calculation for VP9_2

Currently dpb_size for VP9 profile0 and profile2 is same eventhough
for profile2 dpb_size is  multiplied by extra 3/2 and we are
seeing VM_L2_PROTECTION_FAULT error and ring vcn_dec timeout because
of less dpb_size for VP9_2.

This patch will correct dpb_size for VP9_2 and fixes the issue.

Signed-off-by: SureshGuttula <suresh.guttula@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7480>

intel/nir: Lower 8-bit ops to 16-bit in NIR on Gen11+

Intel hardware supports 8-bit arithmetic but it's tricky and annoying:

  - Byte operations don't actually execute with a byte type.  The
    execution type for byte operations is actually word.  (I don't know
    if this has implications for the HW implementation.  Probably?)

  - Destinations are required to be strided out to at least the
    execution type size.  This means that B-type operations always have
    a stride of at least 2.  This means wreaks havoc on the back-end in
    multiple ways.

  - Thanks to the strided destination, we don't actually save register
    space by storing things in bytes.  We could, in theory, interleave
    two byte values into a single 2B-strided register but that's both a
    pain for RA and would lead to piles of false dependencies pre-Gen12
    and on Gen12+, we'd need some significant improvements to the SWSB
    pass.

  - Also thanks to the strided destination, all byte writes are treated
    as partial writes by the back-end and we don't know how to copy-prop
    them.

  - On Gen11, they added a new hardware restriction that byte types
    aren't allowed in the 2nd and 3rd sources of instructions.  This
    means that we have to emit B->W conversions all over to resolve
    things.  If we emit said conversions in NIR, instead, there's a
    chance NIR can get rid of some of them for us.

We can get rid of a lot of this pain by just asking NIR to get rid of
8-bit arithmetic for us.  It may lead to a few more conversions in some
cases but having back-end copy-prop actually work is probably a bigger
bonus.  There is still a bit we have to handle in the back-end.  In
particular, basic MOVs and conversions because 8-bit load/store ops
still require 8-bit types.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7482>

intel/nir: Lower 8-bit scan/reduce ops to 16-bit

We can't really support these directly on any platform.  May as well let
NIR lower them.  The NIR lowering is potentially one more instruction
for scan/reduce ops thanks to not being able to do the B->W conversion
as part of SEL_EXEC.  For imax/imin exclusive scan, it's yet another
instruction thanks to the extra imax/imin NIR has to insert to deal with
the fact that the first live channel will contain the identity value
which, when signed, will cast wrong.  However, it does let us drop some
complexity from our back-end so it's probably worth it.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7482>

intel/nir: Refactor lower_bit_size_callback

We want to use it for more than just ALU.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7482>

nir/lower_bit_size: Add support for lowering subgroup ops

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7482>

nir/lower_bit_size: Pass a nir_instr to the callback

This way we can start supporting more than just ALU ops.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7482>

nir/lower_bit_size: Don't cast comparison results

Some ALU ops (comparisons being the primary example) have a fixed
bit-size destination and, in that case, we don't want to insert a
conversion on the destination.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7482>

radv: implement VK_EXT_shader_image_atomic_int64

The extension is only exposed on ACO and LLVM 11+ because of a LLVM bug.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7234>

ac/nir: implement 64-bit images

64-bit image atomics only work with LLVM 11+ because of a LLVM bug.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7234>

aco: implement 64-bit images

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7234>

amd/common: add PIPE_FORMAT_R64_{UINT,SINT} to GFX10 format table

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7234>

util: add mapping from Vulkan to Gallium R64 integer formats

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7234>

gallium: Fix NIR validation when lowering polygon stipple

The fmul operation takes the maximum number of components from either
of its operands. We only need to use 2 components from the fragment
coordinates.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7507>

gallium/util: do not pass undefined sample-count

We forgot to initialize the sample_count member here, leading to it
being undefined. This causes problems on MSVC when compiling in
debug-mode, where we get a run-time error for using an undefined
variable.

To avoid similar problems in the future if more fields are added,
let's initialize the whole struct to zero to start with. This also
allows us to remove a no-longer-needed zero-initialization.

Fixes: cf170616daa ("gallium: Add a util_blitter path for using a custom VS and FS.")
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7503>

aco: optimize v_and(a, v_subbrev_co(0, 0, vcc)) -> v_cndmask(0, a, vcc)

fossils-db (Vega10):
Totals from 7786 (5.70% of 136546) affected shaders:
SGPRs: 517778 -> 518626 (+0.16%); split: -0.01%, +0.17%
VGPRs: 488252 -> 488084 (-0.03%); split: -0.04%, +0.01%
CodeSize: 42282068 -> 42250152 (-0.08%); split: -0.16%, +0.09%
MaxWaves: 35697 -> 35716 (+0.05%); split: +0.06%, -0.01%
Instrs: 8319309 -> 8304792 (-0.17%); split: -0.18%, +0.00%
Cycles: 88619440 -> 88489636 (-0.15%); split: -0.16%, +0.01%
VMEM: 2788278 -> 2780431 (-0.28%); split: +0.06%, -0.35%
SMEM: 570364 -> 569370 (-0.17%); split: +0.12%, -0.30%
VClause: 144906 -> 144908 (+0.00%); split: -0.05%, +0.05%
SClause: 302143 -> 302055 (-0.03%); split: -0.04%, +0.01%
Copies: 579124 -> 578779 (-0.06%); split: -0.14%, +0.08%
PreSGPRs: 327695 -> 328845 (+0.35%); split: -0.00%, +0.35%
PreVGPRs: 434280 -> 433954 (-0.08%)

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7438>

spirv: Add support for SPV_EXT_shader_image_atomic_int64

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7509>

nir: Allow 64-bit image atomics

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7509>

compiler/types: Add 64-bit image types

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7509>

util,gallium: Add new 64-bit integer formats

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7509>

nir: Validate image atomic formats

GLSL requires that image atomics have formats and there are rules about
things matching properly.  We should enforce those in NIR unless we have
reason to do otherwise.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7509>

nir: Print formats on image intrinsics as text

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7509>

spirv: Update headers and metadata from latest Khronos commit

This corresponds to 5ab5c96198f30804a6a29961b8905f292a8ae600
("Reserve additional loop control bit for Intel extension (NoFusionINTEL) (#175)") in
https://github.com/KhronosGroup/SPIRV-Headers.

Acked-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7509>