Jordan Justen [Sat, 30 Oct 2021 10:25:09 +0000 (03:25 -0700)]
intel/dev: Add intel_hwconfig_types.h from random post on the internet
There is no spec for any of this, but we'll need this to interpret a
blob that the kernel is giving us.
Ref: https://lists.freedesktop.org/archives/intel-gfx/2021-September/277488.html
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13866>
Jordan Justen [Tue, 2 Nov 2021 00:22:51 +0000 (17:22 -0700)]
anv,blorp,crocus,i965,iris: Use devinfo->max_threads_per_psd for gfx8+
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13866>
Jordan Justen [Tue, 2 Nov 2021 00:20:20 +0000 (17:20 -0700)]
intel/dev: Add max_threads_per_psd field to devinfo for gfx8+
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13866>
Pavel Ondračka [Tue, 18 Jan 2022 15:58:36 +0000 (16:58 +0100)]
r300: fix translate_LRP
This was broken by
7daba1fe6544309b02d09e0710a9159049fb8cfa
Signed-off-by: Pavel Ondračka <pavel.ondracka@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14596>
Neha Bhende [Thu, 16 Dec 2021 23:33:25 +0000 (15:33 -0800)]
svga: enable GL43 on SVGA GL43 capable device
This patch enables GL43 feature for VMware's future GL43 capable
SVGA device.
Tested with various GL43 apps.
Reviewed-by: Charmaine Lee <charmainel@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14270>
Neha Bhende [Thu, 16 Dec 2021 23:07:58 +0000 (15:07 -0800)]
svga: add GL43 resource validation at draw time
This patch adds GL43 tracked states stack and supports GL43 resource
validation at draw time. This patch is squash of in house patches
to support GL43 on VMware driver.
Reviewed-by: Charmaine Lee <charmainel@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14270>
Neha Bhende [Thu, 16 Dec 2021 22:52:26 +0000 (14:52 -0800)]
svga: shader translation for compute, image views and shader buffers
This patch handles shader translation for compute, image views and shader
buffers and updates the corresponding shader compile keys.
It also includes support of using shader raw buffer for shader buffer used
as constant buffer.
This patch is squash of numerous in house patches.
Reviewed-by: Charmaine Lee <charmainel@vmware.com>
v2: As pointed out by Thomas, fix revert of
64292c0f caused by this patch.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14270>
Neha Bhende [Thu, 16 Dec 2021 00:36:39 +0000 (16:36 -0800)]
svga: Add support for compute shader, shader buffers and image views
This commit is squash of commits which handles resource creation and management
for compute shader, shader buffers and image views. It creates uavs for shader
buffers and image views.
Reviewed-by: Charmaine Lee <charmainel@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14270>
Neha Bhende [Thu, 16 Dec 2021 01:01:56 +0000 (17:01 -0800)]
tgsi: Add hw_atomic_declared in tgsi_info
This patch also adds hw_atomic_declared info in tgsi_info.
Reviewed-by: Charmaine Lee <charmainel@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14270>
Neha Bhende [Thu, 16 Dec 2021 00:44:44 +0000 (16:44 -0800)]
svga: Add utility to check for GL43 support
GL43 support in SVGA driver requires vmwgfx kernel version 2.20 and
GL43 capable SVGA device.
Reviewed-by: Charmaine Lee <charmainel@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14270>
Neha Bhende [Thu, 16 Dec 2021 00:40:01 +0000 (16:40 -0800)]
svga: Add GL43 commands support
This patch updates SVGA header files and adds support for uav related commands.
Reviewed-by: Charmaine Lee <charmainel@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14270>
Mike Blumenkrantz [Tue, 11 Jan 2022 18:58:44 +0000 (13:58 -0500)]
zink: enable EXT_external_objects pipe caps
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14498>
Mike Blumenkrantz [Tue, 11 Jan 2022 18:57:59 +0000 (13:57 -0500)]
zink: implement external memory object resource handling
this is super simple and can almost fully reuse the existing codepaths
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14498>
Mike Blumenkrantz [Tue, 11 Jan 2022 18:57:00 +0000 (13:57 -0500)]
zink: implement GL semaphores
this is basically just a wrapper around vulkan semaphores, so it maps
fairly well
the existing fence function was a big ??? and should never have been triggered
like it was
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14498>
Mike Blumenkrantz [Tue, 11 Jan 2022 18:56:03 +0000 (13:56 -0500)]
zink: add driver/device uuid screen hooks
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14498>
Mike Blumenkrantz [Tue, 11 Jan 2022 18:55:21 +0000 (13:55 -0500)]
zink: add VK_KHR_external_memory_capabilities to instance exts
the props for this are weird so they have to be fetched "manually"
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14498>
Mike Blumenkrantz [Tue, 11 Jan 2022 18:54:49 +0000 (13:54 -0500)]
zink: add VK_KHR_external_semaphore_fd to device exts
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14498>
Jordan Justen [Fri, 5 Nov 2021 07:18:35 +0000 (00:18 -0700)]
iris: Use mi_builder for load/store reg/mem/imm functions
Ref:
06cf838cbdc ("intel/mi_builder: Support gen11 command-streamer based register offsets")
Ref:
6ffdcc335ee ("iris: Use mi_builder in iris_load_indirect_location()")
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14340>
Jordan Justen [Fri, 5 Nov 2021 06:07:26 +0000 (23:07 -0700)]
iris: Use mi_builder to set 3DPRIM registers for draws
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14340>
Dave Airlie [Thu, 30 Dec 2021 23:42:11 +0000 (09:42 +1000)]
crocus: only clamp point size on last stage.
This fixes a regression in tests that pass unclamped point size
values between stages.
This keeps xfb broken since the real way it should work is to have
the hw clamp after xfb, but this seems the least evil path.
Fixes:
3077d9685682 ("crocus: Clamp VS point sizes to the HW limits as required.")
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14359>
Dave Airlie [Thu, 30 Dec 2021 23:41:33 +0000 (09:41 +1000)]
intel/compiler: add clamp_pointside to vs/tcs/tes keys.
This will be used by crocus and iris to clamp pointsizes only
on the last stage of the shader compile.
Fixes:
3077d9685682 ("crocus: Clamp VS point sizes to the HW limits as required.")
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14359>
Dave Airlie [Wed, 29 Dec 2021 00:34:45 +0000 (10:34 +1000)]
mesa/st: get rid of ST_CALLOC_STRUCT use CALLOC_STRUCT
Just tie in the CALLOC_STRUCT/FREE mechanism.
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14325>
Dave Airlie [Tue, 28 Dec 2021 23:41:01 +0000 (09:41 +1000)]
mesa/st/perfmon: rebalance CALLOC_STRUCT/FREE
this was using FREE but ST_CALLOC_STRUCT, so fix the other way.
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14325>
Dave Airlie [Tue, 28 Dec 2021 23:37:37 +0000 (09:37 +1000)]
mesa: rebalance the CALLOC_STRUCT/FREE force.
There were some CALLOC_STRUCT that were using free, rebalance this.
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14325>
Dave Airlie [Tue, 28 Dec 2021 23:36:56 +0000 (09:36 +1000)]
mesa/program: don't use CALLOC_STRUCT for instructions.
Figuring out the frees here was too much for me.
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14325>
Cristian Ciocaltea [Tue, 18 Jan 2022 08:14:47 +0000 (10:14 +0200)]
freedreno/ci: Fix dEQP tests expectations on A530
Add a new entry to the 'fails' list.
Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@collabora.com>
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14413>
Cristian Ciocaltea [Tue, 18 Jan 2022 07:48:28 +0000 (09:48 +0200)]
panfrost/ci: Fix piglit tests expectations on G52
Remove the successful tests from the 'fails' list.
Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@collabora.com>
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14413>
Cristian Ciocaltea [Tue, 18 Jan 2022 07:43:15 +0000 (09:43 +0200)]
iris/ci: Fix piglit tests expectations on amly
Found two tests that started to show a flaky behavior, although they are
not detected as such by the test runner. Depending on their presence in
the 'fails' list, they are reported as "UnexpectedPass" or "Fail".
Let's fix this by moving them to the 'flaky' list.
Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@collabora.com>
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14413>
Cristian Ciocaltea [Mon, 17 Jan 2022 22:25:56 +0000 (00:25 +0200)]
iris/ci: Fix whl dEQP expectations
Remove the successful tests from the 'fails' list.
Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@collabora.com>
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14413>
Cristian Ciocaltea [Tue, 4 Jan 2022 21:15:19 +0000 (23:15 +0200)]
virgl/ci: Fix identification of dEQP binary paths
In some cases the file paths passed to crosvm for execution do not point
to dEQP binaries, but can be wrapper scripts, like deqp-runner.sh.
Detect such cases and skip changing the working directory.
Additionally, use the POSIX compliant command substitution syntax
instead of the obsolete variant based on backquotes.
Fixes:
81f25d8f276 ("virgl/ci: Run each dEQP instance in its own VM")
Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@collabora.com>
Reviewed-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14413>
Cristian Ciocaltea [Tue, 4 Jan 2022 16:56:46 +0000 (18:56 +0200)]
virgl/ci: Do not hide crosvm output messages
In some corner cases like the kernel oops, we do not get the relevant
log messages from crosvm process to help with debugging.
Note there is currently a double redirection of its stdout stream, but
the content eventually ends up in /dev/null.
Let's fix this by redirecting both stdout and stderr streams to a
dedicated file, to avoid clobbering the output from the script/program
running inside crosvm. This is particularly required for the scenario
that involves deqp-runner starting crosvm via a *.toml suite.
Additionally, drop the unnecessary usage of 'stdbuf' and set the 'quiet'
kernel command-line parameter to get rid of the noise generated during
crosvm boot process.
Although not directly related, do some cleanup by removing the
temporary folder on script exit.
Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@collabora.com>
Reviewed-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14413>
Cristian Ciocaltea [Tue, 4 Jan 2022 11:20:59 +0000 (13:20 +0200)]
virgl/ci: Prevent static link of virglrenderer inside crosvm
Ensure virglrenderer library is built before crosvm in order to allow
dynamic linking. This is needed for the scenarios where a different
virglrenderer library must be provided before launching crosvm, e.g.:
the upcoming Virgl CI solution that shares Mesa CI containers.
Additionally, this provides the virgl_test_server binary which is
required by piglit-runner.sh and deqp-runner.sh scripts when using
the virpipe Gallium driver.
Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@collabora.com>
Reviewed-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14413>
Cristian Ciocaltea [Tue, 4 Jan 2022 10:39:14 +0000 (12:39 +0200)]
virgl/ci: Force crosvm error when exit code file is missing
crosvm-runner.sh doesn't correctly report the script execution status
if the exit code file is missing.
Fix this by returning 1 when there is no exit code available from the
script that was executed.
Fixes:
81f25d8f276 ("virgl/ci: Run each dEQP instance in its own VM")
Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@collabora.com>
Reviewed-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14413>
Cristian Ciocaltea [Sun, 2 Jan 2022 23:11:20 +0000 (01:11 +0200)]
ci: Create results folder before starting virgl_test_server
Move the statement responsible for creating the results output path
before 'virgl_test_server' is started in 'piglit-runner.sh' script.
This ensures the server log file will be available in the pipeline job
artifacts archive.
Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@collabora.com>
Reviewed-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14413>
Cristian Ciocaltea [Fri, 31 Dec 2021 12:41:41 +0000 (14:41 +0200)]
ci: Do not remove cmake
In order to enable container reuse in Virgl CI, keep 'cmake' in the
container.
Additionally, provide the 'check' utility.
Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@collabora.com>
Reviewed-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14413>
Cristian Ciocaltea [Thu, 30 Dec 2021 20:55:33 +0000 (22:55 +0200)]
ci: Support building and installing deqp-runner from source
Add support for building and installing deqp-runner from a git source
repository to facilitate further development & testing of new features
or simply making use of the latest upstream changes which were not
already tagged as a new package version.
The git revision to be built must be specified by setting
'DEQP_RUNNER_GIT_REV' env variable. To specify a git tag name instead,
'DEQP_RUNNER_GIT_TAG' variable must be used. It is also possible to
indicate a custom git repository via 'DEQP_RUNNER_GIT_URL'.
If neither a git revision or tag name has been set, deqp-runner is
installed from the rust package registry (the default behavior).
v2: Make use of '--git' and '--rev' cargo args to automate the git
checkout operation (Rohan).
v3: Allow Git URL override by using the hardcoded URL only when
DEQP_RUNNER_GIT_URL is not already set.
v4: Override 'EXTRA_CARGO_ARGS' to optimize the script and avoid a
second call to 'cargo install'. Additionally, add support for
indicating git tags (Rohan).
Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@collabora.com>
Reviewed-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14413>
Cristian Ciocaltea [Fri, 31 Dec 2021 00:51:38 +0000 (02:51 +0200)]
ci: Uprev deqp-runner to 0.11.0
The updated version offers, among others, improved logging support to
help debugging failing tests.
Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@collabora.com>
Reviewed-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14413>
Rohan Garg [Mon, 13 Sep 2021 20:55:48 +0000 (22:55 +0200)]
ci/piglit: Start vtest server if driver is set to virpipe
This allows for running of piglit tests with vtest.
Signed-off-by: Rohan Garg <rohan.garg@collabora.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14413>
Rohan Garg [Tue, 9 Nov 2021 22:55:52 +0000 (00:55 +0200)]
ci: Do not remove wget
Keep wget for reuse by Virgl CI downstream
Signed-off-by: Rohan Garg <rohan.garg@collabora.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
[cristian: Fix conflicts while rebasing on latest main]
Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@collabora.com>
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14413>
Rohan Garg [Tue, 9 Nov 2021 21:38:33 +0000 (23:38 +0200)]
ci: Move common variables out into a separate file
Moving common variables out allows for other projects like virglrenderer
to be able to reuse Mesa CI's containers
Signed-off-by: Rohan Garg <rohan.garg@collabora.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
[cristian: fixed conflicts while rebasing on latest main; updated tags]
Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@collabora.com>
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14413>
Rohan Garg [Wed, 8 Sep 2021 10:49:31 +0000 (12:49 +0200)]
ci: Do not remove libgbm-dev
In order to enable container reuse in Virgl CI, keep libgbm-dev in the
container.
Signed-off-by: Rohan Garg <rohan.garg@collabora.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
[cristian: discarded the update of MESA_IMAGE_TAG in debian/x86_build]
Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@collabora.com>
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14413>
Charles Baker [Thu, 9 Dec 2021 20:22:28 +0000 (09:22 +1300)]
zink: Enable VK_KHR_image_format_list for VK_KHR_imageless_framebuffer
Validation layer reports that VK_KHR_imageless_framebuffer depends on
VK_KHR_image_format_list and that the latter must be enabled explicitly
with the former.
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14570>
Mike Blumenkrantz [Tue, 18 Jan 2022 14:46:25 +0000 (09:46 -0500)]
Revert "zink: update gfx_pipeline_state.vertex_strides when necessary"
This reverts commit
a21d2bfd771ae44bdb4c997e6dce746bf65d66fa.
my brain was still on vacation and this doesn't do anything
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14593>
Connor Abbott [Fri, 14 Jan 2022 12:49:44 +0000 (13:49 +0100)]
nir: Reorder ffma and fsub combining
It's relatively common to do something like "a * b - c", which on most
GPUs can be implemented in a single instruction. Before
opt_algebraic_late this will be something like
"fadd(fmul(a, b), fneg(c))", and we want to turn it info
"ffma(a, b, fneg(c))". But because the fsub pattern was first we
instead turned it into "fsub(fmul(a, b), c)". Fix this by reordering
them.
Selected shader-db results on freedreno:
total instructions in shared programs: 1561330 -> 1551619 (-0.62%)
instructions in affected programs: 780272 -> 770561 (-1.24%)
helped: 1941
HURT: 491
helped stats (abs) min: 1 max: 147 x̄: 7.98 x̃: 4
helped stats (rel) min: 0.07% max: 30.77% x̄: 4.36% x̃: 3.17%
HURT stats (abs) min: 1 max: 307 x̄: 11.76 x̃: 5
HURT stats (rel) min: 0.09% max: 18.71% x̄: 2.26% x̃: 1.38%
95% mean confidence interval for instructions value: -4.57 -3.41
95% mean confidence interval for instructions %-change: -3.21% -2.84%
Instructions are helped.
total nops in shared programs: 358926 -> 356263 (-0.74%)
nops in affected programs: 167116 -> 164453 (-1.59%)
helped: 1395
HURT: 859
helped stats (abs) min: 1 max: 108 x̄: 6.80 x̃: 3
helped stats (rel) min: 0.17% max: 100.00% x̄: 19.15% x̃: 10.57%
HURT stats (abs) min: 1 max: 307 x̄: 7.95 x̃: 3
HURT stats (rel) min: 0.00% max: 381.82% x̄: 20.04% x̃: 10.00%
95% mean confidence interval for nops value: -1.77 -0.59
95% mean confidence interval for nops %-change: -5.55% -2.87%
Nops are helped.
total non-nops in shared programs: 1202404 -> 1195356 (-0.59%)
non-nops in affected programs: 496682 -> 489634 (-1.42%)
helped: 1951
HURT: 265
helped stats (abs) min: 1 max: 39 x̄: 4.02 x̃: 3
helped stats (rel) min: 0.07% max: 15.38% x̄: 2.97% x̃: 1.96%
HURT stats (abs) min: 1 max: 22 x̄: 2.97 x̃: 2
HURT stats (rel) min: 0.05% max: 10.00% x̄: 1.14% x̃: 0.75%
95% mean confidence interval for non-nops value: -3.38 -2.99
95% mean confidence interval for non-nops %-change: -2.60% -2.36%
Non-nops are helped.
total systall in shared programs: 288317 -> 292975 (1.62%)
systall in affected programs: 87876 -> 92534 (5.30%)
helped: 388
HURT: 431
helped stats (abs) min: 1 max: 214 x̄: 14.39 x̃: 8
helped stats (rel) min: 0.25% max: 100.00% x̄: 22.12% x̃: 11.96%
HURT stats (abs) min: 1 max: 232 x̄: 23.77 x̃: 7
HURT stats (rel) min: 0.00% max: 1300.00% x̄: 51.71% x̃: 17.30%
95% mean confidence interval for systall value: 3.07 8.30
95% mean confidence interval for systall %-change: 9.49% 23.97%
Systall are HURT.
(The systall hurt is probably just due to having having fewer
instructions to hide latency with.)
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14554>
Mike Blumenkrantz [Tue, 18 Jan 2022 15:26:59 +0000 (10:26 -0500)]
zink: check EXT_image_drm_format_modifier for dmabuf support
probably fixes https://gitlab.freedesktop.org/mesa/mesa/-/issues/5836
cc: mesa-stable
Reviewed-by: Hoe Hao Cheng <haochengho12907@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14595>
Juan A. Suarez Romero [Thu, 13 Jan 2022 17:42:09 +0000 (18:42 +0100)]
v3d: keep clear color untouched
When invoking TLB clear, the color to clear could require
swapping and clamping.
Do the changes in a copy and leave the original color untouched, as it
is passed as constant.
This fixes local outside scope issues with Coverity.
Fixes:
54cba7d2 ("v3d: clamp clear color")
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14534>
Marek Olšák [Thu, 13 Jan 2022 07:02:45 +0000 (02:02 -0500)]
radeonsi: determine MEM_ORDERED after generating a shader variant
because si_get_nir_shader runs NIR passes and some of them can introduce
new loads.
Fixes:
3fb77ef2e0f - radeonsi: do opt_large_constants & lower_indirect_derefs after uniform inlining
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14528>
Marek Olšák [Thu, 13 Jan 2022 03:58:32 +0000 (22:58 -0500)]
radeonsi: apply fbfetch/indirect_descriptor to uses_vmem_load_other earlier
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14528>
Marek Olšák [Thu, 13 Jan 2022 03:45:53 +0000 (22:45 -0500)]
radeonsi: rename uses_vmem_* flags
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14528>
Qiang Yu [Tue, 28 Dec 2021 02:44:40 +0000 (10:44 +0800)]
radeonsi: enable ARB_sparse_texture2
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14362>
Qiang Yu [Thu, 30 Dec 2021 07:09:04 +0000 (15:09 +0800)]
radeonsi: enable multi sample sparse texture support
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14362>
Qiang Yu [Thu, 30 Dec 2021 07:03:57 +0000 (15:03 +0800)]
gallium: add multi_sample parameter to get_sparse_texture_virtual_page_size
Instead of using actual sample count as parameter, we only use a bool
to indicate if the target is multi sample. This is because we don't
know the sample count when glGetInternalformativ() case.
Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14362>
Qiang Yu [Thu, 30 Dec 2021 07:02:31 +0000 (15:02 +0800)]
mesa/main: export _is_multisample_target for external usage
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14362>
Qiang Yu [Thu, 30 Dec 2021 07:54:25 +0000 (15:54 +0800)]
mesa/main: allow multi sample sparse texture
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14362>
Qiang Yu [Wed, 12 Jan 2022 06:58:32 +0000 (14:58 +0800)]
radeonsi: lower nir_intrinsic_is_sparse_texels_resident
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14362>
Qiang Yu [Wed, 29 Dec 2021 07:26:09 +0000 (15:26 +0800)]
glsl/nir: convert is_sparse_texels_resident to nir
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14362>
Qiang Yu [Wed, 29 Dec 2021 07:12:22 +0000 (15:12 +0800)]
glsl: add sparseTexelsResidentARB builtin function
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14362>
Qiang Yu [Tue, 28 Dec 2021 13:11:07 +0000 (21:11 +0800)]
glsl/nir: adjust sparse texture nir_variable
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14362>
Qiang Yu [Tue, 28 Dec 2021 06:58:52 +0000 (14:58 +0800)]
glsl/nir: convert sparse image load to nir
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14362>
Qiang Yu [Tue, 28 Dec 2021 05:52:36 +0000 (13:52 +0800)]
glsl/nir: convert sparse ir_texture to nir
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14362>
Qiang Yu [Thu, 23 Dec 2021 02:43:40 +0000 (10:43 +0800)]
glsl: add vec5 glsl types
Used by nir_variable holds sparse texture output which is
up to vec5 size.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Singed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14362>
Qiang Yu [Fri, 24 Dec 2021 08:59:10 +0000 (16:59 +0800)]
glsl: add sparse texture image load builtin functions
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14362>
Qiang Yu [Fri, 24 Dec 2021 06:35:46 +0000 (14:35 +0800)]
glsl: add _texelFetch related sparse texture builtin function
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14362>
Qiang Yu [Fri, 24 Dec 2021 06:16:06 +0000 (14:16 +0800)]
glsl: add _textureCubeArrayShadow related sparse texture builtin func
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14362>
Qiang Yu [Fri, 24 Dec 2021 03:33:02 +0000 (11:33 +0800)]
glsl: add _texture related sparse texture builtin functions
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14362>
Qiang Yu [Tue, 28 Dec 2021 14:14:11 +0000 (22:14 +0800)]
glsl: ir_texture support sprase texture
Sparse ir_texture will set is_sparse and use struct type to
hold both residency code and sampled texel.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14362>
Qiang Yu [Fri, 24 Dec 2021 04:19:08 +0000 (12:19 +0800)]
glsl: add ARB_sparse_texture2 extension
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Singed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14362>
Qiang Yu [Thu, 30 Dec 2021 07:52:17 +0000 (15:52 +0800)]
mesa/main: relax alignment check when ARB_sparse_texture2 available
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14362>
Qiang Yu [Thu, 30 Dec 2021 08:39:49 +0000 (16:39 +0800)]
mesa: add ARB_sparse_texture2 extension
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14362>
Qiang Yu [Wed, 22 Dec 2021 06:41:33 +0000 (14:41 +0800)]
gallium: add PIPE_CAP_QUERY_SPARSE_TEXTURE_RESIDENCY
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14362>
Qiang Yu [Fri, 7 Jan 2022 03:32:12 +0000 (11:32 +0800)]
gallium/dd_debug: add get_sparse_texture_virtual_page_size
Otherwise GALLIUM_DDEBUG=always crash when sparse texture is used.
Fixes:
eed8421bbac ("gallium: add screen get_sparse_texture_virtual_page_size callback")
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Sigend-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14362>
Qiang Yu [Fri, 7 Jan 2022 09:37:27 +0000 (17:37 +0800)]
nir: fix nir_tex_instr hash not count is_sparse field
This fixes nir_opt_cse miss replace a non-sparse tex instruction
with a sparse tex instruction and fail the nir_validate_shader().
Fixes:
3a7972f72a53 ("nir,spirv: add sparse texture fetches")
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14362>
Marek Olšák [Thu, 13 Jan 2022 07:35:08 +0000 (02:35 -0500)]
ac/surface: allow displayable DCC with any resolution (e.g. 8K)
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14529>
Danylo Piliaiev [Fri, 14 Jan 2022 13:46:02 +0000 (15:46 +0200)]
tu: support VK_EXT_primitive_topology_list_restart
Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Reviewed-by: Hyunjun Ko <zzoon@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14556>
Rhys Perry [Fri, 14 Jan 2022 13:41:55 +0000 (13:41 +0000)]
nir/unsigned_upper_bound: don't follow 64-bit f2u32()
Fixes Doom Eternal crash.
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Fixes:
72ac3f60261 ("nir: add nir_unsigned_upper_bound and nir_addition_might_overflow")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14555>
Lucas Stach [Mon, 3 Jan 2022 18:57:14 +0000 (19:57 +0100)]
egl/dri2: short-circuit dri2_make_current when possible
If an application calls eglMakeCurrent with the same context and the same
draw and read surfaces as the current ones, there is no need to go
through all the work of unbinding/flushing the old context and binding
the new one.
While the EGL spec is a bit ambiguous here, it seems that the implicit
flush of the outgoing context only needs to be done when the context is
actually changed.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14379>
Lucas Stach [Thu, 6 Jan 2022 16:44:04 +0000 (17:44 +0100)]
egl/dri2: remove superfluous flush when changing the context
The flush of the outgoing GL context, as required by the EGL spec for
eglMakeCurrent and extended by KHR_context_flush_control, is already
performed in the unbindContext call. There is no need to pierce through
the layers and unconditionally call glFlush() here.
Getting the out-fence FD for explicit fencing needs to move behind the
unbindContext, to make sure we are getting the fence for the most
recently flushed commands.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14379>
Samuel Pitoiset [Thu, 13 Jan 2022 16:30:38 +0000 (17:30 +0100)]
radv/winsys: fix zero submit if no timeline semaphore support
Kernels that don't support timeline semaphores also don't support
transferring syncobjs. Use export/import instead.
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/5845
Fixes:
967fc415fc4 ("radv: Add new submission path for use by the common sync framework.")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14538>
Emma Anholt [Mon, 10 Jan 2022 22:49:09 +0000 (14:49 -0800)]
nir: Apply nir_opt_offsets to nir_intrinsic_load_uniform as well.
Doing this for ir3 required adding a struct for limits of how much base to
fold in (which NTT wants as well for its case of shared vars), otherwise
the later work to lower to the 1<<9 word limit would emit more
instructions.
The shader-db results are that sometimes the reduction in NIR instruction
count results in the fewer sampler prefetches due to the shader being
estimated to be shorter (dota2, nexuiz):
total instructions in shared programs: 8996651 -> 8996776 (<.01%)
total cat5 in shared programs: 86561 -> 86577 (0.02%)
Reviewed-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14023>
Emma Anholt [Thu, 2 Dec 2021 18:31:57 +0000 (10:31 -0800)]
freedreno/ir3: Use nir_opt_offset for removing constant adds for shared vars.
Saves some work in carchase and manhattan31:
instructions in affected programs: 2842 -> 2818 (-0.84%)
nops in affected programs: 1131 -> 1105 (-2.30%)
non-nops in affected programs: 1236 -> 1238 (0.16%)
mov in affected programs: 57 -> 61 (7.02%)
dwords in affected programs: 2144 -> 2150 (0.28%)
cat0 in affected programs: 1195 -> 1169 (-2.18%)
cat1 in affected programs: 151 -> 155 (2.65%)
cat2 in affected programs: 142 -> 140 (-1.41%)
sstall in affected programs: 190 -> 178 (-6.32%)
(ss) in affected programs: 63 -> 63 (0.00%)
systall in affected programs: 532 -> 511 (-3.95%)
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14023>
Alyssa Rosenzweig [Thu, 16 Dec 2021 02:01:19 +0000 (21:01 -0500)]
agx: Handle discard intrinsics
Lower to `sample_mask = 0`. Actually that implements a demote... doing
discard correctly probably requires rewriting the shader control flow to
insert a return where necessary...
Also, possibly we should be lowering this in NIR to play nice with
gl_SampleMask writes but that's a problem for when we understand the
hardware better.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14219>
Alyssa Rosenzweig [Thu, 16 Dec 2021 01:59:58 +0000 (20:59 -0500)]
agx: Add sample_mask instruction
Sets the output sample mask to a given 8-bit immediate or 16-bit
register. Also used to implement discards, which is my ES2 interest.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14219>
Alyssa Rosenzweig [Thu, 16 Dec 2021 02:28:00 +0000 (21:28 -0500)]
asahi: Route sample mask from shader
Compiler-controlled bit in the cmdstream.
Some other magic bits are needed for sample mask writes to work
properly.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14219>
Alyssa Rosenzweig [Sun, 16 Jan 2022 17:55:34 +0000 (12:55 -0500)]
asahi: Rectify confusing XML comment
The field was split up...
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14219>
Alyssa Rosenzweig [Sun, 16 Jan 2022 17:54:10 +0000 (12:54 -0500)]
asahi: Break out Fragment Parameters word
What the other 31 bits are for is anyone's guess.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14219>
Alyssa Rosenzweig [Thu, 16 Dec 2021 02:15:55 +0000 (21:15 -0500)]
asahi: Add XML for unknown 0x4a packet
Enough bits of this packet are known that open-coding hex bytes for it
is annoying. Add some XML correpsonding to what we know.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14219>
Alyssa Rosenzweig [Sun, 16 Jan 2022 17:39:36 +0000 (12:39 -0500)]
asahi: Warn when hacks mode is enabled
I don't want your pesky bug report.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14579>
Alyssa Rosenzweig [Sun, 16 Jan 2022 17:36:38 +0000 (12:36 -0500)]
asahi: Fake more CAPs with dEQP hacks mode
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14579>
Krunal Patel [Thu, 30 Dec 2021 18:48:18 +0000 (00:18 +0530)]
frontend/va: Setting the size of VADRMPRIMESurfaceDescriptor
Issue: objects[i].size is returned as '0' for all
Root cause: The value of objects.size is hard coded to '0' in
vlVaExportSurfaceHandle()
Fix: Assigning the value by multiplying height and width of the surface
Signed-off-by: Krunal Patel <krunalkumarmukeshkumar.patel@amd.corp-partner.google.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14313>
Krunal Patel [Mon, 27 Dec 2021 20:06:44 +0000 (01:36 +0530)]
frontends/va: use un-padded width/height in ExportSurfaceHandle
Issue: VADRMPRIMESurfaceDescriptor width and height are rounded up to
macroblock size (16).
Rootcause: surf->buffer's width/height are rounded up to macroblock size (16),
so they shouldn't be used here.
Fix: Using surf->templ's width/height instead fixes incorrect surface
dimensions being sent via VADRMPRIMESurfaceDescriptor.
Signed-off-by: Krunal Patel <krunalkumarmukeshkumar.patel@amd.corp-partner.google.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14313>
Erik Faye-Lund [Tue, 17 Aug 2021 10:16:41 +0000 (12:16 +0200)]
bin/gen_calendar_entries: fix newlines on windows
The documentation[1] for the csv module specifies that we should specify
newline='' when opening the output file. Without that, the module
garbles the newlines, writing them as \r\r\n on Windows instead of \r\n.
So let's do what the documentation says, and specify newline=''
[1]: https://docs.python.org/3/library/csv.html#id3
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12405>
Erik Faye-Lund [Tue, 17 Aug 2021 10:50:13 +0000 (12:50 +0200)]
ensure csv-files are crlf on disk
According to RFC 4189 CSV files should be encoded using CRLF newlines,
not LF. This helps compatibility with tools, like python's csv module,
who always uses CRLF.
While we're at it, normalize the one CSV that was CRLF in-repo to LF,
and let git do the newline-normalization when needed instead.
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12405>
Alyssa Rosenzweig [Sat, 15 Jan 2022 20:24:17 +0000 (15:24 -0500)]
pan/bi: Schedule around blend shader register clobbering
By software ABI, a blend shader is permitted to clobber registers
R0-R15. The scheduler needs to be aware of this, to avoid moving a write
to one of these registers past the BLEND itself. Otherwise the schedule
is invalid.
This bug affects GLES3.0, but is rare enough in practice that we had
missed it. It requires a fragment shader to write to multiple render
targets with attached blend shaders, and have temporaries register
allocated to R0-R15 that are not read by the blend shader, but are sunk
past the BLEND instruction by the scheduler. Prevents a regression when
switching boolean representations on:
dEQP-GLES31.functional.shaders.builtin_functions.integer.uaddcarry.uvec4_lowp_fragment
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14577>
Alyssa Rosenzweig [Sat, 15 Jan 2022 16:48:32 +0000 (11:48 -0500)]
pan/decode: Disassemble Bifrost quietly
Although Bifrost clause packing and register assignment is tricky, the
relevant code is by now extensively tested, and there's no remaining
reverse-engineering here. So disassembling verbosely just adds tons of
noise to pandecode without increasing the useful information.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Suggested-by: Icecream95 <ixn@disroot.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14543>
Alyssa Rosenzweig [Sat, 15 Jan 2022 16:46:12 +0000 (11:46 -0500)]
pan/decode: Don't print Preload twice
It's already printed in the RSD itself, no need to print it out-of-band
a second time. Removes noise in the pandecode.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14543>
Alyssa Rosenzweig [Sat, 15 Jan 2022 16:43:40 +0000 (11:43 -0500)]
panfrost: Remove FBD pointer on Bifrost XML
It's a pointer to a thread storage descriptor, not a framebuffer
descriptor. Unlike Midgard, these don't have to alias. The FBD pointer
was unused anyway, so remove it to reduce noise in pandecode dumps.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14543>
Alyssa Rosenzweig [Thu, 13 Jan 2022 22:32:35 +0000 (17:32 -0500)]
pan/decode: Decode Valhall surface descriptor
Instead of incorrectly falling down the Bifrost path.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14543>
Alyssa Rosenzweig [Sun, 9 Jan 2022 20:14:08 +0000 (15:14 -0500)]
pan/decode: Add pandecode_dump_mappings
Add a helper to dump all mapped GPU memory. This is a blunt, seldom
useful instrument ... but when it /is/ useful it's your only option.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14543>
Alyssa Rosenzweig [Sun, 9 Jan 2022 20:13:18 +0000 (15:13 -0500)]
pan/decode: Add hexdump helper
I think I originally wrote this for Asahi? Should probably be moved to
util/...
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14543>
Alyssa Rosenzweig [Sun, 9 Jan 2022 20:08:25 +0000 (15:08 -0500)]
pan/decode: Track mmaps with a red-black tree
Rather than emulating page tables, poorly, with a hash table, use a
red-black tree and store the intervals directly. This is deterministic
instead of probabilistic, attaining O(log n) performance for n mapped
intervals which is good enough. Unlike the hash table approach, this
allows us to iterate intervals easily.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14543>