platform/kernel/u-boot.git
7 years agoconfigs: omapl138_lcdk: dont disable fat write
Sekhar Nori [Tue, 6 Jun 2017 11:41:53 +0000 (17:11 +0530)]
configs: omapl138_lcdk: dont disable fat write

CONFIG_FAT_WRITE is imply'ed when CONFIG_CMD_FAT
is selected (see CONFIG_TI_COMMON_CMD_OPTIONS).

Dont disable it in defconfig so the imply takes
effect and 'fatwrite' is available for users.

Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
7 years agoarmv8: Support loading 32-bit OS which is not in the form of FIT
Alison Wang [Tue, 6 Jun 2017 07:32:40 +0000 (15:32 +0800)]
armv8: Support loading 32-bit OS which is not in the form of FIT

As only FIT image is supported now, this patch is to support loading
32-bit uImage, dtb and rootfs separately.

Signed-off-by: Alison Wang <alison.wang@nxp.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
7 years agoboard: mpl: pci: Fix checkpatch.pl
Chakra Divi [Mon, 5 Jun 2017 17:39:30 +0000 (23:09 +0530)]
board: mpl: pci: Fix checkpatch.pl

Fixed checkpatch.pl errors/warnings in board/mpl/common/pci.c

Signed-off-by: Chakra Divi <chakra@openedev.com>
7 years agoigep0020: Enable DISTRO_DEFAULTS on IGEPv2 platforms
Enric Balletbo i Serra [Mon, 5 Jun 2017 17:27:23 +0000 (19:27 +0200)]
igep0020: Enable DISTRO_DEFAULTS on IGEPv2 platforms

Like commit 3337e3af5d3d this enables suitable commands needed for booting
general purpose Linux distribution. This is required for example if we want
to use PXE or DHCP as default boot targets, symbols no longer enabled by
config_distro_defaults.h.

Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
7 years agoboard: ti: am572x-evm: Update pinmux using latest PMT
Lokesh Vutla [Mon, 5 Jun 2017 09:18:17 +0000 (14:48 +0530)]
board: ti: am572x-evm: Update pinmux using latest PMT

Update the board pinmux for AM572x-evm using latest PMT[1] and the
board files named am572x_gp_evm_A3a_sr2p0 and am572x_gp_evm_A2b_sr1p1
that were autogenerated on 30th January, 2017 by
"Ahmad Rashed <a-rashed@ti.com>" and "Tom Johnson <thjohnson@ti.com>".

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
7 years agoboard: ti: am571x-idk: Update pinmux using latest PMT
Lokesh Vutla [Mon, 5 Jun 2017 09:18:16 +0000 (14:48 +0530)]
board: ti: am571x-idk: Update pinmux using latest PMT

Update the board pinmux for AM571x-IDK board using latest PMT[1] and the
board files named am571x_idk_v1p3b_sr2p0 that were autogenerated on
23rd March, 2017 by "Ahmad Rashed <a-rashed@ti.com>" and
"Tom Johnson <thjohnson@ti.com>".

[1] https://dev.ti.com/pinmux/app.html#/default/

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
7 years agoboard: ti: am572x-idk: Update pinmux using latest PMT
Lokesh Vutla [Mon, 5 Jun 2017 09:18:15 +0000 (14:48 +0530)]
board: ti: am572x-idk: Update pinmux using latest PMT

Update the board pinmux for AM572x-IDK board using latest PMT[1] and the
board files named am572x_idk_v1p3b_sr2p0 that were autogenerated on
30th January, 2017 by "Ahmad Rashed <a-rashed@ti.com>" and
"Tom Johnson <thjohnson@ti.com>".

[1] https://dev.ti.com/pinmux/app.html#/default/

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
7 years agoKconfig: Add description for CMD_POWEROFF
Michal Simek [Mon, 5 Jun 2017 06:28:17 +0000 (08:28 +0200)]
Kconfig: Add description for CMD_POWEROFF

Add poweroff description to Kconfig to make it selectable
via menuconfig.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
7 years agoarmv7m: Disable D-cache when booting nommu(ARMv7M) Linux kernel
tnishinaga.dev@gmail.com [Sun, 4 Jun 2017 16:18:08 +0000 (01:18 +0900)]
armv7m: Disable D-cache when booting nommu(ARMv7M) Linux kernel

Disable D-Cache is required when booting nommu Linux kernel.
(please see Linux kernel source "arch/arm/kernel/head-nommu.S")

U-Boot is enabled D-cache and I-Cache at startup.
However, it does not disable D-Cache before
booting nommu Linux kernel.
Therefore, I call dcache_disable()
when the CPU is ARMv7M to fix this problem.

Signed-off-by: Toshifumi NISHINAGA <tnishinaga.dev@gmail.com>
7 years agoarm: omap: Unify get_device_type() function
Semen Protsenko [Fri, 2 Jun 2017 15:00:00 +0000 (18:00 +0300)]
arm: omap: Unify get_device_type() function

Refactor OMAP3/4/5 code so that we have only one get_device_type()
function for all platforms.

Details:
 - Add ctrl variable for AM33xx and OMAP3 platforms (like it's done for
   OMAP4/5), so we can obtain status register in common way
 - For now ctrl structure for AM33xx/OMAP3 contains only status register
   address
 - Run hw_data_init() in order to assign ctrl to proper structure
 - Remove DEVICE_MASK and DEVICE_GP definitions as they are not used
   (DEVICE_TYPE_MASK and GP_DEVICE are used instead)
 - Guard structs in omap_common.h with #ifdefs, because otherwise
   including omap_common.h on non-omap4/5 board files breaks compilation

Buildman script was run for all OMAP boards. Result output:
    arm: (for 38/616 boards)
        all +352.5
        bss -1.4
        data +3.5
        rodata +300.0
        spl/u-boot-spl:all +284.7
        spl/u-boot-spl:data +2.2
        spl/u-boot-spl:rodata +252.0
        spl/u-boot-spl:text +30.5
        text +50.4
    (no errors to report)

Tested on AM57x EVM and BeagleBoard xM.

Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
[trini: Rework the guards as to not break TI81xx]
Signed-off-by: Tom Rini <trini@konsulko.com>
7 years agoam33xx: Finish migration of CONFIG_AM33XX/AM43XX
Tom Rini [Fri, 9 Jun 2017 20:59:17 +0000 (16:59 -0400)]
am33xx: Finish migration of CONFIG_AM33XX/AM43XX

Almost all users of CONFIG_AM33XX/AM43XX have been migrated.  Finish
moving the last few over to Kconfig, and put all of the boards under the
appropriate Kconfig chocie now.  This board choice is non-optional, so
remove that keyword on am33xx.

Signed-off-by: Tom Rini <trini@konsulko.com>
7 years agodavinci: omapl138_lcdk: fix tXSNR DDR2 timing value
Sekhar Nori [Fri, 2 Jun 2017 12:37:12 +0000 (18:07 +0530)]
davinci: omapl138_lcdk: fix tXSNR DDR2 timing value

As per the datasheet[1] available for DDR2 part on board
the OMAP-L138 LCDK, the tXSNR (exit self refresh to a
non-read command) is 137.5 ns. This corresponds to a
value of 20 to be written to T_XSNR register field of
OMAP-L138's DDR configuration. The DDR2 is at 150 MHz.

Fix this. The correct value also appears on the initialization
scripts (called CCS GEL files) available on TI's wiki pages[2]

[1] http://www.samsung.com/global/business/semiconductor/file/product/ds_k4t1gxx4qf_rev12-0.pdf
[2] http://processors.wiki.ti.com/index.php/L138/C6748_Development_Kit_(LCDK)#CCS_XML_.26_GEL_Files

Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
7 years agocmd: jffs2: Rename command ls to fsls
Siva Durga Prasad Paladugu [Tue, 30 May 2017 12:18:55 +0000 (14:18 +0200)]
cmd: jffs2: Rename command ls to fsls

Rename command ls to fsls as its conflicting with
generic file systesm command ls and this is causing
compilation failure as below, if both are enabled
and this patch fixes it.

cmd/jffs2.o:(.u_boot_list_2_cmd_2_ls+0x0):
multiple definition of `_u_boot_list_2_cmd_2_ls'
cmd/fs.o:(.u_boot_list_2_cmd_2_ls+0x0):first defined here
scripts/Makefile.build:359: recipe for target 'cmd/built-in.o'
failed
make[1]: *** [cmd/built-in.o] Error 1

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
7 years agortc: ds1337: drop "SYS" from config variables
Chris Packham [Tue, 30 May 2017 00:03:33 +0000 (12:03 +1200)]
rtc: ds1337: drop "SYS" from config variables

There is some inconsistency between uses of CONFIG_RTC_DS13xx and
CONFIG_SYS_RTC_DS13xx. Address this by dropping the "SYS" from
these variables.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
7 years agospl: stm32f7: configure for xip booting
Vikas Manocha [Sun, 28 May 2017 19:55:14 +0000 (12:55 -0700)]
spl: stm32f7: configure for xip booting

With xip booting configuration, we don't need to copy the next image
(U-Boot or linux xipimage) from flash to sdram area.

Flash memory organization is like this:
spl-U-Boot: u-boot-spl.bin  : 0x0800_0000
U-Boot : u-boot-dtb.bin : 0x0800_8000
linux : xipImage : 0x0800_8000

It is also possible to have U-Boot binary & linux binaries configured at
different addresses of flash memory like U-Boot at 0x0800_8000 & linux
xipImage at 0x0800_4000. But in any case, spl-U-Boot needs to be compiled for
U-Boot as next binary with SPL_OS_BOOT option disabled.
By default, spl is configured to boot linux xipImage.

Signed-off-by: Vikas Manocha <vikas.manocha@st.com>
7 years agospl: stm32f7: add kernel boot support
Vikas Manocha [Sun, 28 May 2017 19:55:13 +0000 (12:55 -0700)]
spl: stm32f7: add kernel boot support

Signed-off-by: Vikas Manocha <vikas.manocha@st.com>
7 years agoserial: stm32f7: disable overrun
Vikas Manocha [Sun, 28 May 2017 19:55:12 +0000 (12:55 -0700)]
serial: stm32f7: disable overrun

With overrun enabled, serial port console freezes & stops receiving data with
overun error if we keep sending data.

Signed-off-by: Vikas Manocha <vikas.manocha@st.com>
7 years agoSPL: Add XIP booting support
Vikas Manocha [Sun, 28 May 2017 19:55:11 +0000 (12:55 -0700)]
SPL: Add XIP booting support

Enable support for XIP (execute in place) of U-Boot or kernel image. There is
no need to copy image from flash to ram if flash supports execute in place.

Signed-off-by: Vikas Manocha <vikas.manocha@st.com>
Reviewed-by: Alexandru Gagniuc <alex.g@adaptrum.com>
7 years agostm32: stm32f7: add spl build support
Vikas Manocha [Sun, 28 May 2017 19:55:10 +0000 (12:55 -0700)]
stm32: stm32f7: add spl build support

This commit supports booting from stm32 internal nor flash. spl U-Boot
initializes the sdram memory, copies next image (e.g. standard U-Boot)
to sdram & then jumps to entry point.

Here are the flash memory addresses for U-Boot-spl & standard U-Boot:
- spl U-Boot : 0x0800_0000
- standard U-Boot : 0x0800_8000

To compile u-boot without spl: Remove SUPPORT_SPL configuration
(arch/arm/mach-stm32/Kconfig)

Signed-off-by: Vikas Manocha <vikas.manocha@st.com>
[trini: Rework Kconfig logic a bit]
Signed-off-by: Tom Rini <trini@konsulko.com>
7 years agostm32f7: remove duplicate configs
Vikas Manocha [Sun, 28 May 2017 19:55:09 +0000 (12:55 -0700)]
stm32f7: remove duplicate configs

Signed-off-by: Vikas Manocha <vikas.manocha@st.com>
7 years agospl: armv7m: to keep ARM v7M in thumb mode before booting next image
Vikas Manocha [Sun, 28 May 2017 19:55:08 +0000 (12:55 -0700)]
spl: armv7m: to keep ARM v7M in thumb mode before booting next image

On ARM v7M, the processor will return to ARM mode when executing blx
instruction with bit 0 of the address == 0. Always set it to 1 to stay in thumb
mode.

At present, it is applied only for raw U-Boot. This patch moves it to just
before booting next image. This way armv7m will be in thumb mode for any image
like raw or image with header like zImage or standard U-Boot.

Signed-off-by: Vikas Manocha <vikas.manocha@st.com>
7 years agoMerge git://git.denx.de/u-boot-rockchip
Tom Rini [Thu, 8 Jun 2017 16:14:11 +0000 (12:14 -0400)]
Merge git://git.denx.de/u-boot-rockchip

Here is additional rk3368 and rk3399 support, rv1108 support,
refactoring HDMI video (brought in from Anatolij's tree to resolve
conflicts), some mkimage fixes and a few other things.

7 years agorockchip: board: puma_rk3399: enable BMP_16BPP, BMP_24BPP and BMP_32BPP
Philipp Tomsich [Wed, 31 May 2017 15:59:36 +0000 (17:59 +0200)]
rockchip: board: puma_rk3399: enable BMP_16BPP, BMP_24BPP and BMP_32BPP

With video output support for the RK3399-Q7 (Puma) available, we want
CMD_BMP enabled and the support for 16bit, 24bit and 32bit BMPs
defined.

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Version-changes: 2
- enable SYS_WHITE_ON_BLACK via defconfig
Reviewed-by: Simon Glass <sjg@chromium.org>
7 years agorockchip: video: rk_vop: add grf field
Philipp Tomsich [Wed, 7 Jun 2017 11:13:28 +0000 (13:13 +0200)]
rockchip: video: rk_vop: add grf field

The last set of rebases had dropped the 'grf' field from the common
rk_vop.  Add this back to un-break the build (and driver).

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
7 years agorockchip: video: rk3399: add HDMI TX support on the RK3399
Philipp Tomsich [Wed, 31 May 2017 15:59:34 +0000 (17:59 +0200)]
rockchip: video: rk3399: add HDMI TX support on the RK3399

This commit enables the RK3399 HDMI TX, which is very similar to the
one found on the RK3288.  As requested by Simon, this splits the HDMI
driver into a SOC-specific portion (rk3399_hdmi.c, rk3288_hdmi.c) and
a common portion (rk_hdmi.c).

Note that the I2C communication for reading the EDID works well with
the default settings, but does not with the alternate settings used on
the RK3288... this configuration aspect is reflected by the driverdata
for the RK3399 driver.

Having some sort of DTS-based configuration for the regulator
dependencies would be nice for the future, but for now we simply use
lists of regulator names (also via driverdata) that we probe.

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
7 years agorockchip: video: split RK3288-specific part off from rk_hdmi
Philipp Tomsich [Wed, 31 May 2017 15:59:33 +0000 (17:59 +0200)]
rockchip: video: split RK3288-specific part off from rk_hdmi

To prepare for the addition of RK3399 HDMI support, the HDMI driver is
refactored and broken into a chip-specific and a generic part.  This
change adds the internal interfaces, makes common/reusable functions
externally visible and splits the RK3288 driver into a separate file.

For the probing of regulators, we reuse the infrastructure created
during the VOP refactoring... i.e. we simply call into the helper
function defined for the VOP.

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
7 years agorockchip: video: add mpixelclock settings from Linux driver
Philipp Tomsich [Wed, 31 May 2017 15:59:32 +0000 (17:59 +0200)]
rockchip: video: add mpixelclock settings from Linux driver

The Linux driver now supports higher mpixelclock settings.
Add these to rockchip_phy_config[] and rockchip_mpll_cfg[].

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
7 years agorockchip: video: rk3399: enable HDMI output (from the rk_vop) for the RK3399
Philipp Tomsich [Wed, 31 May 2017 15:59:31 +0000 (17:59 +0200)]
rockchip: video: rk3399: enable HDMI output (from the rk_vop) for the RK3399

This commit adds a driver for the RK3399 VOPs capable and all the
necessary plumbing to feed the HDMI encoder. For the VOP-big, this
correctly tracks the ability to feed 10bit RGB data to the encoder.

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
7 years agorockchip: video: refactor rk_vop and split RK3288-specific code off
Philipp Tomsich [Wed, 31 May 2017 15:59:30 +0000 (17:59 +0200)]
rockchip: video: refactor rk_vop and split RK3288-specific code off

To prepare for adding the RK3399 VOP driver (which shares most of its
registers and config logic with the RK3228 VOP), this change refactors
the driver and splits the RK3288-specific driver off.

The changes in detail are:
- introduces a data-structure for chip-specific drivers to register
  features/callbacks with the common driver: at this time, this is
  limited to a callback for setting the pin polarities (between the
  VOP and the encoder modules) and a flag to signal 10bit RGB
  capability
- refactors the probing of regulators into a helper function that
  can take a list of regulator names to probe and autoset
- moves the priv data-structure into a (common) header file to be
  used by the chip-specific drivers to provide base addresses to
  the common driver
- uses a callback into the chip-specific driver to set pin polarities
  (replacing the direct register accesses previously used)
- splits enabling the output (towards an encoder) into a separate
  help function withint the common driver

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
7 years agorockchip: video: Kconfig: set MAX_XRES and MAX_YRES via Kconfig
Philipp Tomsich [Wed, 31 May 2017 15:59:29 +0000 (17:59 +0200)]
rockchip: video: Kconfig: set MAX_XRES and MAX_YRES via Kconfig

This introduces two new Kconfig options that configure the maximum
allowable framebuffer size (i.e. the memory reservation/allocation for
the framebuffer):
 - VIDEO_ROCKCHIP_MAX_XRES
 - VIDEO_ROCKCHIP_MAX_YRES
The resulting memory allocation will cover 4 byte per pixel for these
resolutions.

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
7 years agorockchip: video: Kconfig: reformat help for VIDEO_ROCKCHIP
Philipp Tomsich [Wed, 31 May 2017 15:59:28 +0000 (17:59 +0200)]
rockchip: video: Kconfig: reformat help for VIDEO_ROCKCHIP

For consistency sake (and as we are about to add new options to this
file), reformat the help for VIDEO_ROCKCHIP.

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
7 years agorockchip: defconfig: puma-rk3399: enable SPL_BOARD_INIT
Philipp Tomsich [Wed, 7 Jun 2017 16:13:42 +0000 (18:13 +0200)]
rockchip: defconfig: puma-rk3399: enable SPL_BOARD_INIT

For the RK3399-Q7, we need spl_board_init to be called during SPL
startup to set up the pinmux for the debug UART. Enable SPL_BOARD_INIT
via defconfig to ensure this function is in fact called.

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
7 years agorockchip: rk3288: grf: Fix shift for RK3288_TXCLK_DLY_ENA_GMAC_ENABLE
Romain Perier [Fri, 2 Jun 2017 09:19:43 +0000 (11:19 +0200)]
rockchip: rk3288: grf: Fix shift for RK3288_TXCLK_DLY_ENA_GMAC_ENABLE

RK3288_TXCLK_DLY_ENA_GMAC_ENABLE, in GRF_SOC_CON3, is supposed to be bit
0xe and not 0xf. Otherwise, it is RGMII RX clock delayline enable and
introduces random delays and data lose.

This commit fixes the issue by replacing RK3288_TXCLK_DLY_ENA_GMAC_ENABLE
with the right shift.

Signed-off-by: Romain Perier <romain.perier@collabora.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
7 years agorockchip: dts: rk3399-puma: add DTS for the DDR3-1866 timing
Philipp Tomsich [Tue, 6 Jun 2017 18:44:47 +0000 (20:44 +0200)]
rockchip: dts: rk3399-puma: add DTS for the DDR3-1866 timing

This adds the DDR3-1866 timing via its own DTS and wires it up.  This
(currently) is not the default timing for the RK3399-Q7 and should be
selected explicitly via the config (CONFIG_DEFAULT_DEVICE_TREE).

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Acked-by: Simon Glass <sjg@chromium.org>
7 years agorockchip: dts: rk3399-puma: add DTS for the DDR3-1333 timing
Philipp Tomsich [Tue, 6 Jun 2017 18:44:46 +0000 (20:44 +0200)]
rockchip: dts: rk3399-puma: add DTS for the DDR3-1333 timing

This adds the DDR3-1333 timing via its own DTS and wires it up.  This
is not the default timing for the RK3399-Q7 and should be selected
explicitly via the config (CONFIG_DEFAULT_DEVICE_TREE).

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Acked-by: Simon Glass <sjg@chromium.org>
7 years agorockchip: dts: rk3399-puma: refactor and rename (default) DDR3-1600 DTS
Philipp Tomsich [Tue, 6 Jun 2017 18:44:45 +0000 (20:44 +0200)]
rockchip: dts: rk3399-puma: refactor and rename (default) DDR3-1600 DTS

To better support different RAM timings (DDR3-1333 and DDR3-1866 are
assembly options for the RK3399-Q7), this refactors the DTS support
and renames the default DTS variant from rk3399-puma to
rk3399-puma-ddr1600:
- changes the rk3399-puma DTS into a board-specific DTSI by removing
  the inclusion of the DRAM timings
- adds a new rk3399-puma-ddr1600.dts, which includes the (new) common
  board DTSI and the DDR3-1600 timing DTSI
- wires this up from arch/arm/dts/Makefile and configs/puma-rk3399_defconfig

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Acked-by: Simon Glass <sjg@chromium.org>
7 years agorockchip: dts: rk3399-puma: sync DTS with Linux tree
Philipp Tomsich [Tue, 6 Jun 2017 13:42:32 +0000 (15:42 +0200)]
rockchip: dts: rk3399-puma: sync DTS with Linux tree

The Linux DTS for the RK3399-Q7 has moved with the times... resync
against it to ensure a consistent configuration.

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
7 years agorockchip: dts: rk3399: enable HDMI output in the DTS
Philipp Tomsich [Tue, 6 Jun 2017 13:42:31 +0000 (15:42 +0200)]
rockchip: dts: rk3399: enable HDMI output in the DTS

This commit enables HDMI output in the DTS by adding the necessary
nodes to vopl/vopb and by adding the HDMI node.

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
7 years agousb: dwc2-otg: make regs_otg (in platdata) a uintptr_t
Philipp Tomsich [Tue, 6 Jun 2017 13:42:29 +0000 (15:42 +0200)]
usb: dwc2-otg: make regs_otg (in platdata) a uintptr_t

The regs_otg field in uintptr_t of the platform data structure for
dwc2-otg has thus far been an unsigned int, but will eventually be
casted into a void*.

This raises the following error with GCC 6.3 and buildman:
  ../drivers/usb/gadget/dwc2_udc_otg.c: In function 'dwc2_udc_probe':
  ../drivers/usb/gadget/dwc2_udc_otg.c:821:8: warning: cast to pointer from integer of different size [-Wint-to-pointer-cast]
    reg = (struct dwc2_usbotg_reg *)pdata->regs_otg;
          ^

This changes regs_otg to a uintptr_t to ensure that it is large enough
to hold any valid pointer (and fix the associated warning).

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
7 years agorockchip: defconfig: puma-rk3399: update defconfig with video-support
Philipp Tomsich [Tue, 6 Jun 2017 07:15:15 +0000 (09:15 +0200)]
rockchip: defconfig: puma-rk3399: update defconfig with video-support

With HDMI output for the RK3399 working, this update the RK3399-Q7
(Puma) defconfig for the new functionality:
1. enables PMIC command (to check if the HDMI voltages are correct)
      +CONFIG_CMD_PMIC=y
      +CONFIG_CMD_REGULATOR=y
2. enables video-output (via HDMI)
      +CONFIG_DM_VIDEO=y
      +CONFIG_DISPLAY=y
      +CONFIG_VIDEO_ROCKCHIP=y
      +CONFIG_DISPLAY_ROCKCHIP_HDMI=y
3. turns on the 'dcache'-command (for a dcache flush) for our QA to
   fill the framebuffer using 'mw.l'
      +CONFIG_CMD_CACHE=y
4. turns on the 'bmp'-command
      +CONFIG_CMD_BMP=y

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Simon Glass <sjg@chromium.org>
7 years agorockchip: video: rk_hdmi: fix implicit definition warnings
Philipp Tomsich [Tue, 6 Jun 2017 07:15:14 +0000 (09:15 +0200)]
rockchip: video: rk_hdmi: fix implicit definition warnings

When enabling CONFIG_DISPLAY_ROCKCHIP_HDMI, compile-time warning for
the following implicitly defined functions are raised due to a missing
include directive:

  drivers/video/rockchip/rk_hdmi.c: In function 'rk_hdmi_probe':
  drivers/video/rockchip/rk_hdmi.c:150:2: warning: implicit declaration of function 'rk_setreg' [-Wimplicit-function-declaration]
    rk_setreg(&priv->grf->soc_con6, 1 << 15);
    ^~~~~~~~~
  drivers/video/rockchip/rk_hdmi.c:153:2: warning: implicit declaration of function 'rk_clrsetreg' [-Wimplicit-function-declaration]
    rk_clrsetreg(&priv->grf->soc_con6, 1 << 4,
    ^~~~~~~~~~~~

This change fixes this by including <asm/hardware.h> in rk_hdmi.c.

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Acked-by: Simon Glass <sjg@chromium.org>
7 years agorockchip: rk3328: don't implement usb_gadget_handle_interrupts twice
Philipp Tomsich [Tue, 6 Jun 2017 13:42:28 +0000 (15:42 +0200)]
rockchip: rk3328: don't implement usb_gadget_handle_interrupts twice

The usb_gadget_handle_interrupts()-function is already implemented by
drivers/usb/gadget/dwc2_udc_otg.c, so we need to avoid defining it
in the evb-rk3328.c board-specific file.

This change fixes the following build error (from buildman):
  drivers/usb/gadget/built-in.o: In function `usb_gadget_handle_interrupts':
  build/../drivers/usb/gadget/dwc2_udc_otg.c:850: multiple definition of `usb_gadget_handle_interrupts'
  board/rockchip/evb_rk3328/built-in.o:build/../board/rockchip/evb_rk3328/evb-rk3328.c:37: first defined here
  make[1]: *** [u-boot] Error 1

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Acked-by: Simon Glass <sjg@chromium.org>
7 years agorockchip: usb: host: xhci-rockchip: add support for rk3328
Meng Dongyang [Thu, 1 Jun 2017 11:22:45 +0000 (19:22 +0800)]
rockchip: usb: host: xhci-rockchip: add support for rk3328

Add the compatible "rockchip,rk3328-xhci" in match table
for rk3328 to probe xhci controller. Use fixed regulator
to control the voltage of vbus and turn off vbus when
usb stop.

Signed-off-by: Meng Dongyang <daniel.meng@rock-chips.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
7 years agorockchip: Add basic support for evb-rv1108 board
Andy Yan [Thu, 1 Jun 2017 10:01:31 +0000 (18:01 +0800)]
rockchip: Add basic support for evb-rv1108 board

Add basic support for rv1108 evb, whith this patch we
can boot into u-boot console.

Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
7 years agorockchip: Add core Soc start-up code for rv1108
Andy Yan [Thu, 1 Jun 2017 10:00:55 +0000 (18:00 +0800)]
rockchip: Add core Soc start-up code for rv1108

RV1108 is embedded with an ARM Cortex-A7 single core and a DSP core
from Rockchip. It is designed for varies application scenario such
as car DVR, sports DV, secure camera and UAV camera.

Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
7 years agorockchip: clk: Add rv1108 clock driver
Andy Yan [Thu, 1 Jun 2017 10:00:36 +0000 (18:00 +0800)]
rockchip: clk: Add rv1108 clock driver

Add clock driver support for Rockchip rv1108 soc

Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
7 years agorockchip: pinctrl: Add rv1108 pinctrl driver
Andy Yan [Thu, 1 Jun 2017 10:00:10 +0000 (18:00 +0800)]
rockchip: pinctrl: Add rv1108 pinctrl driver

Add pinctrl support for Rockchip rv1108 soc

Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
7 years agorockchip: mkimage: Add support for RV1108
Andy Yan [Thu, 1 Jun 2017 09:58:31 +0000 (17:58 +0800)]
rockchip: mkimage: Add support for RV1108

Add support to mkimage for rv1108 soc, the max
spl code size for rv1108 is 6kb, and the spl
code should be packed by rksd, wether boot from
emmc or spi nor flash.

Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
7 years agorockchip: defconfig: puma-rk3399: do not filter clock-names for SPL
Philipp Tomsich [Wed, 31 May 2017 16:18:50 +0000 (18:18 +0200)]
rockchip: defconfig: puma-rk3399: do not filter clock-names for SPL

For the RK3399-Q7 module, we use full OF_CONTROL (i.e. not
OF_PLATDATA) for SPL.  In this configuration, the rockchip_dw_mmc
driver retrieves one of its clocks via clk_get_by_name and fails if
this is not possible.  For this reason, we can not filter clock-names
from the device-tree nodes used for the configuration of the SPL
stage.

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
7 years agorockchip: defconfig: puma-rk3399: enable I2C
Philipp Tomsich [Wed, 31 May 2017 16:18:49 +0000 (18:18 +0200)]
rockchip: defconfig: puma-rk3399: enable I2C

The RK3399-Q7 exposes I2C on its edge connector and uses it as one of
the interfaces towards the on-module STM32 (for the emulated RTC and
fan-controller).

Enable I2C and CMD_I2C support in the defconfig.

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
7 years agorockchip: defconfig: puma-rk3399: enable CONFIG_PHY_MICREL_KSZ9031
Philipp Tomsich [Wed, 31 May 2017 16:18:48 +0000 (18:18 +0200)]
rockchip: defconfig: puma-rk3399: enable CONFIG_PHY_MICREL_KSZ9031

The RK3399-Q7 has a KSZ9031 GbE PHY. Enable support for it in defconfig.

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
7 years agorockchip: defconfig: puma-rk3399: enable RK808 support
Philipp Tomsich [Wed, 31 May 2017 16:18:46 +0000 (18:18 +0200)]
rockchip: defconfig: puma-rk3399: enable RK808 support

On the RK3399-Q7, we need PMIC support (for the RK808) to enable HDMI
output, as one of the required powerrails is not enabled on boot.
For this, we need to enable the RK808 driver.

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Version-changes: 3
- With the recent upstream changes to the RK808 (PMIC) driver, the
  associated configuration options have been renamed to RK8XX.  Track
  this change in the RK3399-Q7 defconfig.
Reviewed-by: Simon Glass <sjg@chromium.org>
7 years agorockchip: dts: rk3399-puma: set spl-payload-offset
Klaus Goger [Wed, 31 May 2017 16:17:59 +0000 (18:17 +0200)]
rockchip: dts: rk3399-puma: set spl-payload-offset

defines the spl-payload to 256k (0x40000)

Signed-off-by: Klaus Goger <klaus.goger@theobroma-systems.com>
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
7 years agorockchip: dts: rk3399-puma: release reset of on-module USB3 hub via vbus-gpio
Philipp Tomsich [Wed, 31 May 2017 16:17:58 +0000 (18:17 +0200)]
rockchip: dts: rk3399-puma: release reset of on-module USB3 hub via vbus-gpio

On the RK3399-Q7, the on-module USB3 hub is held in reset at boot-up
to save power and needs to be woken up using GPIO4A3.

Note that this is not a negated reset-signal (due to a level shifter
being needed for this signal anyway), but a negated enable-signal:
to enable, we need to output LOW (i.e. 0)... so we mark this as an
ACTIVE_LOW signal.

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
7 years agorockchip: dts: rk3399-puma: make the debug serial dm-pre-reloc
Philipp Tomsich [Wed, 31 May 2017 16:17:57 +0000 (18:17 +0200)]
rockchip: dts: rk3399-puma: make the debug serial dm-pre-reloc

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
7 years agorockchip: dts: rk3399-puma: Add DDR3-1866 timings
Philipp Tomsich [Wed, 31 May 2017 16:16:36 +0000 (18:16 +0200)]
rockchip: dts: rk3399-puma: Add DDR3-1866 timings

With the validation done for DDR3-1866 (i.e. 933 MHz bus clock), we
can now add the timings (rk3399-sdram-ddr3-1866.dtsi) for boards built
with the DDR3-1866 option.

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
7 years agorockchip: arm64: rk3399: support DDR3-1866 (i.e. 933MHz clock)
Philipp Tomsich [Wed, 31 May 2017 16:16:35 +0000 (18:16 +0200)]
rockchip: arm64: rk3399: support DDR3-1866 (i.e. 933MHz clock)

The RK3399 is capable of driving DDR3 at 933MHz (i.e. DDR3-1866),
if the PCB layout permits and appropriate memory timings are used.

This changes the sanity checks to allow a DTS to request DDR3-1866
operation.

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Tested-by: Klaus Goger <klaus.goger@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
7 years agorockchip: arm64: rk3399: revise timeout-handling for DRAM PHY lock
Philipp Tomsich [Wed, 31 May 2017 16:16:34 +0000 (18:16 +0200)]
rockchip: arm64: rk3399: revise timeout-handling for DRAM PHY lock

Revise the loop watching for a timeout on obtaining a DRAM PHY lock to
clearly state a timeout in milliseconds and use get_timer (based on
the ARMv8 architected timer) to detect a timeout.

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
7 years agorockchip: mkimage: set init_boot_size to avoid confusing the boot ROM
Philipp Tomsich [Tue, 30 May 2017 21:32:10 +0000 (23:32 +0200)]
rockchip: mkimage: set init_boot_size to avoid confusing the boot ROM

This change restores the earlier setting of init_boot_size to include
the maximum area covered by the the boot ROM of each chip for resolve
issues with back-to-bootrom functionality reported by Kever and Heiko.

To ensure that we don't run into the same issue again in the future,
I have updated the comments accordingly and added a reference to the
mailing list archive (there's some very helpful info from Andy Yan
that provides background on the BootROM requirements regarding these
fields).

See https://lists.denx.de/pipermail/u-boot/2017-May/293267.html for
some background (by Andy Yan) of how the BootROM processes this field.

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
7 years agorockchip: mkimage: force 2KB alignment for init_size
Philipp Tomsich [Tue, 30 May 2017 21:32:09 +0000 (23:32 +0200)]
rockchip: mkimage: force 2KB alignment for init_size

The Rockchip BootROM relies on init_size being aligned to 2KB
(see https://lists.denx.de/pipermail/u-boot/2017-May/293268.html).

This pads the image to 2KB both for SD card images and SPI images
and uses a common symbolic constant for the alignment.

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
7 years agorockchip: mkimage: add support for verify_header/print_header
Philipp Tomsich [Tue, 30 May 2017 21:32:08 +0000 (23:32 +0200)]
rockchip: mkimage: add support for verify_header/print_header

The rockchip image generation was previously missing the ability to
verify the generated header (and dump the image-type) without having
to resort to hexdump or od. Experience in our testing has showed it
to be very easy to get the rkspi and rksd images mixed up and the
lab... so we add the necessary support to have dumpimage tell us
what image type we're dealing with.

This change set adds the verify_header and print_header capability
to the rksd/rkspi image drivers (through shared code in rkcommon).

As of now, we only support images fully that are not RC4-encoded for
the SPL payload (i.e. header1 and payload). For RC4-encoded payloads,
the outer header (header0) is checked, but no detection of whether
this is a SD/MMC or SPI formatted payload takes place.

The output of dumpsys now prints the image type (spl_hdr), whether it
is a SD/MMC or SPI image, and the (padded) size of the image:
  $ ./tools/dumpimage -l ./spl.img
  Image Type:   Rockchip RK33 (SD/MMC) boot image
                               ^^^^^^ SD/MMC vs. SPI indication
                         ^^^^ spl_hdr indicated by the image
  Data Size:    79872 bytes

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Acked-by: Simon Glass <sjg@chromium.org>
7 years agorockchip: evb-rk3328: update board maintainer
Kever Yang [Tue, 23 May 2017 07:01:15 +0000 (15:01 +0800)]
rockchip: evb-rk3328: update board maintainer

Update maintainer to Kever Yang for William Zhang is not
work for this board now.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
7 years agoMAINTAINERS: rockchip: add board/rockchip as maintained entry
Kever Yang [Tue, 23 May 2017 07:01:14 +0000 (15:01 +0800)]
MAINTAINERS: rockchip: add board/rockchip as maintained entry

Directory board/rockchip/ are all boards for Rockchip SoCs,
so add it to maintained entry.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
7 years agoMAINTAINERS: git-mailrc: update maintainer for Rockchip
Kever Yang [Tue, 23 May 2017 07:01:13 +0000 (15:01 +0800)]
MAINTAINERS: git-mailrc: update maintainer for Rockchip

Send patch to Kever Yang instead of Lin Huang for Rockchip patches,
for Lin is not always working on upstream U-Boot.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Changed , to : in subject:
Signed-off-by: Simon Glass <sjg@chromium.org>
7 years agorockchip: dts: rk3328: support and enable xhci
Meng Dongyang [Wed, 17 May 2017 10:25:28 +0000 (18:25 +0800)]
rockchip: dts: rk3328: support and enable xhci

Signed-off-by: Meng Dongyang <daniel.meng@rock-chips.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
7 years agoconfigs: rk3328: config xhci controller
Meng Dongyang [Wed, 17 May 2017 10:21:47 +0000 (18:21 +0800)]
configs: rk3328: config xhci controller

Add config of max root ports and add config to enable xhci
controller.

Signed-off-by: Meng Dongyang <daniel.meng@rock-chips.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
7 years agorockchip: dts: rk3328: add ehci and ohci node and enable host0 port
Meng Dongyang [Wed, 17 May 2017 10:21:46 +0000 (18:21 +0800)]
rockchip: dts: rk3328: add ehci and ohci node and enable host0 port

Signed-off-by: Meng Dongyang <daniel.meng@rock-chips.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
7 years agoconfigs: rk3328: add support for usb and config ehci and ohci driver
Meng Dongyang [Wed, 17 May 2017 10:21:45 +0000 (18:21 +0800)]
configs: rk3328: add support for usb and config ehci and ohci driver

Add defconfig for usb and ehci and ohci controller, config maximal
number of ports of the root hub for ohci driver.

Signed-off-by: Meng Dongyang <daniel.meng@rock-chips.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
7 years agorockchip: pinctrl: rk3328: do not set io routing
Kever Yang [Wed, 17 May 2017 03:44:44 +0000 (11:44 +0800)]
rockchip: pinctrl: rk3328: do not set io routing

In rk3328, some function pin may have more than one choice, and muxed
with more than one IO, for example, the UART2 controller IO,
TX and RX, have 3 choice(setting in com_iomux):
- M0 which mux with GPIO1A0/GPIO1A1
- M1 which mux with GPIO2A0/GPIO2A1
- usb2phy which mux with USB2.0 DP/DM pin.

We should not decide which group to use in pinctrl driver,
for it may be different in different board, it should goes to board
file, and the pinctrl file should setting correct iomux depends on
the com_iomux value.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Acked-by: Simon Glass <sjg@chromium.org>
7 years agorockchip: pinctrl: move rk3328 grf reg definition in header file
Kever Yang [Wed, 17 May 2017 03:44:43 +0000 (11:44 +0800)]
rockchip: pinctrl: move rk3328 grf reg definition in header file

Move GRF register bit definition into GRF header file, remove
'GRF_' prefix and add 'GPIOmXn_' as prefix for bit meaning.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Acked-by: Simon Glass <sjg@chromium.org>
7 years agorockchip: rk3036: clean mask definition for grf reg
Kever Yang [Mon, 15 May 2017 12:52:17 +0000 (20:52 +0800)]
rockchip: rk3036: clean mask definition for grf reg

U-Boot prefer to use MASKs with SHIFT embeded, clean the Macro
definition in grf header file and pinctrl driver.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
7 years agorockchip: clock: rk3036: some fix according TRM
Kever Yang [Mon, 15 May 2017 12:52:16 +0000 (20:52 +0800)]
rockchip: clock: rk3036: some fix according TRM

- hclk/pclk_div range should use '<=' instead of '<'
- use GPLL for pd_bus clock source
- pd_bus HCLK/PCLK clock rate should not bigger than ACLK

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
7 years agorockchip: rk3036: clean mask definition for cru reg
Kever Yang [Mon, 15 May 2017 12:52:15 +0000 (20:52 +0800)]
rockchip: rk3036: clean mask definition for cru reg

Embeded the shift in mask MACRO definition in cru header file
and clock driver.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
7 years agorockchip: rk3368: Add PX5 Evaluation board
Andy Yan [Mon, 15 May 2017 09:54:48 +0000 (17:54 +0800)]
rockchip: rk3368: Add PX5 Evaluation board

PX5 EVB is designed by Rockchip for automotive field
with integrated CVBS (TP2825) / MIPI DSI / CSI / LVDS
HDMI video input/output interface, audio codec ES8396,
WIFI / BT (on RTL8723BS), Gsensor BMA250E and light&proximity
sensor STK3410.

Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
7 years agorockchip: rk3368: Add initial support for RK3368 based GeekBox
Andreas Färber [Mon, 15 May 2017 09:54:26 +0000 (17:54 +0800)]
rockchip: rk3368: Add initial support for RK3368 based GeekBox

The GeekBox is a TV box from GeekBuying, based on an MXM3 module.
The module can be used with base boards such as the GeekBox Landingship.
This adds basic support to chain-load U-Boot from Rockchip's miniloader.

Signed-off-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
7 years agorockchip: rk3368: add Sheep board
Andy Yan [Mon, 15 May 2017 09:53:50 +0000 (17:53 +0800)]
rockchip: rk3368: add Sheep board

Sheep board is designed by Rockchip as a EVB for rk3368.
Currently it is able to boot a linux kernel and system
to console with the miniloader run as fist level loader.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
7 years agorockchip: rk3368: Add sysreset driver
Andy Yan [Mon, 15 May 2017 10:19:42 +0000 (18:19 +0800)]
rockchip: rk3368: Add sysreset driver

Add sysreset driver to reset rk3368 SOC.

Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
7 years agorockchip: rk3368: Add core start-up code for RK3368
Andreas Färber [Mon, 15 May 2017 09:51:18 +0000 (17:51 +0800)]
rockchip: rk3368: Add core start-up code for RK3368

The RK3368 is an octa-core Cortex-A53 SoC from Rockchip.
This adds basic support to chain-load U-Boot from Rockchip's
miniloader.

Signed-off-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
7 years agorockchip: rk3368: Add pinctrl driver
Andy Yan [Mon, 15 May 2017 09:50:35 +0000 (17:50 +0800)]
rockchip: rk3368: Add pinctrl driver

Add driver to support iomux setup for the most commonly
used peripherals on rk3368.

Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
7 years agorockchip: rk3368: Add clock driver
Andy Yan [Mon, 15 May 2017 09:49:56 +0000 (17:49 +0800)]
rockchip: rk3368: Add clock driver

Add driver to setup the various PLLs and peripheral
clocks on the RK3368.

Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
7 years agoregulator: pwm: Fix handling of missing init voltage
Mark Kettenis [Sat, 13 May 2017 18:17:05 +0000 (20:17 +0200)]
regulator: pwm: Fix handling of missing init voltage

Since priv->init_voltage is an unsigned integer it can never be
negative.  So the current code fails to detect a missing
'regulator-init-microvolt' property and instead misconfigures the
PWM device.  Fix this by making the relevant members of
'struct pwm_regulator_info' signed integers.

Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
7 years agopower: rk808: fix ldo register offset
Heiko Stübner [Sat, 6 May 2017 19:21:29 +0000 (21:21 +0200)]
power: rk808: fix ldo register offset

Till now get_ldo_reg did a return &rk808_ldo[num - 1]; to return
the ldo register offset but didn't take into account that its
calling functions already created the ldo as ldo = dev->driver_data - 1.

This resulted in the setting for ldo8 writing to the register of ldo7
and so on. So fix this and get the correct ldo register data.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Acked-by: Simon Glass <sjg@chromium.org>
7 years agorockchip: board: puma_rk3399: build FIT image via u-boot.itb
Philipp Tomsich [Fri, 5 May 2017 17:22:54 +0000 (19:22 +0200)]
rockchip: board: puma_rk3399: build FIT image via u-boot.itb

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Acked-by: Simon Glass <sjg@chromium.org>
7 years agorockchip: defconfig: puma-rk3399: enable RK3399 efuse driver
Philipp Tomsich [Fri, 5 May 2017 17:21:41 +0000 (19:21 +0200)]
rockchip: defconfig: puma-rk3399: enable RK3399 efuse driver

With everything in place (i.e. the new efuse driver, the clk-support
for the non-secure efuse block, and the board-specific functions to
derive 'serial#' from the cpu-id within the efuses), enable this in
the RK3399-Q7 defconfig.

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Acked-by: Simon Glass <sjg@chromium.org>
7 years agorockchip: board: puma_rk3399: derive ethaddr from cpuid
Klaus Goger [Fri, 5 May 2017 17:21:40 +0000 (19:21 +0200)]
rockchip: board: puma_rk3399: derive ethaddr from cpuid

Generate a MAC address based on the cpuid available in the efuse
block: Use the first 6 byte of the cpuid's SHA256 hash and set the
locally administered bits. Also ensure that the multicast bit is
cleared.

The MAC address is only generated and set if there is no ethaddr
present in the saved environment.

Signed-off-by: Klaus Goger <klaus.goger@theobroma-systems.com>
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
7 years agorockchip: board: puma_rk3399: add support for serial# and cpuid# via efuses
Philipp Tomsich [Fri, 5 May 2017 17:21:39 +0000 (19:21 +0200)]
rockchip: board: puma_rk3399: add support for serial# and cpuid# via efuses

With our efuse driver for the RK3399 ready, we can add the
board-specific code that consumes the cpuid from the efuse block and
postprocesses it into the system serial (using the same CRC32 based
derivation as in Linux).

We expose the cpuid via two distinct environment variables:
   serial# - the serial number, as derived in Linux
   cpuid#  - the raw 16 byte CPU id field from the fuse block

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Acked-by: Simon Glass <sjg@chromium.org>
7 years agorockchip: efuse: add (misc) driver for RK3399 non-secure efuse block
Philipp Tomsich [Fri, 5 May 2017 17:21:38 +0000 (19:21 +0200)]
rockchip: efuse: add (misc) driver for RK3399 non-secure efuse block

This adds a simple driver for reading the efuse block of the RK3399.
It should be easy enough to add drivers for other devices (e.g. the
RK3328, RK3368, etc.) by passing the device details via driver_data.

Unlike the kernel driver (using the nvmem subsystem), we don't expose
the efuse as multiple named cells, but rather as a linear memory that
can be read using misc_read(...).

The primary use case (as of today) is the generation of a 'serial#'
(and a 'cpuid#') environment variable for the RK3399-Q7 (Puma)
system-on-module.

Note that this adds a debug-only (i.e. only if DEBUG is defined)
command 'rk3399_dump_efuses' that dumps the efuse block's content.
N.B.: The name 'rk3399_dump_efuses' was intentionally chosen to
      include a SoC-name (together with a comment in the function) to
      remind whoever adds support for additional SoCs that this
      function currently makes assumptions regarding the size of the
      fuse-box based on the RK3399. The hope is that the function is
      adjusted to reflect any changes resulting from generalising the
      driver for multiple SoCs and is then renamed.

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
7 years agorockchip: rk8xx: allocate priv structure for driver
Kever Yang [Fri, 5 May 2017 06:50:56 +0000 (14:50 +0800)]
rockchip: rk8xx: allocate priv structure for driver

The rk8xx_priv structure need to allocate for driver, or else
it will cause data abort when CPU access it.

This is a bug fix for below patch set:
https://www.mail-archive.com/u-boot@lists.denx.de/msg247345.html

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Acked-by: Simon Glass <sjg@chromium.org>
7 years agorockchip; rk3399: disable SRAM security region
Kever Yang [Fri, 5 May 2017 03:01:43 +0000 (11:01 +0800)]
rockchip; rk3399: disable SRAM security region

Some host like SD and eMMC may use DMA to transter data to SRAM,
set memory to non-secure to make sure the address can be accessed.

The security of SRAM in OS suppose to initialized in ATF bl31, and
the SPL is before the bl31.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Acked-by: Simon Glass <sjg@chromium.org>
7 years agodefconfig: firefly-rk3399: fix pinctrl config option
Heiko Stübner [Wed, 3 May 2017 23:29:13 +0000 (01:29 +0200)]
defconfig: firefly-rk3399: fix pinctrl config option

The option is named PINCTRL_ROCKCHIP_RK3399 not ROCKCHIP_RK3399_PINCTRL.
Set the correct option.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Acked-by: Simon Glass <sjg@chromium.org>
7 years agoMerge git://git.denx.de/u-boot-ubi
Tom Rini [Tue, 6 Jun 2017 11:13:39 +0000 (07:13 -0400)]
Merge git://git.denx.de/u-boot-ubi

7 years agofs: usbifs: Fix warning in ubifs
Siva Durga Prasad Paladugu [Tue, 30 May 2017 12:29:06 +0000 (14:29 +0200)]
fs: usbifs: Fix warning in ubifs

This patch fixes the below warning by typecasting it properly
fs/ubifs/ubifs.c: In function 'ubifs_load':
fs/ubifs/ubifs.c:942:29: warning: cast to pointer from integer
of different size [-Wint-to-pointer-cast]
  err = ubifs_read(filename, (void *)addr, 0, size, &actread);

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
7 years agoMerge git://git.denx.de/u-boot-usb
Tom Rini [Tue, 6 Jun 2017 01:05:51 +0000 (21:05 -0400)]
Merge git://git.denx.de/u-boot-usb

7 years agoPrepare v2017.07-rc1 v2017.07-rc1
Tom Rini [Tue, 6 Jun 2017 00:40:22 +0000 (20:40 -0400)]
Prepare v2017.07-rc1

Signed-off-by: Tom Rini <trini@konsulko.com>
7 years agoarmv7m: Fix larger builds
Phil Edworthy [Thu, 1 Jun 2017 06:33:29 +0000 (07:33 +0100)]
armv7m: Fix larger builds

The branch instruction only has an 11-bit relative target address, which
is sometimes not enough.

Signed-off-by: Phil Edworthy <phil.edworthy@renesas.com>
7 years agoarm: Add Kconfig symbols used for Linux asm compatibility
Phil Edworthy [Thu, 1 Jun 2017 06:33:28 +0000 (07:33 +0100)]
arm: Add Kconfig symbols used for Linux asm compatibility

Rather than change asm files that come from Linux, add the symbols
to Kconfig. Since one of the symbols is for thumb2 builds, make
CPU_V7M always select them.

Signed-off-by: Phil Edworthy <phil.edworthy@renesas.com>
7 years agoarm64: hikey: Fix instructions in readme
Michal Simek [Wed, 31 May 2017 09:28:30 +0000 (11:28 +0200)]
arm64: hikey: Fix instructions in readme

Fix inaccurate instructions in README.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
7 years agodrivers: ram: stm32: fix compilation issue
Patrice Chotard [Tue, 30 May 2017 13:06:31 +0000 (15:06 +0200)]
drivers: ram: stm32: fix compilation issue

If CONFIG_CLK flag is not set, compilation raises the
following error message:

drivers/ram/stm32_sdram.c: In function 'stm32_fmc_probe':
drivers/ram/stm32_sdram.c:154:2: error: 'ret' undeclared (first use in this function)
  ret = stm32_sdram_init(dev);

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
cc: Vikas Manocha <vikas.manocha@st.com>

7 years agoarm64: Add NOLOAD attribute NOLOAD to .bss sections
Michal Simek [Mon, 29 May 2017 08:26:53 +0000 (10:26 +0200)]
arm64: Add NOLOAD attribute NOLOAD to .bss sections

Mark explicitly bss sections to not be loaded at
run time.
The similar patch was done in past by:
"Fix linker scripts: add NOLOAD atribute to .bss/.sbss sections"
(sha1: 64134f011254123618798ff77c42ba196b2ec485)

The problem is related to latest toolchain added to Xilinx
v2017.1 design tools where jtag loader is trying to access
ununitialized memory.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
7 years agoARMv8: Add support for poweroff via PSCI
Michal Simek [Mon, 29 May 2017 07:11:32 +0000 (09:11 +0200)]
ARMv8: Add support for poweroff via PSCI

Add support for calling poweroff in case of psci is wired.
Based on the same solution as is used for reset.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
[trini: Move all logic in to fwcall.c as other ARMs implement poweroff
via PMIC]
Signed-off-by: Tom Rini <trini@konsulko.com>