platform/kernel/linux-rpi.git
4 years agoMerge tag 'hisi-arm64-dt-for-5.10' of git://github.com/hisilicon/linux-hisi into...
Olof Johansson [Sat, 26 Sep 2020 16:46:09 +0000 (09:46 -0700)]
Merge tag 'hisi-arm64-dt-for-5.10' of git://github.com/hisilicon/linux-hisi into arm/dt

ARM64: DT: Hisilicon ARM64 SoCs DT updates for 5.10

- Change the status properties from "ok" to "okay" for
  all the hisilicon SoCs
- Update the SP805 nodes to have the correct clocks and
  clock names for the hi3660 and hi6220 SoCs

* tag 'hisi-arm64-dt-for-5.10' of git://github.com/hisilicon/linux-hisi:
  arm64: dts: hisilicon: Fix SP805 clocks
  arm64: dts: hisilicon: replace status value "ok" by "okay"

Link: https://lore.kernel.org/r/5F617134.3050705@hisilicon.com
Signed-off-by: Olof Johansson <olof@lixom.net>
4 years agoarm64: dts: hisilicon: Fix SP805 clocks
Andre Przywara [Mon, 7 Sep 2020 12:18:29 +0000 (13:18 +0100)]
arm64: dts: hisilicon: Fix SP805 clocks

The SP805 DT binding requires two clocks to be specified, but
Hisilicon platform DTs currently only specify one clock.

In practice, Linux would pick a clock named "apb_pclk" for the bus
clock, and the Linux and U-Boot SP805 driver would use the first clock
to derive the actual watchdog counter frequency.

Since currently both are the very same clock, we can just double the
clock reference, and add the correct clock-names, to match the binding.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
4 years agoarm64: dts: hisilicon: replace status value "ok" by "okay"
Adrian Schmutzler [Sun, 30 Aug 2020 20:05:51 +0000 (22:05 +0200)]
arm64: dts: hisilicon: replace status value "ok" by "okay"

While the DT parser recognizes "ok" as a valid value for the
"status" property, it is actually mentioned nowhere. Use the
proper value "okay" instead, as done in the majority of files
already.

Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
4 years agoMerge tag 'arm-soc/for-5.10/devicetree-arm64' of https://github.com/Broadcom/stblinux...
Olof Johansson [Sun, 13 Sep 2020 18:36:10 +0000 (11:36 -0700)]
Merge tag 'arm-soc/for-5.10/devicetree-arm64' of https://github.com/Broadcom/stblinux into arm/dt

This pull request contains Broadcom ARM64-based SoCs changes for 5.10,
please pull the following:

- Adrian changes the status properties from "ok" to "okay"

- Andre fixes the SP805 watchdog nodes to have the correct clock names
  and binding for the Northstar 2 platform

* tag 'arm-soc/for-5.10/devicetree-arm64' of https://github.com/Broadcom/stblinux:
  arm64: dts: broadcom: Fix SP805 clock-names
  arm64: dts: broadcom: replace status value "ok" by "okay"

Link: https://lore.kernel.org/r/20200912032153.1216354-2-f.fainelli@gmail.com
Signed-off-by: Olof Johansson <olof@lixom.net>
4 years agoMerge tag 'arm-soc/for-5.10/devicetree' of https://github.com/Broadcom/stblinux into...
Olof Johansson [Sun, 13 Sep 2020 18:34:24 +0000 (11:34 -0700)]
Merge tag 'arm-soc/for-5.10/devicetree' of https://github.com/Broadcom/stblinux into arm/dt

This pull request contains Broadcom ARM-based SoCs changes for 5.10,
please pull the following:

- Christian adds support for the Cisco Meraki MR32 which is based on the
  BCM53016 SoC, this requires specifying the PWM, second UART and third
  PCIe controller in Device Tree before finally adding support for the
  board.

- Adrian updates the status properties from "ok" to "okay".

- Andre fixes the SP805 watchdog nodes to have the correct clock names
  and binding for both the Cygnus and Northstar Plus (NSP). He does the
  same thing with the SP804 timer node which was missing an
  "arm,primecell" compatible string.

- Maxime enables the BCM2711 (Raspberry Pi 4) display pipeline since all
  DRM changes are ready.

* tag 'arm-soc/for-5.10/devicetree' of https://github.com/Broadcom/stblinux:
  ARM: dts: broadcom: Fix SP804 node
  ARM: dts: NSP: Fix SP805 clock-names
  ARM: dts: Cygnus: Fix SP805 clocks
  ARM: dts: NSP: replace status value "ok" by "okay"
  ARM: BCM5301X: Add DT for Meraki MR32
  ARM: dts: bcm2711: Enable the display pipeline
  ARM: dts: BCM5301X: Specify pcie2 in the DT
  ARM: dts: BCM5301X: Specify uart2 in the DT
  ARM: dts: BCM5301X: Specify PWM in the DT
  dt-bindings: ARM: add bindings for the Meraki MR32

Link: https://lore.kernel.org/r/20200912032153.1216354-1-f.fainelli@gmail.com
Signed-off-by: Olof Johansson <olof@lixom.net>
4 years agoMerge tag 'dt-schema-5.10' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk...
Olof Johansson [Sun, 13 Sep 2020 18:33:41 +0000 (11:33 -0700)]
Merge tag 'dt-schema-5.10' of https://git./linux/kernel/git/krzk/linux into arm/dt

Various minor cleanups for ARM DTS

Cleanup ARM DTS to remove dtschema validation errors.

* tag 'dt-schema-5.10' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
  ARM: dts: alpine: Align GIC nodename with dtschema
  ARM: dts: zx: Align L2 cache-controller nodename with dtschema
  ARM: dts: tango: Align L2 cache-controller nodename with dtschema
  ARM: dts: spear: Align L2 cache-controller nodename with dtschema
  ARM: dts: qcom: Align L2 cache-controller nodename with dtschema
  ARM: dts: prima: Align L2 cache-controller nodename with dtschema

Link: https://lore.kernel.org/r/20200911155509.1495-2-krzk@kernel.org
Signed-off-by: Olof Johansson <olof@lixom.net>
4 years agoMerge tag 'dt64-schema-5.10' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk...
Olof Johansson [Sun, 13 Sep 2020 18:32:36 +0000 (11:32 -0700)]
Merge tag 'dt64-schema-5.10' of https://git./linux/kernel/git/krzk/linux into arm/dt

Various minor cleanups for arm64 Amazon DTS

Cleanup arm64 DTS to remove dtschema validation errors.

* tag 'dt64-schema-5.10' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
  arm64: dts: alpine: Fix GIC unit address
  arm64: dts: alpine: Align GIC nodename with dtschema

Link: https://lore.kernel.org/r/20200911155509.1495-1-krzk@kernel.org
Signed-off-by: Olof Johansson <olof@lixom.net>
4 years agoMerge tag 'aspeed-5.10-devicetree' of git://git.kernel.org/pub/scm/linux/kernel/git...
Olof Johansson [Sun, 13 Sep 2020 18:31:24 +0000 (11:31 -0700)]
Merge tag 'aspeed-5.10-devicetree' of git://git./linux/kernel/git/joel/aspeed into arm/dt

ASPEED device tree updates for 5.10

 - New machines

  * Wistron Mowgli, an AST2500 BMC for a Power9 OpenPower server

  * Facebook Wedge400, an AST2500 BMC system which we can assume is 4
    times better than the existing Wedge100 top of rack network switch

 - Add a new device, the IBM Operation Panel

 - Fixes for Facebook's collection of BMCs

 - eMMC and vuart fixes

* tag 'aspeed-5.10-devicetree' of git://git.kernel.org/pub/scm/linux/kernel/git/joel/aspeed:
  ARM: dts: aspeed: Add Mowgli BMC platform
  ARM: dts: rainier: Disable internal pull-downs on eMMC pins
  ARM: aspeed: g5: Do not set sirq polarity
  ARM: dts: aspeed: rainier: Add IBM Operation Panel I2C device
  ARM: dts: aspeed: tacoma: Add IBM Operation Panel I2C device
  ARM: dts: aspeed: rainier: Enable XDMA engine
  ARM: dts: aspeed: wedge40: Update UART4 pin settings
  ARM: dts: aspeed: wedge40: Update FMC flash0 label
  ARM: dts: aspeed: Add Facebook Wedge400 BMC
  ARM: dts: aspeed: minipack: Update 64MB FMC flash layout
  ARM: dts: aspeed: yamp: Set 32MB FMC flash layout
  ARM: dts: aspeed: cmm: Set 32MB FMC flash layout
  ARM: dts: aspeed: Remove flash layout from Facebook AST2500 Common dtsi

Link: https://lore.kernel.org/r/CACPK8XcDNBYAHzW6NYB4LFm3YbN63AprgW75ZqS+6uXn2b3kug@mail.gmail.com
Signed-off-by: Olof Johansson <olof@lixom.net>
4 years agoMerge tag 'juno-updates-5.10' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep...
Olof Johansson [Sun, 13 Sep 2020 18:27:04 +0000 (11:27 -0700)]
Merge tag 'juno-updates-5.10' of git://git./linux/kernel/git/sudeep.holla/linux into arm/dt

ARMv8 Juno/Vexpress/Fast Models updates for v5.10

A few device tree source fixes to make them fully SP804 timer and
SP805 watchdog binding compliant.

* tag 'juno-updates-5.10' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux:
  arm64: dts: arm: Fix SP805 clock-names
  ARM: dts: arm: Fix SP805 clocks
  ARM: dts: arm: Fix SP804 users

Link: https://lore.kernel.org/r/20200908135028.GA10106@bogus
Signed-off-by: Olof Johansson <olof@lixom.net>
4 years agoMerge tag 'samsung-dt64-5.10' of https://git.kernel.org/pub/scm/linux/kernel/git...
Olof Johansson [Sun, 13 Sep 2020 18:22:56 +0000 (11:22 -0700)]
Merge tag 'samsung-dt64-5.10' of https://git./linux/kernel/git/krzk/linux into arm/dt

Samsung DTS ARM64 changes for v5.10

Cleanup of Exynos DTS to fix as many dtschema warnings as possible.
This includes adding missing compatibles and using non-deprecated
properties.  Changes should not have a visible impact.

* tag 'samsung-dt64-5.10' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
  arm64: dts: exynos: Add compatibles to sysreg nodes
  arm64: dts: exynos: Replace deprecated "gpios" i2c-gpio property in Exynos5433

Link: https://lore.kernel.org/r/20200907150425.11077-2-krzk@kernel.org
Signed-off-by: Olof Johansson <olof@lixom.net>
4 years agoMerge tag 'samsung-dt-5.10' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk...
Olof Johansson [Sun, 13 Sep 2020 18:22:36 +0000 (11:22 -0700)]
Merge tag 'samsung-dt-5.10' of https://git./linux/kernel/git/krzk/linux into arm/dt

Samsung DTS ARM changes for v5.10

1. Add sound support to Galaxy S3/Midas family (Exynos4412).
2. Add sound support to Galaxy S/Aries family (S5Pv210).
3. Configure L2C-310 cache controller via DTS on Exynos4.
4. Big cleanup of Exynos DTS to fix as many dtschema warnings as
   possible.  This includes adding missing properties (thus e.g.
   enabling S3C RTC clock), correcting existing nodes, renaming of
   nodes and using non-deprecated properties or compatibles.  Except
   mentioned bring up of S3C RTC, this should not have visible
   effect.

* tag 'samsung-dt-5.10' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux: (49 commits)
  ARM: dts: exynos: Silence SATA PHY warning in Exynos5250
  ARM: dts: exynos: Remove I2C9 samsung, i2c-slave-addr from Exynos5250 boards
  ARM: dts: samsung: odroid-xu3: Move assigned-clock* properties to i2s0 node
  ARM: dts: exynos: Use S2MPS11 clock in S3C RTC in SMDK5420
  ARM: dts: exynos: Silence DP HPD pinctrl dtschema warning in Exynos5250 Spring
  ARM: dts: exynos: Use S5M8767 clock in S3C RTC in Exynos5250 Spring
  ARM: dts: exynos: Add max77686 clocks for S3C RTC in SMDK5250
  ARM: dts: exynos: Override thermal by label in Exynos5250
  ARM: dts: exynos: Correct whitespace and indentation issues in Exynos5
  ARM: dts: exynos: Silence i2c-gpio dtschema warning in Exynos5250 Arndale
  ARM: dts: exynos: Correct S3C RTC bindings in SMDK5410
  ARM: dts: exynos: Remove unneeded address/size cells in Exynos5260 GIC
  ARM: dts: exynos: Correct compatible for Exynos5260 GIC
  ARM: dts: exynos: Correct compatible for Exynos5 GIC
  ARM: dts: s5pv210: Enable audio on Aries boards
  ARM: dts: exynos: Correct whitespace and indentation issues
  ARM: dts: exynos: Correct S3C RTC bindings in Tiny4412
  ARM: dts: exynos: Correct S3C RTC bindings in SMDK4412
  ARM: dts: exynos: Add CPU cooling in Tiny4412
  ARM: dts: exynos: Add CPU cooling in SMDK4412
  ...

Link: https://lore.kernel.org/r/20200907150425.11077-1-krzk@kernel.org
Signed-off-by: Olof Johansson <olof@lixom.net>
4 years agoMerge tag 'renesas-arm-dt-for-v5.10-tag1' of git://git.kernel.org/pub/scm/linux/kerne...
Olof Johansson [Sun, 13 Sep 2020 18:21:22 +0000 (11:21 -0700)]
Merge tag 'renesas-arm-dt-for-v5.10-tag1' of git://git./linux/kernel/git/geert/renesas-devel into arm/dt

Renesas ARM DT updates for v5.10

  - Increase support for the RZ/G2H SoC on the HopeRun HiHope RZ/G2H
    board, and its display panel expansion board,
  - Increase support for the RZ/G1H SoC on the iWave RainboW SoM (G21M)
    and Qseven board (G21D),
  - SATA support for the HopeRun HiHope RZ/G2N board,
  - PCIe endpoint support for the RZ/G2M, RZ/G2E, and RZ/G2H SoCs,
  - Audio support for the R-Car M3-W+ SoC.
  - Minor fixes and improvements.

* tag 'renesas-arm-dt-for-v5.10-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel: (39 commits)
  arm64: dts: renesas: Add HiHope RZ/G2H board with idk-1110wr display
  arm64: dts: renesas: r8a774e1: Add cpuidle support for CA5x cores
  arm64: dts: renesas: r8a774e1: Add FDP1 device nodes
  ARM: dts: r8a7742-iwg21d-q7: Enable PCIe Controller
  ARM: dts: r8a7742: Add IPMMU DT nodes
  arm64: dts: renesas: r8a77961: Enable Sound / Audio-DMAC
  arm64: dts: renesas: r8a774e1: Add PWM device nodes
  ARM: dts: r8a7742-iwg21m: Add SPI NOR support
  arm64: dts: renesas: r8a774e1-hihope-rzg2h: Enable HS400 mode
  ARM: dts: r8a7742-iwg21m: Add RTC support
  ARM: dts: r8a7742-iwg21m: Sort the nodes alphabetically
  ARM: dts: r8a7742: Add CAN support
  arm64: dts: renesas: r8a774c0: Add PCIe EP node
  arm64: dts: renesas: r8a774b1: Add PCIe EP nodes
  arm64: dts: renesas: r8a774a1: Add PCIe EP nodes
  ARM: dts: r8a7742: Add QSPI support
  arm64: dts: renesas: r8a774e1-hihope-rzg2h: Setup DU clocks
  arm64: dts: renesas: r8a774e1: Add LVDS device node
  arm64: dts: renesas: r8a774e1: Populate HDMI encoder node
  arm64: dts: renesas: r8a774e1: Populate DU device node
  ...

Link: https://lore.kernel.org/r/20200904114819.30254-3-geert+renesas@glider.be
Signed-off-by: Olof Johansson <olof@lixom.net>
4 years agoMerge tag 'omap-for-v5.10/dt-signed' of git://git.kernel.org/pub/scm/linux/kernel...
Olof Johansson [Sun, 13 Sep 2020 18:18:37 +0000 (11:18 -0700)]
Merge tag 'omap-for-v5.10/dt-signed' of git://git./linux/kernel/git/tmlind/linux-omap into arm/dt

Devicetree changes for omaps for v5.10

- Use a known good SGX clockrate for 4430, this is not needed as a fix
  as the closed source SGX driver is out of tree

- Prepare DSI panels for upcoming changes to use generic driver code

- Add common support for MOXA UC-8100 series

- Add ocp label for l3 interconnect for board specific dts files to
  reference

- Configure CPU thermal properties for omap3

* tag 'omap-for-v5.10/dt-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
  ARM: dts: omap3: Add cpu trips and cooling map for omap34/36 families
  ARM: dts: am33xx: add ocp label
  ARM: dts: am335x: add common dtsi for MOXA UC-8100 series
  ARM: dts: omap4-droid4: add panel orientation
  ARM: dts: omap4-droid4: add panel compatible
  ARM: dts: omap: add channel to DSI panels
  ARM: dts: omap4: Fix sgx clock rate for 4430
  ARM: dts: omap5: Fix DSI base address and clocks
  ARM: dts: logicpd-som-lv-baseboard: Fix missing video
  ARM: dts: logicpd-som-lv-baseboard: Fix broken audio
  ARM: dts: logicpd-torpedo-baseboard: Fix broken audio
  ARM: OMAP2+: Fix an IS_ERR() vs NULL check in _get_pwrdm()

Link: https://lore.kernel.org/r/pull-1599132307-761202@atomide.com-3
Signed-off-by: Olof Johansson <olof@lixom.net>
4 years agoARM: dts: alpine: Align GIC nodename with dtschema
Krzysztof Kozlowski [Mon, 29 Jun 2020 06:56:29 +0000 (08:56 +0200)]
ARM: dts: alpine: Align GIC nodename with dtschema

Fix dtschema validator warnings like:
    gic@fb001000: $nodename:0:
        'gic@fb001000' does not match '^interrupt-controller(@[0-9a-f,]+)*$'

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
4 years agoARM: dts: zx: Align L2 cache-controller nodename with dtschema
Krzysztof Kozlowski [Fri, 26 Jun 2020 07:56:10 +0000 (09:56 +0200)]
ARM: dts: zx: Align L2 cache-controller nodename with dtschema

Fix dtschema validator warnings like:
    l2-cache-controller@c00000: $nodename:0:
        'l2-cache-controller@c00000' does not match '^(cache-controller|cpu)(@[0-9a-f,]+)*$'

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Reviewed-by: Jun Nie <jun.nie@linaro.org>
4 years agoARM: dts: tango: Align L2 cache-controller nodename with dtschema
Krzysztof Kozlowski [Fri, 26 Jun 2020 07:54:52 +0000 (09:54 +0200)]
ARM: dts: tango: Align L2 cache-controller nodename with dtschema

Fix dtschema validator warnings like:
    l2-cache-controller@20100000: $nodename:0:
        'l2-cache-controller@20100000' does not match '^(cache-controller|cpu)(@[0-9a-f,]+)*$'

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Acked-by: Mans Rullgard <mans@mansr.com>
4 years agoARM: dts: spear: Align L2 cache-controller nodename with dtschema
Krzysztof Kozlowski [Fri, 26 Jun 2020 07:53:57 +0000 (09:53 +0200)]
ARM: dts: spear: Align L2 cache-controller nodename with dtschema

Fix dtschema validator warnings like:
    l2-cache: $nodename:0: 'l2-cache' does not match '^(cache-controller|cpu)(@[0-9a-f,]+)*$'

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
4 years agoARM: dts: qcom: Align L2 cache-controller nodename with dtschema
Krzysztof Kozlowski [Fri, 26 Jun 2020 07:52:58 +0000 (09:52 +0200)]
ARM: dts: qcom: Align L2 cache-controller nodename with dtschema

Fix dtschema validator warnings like:
    l2-cache@2040000: $nodename:0:
        'l2-cache@2040000' does not match '^(cache-controller|cpu)(@[0-9a-f,]+)*$'

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
4 years agoARM: dts: prima: Align L2 cache-controller nodename with dtschema
Krzysztof Kozlowski [Fri, 26 Jun 2020 07:52:31 +0000 (09:52 +0200)]
ARM: dts: prima: Align L2 cache-controller nodename with dtschema

Fix dtschema validator warnings like:
    l2-cache-controller@80040000: $nodename:0:
        'l2-cache-controller@80040000' does not match '^(cache-controller|cpu)(@[0-9a-f,]+)*$'

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Acked-by: Barry Song <baohua@kernel.org>
4 years agoarm64: dts: alpine: Fix GIC unit address
Krzysztof Kozlowski [Mon, 29 Jun 2020 07:24:12 +0000 (09:24 +0200)]
arm64: dts: alpine: Fix GIC unit address

Node unit address should be the same as first address appearing in "reg"
property.  Fixes DTC warning:

    arch/arm64/boot/dts/al/alpine-v2.dtsi:116.38-126.5:
        Warning (simple_bus_reg): /soc/interrupt-controller@f0100000: simple-bus unit address format error, expected "f0200000"

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
4 years agoarm64: dts: alpine: Align GIC nodename with dtschema
Krzysztof Kozlowski [Mon, 29 Jun 2020 07:02:23 +0000 (09:02 +0200)]
arm64: dts: alpine: Align GIC nodename with dtschema

Fix dtschema validator warnings like:
    gic@f0100000: $nodename:0:
        'gic@f0100000' does not match '^interrupt-controller(@[0-9a-f,]+)*$'

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
4 years agoARM: dts: aspeed: Add Mowgli BMC platform
Ben Pai [Wed, 9 Sep 2020 09:08:18 +0000 (17:08 +0800)]
ARM: dts: aspeed: Add Mowgli BMC platform

The Mowgli BMC is an ASPEED ast2500 based BMC that is part of an
OpenPower Power9 server.

Signed-off-by: Ben Pai <Ben_Pai@wistron.com>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Link: https://lore.kernel.org/r/20200909090818.24021-1-ben_pai@wistron.com
Signed-off-by: Joel Stanley <joel@jms.id.au>
4 years agoMerge tag 'tags/bcm2835-dt-next-2020-09-08' into devicetree/next
Florian Fainelli [Thu, 10 Sep 2020 20:35:55 +0000 (13:35 -0700)]
Merge tag 'tags/bcm2835-dt-next-2020-09-08' into devicetree/next

Maxime Ripard enables vc4 on BCM2711 (RPi4), which among other things
adds HDMI functionality (no 4K yet).

Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
4 years agoARM: dts: broadcom: Fix SP804 node
Andre Przywara [Wed, 26 Aug 2020 18:38:01 +0000 (19:38 +0100)]
ARM: dts: broadcom: Fix SP804 node

The DT binding for SP804 requires to have an "arm,primecell" compatible
string.
Add this string so that the Linux primecell bus driver picks the device
up and activates the clock.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Tested-by: Florian Fainelli <f.fainelli@gmail.com>
[florian: added compatible to ccbtimer1]
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
4 years agoARM: dts: NSP: Fix SP805 clock-names
Andre Przywara [Fri, 28 Aug 2020 13:06:01 +0000 (14:06 +0100)]
ARM: dts: NSP: Fix SP805 clock-names

The SP805 binding sets the name for the actual watchdog clock to
"wdog_clk" (with an underscore).

Change the name in the DTs for the Broadcom NSP platform to match that.
The Linux and U-Boot driver use the *first* clock for this purpose
anyway, so it does not break anything.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Ray Jui <ray.jui@broadcom.com>
Acked-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
4 years agoARM: dts: Cygnus: Fix SP805 clocks
Andre Przywara [Fri, 28 Aug 2020 13:06:00 +0000 (14:06 +0100)]
ARM: dts: Cygnus: Fix SP805 clocks

The SP805 DT binding requires two clocks to be specified, but the
Broadcom Cygnus DT currently only specifies one clock.

In practice, Linux would pick a clock named "apb_pclk" for the bus
clock, and the Linux and U-Boot SP805 driver would use the first clock
to derive the actual watchdog counter frequency.

Since currently both are the very same clock, we can just double the
clock reference, and add the correct clock-names, to match the binding.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Ray Jui <ray.jui@broadcom.com>
Acked-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
4 years agoARM: dts: NSP: replace status value "ok" by "okay"
Adrian Schmutzler [Sun, 30 Aug 2020 19:54:41 +0000 (21:54 +0200)]
ARM: dts: NSP: replace status value "ok" by "okay"

While the DT parser recognizes "ok" as a valid value for the
"status" property, it is actually mentioned nowhere. Use the
proper value "okay" instead, as done in the majority of files
already.

Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
4 years agoARM: BCM5301X: Add DT for Meraki MR32
Christian Lamparter [Sat, 22 Aug 2020 16:19:23 +0000 (18:19 +0200)]
ARM: BCM5301X: Add DT for Meraki MR32

add support for the Cisco Meraki MR32.
This is a dual-band enterprise class 802.11ac access point.
The unit was donated by Chris Blake. Thank you!

SoC:    Broadcom BCM53016A1 (1 GHz, 2 cores)
RAM:    128 MiB
NAND:   128 MiB Spansion S34ML01G2 (~114 MiB useable)
ETH:    1GBit Ethernet Port - PoE
WIFI1:  Broadcom BCM43520 an+ac (2x2:2 - id: 0x4352)
WIFI2:  Broadcom BCM43520 bgn (2x2:2 - id: 0x4352)
WIFI3:  Broadcom BCM43428 abgn (1x1:1 - id: 43428)

BLE:    Broadcom BCM20732 (ttyS1)
LEDS:   1 x Programmable RGB Status LED (driven by a PWM)
        1 x White LED (GPIO)
        1 x Orange LED Fault Indicator (GPIO)
        2 x LAN Activity / Speed LEDs (On the RJ45 Port)
BUTTON: one Reset button
MISC:   AT24C64 8KiB EEPROM (i2c - stores Ethernet MAC)
        ina219 hardware monitor (i2c)
        Kensington Lock

SERIAL:
WARNING: The serial port needs a TTL/RS-232 3V3 level converter!
        The Serial setting is 115200-8-N-1. The board has a populated
        right angle 1x4 0.1" pinheader.
        The pinout is: VCC, RX, TX, GND.

Odd stuff:
- uart0 clock frequency is 62.5 MHz.
- The LEDs are labeled as SYS-LED1 through SYS-LED3
  because of the silkscreen on the PCB.
- the original u-boot has been compiled with most functions
  and commands disabled. The u-boot env isn't setup properly
  either and as a result, the bcm47xxpart probing is not
  working. Hence, the nand partitions are specified through a
  "fixed-partition" binding.
- The "WICED SMART(TM)" Bluetooth LE 4.0 BCM20732 chip is
  connected to uart2 of the SoC. The BCM20732 does not
  provide a HCI. So the linux' bluetooth stack is useless.
  The mock-up node with the compatible binding and
  enable-gpios property is provided solely as documentation.

Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
4 years agoARM: dts: rainier: Disable internal pull-downs on eMMC pins
Andrew Jeffery [Thu, 10 Sep 2020 03:11:43 +0000 (12:41 +0930)]
ARM: dts: rainier: Disable internal pull-downs on eMMC pins

There's a veritable tug-of-war going on in the design, so disable one of
the warring parties.

Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
Link: https://lore.kernel.org/r/20200910031143.2997298-1-andrew@aj.id.au
Signed-off-by: Joel Stanley <joel@jms.id.au>
4 years agoARM: aspeed: g5: Do not set sirq polarity
Joel Stanley [Wed, 12 Aug 2020 11:24:00 +0000 (20:54 +0930)]
ARM: aspeed: g5: Do not set sirq polarity

A feature was added to the aspeed vuart driver to configure the vuart
interrupt (sirq) polarity according to the LPC/eSPI strapping register.

Systems that depend on a active low behaviour (sirq_polarity set to 0)
such as OpenPower boxes also use LPC, so this relationship does not
hold. Jeremy confirms that the s2600st which is strapped for eSPI also
does not have this relationship.

The property was added for a Tyan S7106 system which is not supported
in the kernel tree. Should this or other systems wish to use this
feature of the driver they should add it to the machine specific device
tree.

Fixes: c791fc76bc72 ("arm: dts: aspeed: Add vuart aspeed,sirq-polarity-sense...")
Signed-off-by: Joel Stanley <joel@jms.id.au>
Tested-by: Jeremy Kerr <jk@ozlabs.org>
Reviewed-by: Jeremy Kerr <jk@ozlabs.org>
Cc: stable@vger.kernel.org
Link: https://lore.kernel.org/r/20200812112400.2406734-1-joel@jms.id.au
Signed-off-by: Joel Stanley <joel@jms.id.au>
4 years agoARM: dts: aspeed: rainier: Add IBM Operation Panel I2C device
Eddie James [Tue, 8 Sep 2020 20:01:01 +0000 (15:01 -0500)]
ARM: dts: aspeed: rainier: Add IBM Operation Panel I2C device

Set I2C bus 7 to multi-master mode and add the panel device that will
register as a slave.

Signed-off-by: Eddie James <eajames@linux.ibm.com>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Link: https://lore.kernel.org/r/20200908200101.64974-6-eajames@linux.ibm.com
Signed-off-by: Joel Stanley <joel@jms.id.au>
4 years agoARM: dts: aspeed: tacoma: Add IBM Operation Panel I2C device
Eddie James [Tue, 8 Sep 2020 20:01:00 +0000 (15:01 -0500)]
ARM: dts: aspeed: tacoma: Add IBM Operation Panel I2C device

Set I2C bus 0 to multi-master mode and add the panel device that will
register as a slave.

Signed-off-by: Eddie James <eajames@linux.ibm.com>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Link: https://lore.kernel.org/r/20200908200101.64974-5-eajames@linux.ibm.com
Signed-off-by: Joel Stanley <joel@jms.id.au>
4 years agoARM: dts: bcm2711: Enable the display pipeline
Maxime Ripard [Thu, 3 Sep 2020 08:01:52 +0000 (10:01 +0200)]
ARM: dts: bcm2711: Enable the display pipeline

Now that all the drivers have been adjusted for it, let's bring in the
necessary device tree changes.

The VEC and PV3 are left out for now, since it will require a more specific
clock setup.

Reviewed-by: Dave Stevenson <dave.stevenson@raspberrypi.com>
Tested-by: Chanwoo Choi <cw00.choi@samsung.com>
Tested-by: Hoegeun Kwon <hoegeun.kwon@samsung.com>
Tested-by: Stefan Wahren <stefan.wahren@i2se.com>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Reviewed-by: Hoegeun Kwon <hoegeun.kwon@samsung.com>
Signed-off-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
Link: https://lore.kernel.org/r/cfce2276d172d3d9c4d34d966b58fd47f77c4e46.1599120059.git-series.maxime@cerno.tech
4 years agoarm64: dts: arm: Fix SP805 clock-names
Andre Przywara [Fri, 28 Aug 2020 13:05:54 +0000 (14:05 +0100)]
arm64: dts: arm: Fix SP805 clock-names

The SP805 binding sets the name for the actual watchdog clock to
"wdog_clk" (with an underscore).

Change the name in the DTs for ARM Ltd. platforms to match that. The
Linux and U-Boot driver use the *first* clock for this purpose anyway,
so it does not break anything.

Link: https://lore.kernel.org/r/20200828130602.42203-3-andre.przywara@arm.com
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
4 years agoARM: dts: arm: Fix SP805 clocks
Andre Przywara [Fri, 28 Aug 2020 13:05:59 +0000 (14:05 +0100)]
ARM: dts: arm: Fix SP805 clocks

The SP805 binding sets the name for the actual watchdog clock to
"wdog_clk" (with an underscore).

Change the name in the DTs for ARM Ltd. platforms to match that. The
Linux and U-Boot driver use the *first* clock for this purpose anyway,
so it does not break anything.

For MPS2 we only specify one clock so far, but the binding requires
two clocks to be named.

In practice, Linux would pick a clock named "apb_pclk" for the bus
clock, and the Linux and U-Boot SP805 driver would use the first clock
to derive the actual watchdog counter frequency. So since currently both
are the very same clock, we can just double the clock reference, and add
the correct clock-names, to match the binding.

Link: https://lore.kernel.org/r/20200828130602.42203-8-andre.przywara@arm.com
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
4 years agoARM: dts: arm: Fix SP804 users
Andre Przywara [Fri, 28 Aug 2020 14:20:14 +0000 (15:20 +0100)]
ARM: dts: arm: Fix SP804 users

The SP804 DT nodes for Realview, MPS2 and VExpress were not complying
with the binding: it requires either one or three clocks, but does not
allow exactly two clocks.

Simply duplicate the first clock to satisfy the binding requirement.
For MPS2, we triple the clock, and add the clock-names property, as this
is required by the Linux primecell driver.
Try to make the clock-names more consistent on the way.

Link: https://lore.kernel.org/r/20200828142018.43298-3-andre.przywara@arm.com
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
4 years agoARM: dts: exynos: Silence SATA PHY warning in Exynos5250
Krzysztof Kozlowski [Wed, 2 Sep 2020 15:57:33 +0000 (17:57 +0200)]
ARM: dts: exynos: Silence SATA PHY warning in Exynos5250

The SATA PHY in Exynos5250 SoCs has two interfaces and two device nodes:
1. sata-phy@12170000
2. i2c-9/i2c@38

The first node represents the actual SATA PHY device with phy-cells.

The second represents an additional I2C interface, needed by the driver
to communicate with the SATA PHY device.  It is not a PHY-provider in
the terms of dtschema so rename it to silence dtbs_check warning:

  arch/arm/boot/dts/exynos5250-arndale.dt.yaml: sata-phy@38: '#phy-cells' is a required property
    From schema: lib/python3.6/site-packages/dtschema/schemas/phy/phy-provider.yaml

This second device node is also a property of SoC, not a board so move
it there.

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Link: https://lore.kernel.org/r/20200902155733.20271-2-krzk@kernel.org
4 years agoARM: dts: exynos: Remove I2C9 samsung, i2c-slave-addr from Exynos5250 boards
Krzysztof Kozlowski [Wed, 2 Sep 2020 15:57:32 +0000 (17:57 +0200)]
ARM: dts: exynos: Remove I2C9 samsung, i2c-slave-addr from Exynos5250 boards

The property samsung,i2c-slave-addr in I2C9 controller on Exynos5250
Arndale and SMDK5250 boards, is not actually needed.  There is only one
master on this bus.  It's not clear why this property was added at first
place.

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Tested-by: Marek Szyprowski <m.szyprowski@samsung.com>
Link: https://lore.kernel.org/r/20200902155733.20271-1-krzk@kernel.org
4 years agoARM: dts: samsung: odroid-xu3: Move assigned-clock* properties to i2s0 node
Sylwester Nawrocki [Fri, 4 Sep 2020 10:20:36 +0000 (12:20 +0200)]
ARM: dts: samsung: odroid-xu3: Move assigned-clock* properties to i2s0 node

The purpose of those assigned-clock-* properties is to configure clock for
for the I2S device so move them to respective node.

This suppresses the dtbs_check warning:
  arch/arm/boot/dts/exynos5422-odroidxu3.dt.yaml: sound: 'clocks' is a dependency of 'assigned-clocks'

Reported-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
4 years agoARM: dts: exynos: Use S2MPS11 clock in S3C RTC in SMDK5420
Krzysztof Kozlowski [Tue, 1 Sep 2020 07:54:17 +0000 (09:54 +0200)]
ARM: dts: exynos: Use S2MPS11 clock in S3C RTC in SMDK5420

Use the 32 kHz clock from S2MPS11 PMIC in the S3C RTC node. Except
making the S3C RTC working, this also fixes dtbs_check warnings:

  arch/arm/boot/dts/exynos5420-smdk5420.dt.yaml: rtc@101e0000: clocks: [[2, 317]] is too short
  arch/arm/boot/dts/exynos5420-smdk5420.dt.yaml: rtc@101e0000: clock-names: ['rtc'] is too short

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Link: https://lore.kernel.org/r/20200901075417.22481-14-krzk@kernel.org
4 years agoarm64: dts: renesas: Add HiHope RZ/G2H board with idk-1110wr display
Lad Prabhakar [Thu, 27 Aug 2020 18:19:18 +0000 (19:19 +0100)]
arm64: dts: renesas: Add HiHope RZ/G2H board with idk-1110wr display

The HiHope RZ/G2H is advertised as compatible with panel idk-1110wr from
Advantech, however the panel isn't sold alongside the board. New dts,
enabling the lvds node to get the panel to work with HiHope RZ/G2H.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/20200827181918.30130-1-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
4 years agoarm64: dts: renesas: r8a774e1: Add cpuidle support for CA5x cores
Lad Prabhakar [Thu, 27 Aug 2020 14:53:15 +0000 (15:53 +0100)]
arm64: dts: renesas: r8a774e1: Add cpuidle support for CA5x cores

Enable cpuidle (core shutdown) support for RZ/G2H CA5x cores.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/20200827145315.26261-3-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
4 years agoarm64: dts: renesas: r8a774e1: Add FDP1 device nodes
Marian-Cristian Rotariu [Thu, 27 Aug 2020 14:53:14 +0000 (15:53 +0100)]
arm64: dts: renesas: r8a774e1: Add FDP1 device nodes

Add FDP1 device nodes to R8A774E1 (RZ/G2H) SoC dtsi.

Signed-off-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@bp.renesas.com>
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/20200827145315.26261-2-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
4 years agoARM: dts: r8a7742-iwg21d-q7: Enable PCIe Controller
Lad Prabhakar [Tue, 25 Aug 2020 16:27:15 +0000 (17:27 +0100)]
ARM: dts: r8a7742-iwg21d-q7: Enable PCIe Controller

Enable PCIe Controller and set PCIe bus clock frequency.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Chris Paterson <Chris.Paterson2@renesas.com>
Link: https://lore.kernel.org/r/20200825162718.5838-2-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
4 years agoARM: dts: r8a7742: Add IPMMU DT nodes
Lad Prabhakar [Tue, 25 Aug 2020 14:18:05 +0000 (15:18 +0100)]
ARM: dts: r8a7742: Add IPMMU DT nodes

Add the five IPMMU instances found in the r8a7742 to DT with a disabled
status.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Chris Paterson <Chris.Paterson2@renesas.com>
Link: https://lore.kernel.org/r/20200825141805.27105-3-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
4 years agoARM: dts: exynos: Silence DP HPD pinctrl dtschema warning in Exynos5250 Spring
Krzysztof Kozlowski [Tue, 1 Sep 2020 07:54:14 +0000 (09:54 +0200)]
ARM: dts: exynos: Silence DP HPD pinctrl dtschema warning in Exynos5250 Spring

The pin configuration of Display Port HPD GPIO emds with '-gpio' which
confuses dtschema:

  arch/arm/boot/dts/exynos5250-spring.dt.yaml: pinctrl@11400000: dp-hpd-gpio:
    {'samsung,pins': ['gpc3-0'], ... 'samsung,pin-drv': [[0]], 'phandle': [[23]]} is not of type 'array'
    From schema: lib/python3.6/site-packages/dtschema/schemas/gpio/gpio-consumer.yaml

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Link: https://lore.kernel.org/r/20200901075417.22481-11-krzk@kernel.org
4 years agoARM: dts: exynos: Use S5M8767 clock in S3C RTC in Exynos5250 Spring
Krzysztof Kozlowski [Tue, 1 Sep 2020 07:54:13 +0000 (09:54 +0200)]
ARM: dts: exynos: Use S5M8767 clock in S3C RTC in Exynos5250 Spring

Use the 32 kHz clock from S5M8767 PMIC in the S3C RTC node. Except
making the S3C RTC working, this also fixes dtbs_check warnings:

  arch/arm/boot/dts/exynos5250-spring.dt.yaml: rtc@101e0000: clocks: [[2, 337]] is too short
  arch/arm/boot/dts/exynos5250-spring.dt.yaml: rtc@101e0000: clock-names: ['rtc'] is too short

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Link: https://lore.kernel.org/r/20200901075417.22481-10-krzk@kernel.org
4 years agoARM: dts: exynos: Add max77686 clocks for S3C RTC in SMDK5250
Krzysztof Kozlowski [Tue, 1 Sep 2020 07:54:12 +0000 (09:54 +0200)]
ARM: dts: exynos: Add max77686 clocks for S3C RTC in SMDK5250

Add clock-cells to max77686 PMIC node so its 32 kHz clocks could be used
later in the S3C RTC node. Except making the S3C RTC working, this also
fixes dtbs_check warnings:

  arch/arm/boot/dts/exynos5250-smdk5250.dt.yaml: rtc@101e0000: clocks: [[2, 337]] is too short
  arch/arm/boot/dts/exynos5250-smdk5250.dt.yaml: rtc@101e0000: clock-names: ['rtc'] is too short

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Link: https://lore.kernel.org/r/20200901075417.22481-9-krzk@kernel.org
4 years agoARM: dts: exynos: Override thermal by label in Exynos5250
Krzysztof Kozlowski [Tue, 1 Sep 2020 07:54:11 +0000 (09:54 +0200)]
ARM: dts: exynos: Override thermal by label in Exynos5250

Using full paths to extend or override a device tree node is error prone
since if there was a typo error, a new node will be created instead of
extending the node as it was desired.  This will lead to run-time errors
that could be hard to detect.

A mistyped label on the other hand, will cause a dtc compile error
(during build time).

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Link: https://lore.kernel.org/r/20200901075417.22481-8-krzk@kernel.org
4 years agoARM: dts: exynos: Correct whitespace and indentation issues in Exynos5
Krzysztof Kozlowski [Tue, 1 Sep 2020 07:54:10 +0000 (09:54 +0200)]
ARM: dts: exynos: Correct whitespace and indentation issues in Exynos5

Remove double space after '=' and fix indentation in Exynos5250,
Exynos5410 and Exynos5420 DTS files.

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Link: https://lore.kernel.org/r/20200901075417.22481-7-krzk@kernel.org
4 years agoARM: dts: exynos: Silence i2c-gpio dtschema warning in Exynos5250 Arndale
Krzysztof Kozlowski [Tue, 1 Sep 2020 07:54:09 +0000 (09:54 +0200)]
ARM: dts: exynos: Silence i2c-gpio dtschema warning in Exynos5250 Arndale

The name of I2C controller over GPIO lines node ends with '-gpio' which
confuses dtschema:

  arch/arm/boot/dts/exynos5250-arndale.dt.yaml: soc: i2c-gpio:
    {'pinctrl-names': ['default'], ... 'phandle': [[65]]} is not of type 'array'
    From schema: lib/python3.6/site-packages/dtschema/schemas/gpio/gpio-consumer.yaml

Add a '-10' (there are already 0-9 I2C controllers on the SoC) suffix to
silence it.  This pattern on naming i2c-gpio is already present in many
other dts.  No functional change.

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Link: https://lore.kernel.org/r/20200901075417.22481-6-krzk@kernel.org
4 years agoARM: dts: exynos: Correct S3C RTC bindings in SMDK5410
Krzysztof Kozlowski [Tue, 1 Sep 2020 07:54:08 +0000 (09:54 +0200)]
ARM: dts: exynos: Correct S3C RTC bindings in SMDK5410

The S3C RTC requires 32768 Hz clock as input which is provided by PMIC.
However the PMIC is not described in DTS at all so at least add
a workaround to model its clock with a fixed-clock.  This fixes S3C RTC
and silences dtbs_check warnings like:

  arch/arm/boot/dts/exynos5410-smdk5410.dt.yaml: rtc@101e0000: clocks: [[5, 317]] is too short
  arch/arm/boot/dts/exynos5410-smdk5410.dt.yaml: rtc@101e0000: clock-names: ['rtc'] is too short

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Link: https://lore.kernel.org/r/20200901075417.22481-5-krzk@kernel.org
4 years agoARM: dts: exynos: Remove unneeded address/size cells in Exynos5260 GIC
Krzysztof Kozlowski [Tue, 1 Sep 2020 07:54:07 +0000 (09:54 +0200)]
ARM: dts: exynos: Remove unneeded address/size cells in Exynos5260 GIC

The Exynos5260 GIC node does not have any children so remove the address
and size cells as they are not needed by DT bindings.  The size-cells of
'0' were also incorrect.  This fixes dtbs_check warning:

  arch/arm/boot/dts/exynos5260-xyref5260.dt.yaml: interrupt-controller@10481000: #size-cells:0:0: 1 was expected

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Link: https://lore.kernel.org/r/20200901075417.22481-4-krzk@kernel.org
4 years agoARM: dts: exynos: Correct compatible for Exynos5260 GIC
Krzysztof Kozlowski [Tue, 1 Sep 2020 07:54:06 +0000 (09:54 +0200)]
ARM: dts: exynos: Correct compatible for Exynos5260 GIC

Exynos5260 SoCs have ARM GIC 400.  Correct the compatibles to match
dtschema and fix the dtbs_check warnings like:

  arch/arm/boot/dts/exynos5260-xyref5260.dt.yaml: interrupt-controller@10481000:
    compatible: ['arm,cortex-a15-gic', 'arm,cortex-a9-gic'] is not valid under any of the given schemas

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Link: https://lore.kernel.org/r/20200901075417.22481-3-krzk@kernel.org
4 years agoARM: dts: exynos: Correct compatible for Exynos5 GIC
Krzysztof Kozlowski [Tue, 1 Sep 2020 07:54:05 +0000 (09:54 +0200)]
ARM: dts: exynos: Correct compatible for Exynos5 GIC

Exynos5250 and Exynso54xx SoCs have ARM GIC 400.  Correct the
compatibles to match dtschema and fix the dtbs_check warnings like:

  arch/arm/boot/dts/exynos5420-peach-pit.dt.yaml: interrupt-controller@10481000:
    compatible: ['arm,gic-400', 'arm,cortex-a15-gic', 'arm,cortex-a9-gic']
    is not valid under any of the given schemas

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Link: https://lore.kernel.org/r/20200901075417.22481-2-krzk@kernel.org
4 years agoARM: dts: s5pv210: Enable audio on Aries boards
Jonathan Bakker [Wed, 2 Sep 2020 00:38:58 +0000 (17:38 -0700)]
ARM: dts: s5pv210: Enable audio on Aries boards

Both the Galaxy S and the Fascinate4G have a WM8994 codec, but they
differ slightly in their jack detection and micbias configuration.

Signed-off-by: Jonathan Bakker <xc-racer2@live.ca>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
4 years agoARM: dts: exynos: Correct whitespace and indentation issues
Krzysztof Kozlowski [Sun, 30 Aug 2020 13:52:00 +0000 (15:52 +0200)]
ARM: dts: exynos: Correct whitespace and indentation issues

Remove double space after '=' and fix indentation in Exynos3250,
Exynos4210 and Exynos4412 boards.

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Link: https://lore.kernel.org/r/20200830135200.24304-33-krzk@kernel.org
4 years agoARM: dts: exynos: Correct S3C RTC bindings in Tiny4412
Krzysztof Kozlowski [Sun, 30 Aug 2020 13:51:59 +0000 (15:51 +0200)]
ARM: dts: exynos: Correct S3C RTC bindings in Tiny4412

The S3C RTC requires 32768 Hz clock as input which is provided by PMIC.
However the PMIC is not described in DTS at all so at least add a
workaround to model its clock with fixed-clock.  This fixes S3C RTC and
silences dtbs_check warnings like:

  arch/arm/boot/dts/exynos4412-tiny4412.dt.yaml: rtc@10070000: clocks: [[7, 346]] is too short
  arch/arm/boot/dts/exynos4412-tiny4412.dt.yaml: rtc@10070000: clock-names: ['rtc'] is too short

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Link: https://lore.kernel.org/r/20200830135200.24304-32-krzk@kernel.org
4 years agoARM: dts: exynos: Correct S3C RTC bindings in SMDK4412
Krzysztof Kozlowski [Sun, 30 Aug 2020 13:51:58 +0000 (15:51 +0200)]
ARM: dts: exynos: Correct S3C RTC bindings in SMDK4412

The S3C RTC requires 32768 Hz clock as input which is provided by PMIC.
However the PMIC is not described in DTS at all so at least add a
workaround to model its clock with fixed-clock and silence dtbs_check
warnings like:

  arch/arm/boot/dts/exynos4412-smdk4412.dt.yaml: rtc@10070000: clocks: [[7, 346]] is too short
  arch/arm/boot/dts/exynos4412-smdk4412.dt.yaml: rtc@10070000: clock-names: ['rtc'] is too short

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Link: https://lore.kernel.org/r/20200830135200.24304-31-krzk@kernel.org
4 years agoARM: dts: exynos: Add CPU cooling in Tiny4412
Krzysztof Kozlowski [Sun, 30 Aug 2020 13:51:57 +0000 (15:51 +0200)]
ARM: dts: exynos: Add CPU cooling in Tiny4412

Add missing cooling devices for CPU thermal zones in Exynos4412 Tiny4412
board.  This allows to scale down CPU frequency (and voltage) in case of
thermal pressure.

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Link: https://lore.kernel.org/r/20200830135200.24304-30-krzk@kernel.org
4 years agoARM: dts: exynos: Add CPU cooling in SMDK4412
Krzysztof Kozlowski [Sun, 30 Aug 2020 13:51:56 +0000 (15:51 +0200)]
ARM: dts: exynos: Add CPU cooling in SMDK4412

Add missing cooling devices for CPU thermal zones in Exynos4412 SMDK4412
board.  This allows to scale down CPU frequency (and voltage) in case of
thermal pressure.

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Link: https://lore.kernel.org/r/20200830135200.24304-29-krzk@kernel.org
4 years agoARM: dts: exynos: Add CPU cooling in Exynos4412 Origen
Krzysztof Kozlowski [Sun, 30 Aug 2020 13:51:55 +0000 (15:51 +0200)]
ARM: dts: exynos: Add CPU cooling in Exynos4412 Origen

Add missing cooling devices for CPU thermal zones in Exynos4412 Origen
board.  This allows to scale down CPU frequency (and voltage) in case of
thermal pressure.

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Link: https://lore.kernel.org/r/20200830135200.24304-28-krzk@kernel.org
4 years agoARM: dts: exynos: Override thermal by label in Exynos4412 Odroids
Krzysztof Kozlowski [Sun, 30 Aug 2020 13:51:54 +0000 (15:51 +0200)]
ARM: dts: exynos: Override thermal by label in Exynos4412 Odroids

Using full paths to extend or override a device tree node is error prone
since if there was a typo error, a new node will be created instead of
extending the node as it was desired.  This will lead to run-time errors
that could be hard to detect.

A mistyped label on the other hand, will cause a dtc compile error
(during build time).

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Link: https://lore.kernel.org/r/20200830135200.24304-27-krzk@kernel.org
4 years agoARM: dts: exynos: Override thermal by label in Midas
Krzysztof Kozlowski [Sun, 30 Aug 2020 13:51:53 +0000 (15:51 +0200)]
ARM: dts: exynos: Override thermal by label in Midas

Using full paths to extend or override a device tree node is error prone
since if there was a typo error, a new node will be created instead of
extending the node as it was desired.  This will lead to run-time errors
that could be hard to detect.

A mistyped label on the other hand, will cause a dtc compile error
(during build time).

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Link: https://lore.kernel.org/r/20200830135200.24304-26-krzk@kernel.org
4 years agoARM: dts: exynos: Add S5M8767 clocks for RTC in Exynos4412 Origen
Krzysztof Kozlowski [Sun, 30 Aug 2020 13:51:52 +0000 (15:51 +0200)]
ARM: dts: exynos: Add S5M8767 clocks for RTC in Exynos4412 Origen

Add node for clock controller of Samsung S5M8767 PMIC.  This provides
the 32768 Hz clock required by S3C RTC.  Except making the S3C RTC
working, this also fixes dtbs_check warnings:

  arch/arm/boot/dts/exynos4412-origen.dt.yaml: rtc@10070000: clocks: [[7, 346]] is too short
  arch/arm/boot/dts/exynos4412-origen.dt.yaml: rtc@10070000: clock-names: ['rtc'] is too short

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Link: https://lore.kernel.org/r/20200830135200.24304-25-krzk@kernel.org
4 years agoARM: dts: exynos: Correct compatible of fixed clocks in Midas boards
Krzysztof Kozlowski [Sun, 30 Aug 2020 13:51:51 +0000 (15:51 +0200)]
ARM: dts: exynos: Correct compatible of fixed clocks in Midas boards

The fixed clocks implemented by Samsung clock drivers use only one
compatible so drop the additional "fixed-clock" to fix dtbs_check
warnings like:

  arch/arm/boot/dts/exynos4412-i9300.dt.yaml: xxti: compatible:0: 'fixed-clock' was expected
    From schema: Documentation/devicetree/bindings/clock/fixed-clock.yaml
  arch/arm/boot/dts/exynos4412-i9300.dt.yaml: xxti: compatible: ['samsung,clock-xxti', 'fixed-clock'] is too long
  arch/arm/boot/dts/exynos4412-i9300.dt.yaml: xxti: compatible: Additional items are not allowed ('fixed-clock' was unexpected)
  arch/arm/boot/dts/exynos4412-i9300.dt.yaml: xxti: '#clock-cells' is a required property

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Link: https://lore.kernel.org/r/20200830135200.24304-24-krzk@kernel.org
4 years agoARM: dts: exynos: Align MHL GPIO pin configuration with dtschema on Galaxy I9100
Krzysztof Kozlowski [Sun, 30 Aug 2020 13:51:49 +0000 (15:51 +0200)]
ARM: dts: exynos: Align MHL GPIO pin configuration with dtschema on Galaxy I9100

Align the name of mag-mhl-gpio node to avoid dtschema confusion and
dtbs_check warning:

  arch/arm/boot/dts/exynos4210-i9100.dt.yaml: pinctrl@11000000: mag-mhl-gpio:
    {'samsung,pins': ['gpd0-2'], 'samsung,pin-function': [[3]], 'samsung,pin-pud': [[0]]} is not of type 'array'
    From schema: dtschema/schemas/gpio/gpio-consumer.yaml

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Link: https://lore.kernel.org/r/20200830135200.24304-22-krzk@kernel.org
4 years agoARM: dts: exynos: Add CPU cooling in Universal C210
Krzysztof Kozlowski [Sun, 30 Aug 2020 13:51:48 +0000 (15:51 +0200)]
ARM: dts: exynos: Add CPU cooling in Universal C210

Add missing cooling devices for CPU thermal zones in Exynos4210
Universal C310 board.  This allows to scale down CPU frequency (and
voltage) in case of thermal pressure.

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Link: https://lore.kernel.org/r/20200830135200.24304-21-krzk@kernel.org
4 years agoARM: dts: exynos: Add CPU cooling in SMDKv310
Krzysztof Kozlowski [Sun, 30 Aug 2020 13:51:47 +0000 (15:51 +0200)]
ARM: dts: exynos: Add CPU cooling in SMDKv310

Add missing cooling devices for CPU thermal zones in Exynos4210 SMDKv310
board.  This allows to scale down CPU frequency (and voltage) in case of
thermal pressure.

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Link: https://lore.kernel.org/r/20200830135200.24304-20-krzk@kernel.org
4 years agoARM: dts: exynos: Add CPU cooling in Exynos4210 Origen
Krzysztof Kozlowski [Sun, 30 Aug 2020 13:51:46 +0000 (15:51 +0200)]
ARM: dts: exynos: Add CPU cooling in Exynos4210 Origen

Add missing cooling devices for CPU thermal zones in Exynos4210 Origen
board.  This allows to scale down CPU frequency (and voltage) in case of
thermal pressure.

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Link: https://lore.kernel.org/r/20200830135200.24304-19-krzk@kernel.org
4 years agoARM: dts: exynos: Override thermal by label in Trats
Krzysztof Kozlowski [Sun, 30 Aug 2020 13:51:45 +0000 (15:51 +0200)]
ARM: dts: exynos: Override thermal by label in Trats

Using full paths to extend or override a device tree node is error prone
since if there was a typo error, a new node will be created instead of
extending the node as it was desired.  This will lead to run-time errors
that could be hard to detect.

A mistyped label on the other hand, will cause a dtc compile error
(during build time).

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Link: https://lore.kernel.org/r/20200830135200.24304-18-krzk@kernel.org
4 years agoARM: dts: exynos: Override thermal by label in Galaxy I9000
Krzysztof Kozlowski [Sun, 30 Aug 2020 13:51:44 +0000 (15:51 +0200)]
ARM: dts: exynos: Override thermal by label in Galaxy I9000

Using full paths to extend or override a device tree node is error prone
since if there was a typo error, a new node will be created instead of
extending the node as it was desired.  This will lead to run-time errors
that could be hard to detect.

A mistyped label on the other hand, will cause a dtc compile error
(during build time).

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Link: https://lore.kernel.org/r/20200830135200.24304-17-krzk@kernel.org
4 years agoARM: dts: exynos: Override thermal by label in Exynos4210
Krzysztof Kozlowski [Sun, 30 Aug 2020 13:51:43 +0000 (15:51 +0200)]
ARM: dts: exynos: Override thermal by label in Exynos4210

Using full paths to extend or override a device tree node is error prone
since if there was a typo error, a new node will be created instead of
extending the node as it was desired.  This will lead to run-time errors
that could be hard to detect.

A mistyped label on the other hand, will cause a dtc compile error
(during build time).

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Link: https://lore.kernel.org/r/20200830135200.24304-16-krzk@kernel.org
4 years agoARM: dts: exynos: Align SPI GPIO node name with dtschema in Galaxy I9100
Krzysztof Kozlowski [Sun, 30 Aug 2020 13:51:42 +0000 (15:51 +0200)]
ARM: dts: exynos: Align SPI GPIO node name with dtschema in Galaxy I9100

The device tree schema expects SPI controller to be named "spi",
otherwise dtbs_check complain with a warning like:

  arch/arm/boot/dts/exynos4210-i9100.dt.yaml: spi-lcd:
    $nodename:0: 'spi-lcd' does not match '^spi(@.*|-[0-9a-f])*$'

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Link: https://lore.kernel.org/r/20200830135200.24304-15-krzk@kernel.org
4 years agoARM: dts: exynos: Replace deprecated GPIO spi-gpio properties in Universal C210
Krzysztof Kozlowski [Sun, 30 Aug 2020 13:51:41 +0000 (15:51 +0200)]
ARM: dts: exynos: Replace deprecated GPIO spi-gpio properties in Universal C210

"gpio-sck" and "gpio-mosi" are deprecated so update the DTS to fix
dtbs_checks warnings like:

  arch/arm/boot/dts/exynos4210-universal_c210.dt.yaml: spi-lcd:
    gpio-sck: False schema does not allow [[85, 1, 0]]

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Tested-by: Marek Szyprowski <m.szyprowski@samsung.com>
Link: https://lore.kernel.org/r/20200830135200.24304-14-krzk@kernel.org
4 years agoARM: dts: exynos: Align SPI GPIO node name with dtschema in Universal C210
Krzysztof Kozlowski [Sun, 30 Aug 2020 13:51:40 +0000 (15:51 +0200)]
ARM: dts: exynos: Align SPI GPIO node name with dtschema in Universal C210

The device tree schema expects SPI controller to be named "spi",
otherwise dtbs_check complain with a warning like:

  arch/arm/boot/dts/exynos4210-universal_c210.dt.yaml: spi-lcd:
    $nodename:0: 'spi-lcd' does not match '^spi(@.*|-[0-9a-f])*$'

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Link: https://lore.kernel.org/r/20200830135200.24304-13-krzk@kernel.org
4 years agoARM: dts: exynos: Add and enable 32 kHz modem clock in Trats
Krzysztof Kozlowski [Sun, 30 Aug 2020 13:51:37 +0000 (15:51 +0200)]
ARM: dts: exynos: Add and enable 32 kHz modem clock in Trats

The PMIC has a 32768 Hz clock used by the modem which is implemented by
driver as a regulator.  Add and enable it to be sure modem get's its
signal.

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Link: https://lore.kernel.org/r/20200830135200.24304-10-krzk@kernel.org
4 years agoARM: dts: exynos: Add and enable 32 kHz modem clock in Galaxy I9100
Krzysztof Kozlowski [Sun, 30 Aug 2020 13:51:35 +0000 (15:51 +0200)]
ARM: dts: exynos: Add and enable 32 kHz modem clock in Galaxy I9100

The PMIC has a 32768 Hz clock used by the modem which is implemented by
driver as a regulator.  Add and enable it to be sure modem get's its
signal.

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Link: https://lore.kernel.org/r/20200830135200.24304-8-krzk@kernel.org
4 years agoARM: dts: exynos: Correct S3C RTC bindings in SMDKv310
Krzysztof Kozlowski [Sun, 30 Aug 2020 13:51:34 +0000 (15:51 +0200)]
ARM: dts: exynos: Correct S3C RTC bindings in SMDKv310

The S3C RTC requires 32768 Hz clock as input which is provided by PMIC.
However there is no clock provided for the PMIC and the driver registers
the clock as regulator.  This is an old driver which will not be updated
so add a workaround - a fixed-clock to fill missing clock phandle
reference in S3C RTC.

This allows to enable the S3C RTC and fixes dtbs_check warnings:

  arch/arm/boot/dts/exynos4210-smdkv310.dt.yaml: rtc@10070000: clocks: [[5, 346]] is too short
  arch/arm/boot/dts/exynos4210-smdkv310.dt.yaml: rtc@10070000: clock-names: ['rtc'] is too short

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Link: https://lore.kernel.org/r/20200830135200.24304-7-krzk@kernel.org
4 years agoARM: dts: exynos: Correct S3C RTC bindings and enable it in Universal C210
Krzysztof Kozlowski [Sun, 30 Aug 2020 13:51:33 +0000 (15:51 +0200)]
ARM: dts: exynos: Correct S3C RTC bindings and enable it in Universal C210

The S3C RTC requires 32768 Hz clock as input which is provided by PMIC.
However there is no clock provided for the PMIC and the driver registers
the clock as regulator.  This is an old driver which will not be updated
so add a workaround - add a fixed-clock to fill missing clock phandle
reference in S3C RTC.  The "clock" regulator in PMIC is already present
and enabled.

This allows to enable the S3C RTC and fixes dtbs_check warnings:

  arch/arm/boot/dts/exynos4210-universal_c210.dt.yaml: rtc@10070000: clocks: [[5, 346]] is too short
  arch/arm/boot/dts/exynos4210-universal_c210.dt.yaml: rtc@10070000: clock-names: ['rtc'] is too short

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Tested-by: Marek Szyprowski <m.szyprowski@samsung.com>
Link: https://lore.kernel.org/r/20200830135200.24304-6-krzk@kernel.org
4 years agoARM: dts: exynos: Correct S3C RTC bindings and enable it in Trats
Krzysztof Kozlowski [Sun, 30 Aug 2020 13:51:32 +0000 (15:51 +0200)]
ARM: dts: exynos: Correct S3C RTC bindings and enable it in Trats

The S3C RTC requires 32768 Hz clock as input which is provided by PMIC
(Maxim MAX8997).  However there is no clock provided for the PMIC and
the driver registers the clock as regulator.  This is an old driver
which will not be updated so add a workaround:
1. Enable the "clock" regulator in PMIC,
2. Add a fixed-clock to fill missing clock phandle reference in S3C RTC.

This allows to enable the S3C RTC and fixes dtbs_check warnings:

  arch/arm/boot/dts/exynos4210-trats.dt.yaml: rtc@10070000: clocks: [[5, 346]] is too short
  arch/arm/boot/dts/exynos4210-trats.dt.yaml: rtc@10070000: clock-names: ['rtc'] is too short

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Tested-by: Marek Szyprowski <m.szyprowski@samsung.com>
Link: https://lore.kernel.org/r/20200830135200.24304-5-krzk@kernel.org
4 years agoARM: dts: exynos: Correct S3C RTC bindings and enable it in Origen
Krzysztof Kozlowski [Sun, 30 Aug 2020 13:51:31 +0000 (15:51 +0200)]
ARM: dts: exynos: Correct S3C RTC bindings and enable it in Origen

The S3C RTC requires 32768 Hz clock as input which is provided by PMIC
(Maxim MAX8997).  However there is no clock provided for the PMIC and
the driver registers the clock as regulator.  This is an old driver
which will not be updated so add a workaround:
1. Enable the "clock" regulator in PMIC,
2. Add a fixed-clock to fill missing clock phandle reference in S3C RTC.

This allows to enable the S3C RTC and fixes dtbs_check warnings:

  arch/arm/boot/dts/exynos4210-origen.dt.yaml: rtc@10070000: clocks: [[5, 346]] is too short
  arch/arm/boot/dts/exynos4210-origen.dt.yaml: rtc@10070000: clock-names: ['rtc'] is too short

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Tested-by: Marek Szyprowski <m.szyprowski@samsung.com>
Link: https://lore.kernel.org/r/20200830135200.24304-4-krzk@kernel.org
4 years agoARM: dts: exynos: Correct S3C RTC bindings and enable it in Galaxy I9100
Krzysztof Kozlowski [Sun, 30 Aug 2020 13:51:30 +0000 (15:51 +0200)]
ARM: dts: exynos: Correct S3C RTC bindings and enable it in Galaxy I9100

The S3C RTC requires 32768 Hz clock as input which is provided by PMIC
(Maxim MAX8997).  However there is no clock provided for the PMIC and
the driver registers the clock as regulator.  This is an old driver
which will not be updated so add a workaround:
1. Enable the "clock" regulator in PMIC,
2. Add a fixed-clock to fill missing clock phandle reference in S3C RTC.

This allows to enable the S3C RTC and fixes dtbs_check warnings:

  arch/arm/boot/dts/exynos4210-i9100.dt.yaml: rtc@10070000: clocks: [[5, 346]] is too short
  arch/arm/boot/dts/exynos4210-i9100.dt.yaml: rtc@10070000: clock-names: ['rtc'] is too short

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Link: https://lore.kernel.org/r/20200830135200.24304-3-krzk@kernel.org
4 years agoARM: dts: exynos: Correct GPU regulator properties in Galaxy I9100
Krzysztof Kozlowski [Sun, 30 Aug 2020 13:51:29 +0000 (15:51 +0200)]
ARM: dts: exynos: Correct GPU regulator properties in Galaxy I9100

The regulator property 'regulator-microvolt-offset' should be put next
to regulator definition, not consumer.

The property 'regulator-microsecs-delay' is not valid at all.

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Link: https://lore.kernel.org/r/20200830135200.24304-2-krzk@kernel.org
4 years agoARM: dts: exynos: Silence i2c-gpio dtschema warning in Galaxy I9100
Krzysztof Kozlowski [Sun, 30 Aug 2020 13:51:28 +0000 (15:51 +0200)]
ARM: dts: exynos: Silence i2c-gpio dtschema warning in Galaxy I9100

The name of I2C controller over GPIO lines node ends with '-gpio' which
confuses dtschema:

  /arch/arm/boot/dts/exynos4210-i9100.dt.yaml: /: i2c-gpio:
    {'compatible': ['i2c-gpio'], ...  'maxim,over-volt': [[4500]]}} is not of type 'array'
    From schema: lib/python3.6/site-packages/dtschema/schemas/gpio/gpio-consumer.yaml

Add a '-0' suffix to silence it.  This pattern on naming i2c-gpio is
already present in many other dts.  No functional change.

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Link: https://lore.kernel.org/r/20200830135200.24304-1-krzk@kernel.org
4 years agoARM: dts: exynos: Remove snps, dwc2 compatible in Exynos3250
Krzysztof Kozlowski [Sat, 29 Aug 2020 17:25:32 +0000 (19:25 +0200)]
ARM: dts: exynos: Remove snps, dwc2 compatible in Exynos3250

The binding for DesignWare HS OTG USB 2.0 in Samsung SoCs take only one
compatible.  This fixes dtbs_check warnings like:

  arch/arm/boot/dts/exynos3250-artik5-eval.dt.yaml: hsotg@12480000:
    compatible: ['samsung,s3c6400-hsotg', 'snps,dwc2'] is not valid under any of the given schemas (Possible causes of the failure):

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Link: https://lore.kernel.org/r/20200829172532.29358-4-krzk@kernel.org
4 years agoARM: dts: exynos: Move fixed clocks under root node in Exynos3250
Krzysztof Kozlowski [Sat, 29 Aug 2020 17:25:30 +0000 (19:25 +0200)]
ARM: dts: exynos: Move fixed clocks under root node in Exynos3250

The fixed clocks are kept under dedicated node fixed-rate-clocks, thus a
fake "reg" was added.  This is not correct with dtschema as fixed-clock
binding does not have a "reg" property:

  arch/arm/boot/dts/exynos3250-artik5-eval.dt.yaml: clock@0: 'reg' does not match any of the regexes: 'pinctrl-[0-9]+'

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Tested-by: Marek Szyprowski <m.szyprowski@samsung.com>
Link: https://lore.kernel.org/r/20200829172532.29358-2-krzk@kernel.org
4 years agoarm64: dts: exynos: Add compatibles to sysreg nodes
Krzysztof Kozlowski [Sat, 29 Aug 2020 14:24:59 +0000 (16:24 +0200)]
arm64: dts: exynos: Add compatibles to sysreg nodes

System register nodes, implementing syscon binding, should use
appropriate compatible.  This fixes dtbs_check warnings:

  arch/arm64/boot/dts/exynos/exynos5433-tm2.dt.yaml: syscon@13b80000:
    compatible: ['syscon'] is not valid under any of the given schemas

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Reviewed-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Link: https://lore.kernel.org/r/20200829142501.31478-8-krzk@kernel.org
4 years agoarm64: dts: exynos: Replace deprecated "gpios" i2c-gpio property in Exynos5433
Krzysztof Kozlowski [Sat, 29 Aug 2020 14:24:58 +0000 (16:24 +0200)]
arm64: dts: exynos: Replace deprecated "gpios" i2c-gpio property in Exynos5433

"gpios" property is deprecated.  Update the Exynos5433 DTS to fix
dtbs_checks warnings like:

  arch/arm64/boot/dts/exynos/exynos5433-tm2.dt.yaml: i2c-gpio-0: 'sda-gpios' is a required property
  arch/arm64/boot/dts/exynos/exynos5433-tm2.dt.yaml: i2c-gpio-0: 'scl-gpios' is a required property

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Tested-by: Marek Szyprowski <m.szyprowski@samsung.com>
Reviewed-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Link: https://lore.kernel.org/r/20200829142501.31478-7-krzk@kernel.org
4 years agoarm64: dts: renesas: r8a77961: Enable Sound / Audio-DMAC
Kuninori Morimoto [Thu, 27 Aug 2020 05:49:57 +0000 (14:49 +0900)]
arm64: dts: renesas: r8a77961: Enable Sound / Audio-DMAC

This patch enables Sound and Audio-DMAC for R-Car M3-W+ (R8A77961).
It is tested on R-Car M3-W+ Salvator-XS board.

Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Link: https://lore.kernel.org/r/87h7sovdvt.wl-kuninori.morimoto.gx@renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
4 years agoarm64: dts: renesas: r8a774e1: Add PWM device nodes
Marian-Cristian Rotariu [Tue, 25 Aug 2020 10:44:55 +0000 (11:44 +0100)]
arm64: dts: renesas: r8a774e1: Add PWM device nodes

This patch adds PWM[0123456] device nodes to the RZ/G2H (a.k.a R8A774E1)
device tree.

Signed-off-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@bp.renesas.com>
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/20200825104455.18000-3-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
4 years agoARM: dts: r8a7742-iwg21m: Add SPI NOR support
Lad Prabhakar [Tue, 25 Aug 2020 08:54:35 +0000 (09:54 +0100)]
ARM: dts: r8a7742-iwg21m: Add SPI NOR support

Add support for the SPI NOR device used to boot up the system
to the System on Module DT.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Chris Paterson <Chris.Paterson2@renesas.com>
Link: https://lore.kernel.org/r/20200825085435.8744-1-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
4 years agoarm64: dts: broadcom: Fix SP805 clock-names
Andre Przywara [Fri, 28 Aug 2020 13:05:55 +0000 (14:05 +0100)]
arm64: dts: broadcom: Fix SP805 clock-names

The SP805 binding sets the name for the actual watchdog clock to
"wdog_clk" (with an underscore).

Change the name in the DTs for Broadcom platforms to match that. The
Linux and U-Boot driver use the *first* clock for this purpose anyway,
so it does not break anything.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Ray Jui <ray.jui@broadcom.com>
Acked-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
4 years agoarm64: dts: broadcom: replace status value "ok" by "okay"
Adrian Schmutzler [Sun, 30 Aug 2020 20:03:33 +0000 (22:03 +0200)]
arm64: dts: broadcom: replace status value "ok" by "okay"

While the DT parser recognizes "ok" as a valid value for the
"status" property, it is actually mentioned nowhere. Use the
proper value "okay" instead, as done in the majority of files
already.

Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
4 years agoLinux 5.9-rc3
Linus Torvalds [Sun, 30 Aug 2020 23:01:54 +0000 (16:01 -0700)]
Linux 5.9-rc3

4 years agoMerge branch 'linus' of git://git.kernel.org/pub/scm/linux/kernel/git/herbert/crypto-2.6
Linus Torvalds [Sun, 30 Aug 2020 22:53:44 +0000 (15:53 -0700)]
Merge branch 'linus' of git://git./linux/kernel/git/herbert/crypto-2.6

Pull crypto fixes from Herbert Xu:

 - fix regression in af_alg that affects iwd

 - restore polling delay in qat

 - fix double free in ingenic on error path

 - fix potential build failure in sa2ul due to missing Kconfig dependency

* 'linus' of git://git.kernel.org/pub/scm/linux/kernel/git/herbert/crypto-2.6:
  crypto: af_alg - Work around empty control messages without MSG_MORE
  crypto: sa2ul - add Kconfig selects to fix build error
  crypto: ingenic - Drop kfree for memory allocated with devm_kzalloc
  crypto: qat - add delay before polling mailbox

4 years agoMerge tag 'x86-urgent-2020-08-30' of git://git.kernel.org/pub/scm/linux/kernel/git...
Linus Torvalds [Sun, 30 Aug 2020 19:01:23 +0000 (12:01 -0700)]
Merge tag 'x86-urgent-2020-08-30' of git://git./linux/kernel/git/tip/tip

Pull x86 fixes from Thomas Gleixner:
 "Three interrupt related fixes for X86:

   - Move disabling of the local APIC after invoking fixup_irqs() to
     ensure that interrupts which are incoming are noted in the IRR and
     not ignored.

   - Unbreak affinity setting.

     The rework of the entry code reused the regular exception entry
     code for device interrupts. The vector number is pushed into the
     errorcode slot on the stack which is then lifted into an argument
     and set to -1 because that's regs->orig_ax which is used in quite
     some places to check whether the entry came from a syscall.

     But it was overlooked that orig_ax is used in the affinity cleanup
     code to validate whether the interrupt has arrived on the new
     target. It turned out that this vector check is pointless because
     interrupts are never moved from one vector to another on the same
     CPU. That check is a historical leftover from the time where x86
     supported multi-CPU affinities, but not longer needed with the now
     strict single CPU affinity. Famous last words ...

   - Add a missing check for an empty cpumask into the matrix allocator.

     The affinity change added a warning to catch the case where an
     interrupt is moved on the same CPU to a different vector. This
     triggers because a condition with an empty cpumask returns an
     assignment from the allocator as the allocator uses for_each_cpu()
     without checking the cpumask for being empty. The historical
     inconsistent for_each_cpu() behaviour of ignoring the cpumask and
     unconditionally claiming that CPU0 is in the mask struck again.
     Sigh.

  plus a new entry into the MAINTAINER file for the HPE/UV platform"

* tag 'x86-urgent-2020-08-30' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
  genirq/matrix: Deal with the sillyness of for_each_cpu() on UP
  x86/irq: Unbreak interrupt affinity setting
  x86/hotplug: Silence APIC only after all interrupts are migrated
  MAINTAINERS: Add entry for HPE Superdome Flex (UV) maintainers

4 years agoMerge tag 'irq-urgent-2020-08-30' of git://git.kernel.org/pub/scm/linux/kernel/git...
Linus Torvalds [Sun, 30 Aug 2020 18:56:54 +0000 (11:56 -0700)]
Merge tag 'irq-urgent-2020-08-30' of git://git./linux/kernel/git/tip/tip

Pull irq fixes from Thomas Gleixner:
 "A set of fixes for interrupt chip drivers:

   - Revert the platform driver conversion of interrupt chip drivers as
     it turned out to create more problems than it solves.

   - Fix a trivial typo in the new module helpers which made probing
     reliably fail.

   - Small fixes in the STM32 and MIPS Ingenic drivers

   - The TI firmware rework which had badly managed dependencies and had
     to wait post rc1"

* tag 'irq-urgent-2020-08-30' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
  irqchip/ingenic: Leave parent IRQ unmasked on suspend
  irqchip/stm32-exti: Avoid losing interrupts due to clearing pending bits by mistake
  irqchip: Revert modular support for drivers using IRQCHIP_PLATFORM_DRIVER helperse
  irqchip: Fix probing deferal when using IRQCHIP_PLATFORM_DRIVER helpers
  arm64: dts: k3-am65: Update the RM resource types
  arm64: dts: k3-am65: ti-sci-inta/intr: Update to latest bindings
  arm64: dts: k3-j721e: ti-sci-inta/intr: Update to latest bindings
  irqchip/ti-sci-inta: Add support for INTA directly connecting to GIC
  irqchip/ti-sci-inta: Do not store TISCI device id in platform device id field
  dt-bindings: irqchip: Convert ti, sci-inta bindings to yaml
  dt-bindings: irqchip: ti, sci-inta: Update docs to support different parent.
  irqchip/ti-sci-intr: Add support for INTR being a parent to INTR
  dt-bindings: irqchip: Convert ti, sci-intr bindings to yaml
  dt-bindings: irqchip: ti, sci-intr: Update bindings to drop the usage of gic as parent
  firmware: ti_sci: Add support for getting resource with subtype
  firmware: ti_sci: Drop unused structure ti_sci_rm_type_map
  firmware: ti_sci: Drop the device id to resource type translation

4 years agoMerge tag 'sched-urgent-2020-08-30' of git://git.kernel.org/pub/scm/linux/kernel...
Linus Torvalds [Sun, 30 Aug 2020 18:50:53 +0000 (11:50 -0700)]
Merge tag 'sched-urgent-2020-08-30' of git://git./linux/kernel/git/tip/tip

Pull scheduler fix from Thomas Gleixner:
 "A single fix for the scheduler:

   - Make is_idle_task() __always_inline to prevent the compiler from
     putting it out of line into the wrong section because it's used
     inside noinstr sections"

* tag 'sched-urgent-2020-08-30' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
  sched: Use __always_inline on is_idle_task()

4 years agoMerge tag 'locking-urgent-2020-08-30' of git://git.kernel.org/pub/scm/linux/kernel...
Linus Torvalds [Sun, 30 Aug 2020 18:43:50 +0000 (11:43 -0700)]
Merge tag 'locking-urgent-2020-08-30' of git://git./linux/kernel/git/tip/tip

Pull locking fixes from Thomas Gleixner:
 "A set of fixes for lockdep, tracing and RCU:

   - Prevent recursion by using raw_cpu_* operations

   - Fixup the interrupt state in the cpu idle code to be consistent

   - Push rcu_idle_enter/exit() invocations deeper into the idle path so
     that the lock operations are inside the RCU watching sections

   - Move trace_cpu_idle() into generic code so it's called before RCU
     goes idle.

   - Handle raw_local_irq* vs. local_irq* operations correctly

   - Move the tracepoints out from under the lockdep recursion handling
     which turned out to be fragile and inconsistent"

* tag 'locking-urgent-2020-08-30' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
  lockdep,trace: Expose tracepoints
  lockdep: Only trace IRQ edges
  mips: Implement arch_irqs_disabled()
  arm64: Implement arch_irqs_disabled()
  nds32: Implement arch_irqs_disabled()
  locking/lockdep: Cleanup
  x86/entry: Remove unused THUNKs
  cpuidle: Move trace_cpu_idle() into generic code
  cpuidle: Make CPUIDLE_FLAG_TLB_FLUSHED generic
  sched,idle,rcu: Push rcu_idle deeper into the idle path
  cpuidle: Fixup IRQ state
  lockdep: Use raw_cpu_*() for per-cpu variables