Shaohui Xie [Mon, 27 Apr 2015 07:28:17 +0000 (15:28 +0800)]
powerpc/t4240qds: Update RCW, defconfig and maintainer
1. board/freescale/t4qds/t4_rcw.cfg
1.8GHz support is requested as default frequency, so update the rcw.
2. remove un-used configs
configs/T4160QDS_SPIFLASH_defconfig
configs/T4240QDS_SPIFLASH_defconfig
SPI boot is not available on T4QDS, so the configs should be removed.
3. board/freescale/t4qds/MAINTAINERS
Updated MAINTAINERS accordingly.
Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com>
[York Sun: revise subject]
Reviewed-by: York Sun <yorksun@freescale.com>
Shengzhou Liu [Wed, 22 Apr 2015 09:54:40 +0000 (17:54 +0800)]
t2080rdb/rcw: update ddr frequency from 1600MT/s to 1867MT/s
T2080RDB RevC uses new SODIMM 1867MT/s instead of previous 1600MT/s.
So update RCW to support new DDR frequency 1867MT/s by default.
Reserve the old 1600MT/s in comment for users in needed.
Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
Yangbo Lu [Wed, 22 Apr 2015 05:57:56 +0000 (13:57 +0800)]
powerpc/t2080qds: enable eSDHC peripheral clock support
Enable eSDHC peripheral clock support. u-boot and linux will
use SD clock generated by peripheral clock instead of platform
clock.
Signed-off-by: Yangbo Lu <yangbo.lu@freescale.com>
Cc: York Sun <yorksun@freescale.com>
Cc: Pantelis Antoniou <panto@antoniou-consulting.com>
Reviewed-by: York Sun <yorksun@freescale.com>
Yangbo Lu [Wed, 22 Apr 2015 05:57:40 +0000 (13:57 +0800)]
mmc: fsl_esdhc: Add peripheral clock support
The SD clock could be generated by platform clock or peripheral
clock for some platforms. This patch adds peripheral clock
support for T1024/T1040/T2080. To enable it, define
CONFIG_FSL_ESDHC_USE_PERIPHERAL_CLK.
Signed-off-by: Yangbo Lu <yangbo.lu@freescale.com>
Cc: York Sun <yorksun@freescale.com>
Cc: Pantelis Antoniou <panto@antoniou-consulting.com>
Reviewed-by: York Sun <yorksun@freescale.com>
Yangbo Lu [Wed, 22 Apr 2015 05:57:21 +0000 (13:57 +0800)]
powerpc/t2080qds: enable eSDHC adapter card type identification
Enable eSDHC adapter card type identification and this will do
some corresponding operations and set 'adapter-type' property
for device tree according SDHC Card ID.
Signed-off-by: Yangbo Lu <yangbo.lu@freescale.com>
Cc: York Sun <yorksun@freescale.com>
Cc: Pantelis Antoniou <panto@antoniou-consulting.com>
Reviewed-by: York Sun <yorksun@freescale.com>
Yangbo Lu [Wed, 22 Apr 2015 05:57:00 +0000 (13:57 +0800)]
mmc: fsl_esdhc: Add adapter card type identification support
Add adapter card type identification support by reading
FPGA STAT_PRES1 register SDHC Card ID[0:2] bits. To use this function,
define CONFIG_FSL_ESDHC_ADAPTER_IDENT.
Signed-off-by: Yangbo Lu <yangbo.lu@freescale.com>
Cc: York Sun <yorksun@freescale.com>
Cc: Pantelis Antoniou <panto@antoniou-consulting.com>
[York Sun: resolve conflicts in README.fsl-esdhc]
Reviewed-by: York Sun <yorksun@freescale.com>
Shengzhou Liu [Wed, 22 Apr 2015 02:59:50 +0000 (10:59 +0800)]
board/t2080rdb: reset cs4315 phy
CS4315 PHY doesn't support phy-reset by software, it
needs to reset it by hardware via CPLD control.
Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
Tang Yuantian [Mon, 20 Apr 2015 03:16:56 +0000 (11:16 +0800)]
fsl/deepsleep: avoid the DDR restore from being optimized out
Function dp_ddr_restore is to restore the first 128-byte space
of DDR. However those codes may be optimized out by compiler
since the destination address is at 0x0. In order to avoid
compiler optimization, we restore the space from high address,
which is not at 0x0, to low address.
Signed-off-by: Tang Yuantian <Yuantian.Tang@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
Scott Wood [Fri, 17 Apr 2015 23:10:06 +0000 (18:10 -0500)]
powerpc/mpc85xx: Don't deref NULL if qman portal lacks cell-index
Signed-off-by: Scott Wood <scottwood@freescale.com>
Cc: Madalin-Cristian Bucur <madalin.bucur@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
Shengzhou Liu [Tue, 14 Apr 2015 09:56:50 +0000 (17:56 +0800)]
board/t102x: use fdt_setprop_string instead of fdt_setprop
Use fdt_setprop_string instead of fdt_setprop to fix string length.
Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
Valentin Longchamp [Fri, 27 Mar 2015 15:07:32 +0000 (16:07 +0100)]
powerpc: add 2 common dcache assembly functions
This patch defines the 2 flush_dcache_range and invalidate_dcache_range
functions for all the powerpc architecture. Their implementation is
borrowed from the kernel's misc_32.S file and replace the ones from
mpc86xx and ppc4xx since they were equivalent.
This is a fix for the problem introduced by this patch:
http://patchwork.ozlabs.org/patch/448849/
Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: York Sun <yorksun@freescale.com>
Shengzhou Liu [Fri, 27 Mar 2015 07:48:34 +0000 (15:48 +0800)]
powerpc/t1023rdb: Add T1023 RDB board support
T1023RDB is a Freescale Reference Design Board that hosts the T1023 SoC.
T1023RDB board Overview
-----------------------
- T1023 SoC integrating two 64-bit e5500 cores up to 1.4GHz
- CoreNet fabric supporting coherent and noncoherent transactions with
prioritization and bandwidth allocation
- Memory: 2GB Micron MT40A512M8HX unbuffered 32-bit fixed DDR4 without ECC
- Accelerator: DPAA components consist of FMan, BMan, QMan, DCE and SEC
- Ethernet interfaces:
- one 1G RGMII port on-board(RTL8211F PHY)
- one 1G SGMII port on-board(RTL8211F PHY)
- one 2.5G SGMII port on-board(AQR105 PHY)
- PCIe: Two Mini-PCIe connectors on-board.
- SerDes: 4 lanes up to 10.3125GHz
- NOR: 128MB S29GL01GS110TFIV10 Spansion NOR Flash
- NAND: 512MB S34MS04G200BFI000 Spansion NAND Flash
- eSPI: 64MB S25FL512SAGMFI010 Spansion SPI flash.
- USB: one Type-A USB 2.0 port with internal PHY
- eSDHC: support SD/MMC card and eMMC on-board
- 256Kbit M24256 I2C EEPROM
- RTC: Real-time clock DS1339 on I2C bus
- UART: one serial port on-board with RJ45 connector
- Debugging: JTAG/COP for T1023 debugging
As well updated T1024RDB to add T1023RDB.
Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
[York Sun: fix defconfig files]
Reviewed-by: York Sun <yorksun@freescale.com>
Minghuan Lian [Fri, 27 Mar 2015 05:24:39 +0000 (13:24 +0800)]
fsl/pci: Set CFG_READY for PCIe v3.0 and later
Freescale PCIe controllers v3.0 and later need to set bit
CFG_READY to allow all inbound configuration transactions
to be processed normally when in EP mode. However, bit
CFG_READY has been moved from PCIe configuration space to
CCSR PCIe configuration register comparing previous version.
The patch is to set this bit according to PCIe version.
Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
Signed-off-by: Minghuan Lian <Minghuan.Lian@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
Zhao Qiang [Thu, 26 Mar 2015 08:13:09 +0000 (16:13 +0800)]
T2080QDS/PCIe: Soft Reset PCIe on T2080QDS for down-training issue
T2080QDS PEX1/Slot#1 will down-train from x4 to x2,
with SRDS_PRTCL_S1 = 0x66 and SRDS_PRTCL_S2 = 0x15.
Soft reset PCIe can fix this issue.
Signed-off-by: Zhao Qiang <B45475@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
Chunhe Lan [Fri, 20 Mar 2015 09:08:54 +0000 (17:08 +0800)]
powerpc/t4rdb: Add SD boot support for T4240RDB board
This patch adds SD boot support for T4240RDB board. SPL
framework is used. PBL initializes the internal RAM and
copies SPL to it. Then SPL initializes DDR using SPD and
copies u-boot from SD card to DDR, finally SPL transfers
control to u-boot.
Signed-off-by: Chunhe Lan <Chunhe.Lan@freescale.com>
[York Sun: Fix T4240RDB_SDCARD_defcofig]
Reviewed-by: York Sun <yorksun@freescale.com>
Nikhil Badola [Fri, 21 Nov 2014 11:55:21 +0000 (17:25 +0530)]
drivers: usb: fsl: Workaround for Erratum A004477
Add a delay of 1 microsecond before issuing soft reset to the
controller to let ongoing ULPI transaction complete.
This prevents corruption of ULPI Function Control Register which
eventually prevents phy clock from entering to low power mode
Signed-off-by: Nikhil Badola <nikhil.badola@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
York Sun [Tue, 21 Apr 2015 17:09:52 +0000 (10:09 -0700)]
mpc85xx/T4240EMU: Remove T4240EMU board
T4240 SoC has been available for a long time. Emulator support
is no longer needed.
Signed-off-by: York Sun <yorksun@freescale.com>
Scott Wood [Fri, 24 Apr 2015 01:01:56 +0000 (20:01 -0500)]
powerpc/mpc85xx: Use GOT when loading IVORs post-relocation
Commit
96d2bb952bb ("powerpc/mpc85xx: Don't relocate exception vectors")
simplified IVOR initialization a bit too much, failing to use the
post-relocation offset. This doesn't cause a problem with normal NOR
boot, in which both the pre-relocation and post-relocation addresses
are 64 KiB aligned. However, if TEXT_BASE is only 4 KiB aligned, such
as for NAND/SD/etc. boot on some targets, as well as the QEMU target,
the post-relocation address will not be the same in the lower 16 bits,
as reserve_uboot() ensures that the relocation address is always 64
KiB aligned even if the pre-relocation address was not.
Use the GOT to get the proper post-relocation offsets.
Fixes:
96d2bb952bb ("powerpc/mpc85xx: Don't relocate exception vectors")
Signed-off-by: Scott Wood <scottwood@freescale.com>
Cc: Alexander Graf <agraf@suse.de>
Cc: Shaohui Xie <Shaohui.Xie@freescale.com>
Tested-by: Shaohui Xie <Shaohui.Xie@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
Tom Rini [Wed, 29 Apr 2015 10:46:33 +0000 (06:46 -0400)]
Merge branch 'zynq' of git://denx.de/git/u-boot-microblaze
Tom Rini [Wed, 29 Apr 2015 10:46:03 +0000 (06:46 -0400)]
Merge branch 'master' of git://denx.de/git/u-boot-microblaze
Masahiro Yamada [Mon, 16 Mar 2015 07:43:24 +0000 (16:43 +0900)]
ARM: zynq: rename CONFIG_ZYNQ to CONFIG_ARCH_ZYNQ
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Masahiro Yamada [Mon, 16 Mar 2015 07:43:23 +0000 (16:43 +0900)]
ARM: zynq: move SoC headers to mach-zynq/include/mach
Move arch/arm/include/asm/arch-zynq/*
-> arch/arm/mach-zynq/include/mach/*
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Masahiro Yamada [Mon, 16 Mar 2015 07:43:22 +0000 (16:43 +0900)]
ARM: zynq: move SoC sources to mach-zynq
Move arch/arm/cpu/armv7/zynq/* -> arch/arm/mach-zynq/*
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Masahiro Yamada [Mon, 16 Mar 2015 07:43:21 +0000 (16:43 +0900)]
ARM: zynq: pass "-mfpu=neon" only to lowlevel_init.S
The comment line in arch/arm/cpu/armv7/zynq/config.mk says that
the option "-mfpu=neon" is necessary for compiling lowlevel_init.S.
We do not have to give it to all the source files.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Wed, 15 Apr 2015 13:21:37 +0000 (15:21 +0200)]
zynqmp: Enable SDHCI0 options
Enable SDHCI0 for zynqmp.
Add empty gpio.h because of sdhci requirement.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Siva Durga Prasad Paladugu [Fri, 13 Mar 2015 12:13:49 +0000 (17:43 +0530)]
zynqmp: Enable FS_GENERIC option
Provide an option to write filesystem independend commands.
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Siva Durga Prasad Paladugu [Wed, 15 Apr 2015 06:18:48 +0000 (11:48 +0530)]
zynqmp: Add SPI driver support for ZynqMP
Added the SPI driver support for ZynqMP
The controller is same as zynq SPI controller
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
Siva Durga Prasad Paladugu [Tue, 3 Mar 2015 09:31:44 +0000 (15:01 +0530)]
zynqmp: i2c: Enable i2c driver for zynqMP
Enable the i2c driver for ZynqMP
Also enable the eeprom for read and writes
to eeprom on ZynqMP
ZynqMP uses the same i2c controller as in Zynq
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Wed, 15 Apr 2015 13:02:28 +0000 (15:02 +0200)]
zynqmp: Add support for EMMC bootmode
Add support for EMMC bootmode.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Wed, 15 Apr 2015 12:59:19 +0000 (14:59 +0200)]
zynqmp: Add support for emulation platform - Veloce
Add support for Veloce - zynqmp emulation platform.
Platform doesn't support SDHCI.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Siva Durga Prasad Paladugu [Mon, 13 Apr 2015 05:27:04 +0000 (10:57 +0530)]
zynq: timer: Fix wrong timer calculation
Fix wrong timer calculation in get_timer_masked incase of
overflow.
This fixes the issue of getting wrong time from get_timer()
calls.
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Siva Durga Prasad Paladugu [Tue, 8 Jul 2014 10:01:04 +0000 (15:31 +0530)]
zynqmp: sdhci: Remove the quirk SDHCI_QUIRK_NO_CD
Remove the quirk SDHCI_QUIRK_NO_CD as it is not
required.
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Wed, 15 Apr 2015 11:36:40 +0000 (13:36 +0200)]
zynqmp: Add support for R5 sw loading
Add support for loading sw for R5 with enabling for zynqmp.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Siva Durga Prasad Paladugu [Sat, 6 Dec 2014 07:27:51 +0000 (12:57 +0530)]
zynqmp: caches: Enable dcache for zynqmp
Define the mmu table till 2MB granularity
enable dcaches for zynqmp.
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Siva Durga Prasad Paladugu [Mon, 2 Mar 2015 10:33:46 +0000 (16:03 +0530)]
zynq: slcr: Disable all level shifters
Disable all level shifters before enabling
the PS-to-PL level shifters as it would
be good to disable all level shifters before
enabling the PS-to-PL in order to ensure that
it is in proper state
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Masahiro Yamada [Tue, 14 Apr 2015 07:50:50 +0000 (16:50 +0900)]
ARM: zynq: drop legacy ps7_init.c/h support
We are about to change the location for ps7_init files, breaking the
current work-flows. It is good time to drop the legacy ps7_init.c/h
support.
Going forward, please use ps7_init_gpl.c/h all the time.
If you are still using old Xilinx tools that are only able to
generate ps7_init.c/h, rename them into ps7_init_gpl.c/h.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Suggested-by: Sören Brinkmann <soren.brinkmann@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Nathan Rossi [Tue, 14 Apr 2015 04:58:10 +0000 (14:58 +1000)]
zynq: Add Zynq PicoZed board support
The PicoZed is a System-on-Module board which is marketed as part of
the ZedBoard/MicroZed/etc. collection. It includes a Zynq-7000
processor.
This patch adds support that covers all the variants of the PicoZed
including the SKUs with Z7010/Z7020 and Z7015/Z7030 Zynq chips. This
patch set however only covers support for the System-on-Module and does
not cover any extra components that are available on carrier boards
(except those that are fanned out of the module itself).
More information on this board, its variants and available carrier
boards is available at: http://zedboard.org/product/picozed
Signed-off-by: Nathan Rossi <nathan.rossi@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Wed, 15 Apr 2015 11:05:06 +0000 (13:05 +0200)]
serial: zynq: Add support for slow emulation platform
On slow platforms not all baudrate setting is valid.
Check it directly in the driver and setup maximum possible
frequency.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Wed, 25 Mar 2015 12:35:04 +0000 (13:35 +0100)]
zynq: Enable GPIO driver and GPIO commands
Enable GPIO driver and GPIO commands.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Andrea Scian [Fri, 20 Mar 2015 15:00:25 +0000 (16:00 +0100)]
gpio: add Xilinx Zynq PS GPIO driver
Most of the code is taken (and adapted) from Linux kernel driver.
Just add CONFIG_ZYNQ_GPIO to you config to enable it
Signed-off-by: Andrea Scian <andrea.scian@dave.eu>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Nathan Rossi [Tue, 14 Apr 2015 06:16:39 +0000 (16:16 +1000)]
microblaze: Fix EMAC Lite initialization
It is possible for CONFIG_XILINX_EMACLITE to be defined without
XILINX_EMACLITE_BASEADDR being defined as the EMAC Lite driver support
OF init. Check that the driver is enabled and the base address is
available before initializing with a static base address.
Signed-off-by: Nathan Rossi <nathan.rossi@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Tom Rini [Wed, 29 Apr 2015 00:48:43 +0000 (20:48 -0400)]
Merge branch 'master' of git://denx.de/git/u-boot-socfpga
Tom Rini [Tue, 28 Apr 2015 23:37:20 +0000 (19:37 -0400)]
Merge branch 'master' of git://denx.de/git/u-boot-dm
Simon Glass [Sat, 25 Apr 2015 04:33:07 +0000 (22:33 -0600)]
dm: core: Correct bug introduced in uclass_first/next_device()
These functions now rely on uclass_find_first/next_device() and assume that
they will either return failure (-ve error code) or a device. In fact,
coming to the end of a list is not considered failure and they return 0
in that case.
The logic to deal with this was replaced in commit
acb9ca2a with just using
uclass_get_device_tail(). Add back the missing logic. This bug was
caught by unit tests but since they were broken for other reasons at the
time, this was not noticed.
Signed-off-by: Simon Glass <sjg@chromium.org>
Axel Lin [Sat, 25 Apr 2015 02:53:14 +0000 (10:53 +0800)]
serial: ns16550: Remove hard-coded baud_divisor setting
This was accidentally added by commit
dd0b0122bacc
"serial: ns16550: Add an option to specify the debug UART register shift".
Remove it.
Signed-off-by: Axel Lin <axel.lin@ingics.com>
Acked-by: Simon Glass <sjg@chromium.org>
Masahiro Yamada [Fri, 24 Apr 2015 08:28:40 +0000 (17:28 +0900)]
dm: core: drop device removal error path correctly
Trivial bug fix for commit
5a87c4174d18 (dm: core: Drop device
removal error path when not supported).
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Simon Glass <sjg@chromium.org>
Tom Rini [Tue, 28 Apr 2015 16:15:13 +0000 (12:15 -0400)]
Merge branch 'master' of git://denx.de/git/u-boot-imx
Tom Rini [Tue, 28 Apr 2015 11:28:43 +0000 (07:28 -0400)]
Merge branch 'master' of git://git.denx.de/u-boot-spi
Jagannadha Sutradharudu Teki [Mon, 27 Apr 2015 15:34:15 +0000 (21:04 +0530)]
sf: Fix to compute proper sector_size
Upto now flash sector_size is assigned from params which isn't
necessarily a sector size from vendor, so based on the SECT_*
flags from flash_params the erase_size will compute and it will
become the sector_size finally.
Bug report (from Bin Meng):
=> sf probe
SF: Detected SST25VF016B with page size 256 Bytes, erase size 4 KiB,
total 2 MiB, mapped at
ffe00000
=> sf erase 0 +100
SF: 65536 bytes @ 0x0 Erased: OK
Signed-off-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
Reported-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Bin Meng [Fri, 24 Apr 2015 11:51:10 +0000 (19:51 +0800)]
dm: sf: Make SST flash write op work again
With SPI flash moving to driver model, commit fbb0991 "dm: Convert
spi_flash_probe() and 'sf probe' to use driver model" ignored the
SST flash-specific write op (byte program & word program), which
actually broke the SST flash from wroking.
This commit makes SST flash work again under driver model, by adding
SST flash-specific handling in the spi_flash_std_write().
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
Bin Meng [Tue, 28 Apr 2015 07:59:54 +0000 (13:29 +0530)]
dm: sf: Save flash flags to struct spi_flash
Add a new member 'flags' in struct spi_flash to store the flash flags
during spi_flash_validate_params().
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
David Dueck [Wed, 1 Apr 2015 12:20:24 +0000 (14:20 +0200)]
spi: omap3: Fix timeout handling
The timeout value is never reset during the transfer. This means that when
transferring more data we eventually trigger the timeout.
This was reported on the mailing list:
"Spansion SPI flash read timeout with AM335x"
Signed-off-by: David Dueck <davidcdueck@googlemail.com>
CC: Tom Rini <trini@konsulko.com>
CC: Stefan Roese <sr@denx.de>
CC: Andy Pont <andy.pont@sdcsystems.com>
Tested-by: David Dueck <davidcdueck@googlemail.com>
Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
Fabio Estevam [Sat, 25 Apr 2015 21:47:21 +0000 (18:47 -0300)]
mx6cuboxi: Load the correct 'fdtfile' variable
Instead of hardcoding the 'fdtfile' variable, let's detect the SoC and
board variant on the fly and change the dtb name.
Based on the scheme done on am335x board.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Tested-By: Vagrant Cascadian <vagrant@debian.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Fabio Estevam [Sat, 25 Apr 2015 21:47:20 +0000 (18:47 -0300)]
mx6cuboxi: Use more standard namings for fdt variables
README file suggests to use 'fdtfile' for the dtb file name and
'fdt_addr_r' for the dtb address in RAM, so do as suggested.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Fabio Estevam [Sat, 25 Apr 2015 21:47:19 +0000 (18:47 -0300)]
mx6cuboxi: Differentiate Cubox-i and Hummingboard
Introduce is_hummingboard() function that reads GPIOs that can distinguish
between Cubox-i and Hummingboard.
Print the board name accordingly.
Based on a patch from Rabeeh Khoury.
Signed-off-by: Rabeeh Khoury <rabeeh@solid-run.com>
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Fabio Estevam [Sat, 25 Apr 2015 21:47:18 +0000 (18:47 -0300)]
mx6cuboxi: Introduce multi-SoC support
Cubox-i and Hummingboard support several MX6 SoCs: mx6solo, mx6dual-lite,
mx6dual and mx6quad. Add support for the different SoC/memory sizes
combinations.
DDR initialization values were extracted from Solid-run internal U-boot.
Tested on a CuBox-i4Pro, HummingBoard-i2eX and HummingBoard-i1.
Signed-off-by: Rabeeh Khoury <rabeeh@solid-run.com>
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Fabio Estevam [Sat, 25 Apr 2015 21:47:17 +0000 (18:47 -0300)]
mx6cuboxi: Prepare for multi SoC support
Cubox-i and Hummingboard support several MX6 SoCs: mx6solo, mx6dual-lite,
mx6dual and mx6quad.
Use IOMUX_PADS() macro in order to prepare for the multi-SoC support.
Also pass 'MX6QDL' in the defconfig to indicate it.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Fabio Estevam [Sat, 25 Apr 2015 21:47:16 +0000 (18:47 -0300)]
mx6cuboxi: Fix the defconfig name
The correct name of the defconfig file is 'mx6cuboxi_defconfig'.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Pavel Machek [Sat, 25 Apr 2015 19:36:16 +0000 (21:36 +0200)]
socfpga: implement arria V socdk SPI flash config in dts
Arria V SocDK has same QSPI and SPI flash configuration as Socrates. Add
support for it.
Signed-off-by: Pavel Machek <pavel@denx.de>
Tom Rini [Fri, 24 Apr 2015 19:07:19 +0000 (15:07 -0400)]
Merge branch 'master' of git://git.denx.de/u-boot-fdt
Tom Rini [Fri, 24 Apr 2015 17:44:28 +0000 (13:44 -0400)]
Merge branch 'master' of git://git.denx.de/u-boot-mips
Tom Rini [Fri, 24 Apr 2015 17:43:24 +0000 (13:43 -0400)]
Merge branch 'master' of git://git.denx.de/u-boot-fsl-qoriq
Daniel Schwierzeck [Sun, 22 Feb 2015 15:58:30 +0000 (16:58 +0100)]
MIPS: implement device-tree handover to Linux kernel
Add device-tree handover to Linux kernel conforming with MIPS UHI [1].
Register $a0 will be set to the reserved value -2. The address of
the device-tree blob will be stored as KSEG0 address in $a1. $a2 and
$a3 are set to zero.
[1] http://prplfoundation.org/wiki/MIPS_documentation
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Hans de Goede [Mon, 20 Apr 2015 09:13:37 +0000 (11:13 +0200)]
fdt: Fix handling of paths with options in them
After syncing the sunxi dts files with the upstream kernel dm/fdt sunxi
builds would no longer boot.
The problem is that stdout-path is now set like this in the upstream dts
files: stdout-path = "serial0:115200n8". The use of options in of-paths,
either after an alias name, or after a full path, e.g. stdout-path =
"/soc@
01c00000/serial@
01c28000:115200", is standard of usage, but something
which the u-boot dts code so far did not handle.
This commit fixes this, adding support for both path formats.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Simon Glass <sjg@chromium.org>
Pavel Machek [Thu, 23 Apr 2015 07:14:01 +0000 (09:14 +0200)]
socfpga: implement socdk SPI flash config in dts
SocDK has same QSPI and SPI flash configuration as Socrates. Add
support for it.
Signed-off-by: Pavel Machek <pavel@denx.de>
York Sun [Mon, 23 Mar 2015 17:41:35 +0000 (10:41 -0700)]
armv8/fsl-lsch3: Implement workaround for I2C erratum A009203
This erratum requires setting GLITCH_EN bit in debug register to
enable digital filter to improve clock stability.
Signed-off-by: York Sun <yorksun@freescale.com>
CC: Heiko Schocher <hs@denx.de>
Yangbo Lu [Sat, 21 Mar 2015 02:28:31 +0000 (19:28 -0700)]
ls2085a: esdhc: Add esdhc support for ls2085a
This patch adds esdhc support for ls2085a.
Signed-off-by: Yangbo Lu <yangbo.lu@freescale.com>
Signed-off-by: York Sun <yorksun@freescale.com>
Scott Wood [Tue, 24 Mar 2015 20:25:03 +0000 (13:25 -0700)]
armv8/ls2085ardb: Enable NAND SPL support
Enable NAND boot support using SPL framework. To boot from
NAND, either use DIP switches on board, or "qixis_reset nand"
command. Details of forming NAND image can be found in README.
Signed-off-by: Scott Wood <scottwood@freescale.com>
[York Sun: Remove +S from defconfig after commit
252ed872]
Signed-off-by: York Sun <yorksun@freescale.com>
Scott Wood [Sat, 21 Mar 2015 02:28:29 +0000 (19:28 -0700)]
freescale/qixis: Add support for booting from NAND
Use "qixis_reset nand" to reset the board to boot from NAND.
Signed-off-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: York Sun <yorksun@freescale.com>
Scott Wood [Tue, 24 Mar 2015 20:25:02 +0000 (13:25 -0700)]
armv8/ls2085aqds: NAND boot support
This adds NAND boot support for LS2085AQDS, using SPL framework.
Details of forming NAND image can be found in README.
Signed-off-by: Scott Wood <scottwood@freescale.com>
[York Sun: Remove +S from defconfig after commit
252ed872]
Signed-off-by: York Sun <yorksun@freescale.com>
Jaiprakash Singh [Sat, 21 Mar 2015 02:28:27 +0000 (19:28 -0700)]
driver/ifc: Add 64KB page support
IFC has two register pages.Till IFC version 1.4 each
register page is 4KB each.But IFC ver 2.0 register page
size is 64KB each.IFC regiters structure is break into
two viz FCM and RUNTIME.FCM(Flash control machine) registers
are defined in PAGE0 and controls IFC generic functionality.
RUNTIME registers are defined in PAGE1 and controls NAND and
GPCM funcinality.
FCM and RUNTIME structures defination is common for IFC
version 1.4 and 2.0.
Signed-off-by: Jaiprakash Singh <b44839@freescale.com>
Signed-off-by: York Sun <yorksun@freescale.com>
Prabhakar Kushwaha [Sat, 21 Mar 2015 02:28:26 +0000 (19:28 -0700)]
board/ls2085qds: Add support ethernet
Add support of ethernet:
- eth.c: mapping lane to slot for (0x2A, 0x07)
- ls2085a.c: To enable/disable dpmac and get link type
Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Signed-off-by: York Sun <yorksun@freescale.com>
Tom Rini [Thu, 23 Apr 2015 18:56:47 +0000 (14:56 -0400)]
Merge branch 'buildman' of git://git.denx.de/u-boot-x86
Tom Rini [Thu, 23 Apr 2015 17:53:09 +0000 (13:53 -0400)]
Merge branch 'master' of git://git.denx.de/u-boot-dm
Sanchayan Maity [Fri, 17 Apr 2015 13:26:42 +0000 (18:56 +0530)]
colibri_vf: Enable USB support for Colibri Vybrid
Enable USB support on Toradex Colibri Vybrid Modules.
Signed-off-by: Sanchayan Maity <maitysanchayan@gmail.com>
Acked-by: Marek Vasut <marex@denx.de>
Sanchayan Maity [Wed, 15 Apr 2015 10:54:27 +0000 (16:24 +0530)]
usb: host: Add ehci-vf USB driver for ARM Vybrid SoC's
This driver adds support for the USB peripheral on Freescale Vybrid
SoC's.
Signed-off-by: Sanchayan Maity <maitysanchayan@gmail.com>
Sanchayan Maity [Wed, 15 Apr 2015 10:54:26 +0000 (16:24 +0530)]
ARM: vf610: Initial integration for Colibri VF50/VF61
This adds initial support for Colibri VF50/VF61 based on Freescale
Vybrid SoC.
- CPU clocked at 396/500 MHz
- DDR3 at 396MHz
- for VF50, use PLL2 as memory clock (synchronous mode)
- for VF61, use PLL1 as memory clock (asynchronous mode)
- Console on UART0 (Colibri UART_A)
- Ethernet on FEC1
- PLL5 based RMII clocking (E.g. No external crystal)
- UART_A and UART_C I/O muxing
- Boot from NAND by default
Tested on Colibri VF50/VF61 booting using serial loader over UART.
Signed-off-by: Sanchayan Maity <maitysanchayan@gmail.com>
Acked-by: Stefan Agner <stefan@agner.ch>
Stefan Agner [Wed, 15 Apr 2015 10:54:25 +0000 (16:24 +0530)]
ARM: vf610: Enable caches
Enables caches which provides a rather huge speedup of the boot loader.
Also mark the on-chip RAM as cachable since this is the area U-Boot runs
from.
Signed-off-by: Sanchayan Maity <maitysanchayan@gmail.com>
Sanchayan Maity [Wed, 15 Apr 2015 10:54:24 +0000 (16:24 +0530)]
ARM: vf610: Add SoC and CPU type detection
Vybrid product family consists of several rather similar SoC which
can be determined by softare during boot time. This allows use of
variable ${soc} for Linux device tree files. Detect VF5xx CPU's by
reading the CPU count register. We can determine the second number
of the CPU type (VF6x0) which indicates the presence of a L2 cache.
Signed-off-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Sanchayan Maity <maitysanchayan@gmail.com>
Stefan Agner [Wed, 15 Apr 2015 10:54:23 +0000 (16:24 +0530)]
ARM: vf610: Enable external 32KHz oscillator
Enable the SCSC (Slow Clock Source Controller) and select the external
32KHz oscillator. This improves the accuracy of the RTC.
Signed-off-by: Sanchayan Maity <maitysanchayan@gmail.com>
Sanchayan Maity [Wed, 15 Apr 2015 10:54:22 +0000 (16:24 +0530)]
ARM: vf610: Move DDR3 initialization to imx-common
In order to avoid code duplication, move the DDR3 initialization to the
common place under imx-common. Currently ROW_DIFF and COL_DIFF can be
chosen from the board file. The JEDEC timings are specified using a
common ddr3_jedec_timings structure.
Signed-off-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Sanchayan Maity <maitysanchayan@gmail.com>
Heiko Schocher [Sun, 12 Apr 2015 08:18:09 +0000 (10:18 +0200)]
cmd, nand: add more info to "nand info"
add subpagesize, nand options and bbt options to the
"nand info" output.
=> nand info
Device 0: nand0, sector size 256 KiB
Page size 4096 b
OOB size 256 b
Erase size 262144 b
subpagesize 4096 b
options 0x 200
bbt options 0x 8000
Signed-off-by: Heiko Schocher <hs@denx.de>
Marek Vasut [Thu, 9 Apr 2015 23:11:54 +0000 (01:11 +0200)]
rtc: Set valid date after reset
Some RTC chips tend to set garbage date after reset.
This patch sets the date to 2000-01-01 00:00 immediatelly
after the RTC chip reset is issued using the "date reset"
command.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Heiko Schocher <hs@denx.de>
Cc: Tom Rini <trini@konsulko.com>
Bryan De Faria [Thu, 2 Apr 2015 08:57:07 +0000 (10:57 +0200)]
arm: am437x: mux: Update mux names
Correct and complete the mux names following AM437x Technical Reference Manual.
Signed-off-by: Bryan De Faria <bdefaria-ext@adeneo-embedded.com>
angelo@sysam.it [Sun, 29 Mar 2015 20:54:16 +0000 (22:54 +0200)]
m68k: add architecture-specific u-boot.lds
Add architecture-specific u-boot.lds and remove all board-specific
u-boot.lds.
All the .text customization that was board-specific have been
moved inside the related include/configs, inside a
LDS_BOARD_TEXT define.
Signed-off-by: Angelo Dureghello <angelo@sysam.it>
Dileep Katta [Fri, 27 Mar 2015 17:36:57 +0000 (23:06 +0530)]
fastboot: ARM: OMAP5: Enable reboot-bootloader
Implemented fb_set_reboot_flag() for OMAP5 to set
an environment variable 'dofastboot' when reboot-bootloader called.
This environment variable will be checked in boot command and fastboot
will be called if the variable is set.
If the bootcmd env variable of OMAP5 common is overwritten with board-specific
command, then these changes will not apply.
This was originally intended for DRA7 platform, but now applies to all OMAP5.
Ref:
http://git.omapzoom.org/?p=repo/u-boot.git;a=commit;h=
19da2e436e9806259cf1f4988b9e046ab256bf2c
Signed-off-by: Angela Stegmaier <angelabaker@ti.com>
Signed-off-by: Dileep Katta <dileep.katta@linaro.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
[trini: Make it check for !CONFIG_ENV_IS_NOWHERE as we can't saveenv()
in that case]
Signed-off-by: Tom Rini <trini@konsulko.com>
Wu, Josh [Wed, 15 Apr 2015 02:25:18 +0000 (10:25 +0800)]
patman: check git format.subjectprefix setting when generate patches prefix
For the local project, we may specified format.subjectprefix setting.
Then the patch will be formated as [Project_prefix][PATCH].
But patman will not check this setting. It will remove the
format.subjectprefix.
So This patch will let patman check this setting and add it as a
project prefix.
Signed-off-by: Josh Wu <josh.wu@atmel.com>
Acked-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
Michal Simek [Mon, 20 Apr 2015 09:46:24 +0000 (11:46 +0200)]
buildman: Add gcc 4.9.0 with Microblaze toolchain
Also read gcc 4.9.0 at kernel.org which also have Microblaze toolchain.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Acked-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
Fixed unit test failure by updating the test:
Signed-off-by: Simon Glass <sjg@chromium.org>
Dileep Katta [Tue, 24 Mar 2015 22:34:51 +0000 (04:04 +0530)]
ARM: DRA7: Set serial number environment variable
This patch populates serial number environment variable from
die_id_0 and die_id_1 register values for DRA7xx boards.
The function is added in omap common code so that this can be re-used.
Serial# environment variable will be useful to show correct
information in "fastboot devices" commands.
Ref:
http://git.omapzoom.org/?p=repo/u-boot.git;a=commit;h=
a6bcaaf67f6e4bcd97808f53d0ceb4b0c04d583c
Signed-off-by: Angela Stegmaier <angelabaker@ti.com>
Signed-off-by: Dileep Katta <dileep.katta@linaro.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Dileep Katta [Tue, 24 Mar 2015 22:34:50 +0000 (04:04 +0530)]
ARM: DRA7XX: Enable Fastboot
- Fastboot is enable by default for DRA7XX
- This is based on following patch modified accordingly
http://git.omapzoom.org/?p=repo/u-boot.git;a=commit;h=
b2e04f92b5d91c708b6fd6b79d2266966ac51f4b
Signed-off-by: Angela Stegmaier <angelabaker@ti.com>
Signed-off-by: Dileep Katta <dileep.katta@linaro.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Zhou Zhu [Mon, 23 Mar 2015 22:57:01 +0000 (17:57 -0500)]
mvgpio: remove CONFIG_SHEEVA_88SV331xV5 dependency
The Marvell GPIO driver can be used on Marvell platforms other than
Sheeva, so remove the ifdef to enable it for others.
Signed-off-by: Rob Herring <robh@kernel.org>
Xiang Wang [Mon, 23 Mar 2015 22:56:58 +0000 (17:56 -0500)]
gpio: mvmfp: support newer MFP bit definitions
1. The bits 11..10 for mfp driver strength is only valid for
aspen and old xscale family, for newer Marvell chip, this range
has been moved to 12..11.
2. add sleep bit support
Signed-off-by: Xiang Wang <wangx@marvell.com>
[robh: rebase to current mainline]
Signed-off-by: Rob Herring <robh@kernel.org>
Peter Howard [Sun, 22 Mar 2015 22:19:56 +0000 (09:19 +1100)]
davinci: add support for omapl138-lcdk board
Signed-off-by: Peter Howard <phoward@gme.net.au>
[trini: Add config file, update for ..._ether_addr() -> ..._ethaddr() rename]
Signed-off-by: Tom Rini <trini@konsulko.com>
York Sun [Sat, 21 Mar 2015 02:28:24 +0000 (19:28 -0700)]
armv8/ls2085ardb: Add support of LS2085ARDB platform
The LS2085ARDB is a evaluation platform that supports LS2085A
family SoCs. This patch add sbasic support for the platform.
Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Signed-off-by: Bhupesh Sharma <bhupesh.sharma@freescale.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
York Sun [Sat, 21 Mar 2015 02:28:23 +0000 (19:28 -0700)]
armv8/ls2085aqds: Add support of LS2085AQDS platform
The LS2085AQDS is an evaluatoin platform that supports the LS2085A
family SoCs. This patch add basic support of the platform.
Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Signed-off-by: Bhupesh Sharma <bhupesh.sharma@freescale.com>
Prabhakar Kushwaha [Sat, 21 Mar 2015 02:28:22 +0000 (19:28 -0700)]
driver/ldpaa: Add support of WRIOP static data structure
Wire rate IO Processor (WRIOP) provide support of receive and transmit
ethernet frames from the ethernet MAC. Here Each WRIOP block supports
upto 64 DPMACs.
Create a house keeping data structure to support upto 16 DPMACs and
store external phy related information.
Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Signed-off-by: York Sun <yorksun@freescale.com>
Bhupesh Sharma [Sat, 21 Mar 2015 02:28:20 +0000 (19:28 -0700)]
armv8/fsl-ch3: Add support to print RCW configuration
This patch adds support to print out the Reset Configuration Word
information.
Signed-off-by: Bhupesh Sharma <bhupesh.sharma@freescale.com>
Signed-off-by: York Sun <yorksun@freescale.com>
Shaohui Xie [Sat, 21 Mar 2015 02:28:19 +0000 (19:28 -0700)]
net/memac_phy: reuse driver for little endian SoCs
The memac for PHY management on little endian SoCs is similar on big
endian SoCs, so we modify the driver by using I/O accessor function to
handle the endianness, so the driver can be reused on little endian
SoCs, we introduce CONFIG_SYS_MEMAC_LITTLE_ENDIAN for little endian
SoCs, if the CONFIG_SYS_MEMAC_LITTLE_ENDIAN is defined, the I/O access
is little endian, if not, the I/O access is big endian. Move fsl_memac.h
out of powerpc include.
Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com>
Signed-off-by: York Sun <yorksun@freescale.com>
J. German Rivera [Sat, 21 Mar 2015 02:28:18 +0000 (19:28 -0700)]
drivers/fsl-mc: Changed MC firmware loading for new boot architecture
Changed MC firmware loading to comply with the new MC boot architecture.
Flush D-cache hierarchy after loading MC images. Add environment
variables "mcboottimeout" for MC boot timeout in milliseconds,
"mcmemsize" for MC DRAM block size. Check MC boot status before calling
flib functions.
Signed-off-by: J. German Rivera <German.Rivera@freescale.com>
Signed-off-by: York Sun <yorksun@freescale.com>
pankaj chauhan [Sat, 21 Mar 2015 02:28:17 +0000 (19:28 -0700)]
net/phy/cortina: Fix compilation warning
Fix comilation warning which is emitted when
firmware address is more than 32 bit.
Signed-off-by: pankaj chauhan <pankaj.chauhan@freescale.com>
Signed-off-by: York Sun <yorksun@freescale.com>