platform/upstream/llvm.git
3 years agoDyanamic shape support for memref reassociation reshape ops
Yi Zhang [Mon, 19 Jul 2021 22:10:13 +0000 (15:10 -0700)]
Dyanamic shape support for memref reassociation reshape ops

Only memref with identity layout map is supported for now.

Reviewed By: mravishankar

Differential Revision: https://reviews.llvm.org/D106180

3 years ago[SCEV] Add a clarifying comment in howManyLessThans
Philip Reames [Mon, 19 Jul 2021 22:11:38 +0000 (15:11 -0700)]
[SCEV] Add a clarifying comment in howManyLessThans

Wrap semantics are subtle when combined with multiple exits.  This has caused several rounds of confusion during recent reviews, so try to document the subtly distinction between when wrap flags provide <u and <=u facts.

3 years ago[NewPM][opt] Add -debug-pass-manager=quiet to not print analysis info
Arthur Eubanks [Mon, 19 Jul 2021 20:35:57 +0000 (13:35 -0700)]
[NewPM][opt] Add -debug-pass-manager=quiet to not print analysis info

Reviewed By: asbirlea

Differential Revision: https://reviews.llvm.org/D106307

3 years ago[NewPM] Bail out of devirtualization wrapper if the current SCC is invalidated
Arthur Eubanks [Mon, 19 Jul 2021 20:20:57 +0000 (13:20 -0700)]
[NewPM] Bail out of devirtualization wrapper if the current SCC is invalidated

The specific case that triggered this was when inlining a recursive
internal function into itself caused the recursion to go away, allowing
the inliner to mark the function as dead. The inliner marks the SCC as
invalidated but does not provide a new SCC to continue with.

This matches the implementations of ModuleToPostOrderCGSCCPassAdaptor
and CGSCCPassManager.

Fixes PR50363.

Reviewed By: asbirlea

Differential Revision: https://reviews.llvm.org/D106306

3 years ago[PowerPC] swdiv_nochk Builtins for XL Compat
Quinn Pham [Fri, 16 Jul 2021 16:48:00 +0000 (11:48 -0500)]
[PowerPC] swdiv_nochk Builtins for XL Compat

This patch is in a series of patches to provide builtins for
compatibility with the XL compiler. This patch adds software divide
builtins with no checking. These builtins are each emitted as a fast
fdiv.

Reviewed By: #powerpc, nemanjai

Differential Revision: https://reviews.llvm.org/D106150

3 years agoSplit `InferShapedTypeOpInterface` to create `ReifyRankedShapedTypeInterface`.
MaheshRavishankar [Mon, 19 Jul 2021 21:35:20 +0000 (14:35 -0700)]
Split `InferShapedTypeOpInterface` to create `ReifyRankedShapedTypeInterface`.

The `reifyReturnTypeShapesPerResultDim` method supports shape
inference for rsults that are ranked types. These are used lower in
the codegeneration stack than its counter part `reifyReturnTypeShapes`
which also supports unranked types, and is more suited for use higher
up the compilation stack. To have separation of concerns, this method
is split into its own interface.
See discussion : https://llvm.discourse.group/t/better-layering-for-infershapedtypeopinterface/3823

Differential Revision: https://reviews.llvm.org/D106133

3 years ago[gn build] Port 08b289867b5a
LLVM GN Syncbot [Mon, 19 Jul 2021 21:33:24 +0000 (21:33 +0000)]
[gn build] Port 08b289867b5a

3 years ago[clang] Respect PrintingPolicy::FullyQualifiedName when printing a template-id
Nathan Ridge [Mon, 21 Jun 2021 07:19:19 +0000 (03:19 -0400)]
[clang] Respect PrintingPolicy::FullyQualifiedName when printing a template-id

Fixes PR50774

Differential Revision: https://reviews.llvm.org/D104619

3 years ago[lld][WebAssembly] Cleanup duplicate fields in Symbols.h. NFC
Sam Clegg [Thu, 15 Jul 2021 00:16:15 +0000 (17:16 -0700)]
[lld][WebAssembly] Cleanup duplicate fields in Symbols.h. NFC

This avoids duplication and simplifies the code in several places
without increasing the size of the symbol union (at least not
above the assert'd limit of 120 bytes).

Differential Revision: https://reviews.llvm.org/D106026

3 years agoDon't use !eStateRunning when you mean eStateStopped in DestroyImpl.
Jim Ingham [Mon, 19 Jul 2021 21:25:37 +0000 (14:25 -0700)]
Don't use !eStateRunning when you mean eStateStopped in DestroyImpl.

When we go to destroy the process, we first try to halt it, if
we succeeded and the target stopped, we want to clear out the
thread plans and breakpoints in case we still need to resume to complete
killing the process.  If the target was exited or detached, it's
pointless but harmless to do this.  But if the state is eStateInvalid -
for instance if we tried to interrupt the target to Halt it and that
fails - we don't want to keep trying to interact with the inferior,
so we shouldn't do this work.

This change explicitly checks eStateStopped, and only does the pre-resume
cleanup if we did manage to stop the process.

3 years agoRevert "[MemCpyOpt] Enable memcpy optimizations unconditionally."
Artem Belevich [Mon, 19 Jul 2021 21:27:41 +0000 (14:27 -0700)]
Revert "[MemCpyOpt] Enable memcpy optimizations unconditionally."

This reverts commit 2c98298a7559dfe4a264ef1adaad0921526768cc which breaks
sanitizers.

3 years ago[mlir] Fix bazel build
thomasraoux [Mon, 19 Jul 2021 21:00:51 +0000 (14:00 -0700)]
[mlir] Fix bazel build

Differential Revision: https://reviews.llvm.org/D106311

3 years ago[WebAssembly] Generate R_WASM_FUNCTION_OFFSET relocs in debuginfo sections
Derek Schuff [Wed, 2 Jun 2021 21:37:22 +0000 (14:37 -0700)]
[WebAssembly] Generate R_WASM_FUNCTION_OFFSET relocs in debuginfo sections

Debug info sections need R_WASM_FUNCTION_OFFSET_I32 relocs (with FK_Data_4 fixup
kinds) to refer to functions (instead of R_WASM_TABLE_INDEX as is used in data
sections). Usually this is done in a convoluted way, with unnamed temp data
symbols which target the start of the function, in which case
WasmObjectWriter::recordRelocation converts it to use the section symbol
instead. However in some cases the function can actually be undefined; in this
case the dwarf generator uses the function symbol (a named undefined function
symbol) instead. In that case the section-symbol transform doesn't work and we
need to generate the correct reloc type a different way. In this change
WebAssemblyWasmObjectWriter::getRelocType takes the fixup section type into
account to choose the correct reloc type.

Fixes PR50408
Differential Revision: https://reviews.llvm.org/D103557

3 years ago[MLGO] Use binary protobufs for improved training performance.
Mircea Trofin [Wed, 14 Jul 2021 22:03:14 +0000 (15:03 -0700)]
[MLGO] Use binary protobufs for improved training performance.

It turns out that during training, the time required to parse the
textual protobuf of a training log is about the same as the time it
takes to compile the module generating that log. Using binary protobufs
instead elides that cost almost completely.

Differential Revision: https://reviews.llvm.org/D106157

3 years ago[WebAssembly] Deduplicate imports of the same module name, field name, and type
Nick Fitzgerald [Mon, 19 Jul 2021 20:02:46 +0000 (13:02 -0700)]
[WebAssembly] Deduplicate imports of the same module name, field name, and type

When two symbols import the same thing, only one import should be emitted in the Wasm file.

Fixes https://bugs.llvm.org/show_bug.cgi?id=50938

Reviewed By: sbc100

Differential Revision: https://reviews.llvm.org/D105519

3 years ago[lld/mac] Add test for --lto-O
Leonard Grey [Mon, 19 Jul 2021 20:44:15 +0000 (16:44 -0400)]
[lld/mac] Add test for --lto-O

This belongs to fe08e9c4871, I (thakis) forgot to `git add` it back then.

Differential Revision: https://reviews.llvm.org/D105223

3 years ago[mlir] Add software pipelining transformation for scf.For op
thomasraoux [Tue, 13 Jul 2021 03:49:21 +0000 (20:49 -0700)]
[mlir] Add software pipelining transformation for scf.For op

This is the first step to support software pipeline for scf.for loops.
This is only the transformation to create pipelined kernel and
prologue/epilogue.
The scheduling needs to be given by user as  many different algorithm
and heuristic could be applied.
This currently doesn't handle loop arguments, this will be added in a
follow up patch.

Differential Revision: https://reviews.llvm.org/D105868

3 years ago[lld/mac] Resolve defined symbols before undefined symbols
Nico Weber [Mon, 19 Jul 2021 18:38:15 +0000 (14:38 -0400)]
[lld/mac] Resolve defined symbols before undefined symbols

Ports https://reviews.llvm.org/D95985 to the MachO port.
Happens to fix PR51135; see that bug for details.
Also makes lld's behavior match ld64 for the included test case.

Differential Revision: https://reviews.llvm.org/D106293

3 years ago[clang-format] Break an unwrapped line at a K&R C parameter decl
owenca [Thu, 15 Jul 2021 23:16:49 +0000 (16:16 -0700)]
[clang-format] Break an unwrapped line at a K&R C parameter decl

Break an unwrapped line before the first parameter declaration in a
K&R C function definition.

This fixes PR51074.

Differential Revision: https://reviews.llvm.org/D106112

3 years ago[demangler] Fix demangling of 'half'
Stuart Brady [Mon, 7 Jun 2021 15:30:22 +0000 (16:30 +0100)]
[demangler] Fix demangling of 'half'

Demangle 'Dh' as 'half' (as per GCC), and not 'decimal16' (which doesn't
make sense, as there is no IEEE 754 decimal16 format).

The Itanium C++ ABI specification describes 'Dh' as:
> IEEE 754r half-precision floating point (16 bits)

(https://itanium-cxx-abi.github.io/cxx-abi/abi.html#mangling-builtin)

Reviewed By: ldionne, jyknight

Differential Revision: https://reviews.llvm.org/D103833

3 years ago[LangRef] Clarify support for multiple metadata attachments with same id
Teresa Johnson [Mon, 19 Jul 2021 19:35:45 +0000 (12:35 -0700)]
[LangRef] Clarify support for multiple metadata attachments with same id

As discussed on D105251, currently the compiler does not support
multiple metadata attachments on instructions having the same
identifier, whereas it does for global objects. Note this in the
Language Reference manual for clarity.

See D105251 for discussions of history behind this divergence, and the
complexities and possible approaches of adding this support to
instructions in the future.

Differential Revision: https://reviews.llvm.org/D106304

3 years ago[AMDGPU] Reserve AMDGPU ELF e_flags machine 0x45
Tony Tye [Mon, 19 Jul 2021 02:21:11 +0000 (02:21 +0000)]
[AMDGPU] Reserve AMDGPU ELF e_flags machine 0x45

Reviewed By: rampitec

Differential Revision: https://reviews.llvm.org/D106249

3 years ago[mlir][Linalg] NFC: Rename FusionOfTensors pass to FusionOfElementwiseOps pass.
MaheshRavishankar [Mon, 19 Jul 2021 19:50:30 +0000 (12:50 -0700)]
[mlir][Linalg] NFC: Rename FusionOfTensors pass to FusionOfElementwiseOps pass.

This makes it more explicit what the scope of this pass is. The name
of this pass predates fusion on tensors using tile + fuse, and hence
the confusion.

Differential Revision: https://reviews.llvm.org/D106132

3 years ago[gn build] Port 54902e00d128
LLVM GN Syncbot [Mon, 19 Jul 2021 19:24:16 +0000 (19:24 +0000)]
[gn build] Port 54902e00d128

3 years ago[InstrProfiling] Use weak alias for bias variable
Petr Hosek [Thu, 8 Jul 2021 20:44:05 +0000 (13:44 -0700)]
[InstrProfiling] Use weak alias for bias variable

We need the compiler generated variable to override the weak symbol of
the same name inside the profile runtime, but using LinkOnceODRLinkage
results in weak symbol being emitted in which case the symbol selected
by the linker is going to depend on the order of inputs which can be
fragile.

This change replaces the use of weak definition inside the runtime with
a weak alias. We place the compiler generated symbol inside a COMDAT
group so dead definition can be garbage collected by the linker.

We also disable the use of runtime counter relocation on Darwin since
Mach-O doesn't support weak external references, but Darwin already uses
a different continous mode that relies on overmapping so runtime counter
relocation isn't needed there.

Differential Revision: https://reviews.llvm.org/D105176

3 years ago[infer-address-spaces] Handle complex non-pointer constexpr arguments.
Artem Belevich [Thu, 15 Jul 2021 20:39:47 +0000 (13:39 -0700)]
[infer-address-spaces] Handle complex non-pointer constexpr arguments.

Fixes https://bugs.llvm.org/show_bug.cgi?id=51099

Differential Revision: https://reviews.llvm.org/D106098

3 years ago[SLP][X86] Add dot product tests based off PR51075
Simon Pilgrim [Mon, 19 Jul 2021 18:28:42 +0000 (19:28 +0100)]
[SLP][X86] Add dot product tests based off PR51075

3 years ago[lld/mac] Change load command order to be more like ld64
Nico Weber [Sat, 17 Jul 2021 15:18:48 +0000 (11:18 -0400)]
[lld/mac] Change load command order to be more like ld64

No meaningful behavior change. Makes diffing `otool -l` output a bit easier.

Differential Revision: https://reviews.llvm.org/D106219

3 years ago[ifs] Fix linking errors on some llvm builders
Haowei Wu [Mon, 19 Jul 2021 18:59:04 +0000 (11:59 -0700)]
[ifs] Fix linking errors on some llvm builders

This change fixes linking errors on some llvm builders.

3 years ago[MemCpyOpt] Enable memcpy optimizations unconditionally.
Artem Belevich [Wed, 30 Jun 2021 22:36:14 +0000 (15:36 -0700)]
[MemCpyOpt] Enable memcpy optimizations unconditionally.

The patch does not depend on the availability of the library functions for
memcpy/memset as it operates on LLVM intrinsics.  The optimizations are useful
on the targets that have these functions disabled (e.g. NVPTX & AMDGPU).

Differential Revision: https://reviews.llvm.org/D104801

3 years ago[Bazel] Update for 6103fdfab4
Geoffrey Martin-Noble [Mon, 19 Jul 2021 18:48:52 +0000 (11:48 -0700)]
[Bazel] Update for 6103fdfab4

Update Bazel config for
https://github.com/llvm/llvm-project/commit/6103fdfab4
by deleting the llvm-elfabi target.

Differential Revision: https://reviews.llvm.org/D106295

3 years ago[Sanitizer] Intercepts flopen/flopenat on FreeBSD.
David Carlier [Mon, 19 Jul 2021 18:46:35 +0000 (19:46 +0100)]
[Sanitizer] Intercepts flopen/flopenat on FreeBSD.

Reviewers: vitalybuka

Reviewed By: vitalybuka

Differential Revision: https://reviews.llvm.org/D106218

3 years ago[libc++] Disable #pragma system_header in the new testing configuration
Louis Dionne [Mon, 19 Jul 2021 15:23:09 +0000 (11:23 -0400)]
[libc++] Disable #pragma system_header in the new testing configuration

The new testing configuration did not turn off #pragma system_header,
which means we were not seeing warnings in system headers.

Differential Revision: https://reviews.llvm.org/D106187

3 years ago[gn build] Port 8b4acb067fd3
LLVM GN Syncbot [Mon, 19 Jul 2021 18:24:11 +0000 (18:24 +0000)]
[gn build] Port 8b4acb067fd3

3 years ago[gn build] Port 61fa9afe4c5b
LLVM GN Syncbot [Mon, 19 Jul 2021 18:24:10 +0000 (18:24 +0000)]
[gn build] Port 61fa9afe4c5b

3 years ago[gn build] Port 6103fdfab4e2
LLVM GN Syncbot [Mon, 19 Jul 2021 18:24:09 +0000 (18:24 +0000)]
[gn build] Port 6103fdfab4e2

3 years ago[ifs][elfabi] Merge llvm-ifs/elfabi tools
Haowei Wu [Fri, 2 Apr 2021 03:55:11 +0000 (20:55 -0700)]
[ifs][elfabi] Merge llvm-ifs/elfabi tools

This change merges llvm-elfabi and llvm-ifs tools.

Differential Revision: https://reviews.llvm.org/D100139

3 years ago[ifs] Prepare llvm-ifs for elfabi/ifs merging.
Haowei Wu [Wed, 7 Apr 2021 22:50:12 +0000 (15:50 -0700)]
[ifs] Prepare llvm-ifs for elfabi/ifs merging.

This diff changes llvm-ifs to use unified IFS file format
and perform other renaming changes in preparation for the
merging between elfabi/ifs.

Differential Revision: https://reviews.llvm.org/D99810

3 years ago[elfabi] Prepare elfabi/ifs merging.
Haowei Wu [Wed, 31 Mar 2021 23:48:56 +0000 (16:48 -0700)]
[elfabi] Prepare elfabi/ifs merging.

This change implements unified text stub format and command line
interface proposed in the elfabi/ifs merge plan.

Differential Revision: https://reviews.llvm.org/D99399

3 years ago[SystemZ] Handle NoRegister in SystemZTargetLowering::emitMemMemWrapper().
Jonas Paulsson [Fri, 16 Jul 2021 09:23:46 +0000 (11:23 +0200)]
[SystemZ]  Handle NoRegister in SystemZTargetLowering::emitMemMemWrapper().

Bugfix: The compiler should be able to generate a memset to nullptr.

Review: Ulrich Weigand

3 years agoRevert "[llvm][sve] Lowering for VLS truncating stores" because it
Amy Huang [Mon, 19 Jul 2021 17:42:28 +0000 (10:42 -0700)]
Revert "[llvm][sve] Lowering for VLS truncating stores" because it
causes a seg fault (see https://reviews.llvm.org/D104471).

This reverts commit c305557acdaad453e32309d575fe9c6c7090c099.

3 years ago[NFC] Run -instnamer on test Transforms/LICM/sink-debuginfo-preserve.ll
Eli Friedman [Mon, 19 Jul 2021 18:00:01 +0000 (11:00 -0700)]
[NFC] Run -instnamer on test Transforms/LICM/sink-debuginfo-preserve.ll

3 years ago[mlir][tosa] Added shape inference for tosa convolution operations
Rob Suderman [Mon, 19 Jul 2021 17:31:02 +0000 (10:31 -0700)]
[mlir][tosa] Added shape inference for tosa convolution operations

Added shape inference handles cases for convolution operations. This includes
conv2d, conv3d, depthwise_conv2d, and transpose_conv2d. With transpose conv
we use the specified output shape when possible however will shape propagate
if the output shape attribute has dynamic values.

Reviewed By: jpienaar

Differential Revision: https://reviews.llvm.org/D105645

3 years ago[GlobalISel] Fix load-or combine moving loads across potential aliasing stores.
Amara Emerson [Mon, 19 Jul 2021 06:34:09 +0000 (23:34 -0700)]
[GlobalISel] Fix load-or combine moving loads across potential aliasing stores.

Although this combine checks that there's no load folding barriers between
the loads that it's trying to merge, it was inserting the load at the
MIRBuilder's default insertion point, which is the G_OR use inst.

This was causing a miscompile in the test suite's
SingleSource/Regression/C/gcc-c-torture/execute/GCC-C-execute-bswap-2

Differential Revision: https://reviews.llvm.org/D106251

3 years ago[WebAssembly] Support R_WASM_MEMORY_ADDR_TLS_SLEB64 for wasm64
Wouter van Oortmerssen [Thu, 15 Jul 2021 20:24:28 +0000 (13:24 -0700)]
[WebAssembly] Support R_WASM_MEMORY_ADDR_TLS_SLEB64 for wasm64

Also fixed TLS tests swapping addr & value in store op
Differential Revision: https://reviews.llvm.org/D106096

3 years ago[SelectionDAG][RISCV] Use isSExtCheaperThanZExt to control whether sext or zext is...
Craig Topper [Mon, 19 Jul 2021 15:31:16 +0000 (08:31 -0700)]
[SelectionDAG][RISCV] Use isSExtCheaperThanZExt to control whether sext or zext is used for constant folding any_extend.

RISCV would prefer a sign extended constant since that works better
with our constant materialization. We have an existing TLI hook we
use to control sign extension of setcc operands in type legalization.
That hook happens to do the right check we need here, but might be
straying from its original purpose. With only RISCV defining this
hook in tree, I wasn't sure if it was worth adding another hook
with identical behavior.

This is an alternative to D105785 where I tried to handle this in
the RISCV backend by not creating ANY_EXTENDs in some places.

Reviewed By: frasercrmck

Differential Revision: https://reviews.llvm.org/D105918

3 years ago[mlir][Linalg] Migrate 2D pooling ops from tc definition to yaml definition.
Hanhan Wang [Mon, 19 Jul 2021 16:23:55 +0000 (09:23 -0700)]
[mlir][Linalg] Migrate 2D pooling ops from tc definition to yaml definition.

This deletes all the pooling ops in LinalgNamedStructuredOpsSpec.tc. All the
uses are replaced with the yaml pooling ops.

Reviewed By: gysit, rsuderman

Differential Revision: https://reviews.llvm.org/D106181

3 years ago[NewPM] Fix wrong perfect forwardings
Victor Campos [Fri, 16 Jul 2021 13:16:36 +0000 (14:16 +0100)]
[NewPM] Fix wrong perfect forwardings

Some template functions were missing '&&' in function arguments,
therefore these were always taken by value after template instantiation.

This patch adds the double ampersand to introduce proper perfect
forwarding.

Reviewed By: aeubanks

Differential Revision: https://reviews.llvm.org/D106148

3 years ago[NFC][PowerPC] Update builtins-ppc-altivec.c to be run under `-faltivec-src-compat...
Amy Kwan [Mon, 19 Jul 2021 16:20:09 +0000 (11:20 -0500)]
[NFC][PowerPC] Update builtins-ppc-altivec.c to be run under `-faltivec-src-compat=mixed`

This patch adds the `-faltivec-src-compat=mixed` option to the
`builtins-ppc-altivec.c` test.

Currently, the default for `-faltivec-src-compat` is `mixed`. The reason we
explicitly specify `mixed` to the RUN lines of this test is because eventually,
the default will set to `xl`.

Having the default as `xl` changes the CHECKs of this test slightly, as it
reorders some of the `vector bool` and `vector pixel` CHECKs (since under the
`xl` option, `vector bool` and `vector pixel` are treated in the same way as
other vector scalars). Explicitly specifying `mixed` ensures that we are testing
pre-existing Clang behaviour.

Differential Revision: https://reviews.llvm.org/D106282

3 years ago[ISD] Add disclaimer comments to AssertSext/Zext/Align opcodes about poison values
Simon Pilgrim [Mon, 19 Jul 2021 16:14:21 +0000 (17:14 +0100)]
[ISD] Add disclaimer comments to AssertSext/Zext/Align opcodes about poison values

As encountered on D106053, we need to be very explicit that the Assertion nodes don't hold true for a poison value (or for specific poisoned vector elements).

Differential Revision: https://reviews.llvm.org/D106257

3 years ago[X86] Fix case of IsAfterLegalize argument. NFC.
Simon Pilgrim [Mon, 19 Jul 2021 15:35:26 +0000 (16:35 +0100)]
[X86] Fix case of IsAfterLegalize argument. NFC.

Pulled out of D106280

3 years ago[mlir][linalg] Fold TensorCast into PadTensorOp.
Tobias Gysi [Mon, 19 Jul 2021 15:36:53 +0000 (15:36 +0000)]
[mlir][linalg] Fold TensorCast into PadTensorOp.

Add pattern to fold a TensorCast into a PadTensorOp if the cast removes static size information.

Reviewed By: nicolasvasilache

Differential Revision: https://reviews.llvm.org/D106278

3 years agoGlobalISel: Preserve memory types for implicit sret load/stores
Matt Arsenault [Fri, 16 Jul 2021 16:55:41 +0000 (12:55 -0400)]
GlobalISel: Preserve memory types for implicit sret load/stores

3 years ago[ARM] Remove PromotedBitwiseVT for NEON types
David Green [Mon, 19 Jul 2021 15:36:33 +0000 (16:36 +0100)]
[ARM] Remove PromotedBitwiseVT for NEON types

This removes the promotion of NEON AND, OR and XOR nodes to v2i32/v4i32,
treating them the same as the AArch64 and MVE backends where we just add
the relevant patterns for each legal type. This prevents a lot of
bitcasts from being added to the DAG, which have the potential to make
optimizations more difficult. It does mean adding extra patterns, and
some codegen can change due to the types now being legal, not promoted.

Differential Revision: https://reviews.llvm.org/D105588

3 years ago[LICM] Create LoopNest Invariant Code Motion (LNICM) pass
maekawatoshiki [Mon, 19 Jul 2021 15:31:18 +0000 (00:31 +0900)]
[LICM] Create LoopNest Invariant Code Motion (LNICM) pass

This patch adds a new pass called LNICM which is a LoopNest version of LICM and a test case to show how LNICM works.
Basically, LNICM only hoists invariants out of loop nest (not a loop) to keep/make perfect loop nest. This enables later optimizations that require perfect loop nest.

Reviewed By: Whitney

Differential Revision: https://reviews.llvm.org/D104180

3 years agoGlobalISel: Preserve LLT when bitcasting loads and stores
Matt Arsenault [Thu, 10 Jun 2021 23:32:41 +0000 (19:32 -0400)]
GlobalISel: Preserve LLT when bitcasting loads and stores

This also avoids improperly legalizing some truncating vector stores.

3 years ago[Polly][Isl] Stop using isl::set::lex_le_set. NFC
Riccardo Mori [Mon, 19 Jul 2021 15:06:21 +0000 (17:06 +0200)]
[Polly][Isl] Stop using isl::set::lex_le_set. NFC

This is part of an effort to reduce the differences between the custom C++ bindings used right now by polly in `lib/External/isl/include/isl/isl-noxceptions.h` and the official isl C++ interface.

Changes made:
 - Stop using `isl::set::lex_le_set`. The official way to do this is to use `isl::map::lex_le_at`
 - Removed `isl::set::lex_le_set` from `isl-noexceptions.h`
 - `isl-noexceptions.h` has been generated by this https://github.com/patacca/isl/commit/266fea1d3dbd31c23d866eb363fcc8e61e50419f

Reviewed By: Meinersbur

Differential Revision: https://reviews.llvm.org/D106269

3 years ago[flang] Runtime API for data pointers
peter klausler [Fri, 16 Jul 2021 17:42:17 +0000 (10:42 -0700)]
[flang] Runtime API for data pointers

Define and implement an API for use by lowering to
implement operations on pointers.

Differential Revision: https://reviews.llvm.org/D106170

3 years agotsan: remove duplicate arch switch in buildgo.sh
Dmitry Vyukov [Mon, 19 Jul 2021 13:51:08 +0000 (15:51 +0200)]
tsan: remove duplicate arch switch in buildgo.sh

For some reason we have 2 switches on arch and add
half of arch flags in one place and half in another.
Merge these 2 switches.

Reviewed By: melver

Differential Revision: https://reviews.llvm.org/D106274

3 years ago[Clang][RISCV] Support half-precision floating point for RVV intrinsics.
Hsiangkai Wang [Mon, 28 Jun 2021 05:38:41 +0000 (13:38 +0800)]
[Clang][RISCV] Support half-precision floating point for RVV intrinsics.

Use _Float16 as the half-precision floating point type. Define a new
type specifier 'x' for the _Float16 type.

Differential Revision: https://reviews.llvm.org/D105001

3 years agoAArch64/GlobalISel: Cleanup unnecessary size checks in call lowering
Matt Arsenault [Fri, 16 Jul 2021 15:10:41 +0000 (11:10 -0400)]
AArch64/GlobalISel: Cleanup unnecessary size checks in call lowering

The CCValAssign types should now be accurate, so these are no longer
necessary.

3 years agoRevert "[OpenMP] Codegen aggregate for outlined function captures"
Giorgis Georgakoudis [Mon, 19 Jul 2021 14:54:26 +0000 (07:54 -0700)]
Revert "[OpenMP] Codegen aggregate for outlined function captures"

This reverts commit e9c7291cb25f071f1a1dfa4049ed9f5a8a217b3e.

Fix failing tests

3 years ago[PowerPC] Implement vector bool/pixel initialization under -faltivec-src-compat=xl
Amy Kwan [Mon, 19 Jul 2021 13:20:06 +0000 (08:20 -0500)]
[PowerPC] Implement vector bool/pixel initialization under -faltivec-src-compat=xl

This patch implements the initialization of vectors under the
-faltivec-src-compat=xl option introduced in https://reviews.llvm.org/D103615.

Under this option, the initialization of scalar vectors, vector bool, and vector
pixel are treated the same, where the initialization value is splatted across
the whole vector.

This patch does not change the behaviour of the -faltivec-src-compat=mixed option,
which is the current default for Clang.

Differential Revision: https://reviews.llvm.org/D106120

3 years ago[InstrRef][X86] Drop debug instruction numbers from x87 instructions
Jeremy Morse [Mon, 19 Jul 2021 13:57:34 +0000 (14:57 +0100)]
[InstrRef][X86] Drop debug instruction numbers from x87 instructions

Avoid a crash when using instruction referencing if x87 floating point
instructions are used. These instructions are significantly mutated when
they're rewritten from referring to registers, to referring to
floating-point-stack positions. As a result, their operands are re-ordered,
and (InstrRef) LiveDebugValues asserts when it sees a DBG_INSTR_REF
referring to a non-reg non-def register operand.

To fix this, drop the instruction numbers, and thus variable locations.
This patch adds a helper utility do do that.

Dropping the variable locations is sub-optimal, but applying DBG_VALUEs to
the $fp0 and similar registers is dropped on emission too. It seems we've
never done well at describing variables that live in x87 registers, at all.

Differential Revision: https://reviews.llvm.org/D105657

3 years agothread_local support for AIX
Jamie Schmeiser [Mon, 19 Jul 2021 14:03:22 +0000 (10:03 -0400)]
thread_local support for AIX

Summary:
The AIX linker will produce errors on unresolved weak symbols.  Change the
generated code to not check for the initialization function but just call
it and ensure that it always exists.  Also, the AIX atexit routine has a
different name (and signature) so call it correctly.  Update the lit tests
to test on AIX appropriately.

Author: Jamie Schmeiser <schmeise@ca.ibm.com>
Reviewed By: hubert.reinterpretcast (Hubert Tong)
Differential Revision: https://reviews.llvm.org/D104420

3 years ago[CodeGen] Remove isNON_TRUNCStore and isTRUNCStore (NFC)
Kazu Hirata [Mon, 19 Jul 2021 13:56:04 +0000 (06:56 -0700)]
[CodeGen] Remove isNON_TRUNCStore and isTRUNCStore (NFC)

The last use of isNON_TRUNCStore was removed on Oct 10, 2018 in commit
07acc992dc39edfccc5a4b773c3dcf8a5bf6d893.

isTRUNCStore seems to be unused for at least 10 years.

3 years ago[TLI] prepareSREMEqFold(): use correct VT for the final VSELECT (PR51133)
Roman Lebedev [Mon, 19 Jul 2021 13:39:37 +0000 (16:39 +0300)]
[TLI] prepareSREMEqFold(): use correct VT for the final VSELECT (PR51133)

We were using the wrong VT for this final VSELECT,
it should be in the final comparison VT,
not the source value's VT.

Fixes https://bugs.llvm.org/show_bug.cgi?id=51133

3 years ago[MLIR] AffineStructures: resolve clang-tidy warnings [NFC]
Arjun P [Mon, 19 Jul 2021 12:45:49 +0000 (18:15 +0530)]
[MLIR] AffineStructures: resolve clang-tidy warnings [NFC]

3 years agoFix duplicate checks in clangd comments
Elton [Mon, 19 Jul 2021 13:14:23 +0000 (15:14 +0200)]
Fix duplicate checks in clangd comments

This patch removes a duplicate checks in the top-level comments in `clang-tools-extra/clangd/ParsedAST.h`

Reviewed By: kadircet

Differential Revision: https://reviews.llvm.org/D106227

3 years ago[AMDGPU] Fix typo in comments idexen -> idxen
Jay Foad [Mon, 19 Jul 2021 12:39:30 +0000 (13:39 +0100)]
[AMDGPU] Fix typo in comments idexen -> idxen

3 years ago[clang] Change set type used for SourceLocation.
Simon Tatham [Mon, 19 Jul 2021 10:45:46 +0000 (11:45 +0100)]
[clang] Change set type used for SourceLocation.

This is part of a patch series working towards the ability to make
SourceLocation into a 64-bit type to handle larger translation units.

If clang is built for a 32-bit platform and SourceLocation is 64 bits
wide, then a SourceLocation will be larger than a pointer, so it won't
be possible to keep them in a SmallPtrSet any more. Switch to
SmallDenseSet instead.

Patch originally by Mikhail Maltsev.

Differential Revision: https://reviews.llvm.org/D105493

3 years agoRevert "[mlir] Introduce `linalg.tiled_yield` terminator for `linalg.tiled_loop`."
Alexander Belyaev [Mon, 19 Jul 2021 12:18:35 +0000 (14:18 +0200)]
Revert "[mlir] Introduce `linalg.tiled_yield` terminator for `linalg.tiled_loop`."

This reverts commit 3b03d9b874aa902f7f969e7ffdefde23c2758eeb.

3 years ago[clang-tidy] ensure run-clang-tidy reports children killed by signals
Ian Campbell [Mon, 19 Jul 2021 12:17:23 +0000 (14:17 +0200)]
[clang-tidy] ensure run-clang-tidy reports children killed by signals

If a clang-tidy child process exits with a signal then run-clang-tidy will exit
with an error but there is no hint why in the output, since the clang-tidy
doesn't log anything and may not even have had the opportunity to do so
depending on the signal used.

`subprocess.CompletedProcess.returncode` is the negative signal number in this
case.

I hit this in a CI system where the parallelism used exceeded the RAM assigned
to the container causing the OOM killer to SIGKILL clang-tidy processes.

Reviewed By: sylvestre.ledru

Differential Revision: https://reviews.llvm.org/D99081

3 years ago[rt][nfc] Rewrite #ifndef as #if defined().
Alexander Belyaev [Mon, 19 Jul 2021 12:17:13 +0000 (14:17 +0200)]
[rt][nfc] Rewrite #ifndef as #if defined().

3 years ago[mlir] Introduce `linalg.tiled_yield` terminator for `linalg.tiled_loop`.
Alexander Belyaev [Mon, 19 Jul 2021 10:57:36 +0000 (12:57 +0200)]
[mlir] Introduce `linalg.tiled_yield` terminator for `linalg.tiled_loop`.

https://llvm.discourse.group/t/rfc-changes-to-linalg-tiledloopop-to-unblock-reductions/3890

Differential Revision: https://reviews.llvm.org/D106066

3 years ago[ORC-RT] Introduce a weak-import macro.
Lang Hames [Mon, 19 Jul 2021 11:52:14 +0000 (21:52 +1000)]
[ORC-RT] Introduce a weak-import macro.

This should eliminate warnings about ignored weak_import attributes on some of
the bots, e.g. https://lab.llvm.org/buildbot/#/builders/165/builds/3770/.

3 years ago[ORC-RT] Separate jit-dispach tag decls from definitions.
Lang Hames [Mon, 19 Jul 2021 11:21:40 +0000 (21:21 +1000)]
[ORC-RT] Separate jit-dispach tag decls from definitions.

This should eliminate the "initialized and declared 'extern'" warnings produced
on some bots, e.g. https://lab.llvm.org/buildbot/#/builders/165/builds/3770

3 years ago[CostModel][X86] Add fast math tests for float reductions
Simon Pilgrim [Mon, 19 Jul 2021 12:01:12 +0000 (13:01 +0100)]
[CostModel][X86] Add fast math tests for float reductions

As noticed on D105432 we didn't have any coverage to distinguish between fast/exact float reductions

3 years ago[SLP]Fix possible crash on unreachable incoming values sorting.
Alexey Bataev [Mon, 19 Jul 2021 11:18:27 +0000 (04:18 -0700)]
[SLP]Fix possible crash on unreachable incoming values sorting.

The incoming values for PHI nodes may come from unreachable BasicBlocks,
need to handle this case.

Differential Revision: https://reviews.llvm.org/D106264

3 years ago[LoopUtils] Fix incorrect RT check bounds of loop-invariant mem accesses
Mindong Chen [Mon, 19 Jul 2021 11:24:38 +0000 (19:24 +0800)]
[LoopUtils] Fix incorrect RT check bounds of loop-invariant mem accesses

This fixes the lower and upper bound calculation of a
RuntimeCheckingPtrGroup when it has more than one loop
invariant pointers. Resolves PR50686.

Reviewed By: fhahn

Differential Revision: https://reviews.llvm.org/D104148

3 years ago[LV] Re-generate check lines of some fragile tests (NFC)
Mindong Chen [Mon, 19 Jul 2021 11:21:04 +0000 (19:21 +0800)]
[LV] Re-generate check lines of some fragile tests (NFC)

Reviewed By: fhahn

Differential Revision: https://reviews.llvm.org/D105438

3 years ago[mlir][memref] Clarify the documentation for memref.clone [NFC]
Stephan Herhut [Mon, 19 Jul 2021 10:12:36 +0000 (12:12 +0200)]
[mlir][memref] Clarify the documentation for memref.clone [NFC]

The wording was wrong and suggested that operands to memref.clone may not be mutated.

Differential Revision: https://reviews.llvm.org/D106258

3 years ago[LV] Add test with ptr induction used as scalar and vector.
Florian Hahn [Tue, 6 Jul 2021 16:35:40 +0000 (17:35 +0100)]
[LV] Add test with ptr induction used as scalar and vector.

Test case inspired by D105199.

3 years agoRevert "[hwasan] Use stack safety analysis."
Florian Mayer [Mon, 19 Jul 2021 11:08:02 +0000 (12:08 +0100)]
Revert "[hwasan] Use stack safety analysis."

This reverts commit 12268fe14a1a65d4b62f0b6e5beab46ba8501ae7.

3 years agotsan: make obtaining current PC faster
Dmitry Vyukov [Thu, 15 Jul 2021 08:51:32 +0000 (10:51 +0200)]
tsan: make obtaining current PC faster

We obtain the current PC is all interceptors and collectively
common interceptor code contributes to overall slowdown
(in particular cheaper str/mem* functions).

The current way to obtain the current PC involves:

  4493e1:       e8 3a f3 fe ff          callq  438720 <_ZN11__sanitizer10StackTrace12GetCurrentPcEv>
  4493e9:       48 89 c6                mov    %rax,%rsi

and the called function is:

uptr StackTrace::GetCurrentPc() {
  438720:       48 8b 04 24             mov    (%rsp),%rax
  438724:       c3                      retq

The new way uses address of a local label and involves just:

  44a888:       48 8d 35 fa ff ff ff    lea    -0x6(%rip),%rsi

I am not switching all uses of StackTrace::GetCurrentPc to GET_CURRENT_PC
because it may lead some differences in produced reports and break tests.
The difference comes from the fact that currently we have PC pointing
to the CALL instruction, but the new way does not yield any code on its own
so the PC points to a random instruction in the function and symbolizing
that instruction can produce additional inlined frames (if the random
instruction happen to relate to some inlined function).

Reviewed By: vitalybuka, melver

Differential Revision: https://reviews.llvm.org/D106046

3 years ago[ORC] Drop 'const' for __orc_rt_CWrapperFunctionResultDataUnion::ValuePtr.
Lang Hames [Mon, 19 Jul 2021 11:01:14 +0000 (21:01 +1000)]
[ORC] Drop 'const' for __orc_rt_CWrapperFunctionResultDataUnion::ValuePtr.

This member is now only used when storage is heap-allocated so it does not
need to be const. Dropping 'const' eliminates cast warnings on many builders.

3 years ago[ORC-RT] Fix missing std::move.
Lang Hames [Mon, 19 Jul 2021 10:59:28 +0000 (20:59 +1000)]
[ORC-RT] Fix missing std::move.

This should fix the 'could-not-covert' error at wrapper_function_utils.h:128 in
https://lab.llvm.org/buildbot/#/builders/112/builds/7748.

3 years ago[VE] Set getExtendForAtomicOps to ISD::ANY_EXTEND
Kazushi (Jam) Marukawa [Tue, 13 Jul 2021 20:01:10 +0000 (05:01 +0900)]
[VE] Set getExtendForAtomicOps to ISD::ANY_EXTEND

The implementation of subword atomics does not actually
guarantee the result is zero-extended, which now caused
failures after https://reviews.llvm.org/D101342 was landed.

Reviewed By: simoll

Differential Revision: https://reviews.llvm.org/D106225

3 years ago[hwasan] Use stack safety analysis.
Florian Mayer [Fri, 16 Jul 2021 08:48:08 +0000 (09:48 +0100)]
[hwasan] Use stack safety analysis.

This avoids unnecessary instrumentation.

Reviewed By: eugenis, vitalybuka

Differential Revision: https://reviews.llvm.org/D105703

3 years ago[X86][SSE] Fix copy+paste typo in dot3_float4_as_float3 partial load test
Simon Pilgrim [Mon, 19 Jul 2021 10:47:20 +0000 (11:47 +0100)]
[X86][SSE] Fix copy+paste typo in dot3_float4_as_float3 partial load test

3 years ago[ORC] Explicitly convert to ArrayRefs to silence errors.
Lang Hames [Mon, 19 Jul 2021 10:44:17 +0000 (20:44 +1000)]
[ORC] Explicitly convert to ArrayRefs to silence errors.

This aims to fix build failures like
https://lab.llvm.org/buildbot#builders/165/builds/3761.

3 years ago[compiler-rt][GWP-ASAN] Disable 2 tests on Armv7 Linux
David Spickett [Mon, 19 Jul 2021 10:43:21 +0000 (10:43 +0000)]
[compiler-rt][GWP-ASAN] Disable 2 tests on Armv7 Linux

These have been failing on our bots for a while due to
incomplete backtraces. (you don't get the names of the
functions that did the access, just the reporter frames)

See:
https://lab.llvm.org/buildbot/#/builders/170/builds/180

3 years ago[Polly] Use isl::set::tuple_dim instead of isl::set::dim. NFC
Riccardo Mori [Mon, 19 Jul 2021 10:41:46 +0000 (12:41 +0200)]
[Polly] Use isl::set::tuple_dim instead of isl::set::dim. NFC

This is part of an effort to reduce the differences between the custom C++ bindings used right now by polly in `lib/External/isl/include/isl/isl-noxceptions.h` and the official isl C++ interface.

Note that not all the usages of `isl::set::dim` were replaced

3 years ago[ORC] Add missing std::move.
Lang Hames [Mon, 19 Jul 2021 10:36:22 +0000 (20:36 +1000)]
[ORC] Add missing std::move.

This should fix the build failure at
https://lab.llvm.org/buildbot/#/builders/58/builds/11428.

3 years ago[VE] Disable relative lookup table converter pass for VE
Kazushi (Jam) Marukawa [Sat, 17 Jul 2021 19:32:21 +0000 (04:32 +0900)]
[VE] Disable relative lookup table converter pass for VE

VE's linker, /opt/nec/ve/bin/nld, doesn't implement relative lookup table.
The relative lookup table is introduced by https://reviews.llvm.org/D94355,
but we need to disable it at the moment.

Reviewed By: simoll

Differential Revision: https://reviews.llvm.org/D106224

3 years ago[ORC-RT] Handle missing __has_builtin operator.
Lang Hames [Mon, 19 Jul 2021 10:17:40 +0000 (20:17 +1000)]
[ORC-RT] Handle missing __has_builtin operator.

For compilers that do not support __has_builtin just return '0'. This should fix
the bot failure at https://lab.llvm.org/buildbot/#/builders/165/builds/3761.

3 years ago[Polly][Isl] Use isl::union_map::unite() instead of isl::union_map::add_map(). NFC
Riccardo Mori [Mon, 19 Jul 2021 10:10:34 +0000 (12:10 +0200)]
[Polly][Isl] Use isl::union_map::unite() instead of isl::union_map::add_map(). NFC

This is part of an effort to reduce the differences between the custom C++ bindings used right now by polly in `lib/External/isl/include/isl/isl-noxceptions.h` and the official isl C++ interface.

Changes made:
 - Use `isl::union_map::unite()` instead of `isl::union_map::add_map()`
 - `isl-noexceptions.h` has been generated by this https://github.com/patacca/isl/commit/3f43ae29fa2a22936a583b85b2fe8d439f805d8d

Depends on D106059

Reviewed By: Meinersbur

Differential Revision: https://reviews.llvm.org/D106061

3 years ago[NFC] [MTE] helper for stack tagging lifetimes.
Florian Mayer [Fri, 16 Jul 2021 09:34:58 +0000 (10:34 +0100)]
[NFC] [MTE] helper for stack tagging lifetimes.

Reviewed By: eugenis, vitalybuka

Differential Revision: https://reviews.llvm.org/D106135

3 years ago[ORC][ORC-RT] Introduce ORC-runtime based MachO-Platform.
Lang Hames [Wed, 14 Jul 2021 11:09:36 +0000 (21:09 +1000)]
[ORC][ORC-RT] Introduce ORC-runtime based MachO-Platform.

Adds support for MachO static initializers/deinitializers and eh-frame
registration via the ORC runtime.

This commit introduces cooperative support code into the ORC runtime and ORC
LLVM libraries (especially the MachOPlatform class) to support macho runtime
features for JIT'd code. This commit introduces support for static
initializers, static destructors (via cxa_atexit interposition), and eh-frame
registration. Near-future commits will add support for MachO native
thread-local variables, and language runtime registration (e.g. for Objective-C
and Swift).

The llvm-jitlink tool is updated to use the ORC runtime where available, and
regression tests for the new MachOPlatform support are added to compiler-rt.

Notable changes on the ORC runtime side:

1. The new macho_platform.h / macho_platform.cpp files contain the bulk of the
runtime-side support. This includes eh-frame registration; jit versions of
dlopen, dlsym, and dlclose; a cxa_atexit interpose to record static destructors,
and an '__orc_rt_macho_run_program' function that defines running a JIT'd MachO
program in terms of the jit- dlopen/dlsym/dlclose functions.

2. Replaces JITTargetAddress (and casting operations) with ExecutorAddress
(copied from LLVM) to improve type-safety of address management.

3. Adds serialization support for ExecutorAddress and unordered_map types to
the runtime-side Simple Packed Serialization code.

4. Adds orc-runtime regression tests to ensure that static initializers and
cxa-atexit interposes work as expected.

Notable changes on the LLVM side:

1. The MachOPlatform class is updated to:

  1.1. Load the ORC runtime into the ExecutionSession.
  1.2. Set up standard aliases for macho-specific runtime functions. E.g.
       ___cxa_atexit -> ___orc_rt_macho_cxa_atexit.
  1.3. Install the MachOPlatformPlugin to scrape LinkGraphs for information
       needed to support MachO features (e.g. eh-frames, mod-inits), and
       communicate this information to the runtime.
  1.4. Provide entry-points that the runtime can call to request initializers,
       perform symbol lookup, and request deinitialiers (the latter is
       implemented as an empty placeholder as macho object deinits are rarely
       used).
  1.5. Create a MachO header object for each JITDylib (defining the __mh_header
       and __dso_handle symbols).

2. The llvm-jitlink tool (and llvm-jitlink-executor) are updated to use the
runtime when available.

3. A `lookupInitSymbolsAsync` method is added to the Platform base class. This
can be used to issue an async lookup for initializer symbols. The existing
`lookupInitSymbols` method is retained (the GenericIRPlatform code is still
using it), but is deprecated and will be removed soon.

4. JIT-dispatch support code is added to ExecutorProcessControl.

The JIT-dispatch system allows handlers in the JIT process to be associated with
'tag' symbols in the executor, and allows the executor to make remote procedure
calls back to the JIT process (via __orc_rt_jit_dispatch) using those tags.

The primary use case is ORC runtime code that needs to call bakc to handlers in
orc::Platform subclasses. E.g. __orc_rt_macho_jit_dlopen calling back to
MachOPlatform::rt_getInitializers using __orc_rt_macho_get_initializers_tag.
(The system is generic however, and could be used by non-runtime code).

The new ExecutorProcessControl::JITDispatchInfo struct provides the address
(in the executor) of the jit-dispatch function and a jit-dispatch context
object, and implementations of the dispatch function are added to
SelfExecutorProcessControl and OrcRPCExecutorProcessControl.

5. OrcRPCTPCServer is updated to support JIT-dispatch calls over ORC-RPC.

6. Serialization support for StringMap is added to the LLVM-side Simple Packed
Serialization code.

7. A JITLink::allocateBuffer operation is introduced to allocate writable memory
attached to the graph. This is used by the MachO header synthesis code, and will
be generically useful for other clients who want to create new graph content
from scratch.

3 years ago[ORC-RT] Fix signedness warning in unit test.
Lang Hames [Sun, 18 Jul 2021 05:16:28 +0000 (15:16 +1000)]
[ORC-RT] Fix signedness warning in unit test.