Alexander Timofeev [Thu, 6 Jun 2019 21:13:02 +0000 (21:13 +0000)]
[AMDGPU] Partial revert for the
ba447bae7448435c9986eece0811da1423972fdd
"Divergence driven ISel. Assign register class for cross block values
according to the divergence."
that discovered the design flaw leading to several issues that
required to be solved before.
This change reverts AMDGPU specific changes and keeps common part
unaffected.
llvm-svn: 362749
Cameron McInally [Thu, 6 Jun 2019 21:12:22 +0000 (21:12 +0000)]
[NFC][CodeGen] Add unary fneg tests to X86/fma-intrinsics-x86.ll
llvm-svn: 362748
Craig Topper [Thu, 6 Jun 2019 21:00:04 +0000 (21:00 +0000)]
[X86] Make a bunch of merge masked binops commutable for loading folding.
This primarily affects add/fadd/mul/fmul/and/or/xor/pmuludq/pmuldq/max/min/fmaxc/fminc/pmaddwd/pavg.
We already commuted the unmasked and zero masked versions.
I've added 512-bit stack folding tests for most of the instructions
affected. I've tested needing commuting and not commuting across
unmasked, merged masked, and zero masked. The 128/256 bit instructions
should behave similarly.
llvm-svn: 362746
Amy Huang [Thu, 6 Jun 2019 20:23:05 +0000 (20:23 +0000)]
Add cdb test for global constants
Summary: This creates an integration test for global constants
Reviewers: rnk
Subscribers: llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D62974
llvm-svn: 362745
Sean Fertile [Thu, 6 Jun 2019 20:16:59 +0000 (20:16 +0000)]
Revert "Revert "[ELF] Suppress "STT_SECTION symbol should be defined" on .eh_frame, .debug*, .zdebug* and .gcc_except_table""
This reverts commit
f49f58527a6d8147524d8d6f2eb1feb70f856292.
llvm-svn: 362744
Sean Fertile [Thu, 6 Jun 2019 20:16:53 +0000 (20:16 +0000)]
Revert "Revert "Reland D61583 [ELF] Error on relocations to STT_SECTION symbols if the sections were discarded""
This reverts commit
729111cf1824159bb4dd331cab8a829eab30313f.
Reverting the previous commit breaks other LLD buildbots.
llvm-svn: 362743
Sanjay Patel [Thu, 6 Jun 2019 20:14:06 +0000 (20:14 +0000)]
[InstSimplify] add tests for fcmp with known-never-nan operands; NFC
llvm-svn: 362742
Cameron McInally [Thu, 6 Jun 2019 20:11:30 +0000 (20:11 +0000)]
[NFC][CodeGen] Add unary fneg tests to X86/fma-scalar-combine.ll
llvm-svn: 362741
Francois Ferrand [Thu, 6 Jun 2019 20:06:23 +0000 (20:06 +0000)]
clang-format: better handle namespace macros
Summary:
Other macros are used to declare namespaces, and should thus be handled
similarly. This is the case for crpcut's TESTSUITE macro, or for
unittest-cpp's SUITE macro:
TESTSUITE(Foo) {
TEST(MyFirstTest) {
assert(0);
}
} // TESTSUITE(Foo)
This patch deals with this cases by introducing a new option to specify
lists of namespace macros. Internally, it re-uses the system already in
place for foreach and statement macros, to ensure there is no impact on
performance.
Reviewers: krasimir, djasper, klimek
Reviewed By: klimek
Subscribers: acoomans, cfe-commits, klimek
Tags: #clang
Differential Revision: https://reviews.llvm.org/D37813
llvm-svn: 362740
Sean Fertile [Thu, 6 Jun 2019 19:34:26 +0000 (19:34 +0000)]
Revert "Reland D61583 [ELF] Error on relocations to STT_SECTION symbols if the sections were discarded"
This reverts commit
5d3b3188f722456a6470c7effcacf17656406429.
Breaks the PowerPC multi-stage buildbot.
llvm-svn: 362739
Sean Fertile [Thu, 6 Jun 2019 19:34:18 +0000 (19:34 +0000)]
Revert "[ELF] Suppress "STT_SECTION symbol should be defined" on .eh_frame, .debug*, .zdebug* and .gcc_except_table"
This reverts commit
dcba4828a9ead5f5b1fa27f0853823618075d0e0.
This commit builds on
dcba4828a9ead5f5b1fa27f0853823618075d0e0 which breaks the
multi-staged PowerPC buildbot.
llvm-svn: 362738
Craig Topper [Thu, 6 Jun 2019 19:21:23 +0000 (19:21 +0000)]
[CFLGraph] Add support for unary fneg instruction.
Differential Revision: https://reviews.llvm.org/D62791
llvm-svn: 362737
Renato Golin [Thu, 6 Jun 2019 19:15:52 +0000 (19:15 +0000)]
[LV] Wrap LV illegality reporting in a function. NFC.
A function for loop vectorization illegality reporting has been
introduced:
void LoopVectorizationLegality::reportVectorizationFailure(
const StringRef DebugMsg, const StringRef OREMsg,
const StringRef ORETag, Instruction * const I) const;
The function prints a debug message when the debug for the compilation
unit is enabled as well as invokes the optimization report emitter to
generate a message with a specified tag. The function doesn't cover any
complicated logic when a custom lambda should be passed to the emitter,
only generating a message with a tag is supported.
The function always prints the instruction `I` after the debug message
whenever the instruction is specified, otherwise the debug message
ends with a dot: 'LV: Not vectorizing: Disabled/already vectorized.'
Patch by Pavel Samolysov <samolisov@gmail.com>
llvm-svn: 362736
Jason Liu [Thu, 6 Jun 2019 19:13:36 +0000 (19:13 +0000)]
[AIX] Implement function descriptor on SDAG
Summary:
(1) Function descriptor on AIX
On AIX, a called routine may have 2 distinct symbols associated with it:
* A function descriptor (Name)
* A function entry point (.Name)
The descriptor structure on AIX is the same as those in the ELF V1 ABI:
* The address of the entry point of the function.
* The TOC base address for the function.
* The environment pointer.
The descriptor symbol uses the same name as the source level function in C.
The function entry point is analogous to the symbol we would generate for a
function in a non-descriptor-based ABI, except that it is renamed by
prepending a ".".
Which symbol gets referenced depends on the context:
* Taking the address of the function references the descriptor symbol.
* Calling the function references the entry point symbol.
(2) Speaking of implementation on AIX, for direct function call target, we
create proper MCSymbol SDNode(e.g . ".foo") while constructing SDAG to
replace original TargetGlobalAddress SDNode. Then down the path, we can
take advantage of this MCSymbol.
Patch by: Xiangling_L
Reviewed by: sfertile, hubert.reinterpretcast, jasonliu, syzaara
Differential Revision: https://reviews.llvm.org/D62532
llvm-svn: 362735
Cameron McInally [Thu, 6 Jun 2019 19:02:46 +0000 (19:02 +0000)]
[NFC][CodeGen] Add unary fneg tests to X86/fma4-fneg-combine.ll
llvm-svn: 362733
Craig Topper [Thu, 6 Jun 2019 19:02:18 +0000 (19:02 +0000)]
[InlineCost] Add support for unary fneg.
This adds support for unary fneg based on the implementation of BinaryOperator without the soft float FP cost.
Previously we would just delegate to visitUnaryInstruction. I think the only real change is that we will pass the FastMath flags to SimplifyFNeg now.
Differential Revision: https://reviews.llvm.org/D62699
llvm-svn: 362732
Kadir Cetinkaya [Thu, 6 Jun 2019 18:49:16 +0000 (18:49 +0000)]
[clang][HeaderSearch] Consider all path separators equal
Reviewers: ilya-biryukov, sammccall
Subscribers: cfe-commits
Tags: #clang
Differential Revision: https://reviews.llvm.org/D62965
llvm-svn: 362731
Cameron McInally [Thu, 6 Jun 2019 18:41:18 +0000 (18:41 +0000)]
[NFC][CodeGen] Add unary fneg tests to X86/fma_patterns.ll
llvm-svn: 362730
Puyan Lotfi [Thu, 6 Jun 2019 18:05:10 +0000 (18:05 +0000)]
Fixing ppc tests: sed -i 's/# REQUIES: ppc/# REQUIRES: ppc/g'
llvm-svn: 362728
Philip Reames [Thu, 6 Jun 2019 18:02:36 +0000 (18:02 +0000)]
[LoopPred] Fix a bug in unconditional latch bailout introduced in r362284
This is a really silly bug that even a simple test w/an unconditional latch would have caught. I tried to guard against the case, but put it in the wrong if check. Oops.
llvm-svn: 362727
Michael Kruse [Thu, 6 Jun 2019 17:15:36 +0000 (17:15 +0000)]
[ScheduleTreeTransform] Silence compiler warning. NFC.
Use size_t for position which is the return type type ArrayRef::size()
it is compared to.
llvm-svn: 362724
Simon Pilgrim [Thu, 6 Jun 2019 17:04:13 +0000 (17:04 +0000)]
[DAGCombine] MergeConsecutiveStores - improve non-temporal load\store handling (PR42123)
This patch is the first step towards ensuring MergeConsecutiveStores correctly handles non-temporal loads\stores:
1 - When merging load\stores we must ensure that they all have the same non-temporal flag. This is unlikely to occur, but can in strange cases where we're storing at the end of one page and the beginning of another.
2 - The merged load\store node must retain the non-temporal flag.
Differential Revision: https://reviews.llvm.org/D62910
llvm-svn: 362723
Fangrui Song [Thu, 6 Jun 2019 17:03:10 +0000 (17:03 +0000)]
[PPC32] Support GD/LD/IE/LE TLS models and their relaxations
Reviewed By: ruiu
Differential Revision: https://reviews.llvm.org/D62940
llvm-svn: 362722
Fangrui Song [Thu, 6 Jun 2019 17:03:00 +0000 (17:03 +0000)]
[PPC32] Improve the 32-bit PowerPC port
Many -static/-no-pie/-shared/-pie applications linked against glibc or musl
should work with this patch. This also helps FreeBSD PowerPC64 to migrate
their lib32 (PR40888).
* Fix default image base and max page size.
* Support new-style Secure PLT (see below). Old-style BSS PLT is not
implemented, so it is not suitable for FreeBSD rtld now because it doesn't
support Secure PLT yet.
* Support more initial relocation types:
R_PPC_ADDR32, R_PPC_REL16*, R_PPC_LOCAL24PC, R_PPC_PLTREL24, and R_PPC_GOT16.
The addend of R_PPC_PLTREL24 is special: it decides the call stub PLT type
but it should be ignored for the computation of target symbol VA.
* Support GNU ifunc
* Support .glink used for lazy PLT resolution in glibc
* Add a new thunk type: PPC32PltCallStub that is similar to PPC64PltCallStub.
It is used by R_PPC_REL24 and R_PPC_PLTREL24.
A PLT stub used in -fPIE/-fPIC usually loads an address relative to
.got2+0x8000 (-fpie/-fpic code uses _GLOBAL_OFFSET_TABLE_ relative
addresses).
Two .got2 sections in two object files have different addresses, thus a PLT stub
can't be shared by two object files. To handle this incompatibility,
change the parameters of Thunk::isCompatibleWith to
`const InputSection &, const Relocation &`.
PowerPC psABI specified an old-style .plt (BSS PLT) that is both
writable and executable. Linkers don't make separate RW- and RWE segments,
which causes all initially writable memory (think .data) executable.
This is a big security concern so a new PLT scheme (secure PLT) was developed to
address the security issue.
TLS will be implemented in D62940.
glibc older than ~2012 requires .rela.dyn to include .rela.plt, it can
not handle the DT_RELA+DT_RELASZ == DT_JMPREL case correctly. A hack
(not included in this patch) in LinkerScript.cpp addOrphanSections() to
work around the issue:
if (Config->EMachine == EM_PPC) {
// Older glibc assumes .rela.dyn includes .rela.plt
Add(In.RelaDyn);
if (In.RelaPlt->isLive() && !In.RelaPlt->Parent)
In.RelaDyn->getParent()->addSection(In.RelaPlt);
}
Reviewed By: ruiu
Differential Revision: https://reviews.llvm.org/D62464
llvm-svn: 362721
Cameron McInally [Thu, 6 Jun 2019 16:55:51 +0000 (16:55 +0000)]
[NFC][CodeGen] Add unary fneg tests to X86/fma_patterns_wide.ll
llvm-svn: 362720
Nico Weber [Thu, 6 Jun 2019 16:55:05 +0000 (16:55 +0000)]
gn build: Merge r362685
llvm-svn: 362719
Dmitri Gribenko [Thu, 6 Jun 2019 16:47:06 +0000 (16:47 +0000)]
Remove unused PPC.h includes under llvm/lib/Target/PowerPC.
llvm-svn: 362718
Craig Topper [Thu, 6 Jun 2019 16:39:04 +0000 (16:39 +0000)]
[X86] Make masked floating point equality/ordered compares commutable for load folding purposes.
Same as what is supported for the unmasked form.
llvm-svn: 362717
Xinliang David Li [Thu, 6 Jun 2019 16:29:44 +0000 (16:29 +0000)]
[Profile]: Add runtime interface to specify file handle for profile data (Part-II)
Test cases
Author: Sajjad Mirza
Differential Revision: http://reviews.llvm.org/D62541
llvm-svn: 362716
Cameron McInally [Thu, 6 Jun 2019 16:13:23 +0000 (16:13 +0000)]
[NFC][CodeGen] Add unary fneg tests to fmul-combines.ll fnabs.ll
llvm-svn: 362715
Fangrui Song [Thu, 6 Jun 2019 15:31:45 +0000 (15:31 +0000)]
[PowerPC] Add R_PPC_IRELATIVE
This will be used by lld's powerpc port.
llvm-svn: 362713
Cameron McInally [Thu, 6 Jun 2019 15:29:11 +0000 (15:29 +0000)]
[NFC][CodeGen] Add unary fneg tests to fp-fast.ll fp-fold.ll fp-in-intregs.ll fp-stack-compare-cmov.ll fp-stack-compare.ll fsxor-alignment.ll
llvm-svn: 362712
Whitney Tsang [Thu, 6 Jun 2019 15:12:49 +0000 (15:12 +0000)]
[DA] Add an option to control delinearization validity checks
Summary: Dependence Analysis performs static checks to confirm validity
of delinearization. These checks often fail for 64-bit targets due to
type conversions and integer wrapping that prevent simplification of the
SCEV expressions. These checks would also fail at compile-time if the
lower bound of the loops are compile-time unknown.
For example:
void foo(int n, int m, int a[][m]) {
for (int i = 0; i < n; ++i)
for (int j = 0; j < m; ++j) {
a[i][j] = a[i+1][j-2];
}
}
opt -mem2reg -instcombine -indvars -loop-simplify -loop-rotate -inline
-pass-remarks=.* -debug-pass=Arguments
-da-permissive-validity-checks=false k3.ll -analyze -da
will produce the following by default:
da analyze - anti [* *|<]!
but will produce the following expected dependence vector if the
validity checks are disabled:
da analyze - consistent anti [1 -2]!
This revision will introduce a debug option that will leave the validity
checks in place by default, but allow them to be turned off. New tests
are added for cases where it cannot be proven at compile-time that the
individual subscripts stay in-bound with respect to a particular
dimension of an array. These tests enable the option to provide user
guarantee that the subscripts do not over/under-flow into other
dimensions, thereby producing more accurate dependence vectors.
For prior discussion on this topic, leading to this change, please see
the following thread:
http://lists.llvm.org/pipermail/llvm-dev/2019-May/132372.html
Reviewers: Meinersbur, jdoerfert, kbarton, dmgreen, fhahn
Reviewed By: Meinersbur, jdoerfert, dmgreen
Subscribers: fhahn, hiraditya, javed.absar, llvm-commits, Whitney,
etiotto
Tag: LLVM
Differential Revision: https://reviews.llvm.org/D62610
llvm-svn: 362711
Cameron McInally [Thu, 6 Jun 2019 14:52:16 +0000 (14:52 +0000)]
[NFC][CodeGen] Remove duplicate test in fp-fast.ll
@test10 is the same as @test11.
llvm-svn: 362710
Ilya Biryukov [Thu, 6 Jun 2019 14:51:55 +0000 (14:51 +0000)]
gn build: Add new tidy checks to gn files
The checks were added in r362673 and r362672.
llvm-svn: 362709
Jason Liu [Thu, 6 Jun 2019 14:36:43 +0000 (14:36 +0000)]
[AIX] Implement call lowering with parameters could pass onto GPRs
Summary:
This patch implements SDAG call lowering on AIX for functions
which only have parameters that could fit into GPRs.
Reviewers: hubert.reinterpretcast, syzaara
Differential Revision: https://reviews.llvm.org/D62823
llvm-svn: 362708
Yitzhak Mandelbaum [Thu, 6 Jun 2019 14:20:29 +0000 (14:20 +0000)]
[LibTooling] Add insert/remove convenience functions for creating `ASTEdit`s.
Summary: `change()` is an all purpose function; the revision adds simple shortcuts for the specific operations of inserting (before/after) or removing source.
Reviewers: ilya-biryukov
Subscribers: cfe-commits
Tags: #clang
Differential Revision: https://reviews.llvm.org/D62621
llvm-svn: 362707
Haojian Wu [Thu, 6 Jun 2019 13:43:38 +0000 (13:43 +0000)]
[clang-tidy] Another attempt to fix misc-redundant-expression check.
Correct the fix of rL3627011, the isValueDependent guard was added in a wrong place in rL362701.
llvm-svn: 362706
Thomas Preud'homme [Thu, 6 Jun 2019 13:21:06 +0000 (13:21 +0000)]
FileCheck [6/12]: Introduce numeric variable definition
Summary:
This patch is part of a patch series to add support for FileCheck
numeric expressions. This specific patch introduces support for defining
numeric variable in a CHECK directive.
This commit introduces support for defining numeric variable from a
litteral value in the input text. Numeric expressions can then use the
variable provided it is on a later line.
Copyright:
- Linaro (changes up to diff 183612 of revision D55940)
- GraphCore (changes in later versions of revision D55940 and
in new revision created off D55940)
Reviewers: jhenderson, chandlerc, jdenny, probinson, grimar, arichardson, rnk
Subscribers: hiraditya, llvm-commits, probinson, dblaikie, grimar, arichardson, tra, rnk, kristina, hfinkel, rogfer01, JonChesterfield
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D60386
llvm-svn: 362705
Owen Reynolds [Thu, 6 Jun 2019 13:19:50 +0000 (13:19 +0000)]
[llvm-ar] Create thin archives with MRI scripts
This patch implements the "CREATE_THIN" MRI script command, allowing thin archives to be created via MRI scripts.
Differential Revision: https://reviews.llvm.org/D62919
llvm-svn: 362704
Sanjay Patel [Thu, 6 Jun 2019 13:18:20 +0000 (13:18 +0000)]
[InstCombine] add tests for loads of bitcasted vector pointer; NFC
llvm-svn: 362703
Nikolai Kosjar [Thu, 6 Jun 2019 13:13:27 +0000 (13:13 +0000)]
[clang-tidy] Make the plugin honor NOLINT
Instantiate a ClangTidyDiagnosticConsumer also for the plugin case and
let it forward the diagnostics to the external diagnostic engine that is
already in place.
One minor difference to the clang-tidy executable case is that the
compiler checks/diagnostics are referred to with their original name.
For example, for -Wunused-variable the plugin will refer to the check as
"-Wunused-variable" while the clang-tidy executable will refer to that
as "clang-diagnostic- unused-variable". This is because the compiler
diagnostics never reach ClangTidyDiagnosticConsumer.
Differential Revision: https://reviews.llvm.org/D61487
llvm-svn: 362702
Haojian Wu [Thu, 6 Jun 2019 12:58:48 +0000 (12:58 +0000)]
[clang-tidy] Fix an assertion failure in misc-redundant-expression.
Summary:
The assertion "isIntegerConstantExpr" is triggered in the
isIntegerConstantExpr(), we should not call it if the expression is value
dependent.
Reviewers: gribozavr
Subscribers: xazax.hun, cfe-commits
Tags: #clang
Differential Revision: https://reviews.llvm.org/D62947
llvm-svn: 362701
Adhemerval Zanella [Thu, 6 Jun 2019 12:38:11 +0000 (12:38 +0000)]
AArch64] Handle ISD::LRINT and ISD::LLRINT for float16
This patch is a follow up for D62018 to add lrint/llrint
support for float16.
Reviewed By: SjoerdMeijer
Differential Revision: https://reviews.llvm.org/D62863
llvm-svn: 362700
Benjamin Kramer [Thu, 6 Jun 2019 12:35:46 +0000 (12:35 +0000)]
Revert "[SCEV] Use wrap flags in InsertBinop"
This reverts commit r362687. Miscompiles llvm-profdata during selfhost.
llvm-svn: 362699
Adhemerval Zanella [Thu, 6 Jun 2019 11:53:26 +0000 (11:53 +0000)]
[AArch64] Handle ISD::LROUND and ISD::LLROUND for float16
This patch is a follow up for D61391 to add lround/llround
support for float16.
Reviewed By: SjoerdMeijer
Differential Revision: https://reviews.llvm.org/D62861
llvm-svn: 362698
Simon Pilgrim [Thu, 6 Jun 2019 11:15:36 +0000 (11:15 +0000)]
[X86][SSE] Add nonuniform constant vector test for PR42105
llvm-svn: 362697
Dmitri Gribenko [Thu, 6 Jun 2019 10:37:06 +0000 (10:37 +0000)]
Include what you use in LanaiAsmParser.cpp
llvm-svn: 362696
Simon Pilgrim [Thu, 6 Jun 2019 10:21:18 +0000 (10:21 +0000)]
[DAGCombine] Cleanup isNegatibleForFree/GetNegatedExpression. NFCI.
Prep work for PR42105 - clang-format, use auto for cast and merge nested if()s
llvm-svn: 362695
Simon Pilgrim [Thu, 6 Jun 2019 10:15:26 +0000 (10:15 +0000)]
Fix whitespace indentation. NFCI.
Tabs are not our friends.
llvm-svn: 362694
Luis Marques [Thu, 6 Jun 2019 10:12:28 +0000 (10:12 +0000)]
[RISCV] Disable test/Analysis/CostModel/RISCV tests if RISCV backend not built
Adds missing lit.local.cfg. Fixes rL362691.
llvm-svn: 362693
Petar Avramovic [Thu, 6 Jun 2019 10:00:41 +0000 (10:00 +0000)]
[MIPS GlobalISel] Select sqrt
Select G_FSQRT for MIPS32.
Differential Revision: https://reviews.llvm.org/D62905
llvm-svn: 362692
Luis Marques [Thu, 6 Jun 2019 09:47:53 +0000 (09:47 +0000)]
[RISCV] Add CostModel GEP tests
Differential Revision: https://reviews.llvm.org/D61185
llvm-svn: 362691
Petar Avramovic [Thu, 6 Jun 2019 09:22:37 +0000 (09:22 +0000)]
[MIPS GlobalISel] Select fabs
Select G_FABS for MIPS32.
Differential Revision: https://reviews.llvm.org/D62903
llvm-svn: 362690
Petar Avramovic [Thu, 6 Jun 2019 09:16:58 +0000 (09:16 +0000)]
[MIPS GlobalISel] Select fpext and fptrunc
Select G_FPEXT and G_FPTRUNC for MIPS32.
Differential Revision: https://reviews.llvm.org/D62902
llvm-svn: 362689
Petar Avramovic [Thu, 6 Jun 2019 09:02:24 +0000 (09:02 +0000)]
[MIPS GlobalISel] Select floor and ceil
Select G_FFLOOR and G_FCEIL for MIPS32.
Differential Revision: https://reviews.llvm.org/D62901
llvm-svn: 362688
Sam Parker [Thu, 6 Jun 2019 08:56:26 +0000 (08:56 +0000)]
[SCEV] Use wrap flags in InsertBinop
If the given SCEVExpr has no (un)signed flags attached to it, transfer
these to the resulting instruction or use them to find an existing
instruction.
Differential Revision: https://reviews.llvm.org/D61934
llvm-svn: 362687
Ilya Biryukov [Thu, 6 Jun 2019 08:32:25 +0000 (08:32 +0000)]
[clangd] Remove unused signature help quality signal. NFC
ContainsActiveParameter is not used anywhere, set incorrectly (see the
removed FIXME) and has no unit tests.
Removing it to simplify the code.
llvm-svn: 362686
Pengfei Wang [Thu, 6 Jun 2019 08:28:42 +0000 (08:28 +0000)]
[X86] Add ENQCMD instructions
For more details about these instructions, please refer to the latest
ISE document:
https://software.intel.com/en-us/download/intel-architecture-instruction-set-extensions-programming-reference.
Patch by Tianqing Wang (tianqing)
Differential Revision: https://reviews.llvm.org/D62282
llvm-svn: 362685
Dylan McKay [Thu, 6 Jun 2019 08:06:50 +0000 (08:06 +0000)]
[AVR] Fix the 'load.ll' test after r362351
In that commit, the 'load.ll' test was modified, but still failed.
This commit updates the test so that it now passes.
llvm-svn: 362684
Ilya Biryukov [Thu, 6 Jun 2019 08:06:25 +0000 (08:06 +0000)]
Update AST matchers tutorial to use monorepo layout
The docs were inconsistent: requesting the user to clone the monorepo,
and then continuing with the `llvm/tools/clang` layout.
Follow-up to a question on cfe-dev:
http://lists.llvm.org/pipermail/cfe-dev/2019-June/062518.html
llvm-svn: 362683
Douglas Yung [Thu, 6 Jun 2019 08:04:33 +0000 (08:04 +0000)]
Fixup files added in r362636 to build with gcc 5.4. NFCI
llvm-svn: 362682
Amara Emerson [Thu, 6 Jun 2019 07:58:37 +0000 (07:58 +0000)]
[AArch64][GlobalISel] Add manual selection support for G_ZEXTLOADs to s64.
We already get support for G_ZEXTLOAD to s32 from the importer, but it can't
deal with the SUBREG_TO_REG in the pattern. Tweaking the existing manual
selection code for G_LOAD to handle an additional SUBREG_TO_REG when dealing
with G_ZEXTLOAD isn't much work.
Also add tests to check the imported pattern selections to s32 work.
llvm-svn: 362681
Vlad Tsyrklevich [Thu, 6 Jun 2019 07:51:39 +0000 (07:51 +0000)]
Revert "Speedup to_string and to_wstring for integers using stack buffer and SSO."
This reverts commit
7ce7110e6d964778141c0866488e154b1ce73d69, it was
causing sanitizer bot failures due to changing behavior of
std::to_string(). See https://reviews.llvm.org/D59178#1532023
llvm-svn: 362680
Haojian Wu [Thu, 6 Jun 2019 07:48:55 +0000 (07:48 +0000)]
[clang-tidy] Fix make-unique tests on C++2a.
Summary:
These test cases are illgal in C++2a ("new Foo{}" needs to see the
default constructor), so move them to the C++14-only tests.
Reviewers: gribozavr
Subscribers: xazax.hun, cfe-commits
Tags: #clang
Differential Revision: https://reviews.llvm.org/D62845
llvm-svn: 362679
Mikhail Dvorskiy [Thu, 6 Jun 2019 07:34:46 +0000 (07:34 +0000)]
[pstl] The optimized parallel versions of sort, stable_sort algorithms, TBB parallel backend.
Summary:
A modification of the parallel sorting algorithm, additionally optimized for a partially sorted array.
Reviewers: rodgert
ldionne
Differential Revision: https://reviews.llvm.org/D59925
llvm-svn: 362678
Amara Emerson [Thu, 6 Jun 2019 07:33:47 +0000 (07:33 +0000)]
[AArch64][GlobalISel] Add the new changes to fix PR42129 that were supposed to go into r362666.
The changes weren't staged so ended up just re-commiting the unmodified reverted change.
llvm-svn: 362677
Xinliang David Li [Thu, 6 Jun 2019 06:35:18 +0000 (06:35 +0000)]
[Profile]: Add runtime interface to specify file handle for profile data.
Author: Sajjad Mirza
Differential Revision: http://reviews.llvm.org/D62541
llvm-svn: 362676
Craig Topper [Thu, 6 Jun 2019 05:41:27 +0000 (05:41 +0000)]
[X86] Don't turn avx masked.load with constant mask into masked.load+vselect when passthru value is all zeroes.
This is intended to enable the use of an immediate blend or
more optimal instruction. But if the passthru is zero we don't
need any additional instructions.
llvm-svn: 362675
Craig Topper [Thu, 6 Jun 2019 05:41:22 +0000 (05:41 +0000)]
[X86] Add test case for masked load with constant mask and all zeros passthru.
avx/avx2 masked loads only support all zeros for passthru in hardware.
So we have to emit a blend for all other values. We have an optimization
that tries to optimize this blend if the mask is constant. But we
don't need to perform this optimization if the passthru value is zero
which doesn't need the blend at all.
llvm-svn: 362674
George Burgess IV [Thu, 6 Jun 2019 05:21:45 +0000 (05:21 +0000)]
android: add a close-on-exec check on pipe()
On Android, pipe() is better to be replaced by pipe2() with O_CLOEXEC
flag to avoid file descriptor leakage.
Patch by Jian Cai!
Differential Revision: https://reviews.llvm.org/D61967
llvm-svn: 362673
George Burgess IV [Thu, 6 Jun 2019 05:21:39 +0000 (05:21 +0000)]
android: add a close-on-exec check on pipe2()
On Android, pipe2() is better to set O_CLOEXEC flag to avoid file
descriptor leakage.
Patch by Jian Cai!
Differential Revision: https://reviews.llvm.org/D62049
llvm-svn: 362672
Thomas Lively [Thu, 6 Jun 2019 01:38:12 +0000 (01:38 +0000)]
[WebAssembly] Support Leak Sanitizer on Emscripten
Summary:
LSan is currently being ported to Emscripten and mostly works.
Enabling the support in upstream would simplify testing.
Patch by Guanzhong Chen.
Reviewers: tlively, aheejin
Reviewed By: aheejin
Subscribers: dschuff, sbc100, jgravelle-google, sunfish, cfe-commits
Tags: #clang
Differential Revision: https://reviews.llvm.org/D62830
llvm-svn: 362667
Amara Emerson [Wed, 5 Jun 2019 23:46:16 +0000 (23:46 +0000)]
Revert "Revert "[AArch64][GlobalISel] Optimize G_FCMP + G_SELECT pairs when G_SELECT is fp""
When looking through copies, make sure to not try to find the vreg def of a physreg.
Normally getVRegDef will return nullptr in this case, but if there happens to be
multiple defs then it will assert.
This fixes PR42129.
llvm-svn: 362666
Matt Arsenault [Wed, 5 Jun 2019 22:37:50 +0000 (22:37 +0000)]
AMDGPU: Don't fix emergency stack slot at offset 0
This forced the caller to be aware of this, which is an ugly ABI
feature.
Partially reverts r295877. The original reasons for doing this are
mostly fixed. Alloca is now in a non-0 address space, so it should be
OK to have 0 as a valid pointer. Since we treat the absolute address
as the pointer value, this part only really needed to apply to
kernels.
Since r357093, we avoid the need to increment/decrement the offset
register in more cases, and since r354816 the scavenger can fail
without spilling, so it's less critical that we try to avoid an offset
that fits in the MUBUF offset.
Restrict to callable functions for now to split this into 2 steps to
limit thte number of test updates and in case anything breaks.
llvm-svn: 362665
Cameron McInally [Wed, 5 Jun 2019 22:37:05 +0000 (22:37 +0000)]
[MSAN] Add unary FNeg visitor to the MemorySanitizer
Differential Revision: https://reviews.llvm.org/D62909
llvm-svn: 362664
Ulrich Weigand [Wed, 5 Jun 2019 22:33:10 +0000 (22:33 +0000)]
Allow target to handle STRICT floating-point nodes
The ISD::STRICT_ nodes used to implement the constrained floating-point
intrinsics are currently never passed to the target back-end, which makes
it impossible to handle them correctly (e.g. mark instructions are depending
on a floating-point status and control register, or mark instructions as
possibly trapping).
This patch allows the target to use setOperationAction to switch the action
on ISD::STRICT_ nodes to Legal. If this is done, the SelectionDAG common code
will stop converting the STRICT nodes to regular floating-point nodes, but
instead pass the STRICT nodes to the target using normal SelectionDAG
matching rules.
To avoid having the back-end duplicate all the floating-point instruction
patterns to handle both strict and non-strict variants, we make the MI
codegen explicitly aware of the floating-point exceptions by introducing
two new concepts:
- A new MCID flag "mayRaiseFPException" that the target should set on any
instruction that possibly can raise FP exception according to the
architecture definition.
- A new MI flag FPExcept that CodeGen/SelectionDAG will set on any MI
instruction resulting from expansion of any constrained FP intrinsic.
Any MI instruction that is *both* marked as mayRaiseFPException *and*
FPExcept then needs to be considered as raising exceptions by MI-level
codegen (e.g. scheduling).
Setting those two new flags is straightforward. The mayRaiseFPException
flag is simply set via TableGen by marking all relevant instruction
patterns in the .td files.
The FPExcept flag is set in SDNodeFlags when creating the STRICT_ nodes
in the SelectionDAG, and gets inherited in the MachineSDNode nodes created
from it during instruction selection. The flag is then transfered to an
MIFlag when creating the MI from the MachineSDNode. This is handled just
like fast-math flags like no-nans are handled today.
This patch includes both common code changes required to implement the
new features, and the SystemZ implementation.
Reviewed By: andrew.w.kaylor
Differential Revision: https://reviews.llvm.org/D55506
llvm-svn: 362663
Petr Hosek [Wed, 5 Jun 2019 22:27:31 +0000 (22:27 +0000)]
Revert "[AArch64][GlobalISel] Optimize G_FCMP + G_SELECT pairs when G_SELECT is fp"
This reverts commit r362435 as this triggers ICE, see PR42129 for details.
llvm-svn: 362662
Matt Arsenault [Wed, 5 Jun 2019 22:20:47 +0000 (22:20 +0000)]
AMDGPU: Invert frame index offset interpretation
Since the beginning, the offset of a frame index has been consistently
interpreted backwards. It was treating it as an offset from the
scratch wave offset register as a frame register. The correct
interpretation is the offset from the SP on entry to the function,
before the prolog. Frame index elimination then should select either
SP or another register as an FP.
Treat the scratch wave offset on kernel entry as the pre-incremented
SP. Rely more heavily on the standard hasFP and frame pointer
elimination logic, and clean up the private reservation code. This
saves a copy in most callee functions.
The kernel prolog emission code is still kind of a mess relying on
checking the uses of physical registers, which I would prefer to
eliminate.
Currently selection directly emits MUBUF instructions, which require
using a reference to some register. Use the register chosen for SP,
and then ignore this later. This should probably be cleaned up to use
pseudos that don't refer to any specific base register until frame
index elimination.
Add a workaround for shaders using large numbers of SGPRs. I'm not
sure these cases were ever working correctly, since as far as I can
tell the logic for figuring out which SGPR is the scratch wave offset
doesn't match up with the shader input initialization in the shader
programming guide.
llvm-svn: 362661
Louis Dionne [Wed, 5 Jun 2019 21:54:34 +0000 (21:54 +0000)]
[libcxx][test] Include test_workarounds.h where needed
Some tests require `TEST_WORKAROUND_CONSTEXPR_IMPLIES_NOEXCEPT`, but they
did not include the header that defines that macro.
Thanks to Michael Park for the patch.
Differential Revision: https://reviews.llvm.org/D62920
llvm-svn: 362660
Marshall Clow [Wed, 5 Jun 2019 21:52:19 +0000 (21:52 +0000)]
Update issue statuses. Reviewed as https://reviews.llvm.org/D62932
llvm-svn: 362659
Joseph Tremoulet [Wed, 5 Jun 2019 21:30:10 +0000 (21:30 +0000)]
[EarlyCSE] Add tests for negated min/max/abs [NFC]
Summary:
I'm planning to update the hashing logic to recognize their equivalence
in a subsequent change (D62644).
Reviewers: spatel
Reviewed By: spatel
Subscribers: llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D62918
llvm-svn: 362657
Mircea Trofin [Wed, 5 Jun 2019 21:28:13 +0000 (21:28 +0000)]
[CallSite removal] Refactoring llvm::InlineFunction APIs
Summary:
This change only unifies the API previous API pair accepting
CallInst and InvokeInst, thus making it easier to refactor
inliner pass ode to CallBase. The implementation of the unified
API still relies on the CallSite implementation.
Reviewers: eraman, chandlerc, jdoerfert
Reviewed By: jdoerfert
Subscribers: jdoerfert, hiraditya, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D62283
llvm-svn: 362656
Sanjay Patel [Wed, 5 Jun 2019 21:26:52 +0000 (21:26 +0000)]
[InstCombine] simplify code for bitcast of insertelement; NFC
llvm-svn: 362655
Matt Arsenault [Wed, 5 Jun 2019 21:15:52 +0000 (21:15 +0000)]
NewGVN: Handle addrspacecast
The AllConstant check needs to be moved out of the if/else if chain to
avoid a test regression. The "there is no SimplifyZExt" comment
puzzles me, since there is SimplifyCastInst. Additionally, the
Simplify* calls seem to not see the operand as constant, so this needs
to be tried if the simplify failed.
llvm-svn: 362653
Tim Northover [Wed, 5 Jun 2019 21:12:14 +0000 (21:12 +0000)]
LLVM IR: Generate new-style byval-with-Type from Clang
LLVM IR recently added a Type parameter to the byval Attribute, so that
when pointers become opaque and no longer have an element type the
information will still be present in IR.
For now the Type parameter is optional (which is why Clang didn't need
this change at the time), but it will become mandatory soon.
llvm-svn: 362652
Akira Hatanaka [Wed, 5 Jun 2019 21:11:06 +0000 (21:11 +0000)]
Fix FileCheck prefixes in test case.
llvm-svn: 362651
Sam Clegg [Wed, 5 Jun 2019 21:08:30 +0000 (21:08 +0000)]
[WebAssembly] Improve lto/comdat.ll test. NFC.
We were not previously testing the comdat exclusion in bitcode objects
because we were linking two copies of the .bc file and the
`linkonce_odr` linkage type was removing the duplicate `_start` at
the LTO stage.
Now we link an bitcode and non-bitcode version both of which contains a
copy of _start. We link them in both orders, which means this test will
fail if comdat exclusion is not working correctly in bitcode parsing.
Differential Revision: https://reviews.llvm.org/D62923
llvm-svn: 362650
Marshall Clow [Wed, 5 Jun 2019 21:04:26 +0000 (21:04 +0000)]
Speedup to_string and to_wstring for integers using stack buffer and SSO. Reviewed as https://reviews.llvm.org/D59178 Thanks to ivafanas for all his work on this patch.
llvm-svn: 362649
Craig Topper [Wed, 5 Jun 2019 21:00:31 +0000 (21:00 +0000)]
[X86] Fix mistake that marked VADDSSrrb_Int/VADDSDrrb_Int/VMULSSrrb_Int/VMULSDrrb_Int as commutable.
One of the sources controls the pass through value for the upper bits
of the result so we can't really commute it.
In practice this problem isn't a functional issue because we would
only try to commute this instruction in order to fold a load. But
we can't do embedded rounding and fold a load at the same time. So
the load fold would never succeed so I don't think we would ever
commute or at least keep the version after commuting.
llvm-svn: 362647
Jan Korous [Wed, 5 Jun 2019 20:59:48 +0000 (20:59 +0000)]
[clang-format][NFC] Fix BS_Allman style example in the header docs are generated from
Differential Revision: https://reviews.llvm.org/D61729
llvm-svn: 362646
Dan Gohman [Wed, 5 Jun 2019 20:59:20 +0000 (20:59 +0000)]
[WebAssembly] Use Emscripten triples in PIC tests.
With r362638, llc doesn't support -relocation-model=pic with non-Emscripten
triples. Update these tests in lld which use -relocation-model=pic to also
use Emscripten triples.
llvm-svn: 362645
Whitney Tsang [Wed, 5 Jun 2019 20:42:47 +0000 (20:42 +0000)]
[LOOPINFO] Extend Loop object to add utilities to get the loop bounds,
step, and loop induction variable.
Summary: This PR extends the loop object with more utilities to get loop
bounds, step, and loop induction variable. There already exists passes
which try to obtain the loop induction variable in their own pass, e.g.
loop interchange. It would be useful to have a common area to get these
information.
/// Example:
/// for (int i = lb; i < ub; i+=step)
/// <loop body>
/// --- pseudo LLVMIR ---
/// beforeloop:
/// guardcmp = (lb < ub)
/// if (guardcmp) goto preheader; else goto afterloop
/// preheader:
/// loop:
/// i1 = phi[{lb, preheader}, {i2, latch}]
/// <loop body>
/// i2 = i1 + step
/// latch:
/// cmp = (i2 < ub)
/// if (cmp) goto loop
/// exit:
/// afterloop:
///
/// getBounds
/// getInitialIVValue --> lb
/// getStepInst --> i2 = i1 + step
/// getStepValue --> step
/// getFinalIVValue --> ub
/// getCanonicalPredicate --> '<'
/// getDirection --> Increasing
/// getInductionVariable --> i1
/// getAuxiliaryInductionVariable --> {i1}
/// isCanonical --> false
Reviewers: kbarton, hfinkel, dmgreen, Meinersbur, jdoerfert, syzaara,
fhahn
Reviewed By: kbarton
Subscribers: tvvikram, bmahjour, etiotto, fhahn, jsji, hiraditya,
llvm-commits
Tag: LLVM
Differential Revision: https://reviews.llvm.org/D60565
llvm-svn: 362644
Tim Northover [Wed, 5 Jun 2019 20:38:17 +0000 (20:38 +0000)]
InstCombine: correctly change byval type attribute alongside call args.
When the byval attribute has a type, it must match the pointee type of
any parameter; but InstCombine was not updating the attribute when
folding casts of various kinds away.
llvm-svn: 362643
Tim Northover [Wed, 5 Jun 2019 20:37:47 +0000 (20:37 +0000)]
IR: make getParamByValType Just Work. NFC.
Most parts of LLVM don't care whether the byval type is derived from an
explicit Attribute or from the parameter's pointee type, so it makes
sense for the main access function to just return the right value.
The very few users who do care (only BitcodeReader so far) can find out
how it's specified by accessing the Attribute directly.
llvm-svn: 362642
Matt Arsenault [Wed, 5 Jun 2019 20:32:32 +0000 (20:32 +0000)]
AMDGPU: Remove amdgpu-max-work-group-size attribute
This has been deprecated for a long time, and mesa recently switched
to amdgpu-flat-work-group-size.
llvm-svn: 362641
Matt Arsenault [Wed, 5 Jun 2019 20:32:25 +0000 (20:32 +0000)]
AMDGPU: Fix using 2 different enums for same operand flags
These enums are really for the same namespace of flags set on
arbitrary MachineOperands, so merge them to avoid value collisions.
llvm-svn: 362640
Davide Italiano [Wed, 5 Jun 2019 20:23:03 +0000 (20:23 +0000)]
[NativeProcessDarwin] Remove dead code. NFCI.
llvm-svn: 362639
Dan Gohman [Wed, 5 Jun 2019 20:01:01 +0000 (20:01 +0000)]
[WebAssembly] Limit PIC support to the Emscripten target
The current PIC support currently only works with Emscripten, so
disable it for other targets.
This is the PIC portion of https://reviews.llvm.org/D62542.
Reviewed By: dschuff, sbc100
llvm-svn: 362638
Pengxuan Zheng [Wed, 5 Jun 2019 19:44:08 +0000 (19:44 +0000)]
[cmake] Remove duplicate TestingSupport library for linking
Summary: This patch cleans up a duplicate use of TestingSupport library.
Subscribers: mgorny, cfe-commits
Tags: #clang
Differential Revision: https://reviews.llvm.org/D62924
llvm-svn: 362637