Roman Lebedev [Tue, 2 Jul 2019 09:27:34 +0000 (09:27 +0000)]
[NFC][InstCombine] Add tests for "redundant shift input masking" (PR42456)
https://bugs.llvm.org/show_bug.cgi?id=42456
https://rise4fun.com/Alive/Vf1p
llvm-svn: 364894
Haojian Wu [Tue, 2 Jul 2019 09:16:21 +0000 (09:16 +0000)]
[clangd] Collect the refs when the main file is header.
Summary:
Previously, we only collect refs of the symbols which are declared in
the preamble and referenced in the main file, it works well when the
main file is .cpp file.
However, when the main file is .h file (when opening a .h file in the
editor), we don't collect refs of the symbol declared in this file, so we miss
these refs in our dynamic index.
A typical scenario:
1. Open Foo.h (which contains class Foo)
2. Open Foo.cpp, call find references for Foo
And we only get refs from Foo.cpp.
Reviewers: ilya-biryukov
Subscribers: MaskRay, jkorous, arphaman, kadircet, cfe-commits
Tags: #clang
Differential Revision: https://reviews.llvm.org/D63818
llvm-svn: 364893
Rainer Orth [Tue, 2 Jul 2019 08:40:29 +0000 (08:40 +0000)]
[Sanitizers] Remove obsolete OpenFile from sanitizer_solaris.cc
I noticed that the instance of OpenFile in sanitizer_solaris.cc is no
longer needed.
Removed as follows, tested on x86_64-pc-solaris2.11.
Differential Revision: https://reviews.llvm.org/D63764
llvm-svn: 364892
Benjamin Kramer [Tue, 2 Jul 2019 08:01:41 +0000 (08:01 +0000)]
[ASTImporter] Make headers self-contained
llvm-svn: 364891
Pavel Labath [Tue, 2 Jul 2019 07:57:08 +0000 (07:57 +0000)]
[DWARF] Add one more type unit test
This test passes already, but it seems interesting to test that we can
jump between type units in different dwo files nonetheless.
llvm-svn: 364890
Gabor Marton [Tue, 2 Jul 2019 07:36:39 +0000 (07:36 +0000)]
[ASTImporter] Structural eq: handle DependentScopeDeclRefExpr
Summary:
Structural equivalence did not handle dependent template args properly
when the arg contained a DependentScopeDeclRefExpr.
Reviewers: a_sidorin, a.sidorin
Subscribers: rnkovacs, dkrupp, Szelethus, gamesh411, cfe-commits
Tags: #clang
Differential Revision: https://reviews.llvm.org/D62329
llvm-svn: 364889
Amara Emerson [Tue, 2 Jul 2019 06:04:46 +0000 (06:04 +0000)]
[TailDuplicator] Fix copy instruction emitting into the wrong block.
The code for duplicating instructions could sometimes try to emit copies
intended to deal with unconstrainable register classes to the tail block of the
original instruction, rather than before the newly cloned instruction in the
predecessor block.
This was exposed by GlobalISel on arm64.
Differential Revision: https://reviews.llvm.org/D64049
llvm-svn: 364888
Craig Topper [Tue, 2 Jul 2019 05:53:37 +0000 (05:53 +0000)]
[X86] Add PreprocessISelDAG support for turning ISD::FP_TO_SINT/UINT into X86ISD::CVTTP2SI/CVTTP2UI and to reduce the number of isel patterns.
llvm-svn: 364887
QingShan Zhang [Tue, 2 Jul 2019 03:28:52 +0000 (03:28 +0000)]
[PowerPC] Implement the areMemAccessesTriviallyDisjoint hook
After implemented this hook, we will model the memory dependency in the scheduling dependency graph more precise,
and will have more opportunity to reorder the load/stores, as they didn't have the dependency at some condition
Differential Revision: https://reviews.llvm.org/D63804
llvm-svn: 364886
Marshall Clow [Tue, 2 Jul 2019 03:23:06 +0000 (03:23 +0000)]
Update status of papers for upcoming WG21 meeting. NFC
llvm-svn: 364885
Marshall Clow [Tue, 2 Jul 2019 03:21:16 +0000 (03:21 +0000)]
Use new '__libcpp_is_constant_evaluated' call to remove an '#ifdef' from the bit code. NFC
llvm-svn: 364884
Zi Xuan Wu [Tue, 2 Jul 2019 02:54:52 +0000 (02:54 +0000)]
[DAGCombiner] Exploiting more about the transformation of TransformFPLoadStorePair function
For a given floating point load / store pair, if the load value isn't used by any other operations,
then consider transforming the pair to integer load / store operations if the target deems the transformation profitable.
And we can exploiting much more when there are other operation nodes with chain operand between the load/store pair
so long as we keep the chain ordering original. We only replace the register used to load/store from float to integer.
I only add testcase in ARM because the TLI.isDesirableToTransformToIntegerOp hook is only enabled in ARM target.
Differential Revision: https://reviews.llvm.org/D60601
llvm-svn: 364883
Artem Dergachev [Tue, 2 Jul 2019 02:17:56 +0000 (02:17 +0000)]
[analyzer] exploded-graph-rewriter: Implement a dark color scheme.
Addresses a popular request. Activated via --dark.
Differential Revision: https://reviews.llvm.org/D64056
llvm-svn: 364882
Artem Dergachev [Tue, 2 Jul 2019 02:17:53 +0000 (02:17 +0000)]
[analyzer] exploded-graph-rewriter: Improve program point dumps.
- Take advantage of the stmt_point_kind.
- Dump block IDs for BlockEntrance nodes.
- Don't dump huge compound statements on PurgeDeadSymbols nodes.
- Rename Edge to BlockEdge for consistency.
- Tweak colors.
Differential Revision: https://reviews.llvm.org/D64051
llvm-svn: 364881
Artem Dergachev [Tue, 2 Jul 2019 02:17:50 +0000 (02:17 +0000)]
[analyzer] exploded-graph-rewriter: Add support for objects under construction.
This trait is Environment-like, so there was a chance to re-use a lot of code.
Differential Revision: https://reviews.llvm.org/D64047
llvm-svn: 364880
Marshall Clow [Tue, 2 Jul 2019 00:20:06 +0000 (00:20 +0000)]
Mark the newly added '__libcpp_is_constant_evaluated' as 'inline', since it can be included multiple times by multiple headers, and we don't want 'duplicate definition' errors.
llvm-svn: 364879
Reid Kleckner [Mon, 1 Jul 2019 23:53:16 +0000 (23:53 +0000)]
Revert Remove scudo standalone tests from check-all
This reverts r364877 (git commit
dfae3705b75e6b5e1e163c78ab2df705a3388d89)
This didn't solve my problem so I've reverted it.
llvm-svn: 364878
Reid Kleckner [Mon, 1 Jul 2019 23:29:59 +0000 (23:29 +0000)]
Remove scudo standalone tests from check-all
They appear to fail to link in various 32-bit configurations for unknown
reasons. This change was already reverted, and it seems preferable to me
to make forward progress and remove this once the problems are fully
understood.
llvm-svn: 364877
Jordan Rupprecht [Mon, 1 Jul 2019 23:29:46 +0000 (23:29 +0000)]
Revert Recommit [PowerPC] Update P9 vector costs for insert/extract element
This reverts r364557 (git commit
9f7f5858fe46b8e706e87a83e2fd0a2678be619e)
This crashes as reported on the commit thread. Repro instructions TBD.
llvm-svn: 364876
Nathan Huckleberry [Mon, 1 Jul 2019 23:29:10 +0000 (23:29 +0000)]
[analyzer] Support kfree in MallocChecker
Summary:
kmalloc is freed with kfree in the linux kernel. kmalloc support was
added in r204832, but kfree was not. Adding kfree fixes incorrectly
detected memory leaks.
Reviewers: NoQ, nickdesaulniers, dcoughlin, Szelethus
Reviewed By: NoQ, Szelethus
Subscribers: xazax.hun, baloghadamsoftware, szepet, a.sidorin, mikhail.ramalho, Szelethus, donat.nagy, dkrupp, Charusso, cfe-commits
Tags: #clang
Differential Revision: https://reviews.llvm.org/D64030
llvm-svn: 364875
Julian Lettner [Mon, 1 Jul 2019 23:23:18 +0000 (23:23 +0000)]
[TSan] Improve handling of stack pointer mangling in {set,long}jmp, pt.3
Remove unnecessary computation of mangled SP for x86_64 architecture.
Reviewed By: dvyukov
Differential Revision: https://reviews.llvm.org/D63944
llvm-svn: 364874
Marshall Clow [Mon, 1 Jul 2019 23:16:46 +0000 (23:16 +0000)]
Add a private call '__libcpp_is_constant_evaluated' which 'works' for old language versions and w/o any compiler support. 'Working', in this case, means that it returns false in those cases.
llvm-svn: 364873
Keno Fischer [Mon, 1 Jul 2019 23:15:07 +0000 (23:15 +0000)]
[cmake] With utils disabled, don't build tblgen in cross mode
Summary:
In cross mode, we build a separate NATIVE tblgen that runs on the
host and is used during the build. Separately, we have a flag that
disables building all executables in utils/. Of course generally,
this doesn't turn off tblgen, since we need that during the build.
In cross mode, however, that tblegen is useless since we never
actually use it. Furthermore, it can be actively problematic if the
cross toolchain doesn't like building executables for whatever reason.
And even if building executables works fine, we can at least save
compile time by omitting it from the target build. There's two changes
needed to make this happen:
- Stop creating a dependency from the native tool to the target tool.
No such dependency is required for a correct build, so I'm not entirely
sure why it was there in the first place.
- If utils were disabled on the CMake command line and we're in cross mode,
respect that by excluding it from the install target (using EXCLUDE_FROM_ALL).
Reviewers: smeenai
Differential Revision: https://reviews.llvm.org/D64032
llvm-svn: 364872
Artem Dergachev [Mon, 1 Jul 2019 23:06:08 +0000 (23:06 +0000)]
[analyzer] exploded-graph-rewriter: NFC: Add a forgotten test file.
This fell off of r364865.
llvm-svn: 364871
Artem Dergachev [Mon, 1 Jul 2019 23:02:18 +0000 (23:02 +0000)]
[analyzer] Fix invalidation when returning into a ctor initializer.
Due to RVO the target region of a function that returns an object by
value isn't necessarily a temporary object region; it may be an
arbitrary memory region. In particular, it may be a field of a bigger
object.
Make sure we don't invalidate the bigger object when said function is
evaluated conservatively.
Differential Revision: https://reviews.llvm.org/D63968
llvm-svn: 364870
Artem Dergachev [Mon, 1 Jul 2019 23:02:14 +0000 (23:02 +0000)]
[analyzer] NonnullGlobalConstants: Don't be confused by a _Nonnull attribute.
The NonnullGlobalConstants checker models the rule "it doesn't make sense
to make a constant global pointer and initialize it to null"; it makes sure
that whatever it's initialized with is known to be non-null.
Ironically, annotating the type of the pointer as _Nonnull breaks the checker.
Fix handling of the _Nonnull annotation so that it was instead one more reason
to believe that the value is non-null.
Differential Revision: https://reviews.llvm.org/D63956
llvm-svn: 364869
Artem Dergachev [Mon, 1 Jul 2019 23:02:10 +0000 (23:02 +0000)]
[analyzer] CStringChecker: Modernize to use CallDescriptions.
This patch uses the new CDF_MaybeBuiltin flag to handle C library functions.
It's mostly an NFC/refactoring pass, but it does fix a bug in handling memset()
when it expands to __builtin___memset_chk() because the latter has
one more argument and memset() handling code was trying to match
the exact number of arguments. Now the code is deduplicated and there's
less room for mistakes.
Differential Revision: https://reviews.llvm.org/D62557
llvm-svn: 364868
Artem Dergachev [Mon, 1 Jul 2019 23:02:07 +0000 (23:02 +0000)]
[analyzer] NFC: CallDescription: Implement describing C library functions.
When matching C standard library functions in the checker, it's easy to forget
that they are often implemented as macros that are expanded to builtins.
Such builtins would have a different name, so matching the callee identifier
would fail, or may sometimes have more arguments than expected, so matching
the exact number of arguments would fail, but this is fine as long as we have
all the arguments that we need in their respective places.
This patch adds a set of flags to the CallDescription class so that to handle
various special matching rules, and adds the first flag into this set,
which enables a more fuzzy matching for functions that
may be implemented as compiler builtins.
Differential Revision: https://reviews.llvm.org/D62556
llvm-svn: 364867
Artem Dergachev [Mon, 1 Jul 2019 23:02:03 +0000 (23:02 +0000)]
[analyzer] NFC: Add a convenient CallDescriptionMap class.
It encapsulates the procedure of figuring out whether a call event
corresponds to a function that's modeled by a checker.
Checker developers no longer need to worry about performance of
lookups into their own custom maps.
Add unittests - which finally test CallDescription itself as well.
Differential Revision: https://reviews.llvm.org/D62441
llvm-svn: 364866
Artem Dergachev [Mon, 1 Jul 2019 23:01:59 +0000 (23:01 +0000)]
[analyzer] exploded-graph-rewriter: Add support for dynamic types.
Slightly cleanup emission of horizontal lines and unhardcode the title
for generic maps.
Differential Revision: https://reviews.llvm.org/D64041
llvm-svn: 364865
Artem Dergachev [Mon, 1 Jul 2019 23:01:55 +0000 (23:01 +0000)]
[analyzer] exploded-graph-rewriter: Implement program point tags.
Keep them on a separate line for more visibility.
Differential Revision: https://reviews.llvm.org/D63965
llvm-svn: 364864
Marshall Clow [Mon, 1 Jul 2019 23:00:34 +0000 (23:00 +0000)]
Update status for bit operations
llvm-svn: 364863
Marshall Clow [Mon, 1 Jul 2019 23:00:32 +0000 (23:00 +0000)]
Bit Operations: P0556, P0553 and P1355. Reviewed as: https://reviews.llvm.org/D51262
llvm-svn: 364862
Reid Kleckner [Mon, 1 Jul 2019 22:43:39 +0000 (22:43 +0000)]
[PGO] Update ICP pass for recent byval type changes
Fixes verifier errors encountered in PR42413.
Reviewers: xur, t.p.northover, inglorion, gbiv, george.burgess.iv
Differential Revision: https://reviews.llvm.org/D63842
llvm-svn: 364861
Stella Stamenova [Mon, 1 Jul 2019 22:12:55 +0000 (22:12 +0000)]
[lldb] [lldbsuite] Use a unique class name for TestValueVarUpdate
It looks like when this test was added, it was based on TestHelloWorld and it ended up with the same class name. This is an issue because the logs associated with the tests use the class name as the identifier for the file and if two tests have the same name their logs overwrite each other. On non-windows, this just means we lose one of the logs, but on Windows this means that one of the tests will fail occasionally because the file are locked by the other test.
llvm-svn: 364860
Matt Arsenault [Mon, 1 Jul 2019 22:01:05 +0000 (22:01 +0000)]
AMDGPU: Correct properties for adjcallstack* pseudos
These should be SALU writes, and these are lowered to instructions
that def SCC.
llvm-svn: 364859
Matt Arsenault [Mon, 1 Jul 2019 22:00:59 +0000 (22:00 +0000)]
Fix broken C++ mode comment
llvm-svn: 364858
Huihui Zhang [Mon, 1 Jul 2019 22:00:32 +0000 (22:00 +0000)]
[InstCombine][NFCI] Update test cases in onehot_merge.ll
Use both one bit and signbit shifting to check for one bit merge.
Reviewers: lebedev.ri, spatel, efriedma, craig.topper
Reviewed By: lebedev.ri
Subscribers: llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D63903
llvm-svn: 364857
Sanjay Patel [Mon, 1 Jul 2019 22:00:00 +0000 (22:00 +0000)]
[InstCombine] reduce more checks for power-of-2-or-zero using ctpop
Extends the transform from:
rL364341
...to include another (more common?) pattern that tests whether a
value is a power-of-2 (including or excluding zero).
llvm-svn: 364856
JF Bastien [Mon, 1 Jul 2019 21:57:31 +0000 (21:57 +0000)]
Fix breakage introduced by D60974
D60974 added tests which incorrectly assume that llvm-readelf is available. This is a bad assumption, it should instead declare the dependency explicitly in the tests.
llvm-svn: 364855
Jonas Devlieghere [Mon, 1 Jul 2019 21:25:34 +0000 (21:25 +0000)]
[Reproducer] Assert on unexpected packet
I'm not able to reproduce the reproducer flakiness we're seeing on
GreenDragon. I want to add this assert to find out if the GDB remote
packets are somehow getting out of sync when this happens.
llvm-svn: 364852
Craig Topper [Mon, 1 Jul 2019 21:25:11 +0000 (21:25 +0000)]
[X86] Use v4i32 vzloads instead of v2i64 for vpmovzx/vpmovsx patterns where only 32-bits are loaded.
v2i64 vzload defines a 64-bit memory access. It doesn't look like
we have any coverage for this either way.
Also remove some vzload usages where the instruction loads only
16-bits.
llvm-svn: 364851
Simon Atanasyan [Mon, 1 Jul 2019 21:25:04 +0000 (21:25 +0000)]
[mips] Add missing schedinfo for MIPSeh_return[32|64] instructions
llvm-svn: 364850
Simon Atanasyan [Mon, 1 Jul 2019 21:24:58 +0000 (21:24 +0000)]
[mips] Add virtualization ASE to P5600 scheduling definitions
llvm-svn: 364849
Simon Atanasyan [Mon, 1 Jul 2019 21:24:51 +0000 (21:24 +0000)]
[mips] Add missing schedinfo for LONG_BRANCH_* instructions
llvm-svn: 364848
Craig Topper [Mon, 1 Jul 2019 21:23:38 +0000 (21:23 +0000)]
[X86] Remove several bad load folding isel patterns for VPMOVZX/VPMOVSX.
These patterns all matched a v2i64 vzload which only loads 64-bits
to instructions that load a full 128-bits.
llvm-svn: 364847
Jordan Rupprecht [Mon, 1 Jul 2019 21:10:43 +0000 (21:10 +0000)]
Revert [SLP] Look-ahead operand reordering heuristic.
This reverts r364478 (git commit
574cb0eb3a7ac95e62d223a60bef891171dfe321)
The patch is causing compilation timeouts.
llvm-svn: 364846
Alex Langford [Mon, 1 Jul 2019 20:36:33 +0000 (20:36 +0000)]
[Core] Generalize ValueObject::IsRuntimeSupportValue
Summary:
Instead of falling back to ObjCLanguageRuntime, we should be falling
back to every loaded language runtime. This makes ValueObject more
language agnostic.
Reviewers: labath, compnerd, JDevlieghere, davide
Subscribers: lldb-commits
Differential Revision: https://reviews.llvm.org/D63240
llvm-svn: 364845
Roman Lebedev [Mon, 1 Jul 2019 20:33:56 +0000 (20:33 +0000)]
[NFC][InstCombine] More commutative tests for "shift direction in bittest" (PR42466)
'and' is commutative, if we don't want to touch shift-of-const,
we still need to check the other hand of 'and'.
llvm-svn: 364844
Nilanjana Basu [Mon, 1 Jul 2019 20:27:37 +0000 (20:27 +0000)]
Testing commit access through minor formatting change
llvm-svn: 364843
Eric Fiselier [Mon, 1 Jul 2019 19:59:34 +0000 (19:59 +0000)]
Ensure bitset's string constructor doesn't poison the overload set.
llvm-svn: 364842
Matt Arsenault [Mon, 1 Jul 2019 19:36:10 +0000 (19:36 +0000)]
GlobalISel: Try to widen merges with other merges
If the requested source type an be used as a merge source type, create
a merge of merges. This avoids creating large, illegal extensions and
bit-ops directly to the result type.
llvm-svn: 364841
Marshall Clow [Mon, 1 Jul 2019 19:22:00 +0000 (19:22 +0000)]
Implement P0646R1: Erase-Like Algorithms Should Return size_type. Reviewed as https://reviews.llvm.org/D58332, and then updated because I rewrote a couple of those routines to eliminate some UB. Thanks to Zoe for tghe patch.
llvm-svn: 364840
Matt Arsenault [Mon, 1 Jul 2019 19:09:57 +0000 (19:09 +0000)]
AMDGPU: Revert accidental change to test
llvm-svn: 364839
Craig Topper [Mon, 1 Jul 2019 19:01:37 +0000 (19:01 +0000)]
[X86] Correct v4f32->v2i64 cvt(t)ps2(u)qq memory isel patterns
These instructions only read 64-bits of memory so we shouldn't
allow a full vector width load to be pattern matched in case it
is marked volatile.
Instead allow vzload or scalar_to_vector+load.
Also add a DAG combine to turn full vector loads into vzload when
used by one of these instructions if the load isn't volatile.
This fixes another case for PR42079
llvm-svn: 364838
Alexander Kornienko [Mon, 1 Jul 2019 18:55:10 +0000 (18:55 +0000)]
Fixed two issues in clang-tidy -help.
HeaderFilter -> HeaderFilterRegex
llvm-svn: 364837
Matt Arsenault [Mon, 1 Jul 2019 18:50:50 +0000 (18:50 +0000)]
AMDGPU/GlobalISel: Handle more input argument intrinsics
llvm-svn: 364836
Matt Arsenault [Mon, 1 Jul 2019 18:49:01 +0000 (18:49 +0000)]
AMDGPU/GlobalISel: Lower kernarg segment ptr intrinsics
llvm-svn: 364835
Matt Arsenault [Mon, 1 Jul 2019 18:47:22 +0000 (18:47 +0000)]
AMDGPU/GlobalISel: Legalize workgroup ID intrinsics
llvm-svn: 364834
Matt Arsenault [Mon, 1 Jul 2019 18:45:36 +0000 (18:45 +0000)]
AMDGPU/GlobalISel: Legalize workitem ID intrinsics
Tests don't cover the masked input path since non-kernel arguments
aren't lowered yet.
Test is copied directly from the existing test, with 2 additions.
llvm-svn: 364833
Matt Arsenault [Mon, 1 Jul 2019 18:40:23 +0000 (18:40 +0000)]
AMDGPU/GlobalISel: Custom lower control flow intrinsics
Replace the brcond for the 2 cases that act as branches. For now
follow how the current system works, although I think we can
eventually get rid of the pseudos.
llvm-svn: 364832
Matt Arsenault [Mon, 1 Jul 2019 18:33:37 +0000 (18:33 +0000)]
AMDGPU/GlobalISel: Handle 16-bit SALU min/max
This needs to be extended to s32, and expanded into cmp+select. This
is relying on the fact that widenScalar happens to leave the
instruction in place, but this isn't a guaranteed property of
LegalizerHelper.
llvm-svn: 364831
Matt Arsenault [Mon, 1 Jul 2019 18:30:45 +0000 (18:30 +0000)]
AMDGPU/GlobalISel: Lower SALU min/max to cmp+select
Use a change observer to apply a register bank to the newly created
intermediate result register.
llvm-svn: 364830
Robert Lougher [Mon, 1 Jul 2019 18:28:21 +0000 (18:28 +0000)]
[X86] Avoid SFB - Fix inconsistent codegen with/without debug info(2)
The function findPotentialBlockers may consider debug info instructions as
potential blockers and may stop searching for a store-load pair prematurely.
This patch corrects this and tests the cases where the store is separated
from the load by more than InspectionLimit debug instructions.
Patch by Chris Dawson.
Differential Revision: https://reviews.llvm.org/D62408
llvm-svn: 364829
Matt Arsenault [Mon, 1 Jul 2019 18:26:47 +0000 (18:26 +0000)]
AMDGPU/GlobalISel: Add tests for add legalization
llvm-svn: 364828
Matt Arsenault [Mon, 1 Jul 2019 18:18:55 +0000 (18:18 +0000)]
AMDGPU/GlobalISel: Legalize s16 add/sub/mul
If this is scalar, promote to s32. Use a new observer class to assign
the register bank of newly created registers.
llvm-svn: 364827
Stella Stamenova [Mon, 1 Jul 2019 18:13:20 +0000 (18:13 +0000)]
[lldb] [lldbsuite] Use a unique class name for TestBacktraceAll
It looks like when this test was added, it was based on TestBreakAfterJoin and it ended up with the same class name. This is an issue because the logs associated with the tests use the class name as the identifier for the file and if two tests have the same name their logs overwrite each other. On non-windows, this just means we lose one of the logs, but on Windows this means that one of the tests will fail occasionally because the file are locked by the other test.
llvm-svn: 364826
Matt Arsenault [Mon, 1 Jul 2019 18:13:12 +0000 (18:13 +0000)]
AMDGPU/GlobalISel: Fix allowing non-boolean conditions for G_SELECT
The condition register bank must be scc or vcc so that a copy will be
inserted, which will be lowered to a compare.
Currently greedy unnecessarily forces using a VCC select.
llvm-svn: 364825
Roman Lebedev [Mon, 1 Jul 2019 18:11:32 +0000 (18:11 +0000)]
[NFC][InstCombine] Add tests for "shift direction in bittest" (PR42466)
https://rise4fun.com/Alive/8O1
https://bugs.llvm.org/show_bug.cgi?id=42466
llvm-svn: 364824
Julian Lettner [Mon, 1 Jul 2019 18:06:31 +0000 (18:06 +0000)]
[TSan] Fix initialized and declared ‘extern’ warning
Avoid the following warning which fails a bot (via -Werror).
```
/tmp/gotsan.JfrpVPu7pG/gotsan.cc:10456:25: error: ‘_tsan_pointer_chk_guard’ initialized and declared ‘extern’ [-Werror]
extern "C" __tsan::uptr _tsan_pointer_chk_guard = 0;
^~~~~~~~~~~~~~~~~~~~~~~
```
llvm-svn: 364823
Matt Arsenault [Mon, 1 Jul 2019 18:01:35 +0000 (18:01 +0000)]
GlobalISel: Verify G_MERGE_VALUES operand sizes
llvm-svn: 364822
Aditya Nandakumar [Mon, 1 Jul 2019 17:53:50 +0000 (17:53 +0000)]
[GlobalISel]: Allow backends to custom legalize Intrinsics
https://reviews.llvm.org/D31359
Add a hook "legalizeInstrinsic" to allow backends to override this
and custom lower/legalize intrinsics.
llvm-svn: 364821
Alexey Bataev [Mon, 1 Jul 2019 17:46:52 +0000 (17:46 +0000)]
[OPENMP]Fix handling of lambda captures in target regions.
Previously, lambda captures were processed in the function called during
capturing the variables. It leads to the recursive functions calls and
may result in the compiler crash.
llvm-svn: 364820
Matt Arsenault [Mon, 1 Jul 2019 17:40:18 +0000 (17:40 +0000)]
AMDGPU/GlobalISel: RegBankSelect for sendmsg/sendmsghalt
llvm-svn: 364819
Julian Lettner [Mon, 1 Jul 2019 17:39:39 +0000 (17:39 +0000)]
[TSan] Improve handling of stack pointer mangling in {set,long}jmp, pt.2
Switch `LongJmp` over to lookup JmpBuf via plain old (unmangled) SP.
This makes the computation of mangled SPs in the TSan assembly files
unnecessary, which will be cleaned up in follow-up revisions.
Reviewed By: dvyukov
Differential Revision: https://reviews.llvm.org/D63942
llvm-svn: 364818
Matt Arsenault [Mon, 1 Jul 2019 17:35:53 +0000 (17:35 +0000)]
AMDGPU/GlobalISel: Legalize s16 fcmp
llvm-svn: 364817
Matt Arsenault [Mon, 1 Jul 2019 17:18:03 +0000 (17:18 +0000)]
GlobalISel: Implement lower for min/max
llvm-svn: 364816
Nicolai Haehnle [Mon, 1 Jul 2019 17:17:52 +0000 (17:17 +0000)]
AMDGPU/GFX10: implement ds_ordered_count changes
Summary:
ds_ordered_count can now simultaneously operate on up to 4 dwords
in a single instruction, which are taken from (and returned to)
lanes 0..3 of a single VGPR.
Change-Id: I19b6e7b0732b617c10a779a7f9c0303eec7dd276
Reviewers: mareko, arsenm, rampitec
Subscribers: kzhuravl, jvesely, wdng, yaxunl, dstuttard, tpr, t-tye, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D63716
llvm-svn: 364815
Nicolai Haehnle [Mon, 1 Jul 2019 17:17:45 +0000 (17:17 +0000)]
AMDGPU: Support GDS atomics
Summary:
Original patch by Marek Olšák
Change-Id: Ia97d5d685a63a377d86e82942436d1fe6e429bab
Reviewers: mareko, arsenm, rampitec
Subscribers: kzhuravl, jvesely, wdng, yaxunl, dstuttard, tpr, t-tye, jfb, Petar.Avramovic, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D63452
llvm-svn: 364814
Fangrui Song [Mon, 1 Jul 2019 17:12:26 +0000 (17:12 +0000)]
[ELF][RISCV] Support GD/LD/IE/LE TLS models
RISC-V psABI doesn't specify TLS relaxation. It can be handled the same
way as we handle ARM TLS. RISC-V TLS is even simpler because GD/LD use
the same relocation type.
Reviewed By: jrtc27, ruiu
Differential Revision: https://reviews.llvm.org/D63220
llvm-svn: 364813
Fangrui Song [Mon, 1 Jul 2019 17:12:18 +0000 (17:12 +0000)]
[ELF][RISCV] Support PLT, GOT, copy and relative relocations
* Handle initial relocation types: R_RISCV_CALL_PLT and R_RISCV_GOT_HI20.
* Produce dynamic relocation types: R_RISCV_COPY, R_RISCV_RELATIVE, R_RISCV_JUMP_SLOT.
* Define SymbolRel as R_RISCV_{32,64}
* Generate PLT header: it is used by lazy binding PLT in glibc.
* R_RISCV_CALL is changed from R_PC to R_PC_PLT. If the target symbol is preemptable, this will suppress an unnecessary "canonical PLT".
This behavior is different from ld.bfd but it is agreed the current lld behavior is favored.
I have received positive responses from the binutils maintainer that the ABI/binutils implementation can be improved, see:
https://github.com/riscv/riscv-elf-psabi-doc/issues/98
https://sourceware.org/bugzilla/show_bug.cgi?id=24685
Many -no-pie/-pie/-shared programs linked against musl or glibc should work with this patch.
Reviewed By: jrtc27
Differential Revision: https://reviews.llvm.org/D63076
llvm-svn: 364812
Matt Arsenault [Mon, 1 Jul 2019 17:04:57 +0000 (17:04 +0000)]
AMDGPU/GlobalISel: RegBankSelect for DS ordered add/swap
llvm-svn: 364811
Matt Arsenault [Mon, 1 Jul 2019 17:02:24 +0000 (17:02 +0000)]
AArch64/GlobalISel: Fix trying to select invalid MIR
Physical registers are not allowed to be a phi operand.
llvm-svn: 364810
Shaurya Gupta [Mon, 1 Jul 2019 16:55:29 +0000 (16:55 +0000)]
Summary: [Clangd] Added hidden command line option -tweaks to specify which tweaks to enable
- Only for development purposes
- Disabled tweaks in fixits-duplications test
Reviewers: sammccall, kadircet
Subscribers: ilya-biryukov, MaskRay, jkorous, arphaman, cfe-commits
Tags: #clang
Differential Revision: https://reviews.llvm.org/D63989
llvm-svn: 364809
Matt Arsenault [Mon, 1 Jul 2019 16:41:36 +0000 (16:41 +0000)]
AMDGPU/GlobalISel: RegBankSelect for amdgcn.writelane
llvm-svn: 364808
Matt Arsenault [Mon, 1 Jul 2019 16:36:39 +0000 (16:36 +0000)]
AMDGPU/GlobalISel: Fail instead of assert when selecting loads
llvm-svn: 364807
Matt Arsenault [Mon, 1 Jul 2019 16:34:48 +0000 (16:34 +0000)]
AMDGPU/GlobalISel: Complete implementation of G_GEP
Also works around tablegen defect in selecting add with unused carry,
but if we have to manually select GEP, might as well handle add
manually.
llvm-svn: 364806
Matt Arsenault [Mon, 1 Jul 2019 16:32:47 +0000 (16:32 +0000)]
AMDGPU/GlobalISel: Select G_PHI
llvm-svn: 364805
Matt Arsenault [Mon, 1 Jul 2019 16:27:32 +0000 (16:27 +0000)]
AMDGPU/GlobalISel: Try to select VOP3 form of add
There are several things broken, but at least emit the right thing for
gfx9.
The import of the pattern with the unused carry out seems to not
work. Needs a special class for clamp, because OperandWithDefaultOps
doesn't really work.
llvm-svn: 364804
Simon Pilgrim [Mon, 1 Jul 2019 16:20:47 +0000 (16:20 +0000)]
[X86] Add widenSubVector to size in bits helper. NFCI.
We can already widenSubVector to a specific type (of the same scalar type) - this variant just specifies the target vector size.
This will be useful when CombineShuffleWithExtract relaxes the need to have the same scalar type for all shuffle operand subvector sources.
llvm-svn: 364803
Marshall Clow [Mon, 1 Jul 2019 16:20:25 +0000 (16:20 +0000)]
Implement LWG2221: 'Formatted output for nullptr_t' Reviewed as: https://reviews.llvm.org/D63053
llvm-svn: 364802
Matt Arsenault [Mon, 1 Jul 2019 16:19:39 +0000 (16:19 +0000)]
AMDGPU/GlobalISel: RegBankSelect for readlane/readfirstlane
llvm-svn: 364801
James Henderson [Mon, 1 Jul 2019 16:18:57 +0000 (16:18 +0000)]
[docs][llvm-readelf] Expand llvm-readelf documentation
Previously, the llvm-readelf documentation was essentially just a list
of differences to llvm-readobj. Since llvm-readelf is the more likely
goto tool for many people migrating to the LLVM toolchain, it seems like
it would be helpful to document all the switches in the llvm-readelf
document too. This change expands the options listed accordingly.
Additionally, they are unlikely to care what the differences are to
llvm-readobj, since they won't be familiar with the latter as there is
no GNU equivalent, so this change moves the "differences" section to
llvm-readobj's documentation.
Reviewed by: peter.smith
Differential Revision: https://reviews.llvm.org/D63826
llvm-svn: 364800
Bruce Mitchener [Mon, 1 Jul 2019 16:18:38 +0000 (16:18 +0000)]
__threading_support: Remove (void) in favor of ().
Summary:
This fixes a clang-tidy warning when building something that uses
this file.
Reviewers: mclow.lists, EricWF
Subscribers: cfe-commits
Differential Revision: https://reviews.llvm.org/D43226
llvm-svn: 364799
Bruce Mitchener [Mon, 1 Jul 2019 16:13:31 +0000 (16:13 +0000)]
Fix -Wdouble-promotion warnings.
Reviewers: mclow.lists
Subscribers: christof, ldionne, cfe-commits, libcxx-commits
Differential Revision: https://reviews.llvm.org/D62782
llvm-svn: 364798
Tom Stellard [Mon, 1 Jul 2019 16:09:33 +0000 (16:09 +0000)]
AMDGPU/GlobalISel: Implement select for 32-bit G_ADD
Reviewers: arsenm
Reviewed By: arsenm
Subscribers: hiraditya, kzhuravl, jvesely, wdng, nhaehnle, yaxunl, rovka, kristof.beyls, dstuttard, tpr, t-tye, Petar.Avramovic, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D58804
llvm-svn: 364797
Mikhail Maltsev [Mon, 1 Jul 2019 16:07:58 +0000 (16:07 +0000)]
[ARM] Fix MVE_VQxDMLxDH instruction class
Summary:
According to the ARMARM, the VQDMLADH, VQRDMLADH, VQDMLSDH and
VQRDMLSDH instructions handle their results as follows: "The base
variant writes the results into the lower element of each pair of
elements in the destination register, whereas the exchange variant
writes to the upper element in each pair". I.e., the initial content
of the output register affects the result, as usual, we model this
with an additional input.
Also, for 32-bit variants Qd is not allowed to be the same register as
Qm and Qn, we use @earlyclobber to indicate this.
This patch also changes vpred_r to vpred_n because the instructions
don't have an explicit 'inactive' operand.
Reviewers: dmgreen, ostannard, simon_tatham
Reviewed By: simon_tatham
Subscribers: javed.absar, kristof.beyls, hiraditya, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D64007
llvm-svn: 364796
Matt Arsenault [Mon, 1 Jul 2019 16:06:02 +0000 (16:06 +0000)]
AMDGPU/GlobalISel: Select G_BRCOND for vcc
llvm-svn: 364795
Mikhail Maltsev [Mon, 1 Jul 2019 16:05:23 +0000 (16:05 +0000)]
[ARM] MVE: support QQPRRegClass and QQQQPRRegClass
Summary:
QQPRRegClass and QQQQPRRegClass are used by the
interleaving/deinterleaving loads/stores to represent sequences of
consecutive SIMD registers.
Reviewers: ostannard, simon_tatham, dmgreen
Reviewed By: simon_tatham
Subscribers: javed.absar, kristof.beyls, hiraditya, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D64009
llvm-svn: 364794
Krzysztof Parzyszek [Mon, 1 Jul 2019 16:01:15 +0000 (16:01 +0000)]
Update email address in CODE_OWNERS
llvm-svn: 364793