Arnd Bergmann [Wed, 22 Jul 2020 19:43:23 +0000 (21:43 +0200)]
Merge tag 'socfpga_dts_update_for_v5.9' of git://git./linux/kernel/git/dinguyen/linux into arm/dt
SoCFPGA DTS updates for v5.9
- Populate clock entries for Agilex platform
- Add "reset-names" to SPI entries
- Add Maxim max1619 temperature sensor to Arria10 devkit
* tag 'socfpga_dts_update_for_v5.9' of git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux:
ARM: dts: socfpga: add the temperature sensor to the Arria10 devkit
arm: dts: socfpga: add reset-names to spi node
arm64: dts: agilex: add nand clocks
arm64: dts: agilex: populate clock dts entries for Intel SoCFPGA Agilex
Link: https://lore.kernel.org/r/20200719011804.15599-1-dinguyen@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Dinh Nguyen [Wed, 15 Jul 2020 18:05:16 +0000 (13:05 -0500)]
ARM: dts: socfpga: add the temperature sensor to the Arria10 devkit
Add the Maxim max1619 temp sensor that is on the Arria10 devkit.
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
Dinh Nguyen [Tue, 30 Jun 2020 20:18:16 +0000 (15:18 -0500)]
arm: dts: socfpga: add reset-names to spi node
Add reset-names = "spi" to spi dts nodes.
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
Dinh Nguyen [Tue, 30 Jun 2020 18:44:37 +0000 (13:44 -0500)]
arm64: dts: agilex: add nand clocks
Add the clock properties for the NAND dts node.
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
Dinh Nguyen [Fri, 9 Aug 2019 19:28:06 +0000 (12:28 -0700)]
arm64: dts: agilex: populate clock dts entries for Intel SoCFPGA Agilex
Add clock dts entries to the Intel SoCFPGA Agilex platform.
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
Arnd Bergmann [Fri, 17 Jul 2020 18:24:39 +0000 (20:24 +0200)]
Merge tag 'tegra-for-5.9-arm64-dt' of git://git./linux/kernel/git/tegra/linux into arm/dt
arm64: tegra: Device tree changes for v5.9-rc1
This contains a slew of fixes in preparation for validating device trees
against json-schema bindings. In addition, this enables the CPU complex
(for CPU frequency scaling) and GPU on Tegra194.
* tag 'tegra-for-5.9-arm64-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux: (56 commits)
arm64: tegra: Add the GPU on Tegra194
arm64: tegra: Add compatible string for Tegra194 CPU complex
arm64: tegra: Add HDMI supplies on Norrin
arm64: tegra: Add #{address,size}-cells for VI I2C on Tegra210
arm64: tegra: Add missing clocks and power-domains to Tegra210 VI I2C
arm64: tegra: Add clocks and resets for ISP on Tegra210
arm64: tegra: Fix compatible string for DPAUX on Tegra210
arm64: tegra: Add i2c-bus subnode for DPAUX controllers
arm64: tegra: Sort aliases alphabetically
arm64: tegra: Remove spurious tabs
arm64: tegra: Populate VBUS for USB3 on Jetson TX2
arm64: tegra: Enable DFLL support on Jetson Nano
arm64: tegra: Add support for Jetson Xavier NX
arm64: tegra: Re-order PCIe aperture mappings
arm64: tegra: Enable Tegra VI CSI support for Jetson Nano
arm64: tegra: jetson-tx1: Add camera supplies
arm64: tegra: Fix order of XUSB controller clocks
arm64: tegra: Rename cbb@0 to bus@0 on Tegra194
arm64: tegra: Sort nodes by unit-address on Jetson Nano
arm64: tegra: Various fixes for PMICs
...
Link: https://lore.kernel.org/r/20200717161300.1661002-7-thierry.reding@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Fri, 17 Jul 2020 18:03:49 +0000 (20:03 +0200)]
Merge tag 'tegra-for-5.9-arm-dt' of git://git./linux/kernel/git/tegra/linux into arm/dt
ARM: tegra: Device tree changes for v5.9-rc1
This adds device trees for the ASUS Google Nexus 7 and Acer Iconia Tab
A500. In addition there are a slew of fixes to existing device trees in
preparation for validating the DTBs against json-schema.
* tag 'tegra-for-5.9-arm-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux: (38 commits)
ARM: tegra: Add device-tree for ASUS Google Nexus 7
ARM: tegra: Add device-tree for Acer Iconia Tab A500
ARM: tegra: Add HDMI supplies on Nyan boards
ARM: tegra: Add missing DSI controller on Tegra30
ARM: tegra: Add i2c-bus subnode for DPAUX controllers
ARM: tegra: The Tegra30 SDHCI is not backwards-compatible
ARM: tegra: The Tegra30 DC is not backwards-compatible
ARM: tegra: Remove spurious comma from node name
ARM: tegra: Add parent clock to DSI output
ARM: tegra: Use standard names for SRAM nodes
ARM: tegra: seaboard: Use standard battery bindings
ARM: tegra: Use standard names for LED nodes
ARM: tegra: Use numeric unit-addresses
ARM: tegra: medcom-wide: Remove extra panel power supply
ARM: tegra: Use proper unit-addresses for OPPs
ARM: tegra: Add missing clock-names for SDHCI controllers
ARM: tegra: Fix order of XUSB controller clocks
ARM: tegra: Add #reset-cells to Tegra124 memory controller
ARM: tegra: Add missing panel power supplies
ARM: tegra: Add micro-USB A/B port on Jetson TK1
...
Link: https://lore.kernel.org/r/20200717161300.1661002-5-thierry.reding@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Fri, 17 Jul 2020 18:00:45 +0000 (20:00 +0200)]
Merge tag 'tegra-for-5.9-dt-bindings' of git://git./linux/kernel/git/tegra/linux into arm/dt
dt-bindings: Changes for v5.9-rc1
This adds compatible strings for some new devices as well as updates and
fixes existing bindings.
* tag 'tegra-for-5.9-dt-bindings' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
dt-bindings: fuse: tegra: Add missing compatible strings
dt-bindings: i2c: tegra: Document Tegra210 VI I2C clocks and power-domains
dt-bindings: Add documentation for GV11B GPU
dt-bindings: ARM: tegra: Add ASUS Google Nexus 7
dt-bindings: ARM: tegra: Add Acer Iconia Tab A500
dt-bindings: Add vendor prefix for Acer Inc.
dt-bindings: tegra: Document Jetson Xavier NX (and devkit)
Link: https://lore.kernel.org/r/20200717161300.1661002-1-thierry.reding@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Fri, 17 Jul 2020 17:59:03 +0000 (19:59 +0200)]
Merge tag 'amlogic-dt64' of git://git./linux/kernel/git/khilman/linux-amlogic into arm/dt
arm64: dts: amlogic updates for v5.9
- meson-gx: Switch to the meson-ee-pwrc bindings
- add Khadas MCU nodes
* tag 'amlogic-dt64' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic:
arm64: dts: amlogic: Add the Ethernet "timing-adjustment" clock
arm64: dts: meson-gx: Switch to the meson-ee-pwrc bindings
arm64: dts: meson-khadas-vim3: add Khadas MCU nodes
Link: https://lore.kernel.org/r/7h8sfif2na.fsf@baylibre.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Fri, 17 Jul 2020 17:57:03 +0000 (19:57 +0200)]
Merge tag 'amlogic-dt' of git://git./linux/kernel/git/khilman/linux-amlogic into arm/dt
ARM: dts: amlogic updates for v5.9
- power-domain and MMC updates
* tag 'amlogic-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic:
ARM: dts: meson8b: odroidc1: enable the SDHC controller
ARM: dts: meson8b: ec100: enable the SDHC controller
ARM: dts: meson: add the SDHC MMC controller
ARM: dts: meson8b: add power domain controller
ARM: dts: meson8m2: add resets for the power domain controller
ARM: dts: meson8: add power domain controller
Link: https://lore.kernel.org/r/7hd04uf2o8.fsf@baylibre.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Thierry Reding [Thu, 16 Jul 2020 12:01:38 +0000 (14:01 +0200)]
arm64: tegra: Add the GPU on Tegra194
The GPU found on NVIDIA Tegra194 SoCs is a Volta generation GPU called
GV11B.
Reviewed-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Thierry Reding [Mon, 25 May 2020 14:50:04 +0000 (16:50 +0200)]
dt-bindings: fuse: tegra: Add missing compatible strings
The Tegra FUSE device tree bindings haven't been updated in a while. Add
compatible strings for the SoC generations that were released since the
last update.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Sowjanya Komatineni [Wed, 15 Jul 2020 04:20:38 +0000 (21:20 -0700)]
dt-bindings: i2c: tegra: Document Tegra210 VI I2C clocks and power-domains
This patch documents missing clocks and power-domains of Tegra210 VI I2C.
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Thierry Reding [Thu, 16 Jul 2020 13:18:45 +0000 (15:18 +0200)]
dt-bindings: Add documentation for GV11B GPU
The GV11B's device tree bindings are the same as for GP10B, though the
GPU is not completely compatible, so all that is needed is a different
compatible string.
Reviewed-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Arnd Bergmann [Fri, 17 Jul 2020 14:04:56 +0000 (16:04 +0200)]
Merge tag 'renesas-dt-bindings-for-v5.9-tag1' of git://git./linux/kernel/git/geert/renesas-devel into arm/dt
Renesas DT binding updates for v5.9
- Document core support for the RZ/G2H SoC,
- Document support for the HopeRun HiHope RZ/G2H, and Beacon
EmbeddedWorks RZ/G2M boards.
* tag 'renesas-dt-bindings-for-v5.9-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel:
dt-bindings: arm: renesas: Document beacon-rzg2m
dt-bindings: reset: renesas,rst: Document r8a774e1 reset module
dt-bindings: power: renesas,rcar-sysc: Document r8a774e1 SYSC binding
dt-bindings: arm: renesas: Add HopeRun RZ/G2H boards
dt-bindings: arm: renesas: Document RZ/G2H SoC DT bindings
Link: https://lore.kernel.org/r/20200717112427.26032-4-geert+renesas@glider.be
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Fri, 17 Jul 2020 13:36:23 +0000 (15:36 +0200)]
Merge tag 'renesas-arm-dt-for-v5.9-tag2' of git://git./linux/kernel/git/geert/renesas-devel into arm/dt
Renesas ARM DT updates for v5.9 (take two)
- SPI Multi I/O Bus Controller (RPC-IF) support for R-Car V3H and V3M,
including QSPI support for the Condor, Eagle, V3HSK, and V3MSK
boards,
- Initial support for the RZ/G2H SoC on the HopeRun HiHope RZ/G2H
board,
- Initial support for the Beacon EmbeddedWorks RZ/G2M board,
- Minor fixes and improvements.
* tag 'renesas-arm-dt-for-v5.9-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel: (34 commits)
ARM: dts: sh73a0: Add missing clocks to sound node
arm64: dts: renesas: r8a774e1: Add CAN[FD] support
arm64: dts: renesas: r8a774e1: Add RWDT node
arm64: dts: renesas: r8a774e1: Add MSIOF nodes
arm64: dts: renesas: r8a774e1: Add I2C and IIC-DVFS support
arm64: dts: renesas: r8a774e1: Add SDHI nodes
arm64: dts: renesas: r8a774e1: Add SCIF and HSCIF nodes
arm64: dts: renesas: r8a774e1: Add TMU device nodes
arm64: dts: renesas: r8a774e1: Add CMT device nodes
arm64: dts: renesas: r8a774e1: Add RZ/G2H thermal support
arm64: dts: renesas: r8a774e1: Add operating points
arm64: dts: renesas: Introduce r8a774a1-beacon-rzg2m-kit
arm64: dts: renesas: r8a774e1: Add Ethernet AVB node
arm64: dts: renesas: r8a774e1: Add GPIO device nodes
arm64: dts: renesas: r8a774e1: Add SYS-DMAC device nodes
arm64: dts: renesas: r8a774e1: Add IPMMU device nodes
ARM: dts: gose: Fix ports node name for adv7612
ARM: dts: renesas: Fix SD Card/eMMC interface device node names
arm64: dts: renesas: Fix SD Card/eMMC interface device node names
arm64: dts: renesas: add full-pwr-cycle-in-suspend into eMMC nodes
...
Link: https://lore.kernel.org/r/20200717112427.26032-2-geert+renesas@glider.be
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Geert Uytterhoeven [Tue, 19 May 2020 07:55:25 +0000 (09:55 +0200)]
ARM: dts: sh73a0: Add missing clocks to sound node
The device node for the FIFO-buffered Serial Interface sound node lacks
the "clocks" property, as the DTS file didn't describe any clocks yet at
its introduction.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20200519075525.24742-1-geert+renesas@glider.be
Lad Prabhakar [Wed, 15 Jul 2020 11:09:10 +0000 (12:09 +0100)]
arm64: dts: renesas: r8a774e1: Add CAN[FD] support
Add CAN[01] and CANFD support to RZ/G2H (R8A774E1) SoC specific dtsi.
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@bp.renesas.com>
Link: https://lore.kernel.org/r/1594811350-14066-21-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Lad Prabhakar [Wed, 15 Jul 2020 11:09:07 +0000 (12:09 +0100)]
arm64: dts: renesas: r8a774e1: Add RWDT node
Add a device node for the Watchdog Timer (RWDT) controller on the Renesas
RZ/G2H (r8a774e1) SoC.
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@bp.renesas.com>
Link: https://lore.kernel.org/r/1594811350-14066-18-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Lad Prabhakar [Wed, 15 Jul 2020 11:09:05 +0000 (12:09 +0100)]
arm64: dts: renesas: r8a774e1: Add MSIOF nodes
Add the DT nodes needed by MSIOF[0123] interfaces to the SoC dtsi.
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@bp.renesas.com>
Link: https://lore.kernel.org/r/1594811350-14066-16-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Lad Prabhakar [Wed, 15 Jul 2020 11:09:03 +0000 (12:09 +0100)]
arm64: dts: renesas: r8a774e1: Add I2C and IIC-DVFS support
Add the I2C[0-6] and IIC Bus Interface for DVFS (IIC for DVFS)
devices nodes to the r8a774e1 device tree.
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@bp.renesas.com>
Link: https://lore.kernel.org/r/1594811350-14066-14-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Lad Prabhakar [Wed, 15 Jul 2020 11:09:00 +0000 (12:09 +0100)]
arm64: dts: renesas: r8a774e1: Add SDHI nodes
Add SDHI[0-2] device nodes to R8A774E1 SoC.
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@bp.renesas.com>
Link: https://lore.kernel.org/r/1594811350-14066-11-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Lad Prabhakar [Wed, 15 Jul 2020 11:08:59 +0000 (12:08 +0100)]
arm64: dts: renesas: r8a774e1: Add SCIF and HSCIF nodes
Add the device nodes for RZ/G2H SCIF and HSCIF serial ports,
including clocks, power domains and DMAs.
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@bp.renesas.com>
Link: https://lore.kernel.org/r/1594811350-14066-10-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Marian-Cristian Rotariu [Wed, 15 Jul 2020 11:08:58 +0000 (12:08 +0100)]
arm64: dts: renesas: r8a774e1: Add TMU device nodes
This patch adds TMU[01234] device tree nodes to the r8a774e1
SoC specific DT.
Signed-off-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@bp.renesas.com>
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/1594811350-14066-9-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Marian-Cristian Rotariu [Wed, 15 Jul 2020 11:08:56 +0000 (12:08 +0100)]
arm64: dts: renesas: r8a774e1: Add CMT device nodes
This patch adds the CMT[0123] device tree nodes to the
r8a774e1 SoC specific DT.
Signed-off-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@bp.renesas.com>
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/1594811350-14066-7-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Marian-Cristian Rotariu [Wed, 15 Jul 2020 11:08:54 +0000 (12:08 +0100)]
arm64: dts: renesas: r8a774e1: Add RZ/G2H thermal support
Add thermal support for R8A774E1 (RZ/G2H) SoC.
Based on the work done for r8a774a1 SoC.
Signed-off-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@bp.renesas.com>
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/1594811350-14066-5-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Marian-Cristian Rotariu [Wed, 15 Jul 2020 11:08:51 +0000 (12:08 +0100)]
arm64: dts: renesas: r8a774e1: Add operating points
The RZ/G2H (r8a774e1) comes with two clusters of processors, similarly to
the r8a774a1. The first cluster is made of A57s, the second cluster is made
of A53s.
The operating points for the cluster with the A57s are:
Frequency | Voltage
----------|---------
500 MHz | 0.82V
1.0 GHz | 0.82V
1.5 GHz | 0.82V
The operating points for the cluster with the A53s are:
Frequency | Voltage
----------|---------
800 MHz | 0.82V
1.0 GHz | 0.82V
1.2 GHz | 0.82V
This patch adds the definitions for the operating points to the SoC
specific DT.
Signed-off-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@bp.renesas.com>
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/1594811350-14066-2-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Adam Ford [Wed, 15 Jul 2020 14:06:21 +0000 (09:06 -0500)]
arm64: dts: renesas: Introduce r8a774a1-beacon-rzg2m-kit
Beacon EmebeddedWorks, formerly Logic PD is introducing a new
SOM and development kit based on the RZ/G2M SoC from Renesas.
The SOM supports eMMC, WiFi and Bluetooth, along with a Cat-M1
cellular radio.
The Baseboard has Ethernet, USB, HDMI, stereo audio in and out,
along with a variety of push buttons and LED's, and support for
a parallel RGB and an LVDS display.
Signed-off-by: Adam Ford <aford173@gmail.com>
Link: https://lore.kernel.org/r/20200715140622.1295370-1-aford173@gmail.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Marian-Cristian Rotariu [Mon, 13 Jul 2020 21:35:20 +0000 (22:35 +0100)]
arm64: dts: renesas: r8a774e1: Add Ethernet AVB node
This patch adds the SoC specific part of the Ethernet AVB
device tree node.
Signed-off-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@bp.renesas.com>
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/1594676120-5862-10-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Marian-Cristian Rotariu [Mon, 13 Jul 2020 21:35:18 +0000 (22:35 +0100)]
arm64: dts: renesas: r8a774e1: Add GPIO device nodes
Add GPIO device nodes to the DT of the r8a774e1 SoC.
Signed-off-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@bp.renesas.com>
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/1594676120-5862-8-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Marian-Cristian Rotariu [Mon, 13 Jul 2020 21:35:16 +0000 (22:35 +0100)]
arm64: dts: renesas: r8a774e1: Add SYS-DMAC device nodes
Add sys-dmac[0-2] device nodes for RZ/G2H (R8A774E1) SoC.
Signed-off-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@bp.renesas.com>
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/1594676120-5862-6-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Marian-Cristian Rotariu [Mon, 13 Jul 2020 21:35:14 +0000 (22:35 +0100)]
arm64: dts: renesas: r8a774e1: Add IPMMU device nodes
Add RZ/G2H (R8A774E1) IPMMU nodes.
Signed-off-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@bp.renesas.com>
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/1594676120-5862-4-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Niklas Söderlund [Mon, 13 Jul 2020 11:10:16 +0000 (13:10 +0200)]
ARM: dts: gose: Fix ports node name for adv7612
When adding the adv7612 device node the ports node was misspelled as
port, fix this.
Fixes:
bc63cd87f3ce924f ("ARM: dts: gose: add HDMI input")
Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Link: https://lore.kernel.org/r/20200713111016.523189-1-niklas.soderlund+renesas@ragnatech.se
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Yoshihiro Shimoda [Fri, 10 Jul 2020 12:08:56 +0000 (21:08 +0900)]
ARM: dts: renesas: Fix SD Card/eMMC interface device node names
Fix the device node names as "mmc@".
Fixes:
66474697923c ("ARM: dts: r7s72100: add sdhi to device tree")
Fixes:
a49f76cddaee ("ARM: dts: r7s9210: Add SDHI support")
Fixes:
43304a5f5106 ("ARM: shmobile: r8a73a4: tidyup DT node naming")
Fixes:
7d907894bfe3 ("ARM: shmobile: r8a7740: tidyup DT node naming")
Fixes:
3ab2ea5fd1ce ("ARM: dts: r8a7742: Add SDHI nodes")
Fixes:
63ce8a617b51 ("ARM: dts: r8a7743: Add SDHI controllers")
Fixes:
b591e323b271 ("ARM: dts: r8a7744: Add SDHI nodes")
Fixes:
d83010f87ab3 ("ARM: dts: r8a7744: Initial SoC device tree")
Fixes:
7079131ef9b9 ("ARM: dts: r8a7745: Add SDHI controllers")
Fixes:
0485da788028 ("ARM: dts: r8a77470: Add SDHI1 support")
Fixes:
15aa5a95e820 ("ARM: dts: r8a77470: Add SDHI0 support")
Fixes:
f068cc816015 ("ARM: dts: r8a77470: Add SDHI2 support")
Fixes:
14e1d9147d96 ("ARM: shmobile: r8a7778: tidyup DT node naming")
Fixes:
2624705ceb7b ("ARM: shmobile: r8a7779: tidyup DT node naming")
Fixes:
b718aa448378 ("ARM: shmobile: r8a7790: tidyup DT node naming")
Fixes:
b7ed8a0dd4f1 ("ARM: shmobile: Add SDHI devices to r8a7791 DTSI")
Fixes:
ce01b14ecf19 ("ARM: dts: r8a7792: add SDHI support")
Fixes:
fc9ee228f500 ("ARM: dts: r8a7793: Add SDHI controllers")
Fixes:
b8e8ea127d00 ("ARM: shmobile: r8a7794: add SDHI DT support")
Fixes:
33f6be3bf6b7 ("ARM: shmobile: sh73a0: tidyup DT node naming")
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Link: https://lore.kernel.org/r/1594382936-14114-1-git-send-email-yoshihiro.shimoda.uh@renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Yoshihiro Shimoda [Fri, 10 Jul 2020 12:03:54 +0000 (21:03 +0900)]
arm64: dts: renesas: Fix SD Card/eMMC interface device node names
Fix the device node names as "mmc@".
Fixes:
663386c3e1aa ("arm64: dts: renesas: r8a774a1: Add SDHI nodes")
Fixes:
9b33e3001b67 ("arm64: dts: renesas: Initial r8a774b1 SoC device tree")
Fixes:
77223211f44d ("arm64: dts: renesas: r8a774c0: Add SDHI nodes")
Fixes:
d9d67010e0c6 ("arm64: dts: r8a7795: Add SDHI support to dtsi")
Fixes:
a513cf1e6457 ("arm64: dts: r8a7796: add SDHI nodes")
Fixes:
111cc9ace2b5 ("arm64: dts: renesas: r8a77961: Add SDHI nodes")
Fixes:
f51746ad7d1f ("arm64: dts: renesas: Add Renesas R8A77961 SoC support")
Fixes:
df863d6f95f5 ("arm64: dts: renesas: initial R8A77965 SoC device tree")
Fixes:
9aa3558a02f0 ("arm64: dts: renesas: ebisu: Add and enable SDHI device nodes")
Fixes:
83f18749c2f6 ("arm64: dts: renesas: r8a77995: Add SDHI (MMC) support")
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Link: https://lore.kernel.org/r/1594382634-13714-1-git-send-email-yoshihiro.shimoda.uh@renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Yoshihiro Shimoda [Fri, 10 Jul 2020 12:03:32 +0000 (21:03 +0900)]
arm64: dts: renesas: add full-pwr-cycle-in-suspend into eMMC nodes
Add full-pwr-cycle-in-suspend property to do a graceful shutdown of
the eMMC device in system suspend.
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Link: https://lore.kernel.org/r/1594382612-13664-1-git-send-email-yoshihiro.shimoda.uh@renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Marian-Cristian Rotariu [Wed, 8 Jul 2020 17:48:31 +0000 (18:48 +0100)]
arm64: dts: renesas: Add HiHope RZ/G2H sub board support
The HiHope RZ/G2H sub board sits below the HiHope RZ/G2H main board.
These boards are identical with the ones for RZ/G2M[N].
Signed-off-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@bp.renesas.com>
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/1594230511-24790-9-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Marian-Cristian Rotariu [Wed, 8 Jul 2020 17:48:30 +0000 (18:48 +0100)]
arm64: dts: renesas: Add HiHope RZ/G2H main board support
Basic support for the HiHope RZ/G2H main board:
- Memory,
- Main crystal,
- Serial console
- eMMC
Signed-off-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@bp.renesas.com>
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/1594230511-24790-8-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Marian-Cristian Rotariu [Wed, 8 Jul 2020 17:48:29 +0000 (18:48 +0100)]
arm64: dts: renesas: Initial r8a774e1 SoC device tree
Basic support for the RZ/G2H SoC.
Signed-off-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@bp.renesas.com>
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/1594230511-24790-7-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Marian-Cristian Rotariu [Wed, 8 Jul 2020 17:48:28 +0000 (18:48 +0100)]
arm64: defconfig: Enable R8A774E1 SoC
Enable the Renesas RZ/G2H (R8A774E1) SoC in the ARM64 defconfig.
Signed-off-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@bp.renesas.com>
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/1594230511-24790-6-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Geert Uytterhoeven [Fri, 17 Jul 2020 08:57:49 +0000 (10:57 +0200)]
Merge tag 'renesas-r8a774e1-dt-binding-defs-tag' into renesas-arm-dt-for-v5.9
Renesas RZ/G2H DT Binding Definitions
Clock and Power Domain definitions for the Renesas RZ/G2H (R8A774E1)
SoC, shared by driver and DT source files.
Arnd Bergmann [Thu, 16 Jul 2020 20:37:43 +0000 (22:37 +0200)]
Merge tag 'v5.8-next-dts64' of git://git./linux/kernel/git/matthias.bgg/linux into arm/dt
mt8173:
- update dmips for Cortex A53
mt8183:
- add pericfg
- fix unit names
- add nodes for USB support
- add basic support for Lenovo IdeaPad Duet 10.1" Chromebook
* tag 'v5.8-next-dts64' of git://git.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux:
arm64: dts: mt8183: Add krane-sku176 board
arm64: dts: mt8183: Add USB3.0 support
arm64: dts: mt8183-evb: Fix unit name warnings
arm64: dts: mt8183: Fix unit name warnings
arm64: dts: mt8183: Add MediaTek's peripheral configuration controller
arm64: dts: mt6358: Add the compatible for the regulators
dt-bindings: arm64: dts: mediatek: Add mt8183-kukui-krane-sku176
arm64: dts: mt8173: Re-measure capacity-dmips-mhz
Link: https://lore.kernel.org/r/0b7109c7-7bd2-7373-6032-e9a452d2ebc9@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Thu, 16 Jul 2020 20:36:35 +0000 (22:36 +0200)]
Merge tag 'omap-for-v5.9/dt-pt2-signed' of git://git./linux/kernel/git/tmlind/linux-omap into arm/dt
More dts changes for omaps for v5.9
A series of changes to configure IPU and DSP remoteproc for omap4 & 5.
And a change to configure the default mux for am335x-pocketbeagle, and
a change to use https for external links.
* tag 'omap-for-v5.9/dt-pt2-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
Replace HTTP links with HTTPS ones: OMAP DEVICE TREE SUPPORT
ARM: dts: omap5-uevm: Add watchdog timers for IPU and DSP
ARM: dts: omap4-panda-common: Add watchdog timers for IPU and DSP
ARM: dts: omap5-uevm: Add system timers to DSP and IPU
ARM: dts: omap5-uevm: Add CMA pools and enable IPU & DSP
ARM: dts: omap5: Add aliases for rproc nodes
ARM: dts: omap5: Add DSP and IPU nodes
ARM: dts: omap4-panda-common:: Add system timers to DSP and IPU
ARM: dts: omap4-panda-common: Add CMA pools and enable IPU & DSP
ARM: dts: omap4: Add aliases for rproc nodes
ARM: dts: omap4: Add IPU DT node
ARM: dts: omap4: Update the DSP node
ARM: dts: omap5: Add timer_sys_ck clocks for timers
ARM: dts: omap4: Add timer_sys_ck clocks for timers
ARM: dts: am335x-pocketbeagle: set default mux for gpio pins
Link: https://lore.kernel.org/r/pull-1594838111-649880@atomide.com-3
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Thu, 16 Jul 2020 20:13:53 +0000 (22:13 +0200)]
Merge tag 'omap-for-v5.9/ti-sysc-drop-pdata-take2-signed' of git://git./linux/kernel/git/tmlind/linux-omap into arm/dt
Drop more legacy platform data for omaps for v5.9
A series of changes to drop remaining USB platform data for omap4/5,
and am4, and dra7.
And a patch to drop AES platform data for omap3.
* tag 'omap-for-v5.9/ti-sysc-drop-pdata-take2-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: OMAP2+: Drop legacy platform data for omap5 usb host
ARM: OMAP2+: Drop legacy platform data for omap4 usb
ARM: OMAP2+: Drop legacy platform data for dra7 dwc3
ARM: OMAP2+: Drop legacy platform data for omap5 dwc3
ARM: OMAP2+: Drop legacy platform data for am4 dwc3
bus: ti-sysc: Add missing quirk flags for usb_host_hs
ARM: dts: omap3: Migrate AES from hwmods to sysc-omap2
Link: https://lore.kernel.org/r/pull-1594838111-649880@atomide.com-2
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Sumit Gupta [Wed, 15 Jul 2020 13:31:24 +0000 (19:01 +0530)]
arm64: tegra: Add compatible string for Tegra194 CPU complex
On Tegra194, data on valid operating points for the CPUs needs to be
queried from BPMP. However, there is no node representing CPU complex.
So, add a compatible string to the 'cpus' node instead of using dummy
node to bind the cpufreq driver to. Also, add reference to the BPMP
instance for the CPU complex.
Signed-off-by: Sumit Gupta <sumitg@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Thierry Reding [Thu, 25 Jun 2020 11:39:10 +0000 (13:39 +0200)]
arm64: tegra: Add HDMI supplies on Norrin
The SOR controller needs the AVDD I/O and VDD HDMI PLL supplies in order
to operate correctly. Make sure to specify them for the Norrin board.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Thierry Reding [Wed, 15 Jul 2020 09:51:46 +0000 (11:51 +0200)]
arm64: tegra: Add #{address,size}-cells for VI I2C on Tegra210
The VI I2C controller provides an I2C bus and therefore needs to define
the #address-cells and #size-cells properties.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Sowjanya Komatineni [Wed, 15 Jul 2020 04:20:39 +0000 (21:20 -0700)]
arm64: tegra: Add missing clocks and power-domains to Tegra210 VI I2C
Tegra210 VI I2C is in VE power domain and i2c-vi node should have
power-domains property.
Current Tegra210 i2c-vi device node is missing both VI I2C clocks
and power-domains property.
This patch adds them.
Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Dmitry Osipenko [Mon, 29 Jun 2020 02:54:55 +0000 (05:54 +0300)]
dt-bindings: ARM: tegra: Add ASUS Google Nexus 7
Add a binding for the Tegra30-based ASUS Google Nexus 7 tablet device.
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Dmitry Osipenko [Mon, 29 Jun 2020 02:54:54 +0000 (05:54 +0300)]
dt-bindings: ARM: tegra: Add Acer Iconia Tab A500
Add a binding for the Tegra20-based Acer Iconia Tab A500 tablet device.
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Dmitry Osipenko [Mon, 29 Jun 2020 02:54:53 +0000 (05:54 +0300)]
dt-bindings: Add vendor prefix for Acer Inc.
Acer is a hardware and electronics corporation, specializing in advanced
electronics technology. Acer's products include desktop PCs, laptop PCs,
tablets, servers, displays, storage devices, virtual reality devices,
smartphones and peripherals. Their web site is http://www.acer.com/.
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Dmitry Osipenko [Mon, 29 Jun 2020 02:54:52 +0000 (05:54 +0300)]
ARM: tegra: Add device-tree for ASUS Google Nexus 7
There are few hardware variants of NVIDIA Tegra30-based Nexus 7 device:
1. WiFi-only (named Grouper)
2. GSM (named Tilapia)
3. Using Maxim PMIC (E1565 board ID)
4. Using Ti PMIC (PM269 board ID)
This patch adds device-trees for known and tested variants.
Link: https://wiki.postmarketos.org/wiki/Google_Nexus_7_2012_(asus-grouper)
Tested-by: Pedro Ângelo <pangelo@void.io>
Tested-by: Matt Merhar <mattmerhar@protonmail.com>
Tested-by: Zack Pearsall <zpearsall@yahoo.com>
Signed-off-by: David Heidelberg <david@ixit.cz>
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Dmitry Osipenko [Mon, 29 Jun 2020 02:54:51 +0000 (05:54 +0300)]
ARM: tegra: Add device-tree for Acer Iconia Tab A500
Add device-tree for Acer Iconia Tab A500, which is NVIDIA Tegra20-based
tablet device.
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Adam Ford [Tue, 14 Jul 2020 12:34:19 +0000 (07:34 -0500)]
dt-bindings: arm: renesas: Document beacon-rzg2m
Beacon EmbeddedWorks is introducing a development kit based on the
Renesas RZ/G2M platform. This patch adds the entry to the bindings
list.
Signed-off-by: Adam Ford <aford173@gmail.com>
Link: https://lore.kernel.org/r/20200714123419.3390-2-aford173@gmail.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Geert Uytterhoeven [Mon, 6 Jul 2020 15:40:15 +0000 (17:40 +0200)]
arm64: dts: renesas: Restructure Makefile
Make the Makefile for building Renesas DTB files easier to read and
maintain:
- Get rid of line continuations,
- Use a single entry per line,
- Sort SoCs and boards alphabetically,
- Separate SoCs by blank lines.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Link: https://lore.kernel.org/r/20200706154015.29257-1-geert+renesas@glider.be
Geert Uytterhoeven [Mon, 6 Jul 2020 15:14:00 +0000 (17:14 +0200)]
arm64: dts: renesas: cat875: Drop superfluous phy-mode
The PHY mode already defaults to RGMII in the RZ/G2E base SoC DTS file,
so there is no need to specify the same value in board files.
Fixes:
6b170cd3ed02949f ("arm64: dts: renesas: cat875: Add ethernet support")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/20200706151400.23105-1-geert+renesas@glider.be
Niklas Söderlund [Sat, 4 Jul 2020 15:58:56 +0000 (17:58 +0200)]
ARM: dts: renesas: Remove unused remote property from adv7180 nodes
The remote property is never read by the driver, remove it.
Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Link: https://lore.kernel.org/r/20200704155856.3037010-3-niklas.soderlund+renesas@ragnatech.se
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Niklas Söderlund [Sat, 4 Jul 2020 15:58:55 +0000 (17:58 +0200)]
ARM: dts: gose: Fix ports node name for adv7180
When adding the adv7180 device node the ports node was misspelled as
port, fix this.
Fixes:
8cae359049a88b75 ("ARM: dts: gose: add composite video input")
Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Link: https://lore.kernel.org/r/20200704155856.3037010-2-niklas.soderlund+renesas@ragnatech.se
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Thierry Reding [Wed, 15 Jul 2020 09:50:17 +0000 (11:50 +0200)]
arm64: tegra: Add clocks and resets for ISP on Tegra210
The ISP blocks take a clock and a reset as inputs, so add those to the
device tree nodes.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Thierry Reding [Wed, 15 Jul 2020 09:49:10 +0000 (11:49 +0200)]
arm64: tegra: Fix compatible string for DPAUX on Tegra210
The Tegra210 DPAUX controller is not compatible with that found on
Tegra124, so it must have a separate compatible string.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Thierry Reding [Wed, 15 Jul 2020 09:48:44 +0000 (11:48 +0200)]
arm64: tegra: Add i2c-bus subnode for DPAUX controllers
The DPAUX controller device tree bindings require the bus to have an
i2c-bus subnode to distinguish between I2C clients and pinmux groups.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Thierry Reding [Thu, 25 Jun 2020 11:38:59 +0000 (13:38 +0200)]
ARM: tegra: Add HDMI supplies on Nyan boards
The SOR controller needs the AVDD I/O and VDD HDMI PLL supplies in order
to operate correctly. Make sure to specify them for Nyan boards.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Thierry Reding [Wed, 15 Jul 2020 09:47:43 +0000 (11:47 +0200)]
ARM: tegra: Add missing DSI controller on Tegra30
Tegra30 has a DSI controller, although it is never used on any of the
devices supported by the upstream Linux kernel.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Thierry Reding [Wed, 15 Jul 2020 09:46:05 +0000 (11:46 +0200)]
ARM: tegra: Add i2c-bus subnode for DPAUX controllers
The DPAUX controller device tree bindings require the bus to have an
i2c-bus subnode to distinguish between I2C clients and pinmux groups.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Thierry Reding [Tue, 14 Jul 2020 10:00:09 +0000 (12:00 +0200)]
arm64: tegra: Sort aliases alphabetically
Most device tree files already do this, so update the remaining ones
for consistency.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Thierry Reding [Tue, 14 Jul 2020 09:35:48 +0000 (11:35 +0200)]
arm64: tegra: Remove spurious tabs
Remove tabs in places where they don't belong (i.e. where a single space
is sufficient).
Signed-off-by: Thierry Reding <treding@nvidia.com>
Jon Hunter [Sun, 12 Jul 2020 10:25:06 +0000 (11:25 +0100)]
arm64: tegra: Populate VBUS for USB3 on Jetson TX2
The VBUS for USB3 connector on the Jetson TX2 is connected to the
vdd_usb1 supply and although this is populated for the USB2 port
on the USB3 connector it is not populated for the USB3 port and
causes the following warning to be seen on boot ...
usb3-0: supply vbus not found, using dummy regulator
Fix this by also adding the VBUS supply to the USB3 port.
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Jon Hunter [Sun, 12 Jul 2020 10:25:05 +0000 (11:25 +0100)]
arm64: tegra: Enable DFLL support on Jetson Nano
Populate the DFLL node and corresponding PWM pin nodes in order to
enable CPUFREQ support on the Jetson Nano platform.
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Jon Hunter [Mon, 13 Jul 2020 16:17:01 +0000 (17:17 +0100)]
arm64: tegra: Add support for Jetson Xavier NX
Add the device-tree source files for the Tegra194 Jetson Xavier NX
Developer Kit. The Xavier NX Developer Kit consists of a small form
factor system-on-module (SOM) board (part number p3668-0000) and a
carrier board (part number p3509-0000).
The Xavier NX Developer Kit SOM features a micro-SD card slot, however,
there is also a variant of the SOM available that features a 16GB eMMC.
Given that the carrier board can be used with the different SOM
variants, that have different part numbers, both the compatible string
and file name of the device-tree source file for the Developer Kit is a
concatenation of the SOM and carrier board part numbers.
Based on some initial work by Thierry Reding <treding@nvidia.com>.
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Vidya Sagar [Mon, 6 Jul 2020 17:14:54 +0000 (22:44 +0530)]
arm64: tegra: Re-order PCIe aperture mappings
Re-order Tegra194's PCIe aperture mappings to have IO window moved to
64-bit aperture and have the entire 32-bit aperture used for accessing
the configuration space. This makes it to use the entire 32MB of the 32-bit
aperture for ECAM purpose while booting through ACPI.
Signed-off-by: Vidya Sagar <vidyas@nvidia.com>
Acked-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Sowjanya Komatineni [Wed, 17 Jun 2020 01:41:34 +0000 (18:41 -0700)]
arm64: tegra: Enable Tegra VI CSI support for Jetson Nano
This patch enables VI and CSI in device tree for Jetson Nano.
Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Sowjanya Komatineni [Wed, 17 Jun 2020 01:41:33 +0000 (18:41 -0700)]
arm64: tegra: jetson-tx1: Add camera supplies
Jetson TX1 development board has a camera expansion connector which
has 2V8, 1V8 and 1V2 supplies to power up the camera sensor on the
supported camera modules.
Camera module designed as per Jetson TX1 camera expansion connector
may use these supplies for camera sensor avdd 2V8, digital core 1V8,
and digital interface 1V2 voltages.
These supplies are from fixed regulators on TX1 carrier board with
enable control signals from I2C GPIO expanders.
This patch adds these camera supplies to Jetson TX1 device tree to
allow using these when a camera module is used.
Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Thierry Reding [Fri, 12 Jun 2020 08:52:50 +0000 (10:52 +0200)]
arm64: tegra: Fix order of XUSB controller clocks
This is purely to make the json-schema validation tools happy because
they cannot deal with string arrays that may be in arbitrary order.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Thierry Reding [Fri, 12 Jun 2020 08:51:37 +0000 (10:51 +0200)]
arm64: tegra: Rename cbb@0 to bus@0 on Tegra194
The control backbone is a simple-bus and hence its device tree node
should be named "bus@<unit-address>" according to the bindings.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Thierry Reding [Fri, 12 Jun 2020 08:50:17 +0000 (10:50 +0200)]
arm64: tegra: Sort nodes by unit-address on Jetson Nano
Move the usb@
700d0000 node to the correct place in the device tree,
ordered by unit-address.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Thierry Reding [Fri, 12 Jun 2020 08:48:25 +0000 (10:48 +0200)]
arm64: tegra: Various fixes for PMICs
Standardize on "pmic" as the node name for the PMIC on Tegra210 systems
and use consistent names for pinmux and GPIO hog nodes.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Thierry Reding [Fri, 12 Jun 2020 08:46:30 +0000 (10:46 +0200)]
arm64: tegra: Rename agic -> interrupt-controller
Device tree nodes for interrupt controllers should be named "interrupt-
controller", so rename the AGIC accordingly.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Thierry Reding [Fri, 12 Jun 2020 08:44:09 +0000 (10:44 +0200)]
arm64: tegra: Fix indentation in Tegra194 device tree
Properly indent subsequent lines so that they align with the first line.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Thierry Reding [Thu, 25 Jun 2020 11:41:38 +0000 (13:41 +0200)]
arm64: tegra: Fix indentation in Tegra132 device tree
Properly indent subsequent lines so that they align with the first line.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Thierry Reding [Fri, 12 Jun 2020 07:54:49 +0000 (09:54 +0200)]
arm64: tegra: Remove unused interrupts from Tegra194 AON GPIO
The AON GPIO controller on Tegra194 currently only uses a single
interrupt, so remove the extra ones.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Thierry Reding [Fri, 12 Jun 2020 07:44:58 +0000 (09:44 +0200)]
arm64: tegra: Use standard names for SRAM nodes
SRAM nodes should be named sram@<unit-address> to match the bindings.
While at it, also remove the unneeded, custom compatible string for
SRAM partition nodes.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Thierry Reding [Fri, 12 Jun 2020 07:42:04 +0000 (09:42 +0200)]
arm64: tegra: Do not mark display hub as simple bus
The display hub on Tegra186 and Tegra194 is not a simple bus, so drop
the corresponding compatible string.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Thierry Reding [Fri, 12 Jun 2020 07:39:13 +0000 (09:39 +0200)]
arm64: tegra: Fix {clock,reset}-names ordering
It's very difficult to describe string lists that can be in arbitrary
order using the json-schema based validation tooling. Since the OS is
not going to care either way, take the easy way out and reorder these
entries to match the order defined in the bindings.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Thierry Reding [Fri, 12 Jun 2020 07:37:09 +0000 (09:37 +0200)]
arm64: tegra: Remove XUSB pad controller interrupt from XUSB node
The XUSB controller doesn't need the XUSB pad controller's interrupt, so
remove it.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Thierry Reding [Fri, 12 Jun 2020 07:34:27 +0000 (09:34 +0200)]
arm64: tegra: Use standard EEPROM properties
The address-bits and page-size properties that are currently used are
not valid properties according to the bindings. Use the address-width
and pagesize properties instead.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Thierry Reding [Fri, 12 Jun 2020 07:31:55 +0000 (09:31 +0200)]
arm64: tegra: Update USB connector nodes
Use the preferred {id,vbus}-gpios over the {id,vbus}-gpio properties and
fix the ordering of compatible strings (most-specific ones should come
first).
Signed-off-by: Thierry Reding <treding@nvidia.com>
Thierry Reding [Fri, 12 Jun 2020 07:28:15 +0000 (09:28 +0200)]
arm64: tegra: Remove unneeded power supplies
On Tegra186 and later, the BPMP is responsible for enabling/disabling
the PCIe related power supplies of the pad controller and there is no
need for the operating system to control them, so they can be removed.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Thierry Reding [Fri, 12 Jun 2020 07:22:14 +0000 (09:22 +0200)]
arm64: tegra: Add missing #phy-cells property to USB PHYs
USB PHYs must have a #phy-cells property, so add one to the Tegra USB
PHYs which don't have one.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Thierry Reding [Fri, 12 Jun 2020 07:20:15 +0000 (09:20 +0200)]
arm64: tegra: Tegra132 EMC is not compatible with Tegra124
The external memory controller found on Tegra132 is not fully compatible
with the instantiation on Tegra124, so remove the corresponding string
from the list of compatible strings.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Thierry Reding [Fri, 12 Jun 2020 07:18:31 +0000 (09:18 +0200)]
arm64: tegra: Use sor0_out clock on Tegra132
The sor0_out clock is required to make eDP work properly.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Thierry Reding [Fri, 12 Jun 2020 07:17:34 +0000 (09:17 +0200)]
arm64: tegra: Do not mark host1x as simple bus
The host1x is not a simple bus, so drop the corresponding compatible
string.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Thierry Reding [Fri, 12 Jun 2020 07:13:52 +0000 (09:13 +0200)]
arm64: tegra: Use proper tuple notation
Tuple boundaries should be marked by < and > to make it clear which
cells are part of the same tuple. This also helps the json-schema based
validation tooling to properly parse this data.
While at it, also remove the "immovable" bit from PCI addresses. All of
these addresses are in fact "movable".
Signed-off-by: Thierry Reding <treding@nvidia.com>
Tony Lindgren [Mon, 13 Jul 2020 16:59:49 +0000 (09:59 -0700)]
ARM: OMAP2+: Drop legacy platform data for omap5 usb host
We can now probe devices with ti-sysc interconnect driver and dts
data. Let's drop the related platform data and custom ti,hwmods
dts property.
As we're just dropping data, and the early platform data init
is based on the custom ti,hwmods property, we want to drop both
the platform data and ti,hwmods property in a single patch.
Signed-off-by: Tony Lindgren <tony@atomide.com>
Tony Lindgren [Mon, 13 Jul 2020 16:59:49 +0000 (09:59 -0700)]
ARM: OMAP2+: Drop legacy platform data for omap4 usb
We can now probe devices with ti-sysc interconnect driver and dts
data. Let's drop the related platform data and custom ti,hwmods
dts property.
As we're just dropping data, and the early platform data init
is based on the custom ti,hwmods property, we want to drop both
the platform data and ti,hwmods property in a single patch.
Signed-off-by: Tony Lindgren <tony@atomide.com>
Tony Lindgren [Mon, 13 Jul 2020 16:59:48 +0000 (09:59 -0700)]
ARM: OMAP2+: Drop legacy platform data for dra7 dwc3
We can now probe devices with ti-sysc interconnect driver and dts
data. Let's drop the related platform data and custom ti,hwmods
dts property.
As we're just dropping data, and the early platform data init
is based on the custom ti,hwmods property, we want to drop both
the platform data and ti,hwmods property in a single patch.
Signed-off-by: Tony Lindgren <tony@atomide.com>
Tony Lindgren [Mon, 13 Jul 2020 16:59:48 +0000 (09:59 -0700)]
ARM: OMAP2+: Drop legacy platform data for omap5 dwc3
We can now probe devices with ti-sysc interconnect driver and dts
data. Let's drop the related platform data and custom ti,hwmods
dts property.
As we're just dropping data, and the early platform data init
is based on the custom ti,hwmods property, we want to drop both
the platform data and ti,hwmods property in a single patch.
Signed-off-by: Tony Lindgren <tony@atomide.com>
Thierry Reding [Tue, 14 Jul 2020 09:37:30 +0000 (11:37 +0200)]
dt-bindings: tegra: Document Jetson Xavier NX (and devkit)
Add the compatible strings for the Jetson Xavier NX and the
corresponding developer kit.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Martin Blumenstingl [Sat, 20 Jun 2020 16:36:54 +0000 (18:36 +0200)]
ARM: dts: meson8b: odroidc1: enable the SDHC controller
Odroid-C1 has an eMMC connector where users can optionally install an
eMMC module. The eMMC modules run off a 1.8V VQMMC supply which means
that HS-200 mode can be used (this is the highest mode that the SDHC
controller supports). Enable the SDHC controller so eMMC modules can be
accessed.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Link: https://lore.kernel.org/r/20200620163654.37207-4-martin.blumenstingl@googlemail.com
Martin Blumenstingl [Sat, 20 Jun 2020 16:36:53 +0000 (18:36 +0200)]
ARM: dts: meson8b: ec100: enable the SDHC controller
EC-100 has built-in eMMC flash which is hard-wired to 3.3V VCC (which
means it's limited to high-speed MMC modes). Enable the SDHC controller
to access the contents of the eMMC flash.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Link: https://lore.kernel.org/r/20200620163654.37207-3-martin.blumenstingl@googlemail.com
Martin Blumenstingl [Sat, 20 Jun 2020 16:36:52 +0000 (18:36 +0200)]
ARM: dts: meson: add the SDHC MMC controller
Meson6, Meson8, Meson8b and Meson8m2 are using a similar SDHC controller
IP which typically connects to an eMMC chip (because unlike the SDIO
controller the SDHC controller has an 8-bit bus interface).
On Meson8, Meson8b and Meson8m2 the clock inputs are all the same.
However, Meson8m2 seems to have an improved version of the SHDC
controller IP which doesn't require the driver to wait manually for a
flush of a DMA transfer. Thus every SoC has it's own compatible string
so if more difference are discovered they can be implemented.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Link: https://lore.kernel.org/r/20200620163654.37207-2-martin.blumenstingl@googlemail.com