pick-ui: use assignment expressions

Python 3.8 is 2 years old by now, I think it's time to allow using its
features, especially for a script that's only used by the release
maintainers.

Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13664>

tu,util/driconf: Add option to not reserve descriptor set

A descriptor set is internally reserved for descriptor set dynamic
offset which might not be used by an applications which otherwise
requires an extra descriptor set. This driconf option allows making
that trade-off by dropping support for dynamic offsets in exchange
for an extra descriptor set which means 5 usable descriptor sets on
A6XX and 8 on A7XX.

Signed-off-by: Mark Collins <mark@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25534>

tu: Support higher descriptor set count for A7XX

Allows for the descriptor set count to vary at runtime depending on
the specific GPU to allow for 7 usable descriptor sets on A7XX with
one reserved for dynamic offsets.

Passing VK-CTS: dEQP-VK.binding_model.*

Signed-off-by: Mark Collins <mark@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25534>

freedreno/common: Add max_sets property to A6xxGPUInfo

A7XX increases the maximum amount of descriptor sets from 5 to 8,
the amount of descriptor sets was added as a property of the
A6xxGPUInfo to accommodate it changing across GPUs.

Signed-off-by: Mark Collins <mark@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25534>

anv: fix index buffer size programming

This is a merge issue due to 2 MRs touching the same code.

Fixes a few maintence5 tests like : dEQP-VK.robustness.bind_index_buffer2.offset_0.draw_indexed.oo_size

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 50f6903bd9 ("anv: add new low level emission & dirty state tracking")
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25599>

nir: handle nir_var_mem_ubo in nir_clone_uniform_variable

for UBOs

Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25394>

nir: expose reusable linking helpers for cloning uniform loads

for the new varying optimizer

Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25394>

nir: gather dual slot input information

Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25394>

nir: take dual slot input info into account when computing IO driver locations

Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25394>

nir: add dual-slot input information into load_input intrinsics

This is necessary to allow optimizing VS inputs after nir_lower_io, which
is currently impossible because the loss of dual-slot information in NIR
would break VS inputs. With this, driver locations can be recomputed by
calling nir_recompute_io_bases. It's a prerequisite for optimizing varyings
with lowered IO.

When this is used, we will be able to eliminate unused dual-slot VS inputs
as well as unused low and high halves of dual-slot VS inputs for the first
time, which can happen due to optimizations of varyings. Without this,
st/mesa binds vertex buffers for dual-slot inputs that are fully or
partially unused in the shader.

Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25394>

nir: recompute IO bases after DCE in nir_lower_io_passes

otherwise the IO bases can be incorrect due to non-DCE'd input loads

Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25394>

nir: sort variables by location in nir_lower_io_passes to work around a bug

I don't know why this is necessary, but it unblocks the work on varying
optimizations.

Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25394>

virgl: Use common clear_texture if host doesn't support the feature

v2: Fix include (osy)

Fixes: a1eabeff (gallium: remove PIPE_CAP_CLEAR_TEXTURE)
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9944

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25580>

ci: Uprev crosvm

Recent commit in linux kernel 6.6 rc3 broke booting
in crosvm. Latest crosvm contains a fix for this issue.
So bump the crosvm version to latest.

https://issuetracker.google.com/issues/303128596
https://chromium-review.googlesource.com/c/crosvm/crosvm/+/4906858

Signed-off-by: Vignesh Raman <vignesh.raman@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25582>

ci/lima: farm is down, disable for now

Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25596>

ci/b2c: switch containers to a back-up ahead of valve-infra renaming

We are about to rename mupuf/valve-infra into gfx-ci/ci-tron.

While most resources will transparently be redirected, gitlab does
not allow us to keep our containers during the migration.

To work around that, I uploaded the current containers to Eric's fork
of valve-infra. Let's use these containers until the migration is over!

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25593>

nvk: Invalidate SKED caches at the top of command buffers

This is the cache that caches QMDs.  We need to invalidate it or else we
can end up with cache collisions and end up running the wrong shader.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25595>

nvk: Invalidate sampler/texture header caches in BeginCommandBuffer()

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25595>

nvk: Add a nvk_cmd_buffer_compute_cls() helper

We have one of these for 3D and it's more ergonamic.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25595>

nouveau: Generate headers for Maxwell B compute

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25595>

intel/fs: Add DP4A to get_lowered_simd_width

While working on cooperative matrix support, I noticed some invalid
DP4A instructions being generated.

    dp4a(32)    g33<1>UD    g21<8,8,1>UD    g1.0<0,1,0>UD   g9<1,1,1>UD

This violates the constraint that the destination or a source can only
access two consecutive GRFs.

I'm a little surprised that validation didn't catch this. Perhaps
because it's a 3 source instruction? Either way, it seems like a bigger
project to fix that.

Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Fixes: 0f809dbf404 ("intel/compiler: Basic support for DP4A instruction")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25554>

util: Add function print information about a ralloc tree

In release mode print the ralloc tree header pointers.  In debug mode,
will look at the child allocations recursively checking for the canary
values.  In most cases this should work and give us extra information
about the type of the subtree (GC, Linear) and the allocation sizes.

For example, calling it at the end of spirv_to_nir() will output the
following tree with a summary at the end (lines elided to focus on the
general structure of the output)

```
0xca8d00 (472 bytes)
  0xdf2c60 (32 bytes)
  0xdf2c00 (32 bytes)
  0xdf2ba0 (32 bytes)
  0xdf2b40 (32 bytes)
  (...)
  0xcde8b0 (64 bytes)
  0xcde760 (72 bytes)
    0xd2de40 (168 bytes)
  0xcce660 (64 bytes)
  0xcce510 (72 bytes)
    0xcce5a0 (120 bytes)
  0xcce490 (64 bytes)
  (...)
  0xcbc450 (456 bytes)
    0xdf55c0 (160 bytes)
      0xdf5730 (72 bytes)
        0xdf57c0 (80 bytes)
      0xdf5530 (72 bytes)
        0xdf56a0 (80 bytes)
    (...)
    0xcbe840 (128 bytes)
      0xcc4310 (4 bytes)
    0xcbc660 (536 bytes) (gc context)
      0xde6b40 (32576 bytes) (gc slab or large block)
      0xddb160 (32704 bytes) (gc slab or large block)
      0xdc8d50 (32704 bytes) (gc slab or large block)
      (...)
      0xcde9a0 (32704 bytes) (gc slab or large block)
      0xcd6720 (32704 bytes) (gc slab or large block)
      0xcce6e0 (32768 bytes) (gc slab or large block)
  0xcbc330 (72 bytes)
    0xd680a0 (208 bytes)
  0xca9010 (78560 bytes)
  0xca8f20 (176 bytes)

==== RALLOC INFO ptr=0xca8d30 info=0xca8d00
ralloc allocations    = 4714
  - linear            = 0
  - gc                = 23
  - other             = 4691
content bytes         = 1055139
ralloc metadata bytes = 226272
linear metadata bytes = 0
====
```

There's a flag to pass so only the summary at the end is printed.

Acked-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25482>

util: Add a canary to identify gc_ctx in debug mode

Acked-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25482>

util: Add size to ralloc_header in debug mode

For 64-bit environments this just fills a padding.  Will enable
dumping more information when debugging ralloc trees.

Acked-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25482>

rusticl: Add Rust bindings for inline glsl_types functions

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25470>

compiler/types: Flip wrapping of basic "get type" functions

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25470>

compiler/types: Flip wrapping of convenience accessors for vector types

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25470>

compiler/types: Flip wrapping of various type identification checks

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25470>

compiler/types: Flip wrapping of base_type checks

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25470>

compiler/types: Move C declarations into glsl_types.h

This ensures they'll be visible for the C++ inline implementations.
Reordered the functions to better organize them: queries, getters,
transformers, layout functions.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25470>

compiler/types: Move the C++ inline functions in glsl_type out of the struct body

Just move code, will make easier to flip these to be wrappers to the C code.  Keep
those in a separate header file to reduce cluttering glsl_types.h.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25470>

venus: fix re-export of imported classic 3d resources

When the guest driver is Virgl while Xwayland is on Zink, Virgl can
request virtgpu classic 3d resource allocations for swapchain images.
Zink will import when the image is shared with xserver and will export
for fd info of all 2d images later to be forwarded.

Cc: mesa-stable
Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25579>

radv: fix re-emitting streamout descriptors for NGG streamout

In a scenario like:
CmdBindTransformFeedbackBuffers()
BeginTransformFeedback()
CmdDraw() --> streamout descriptors emitted
EndTransformFeedback() --> streamout descriptors emitted as 0 (disabled)
CmdDraw()
BeginTransformFeedback()
CmdDraw() --> streamout descriptor not re-emitted
EndTransformFeedback()

Fix this by re-emitting streamout descriptors when streamout is
enabled/disabled because a buffer size of 0 acts like a disable bit.

This fixes dEQP-VK.transform_feedback.simple.backward_dependency_indirect*
on NAVI31.

Cc: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25583>

zink: store bindless var when creating it to avoid creating it again

When bindless variables are created they get used directly and never
stored anywhere so if another bindless instruction is encountered
duplicate variables are created.

Fixes: fe2ba184d8c ("zink: use descriptor indices in compiler")
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25591>

tu/kgsl: Fix field order in kgsl_command_object init

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9942

Fixes: ec268fa5b666a49adafc431dbc05b73bfd74526e
("tu/kgsl: Support u_trace and perfetto")

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25581>

egl/wayland: Don't segfault if `create_wl_buffer` returns `NULL`

Normally, this shouldn't fail, but it has various cases where it returns
`NULL`. Without this change, it would result in a segfault when
`wl_buffer_add_listener` is called.

This instead makes `EGLSwapBuffers` return a `EGL_BAD_ALLOC` error.

The other place `create_wl_buffer` is called already checks the return
value, and the Vulkan WSI code doesn't seem to have an issue like this.

Signed-off-by: Ian Douglas Scott <ian@iandouglasscott.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24915>

ci: skip dEQP-VK.api.driver_properties.conformance_version for everyone

This test checks the driver's reported conformance version against the
version of the CTS we're running. This check fails every few months
and everyone has to go and bump the number in every driver.

Running this check only makes sense while preparing a conformance
submission, so skip it in the regular CI.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25519>

docs/ci: rewrite the "farm maintenance ^ other change" rule to mean what we actually meant

Sometimes updates to the farm config are needed before re-enabling it,
or updating test expectations with new failures that happened while the
farm was down, etc.

These need to be allowed, as the alternative is to update the
config/expectations/etc. blindly in one MR, merge it, and then merge
another MR with the farm re-enablement.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25560>

fix: clover: LLVM 18: s/CodeGenOpt::/CodeGenOptLevel::/

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9833
Reference: https://github.com/llvm/llvm-project/commit/0a1aa6cda2758b0926a95f87d39ffefb1cb90200
Signed-off-by: Kai Wasserbäch <kai@dev.carbon-project.org>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25586>

fix: clover: LLVM 18 renamed/moved CGFT_*, update compat layer

LLVm renamed and moved the CGFT_* stuff, we need to update the clover
compat header to follow suit.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9833
Reference: https://github.com/llvm/llvm-project/commit/0a1aa6cda2758b0926a95f87d39ffefb1cb90200
Signed-off-by: Kai Wasserbäch <kai@dev.carbon-project.org>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25586>

radv: fix gang submissions with chaining

Gang submissions are mostly only be used for task shaders to both
submit GFX and ACE command buffers in the same submission. Though,
the gang leader (the last submitted CS) IP type should match the
queue IP type to determine which fence to signal.

But if chaining is enabled, it's possible that all GFX cmdbufs are
chained to the first GFX cmdbuf, which means the last CS is ACE and
not GFX.

Fix this by resetting chaining for GFX when a cmdbuffer has GFX+ACE.

Cc: mesa-stable
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9724
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24966>

radv: fill the scratch BO in radv_fill_shader_rings()

Cleanup.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25529>

radv: always write the sample positions when a new descriptor BO is created

This was completely broken, for example in the following scenario:
- submits something which needs sample positions (this creates a new
descriptor BO with sample positions)
- submits something which needs the tess rings (this creates a new
descriptor BO with tess rings but without sample positions, ie.
add_sample_positions would be FALSE)
- submits something which needs sample positions again (this won't
create a new descriptor BO because it incorrectly remembered that
sample positions were set)

Fix this by always writing the sample positions.

This should fix the following flakes:
- dEQP-VK.fragment_shading_barycentric.*.weights.pipeline_topology_dynamic.msaa_interpolate_at_sample.*
- dEQP-VK.pipeline.fast_linked_library.multisample_interpolation.sample_interpolate_at_distinct_values.*
- dEQP-VK.pipeline.fast_linked_library.multisample_interpolation.sample_interpolation_consistency.*
- dEQP-VK.draw.renderpass.linear_interpolation.*
- dEQP-VK.draw.dynamic_rendering.primary_cmd_buff.linear_interpolation.*

These flakes were extremely hard to reproduce!

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25529>

intel/ds: track acceleration RT commands

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25570>

anv: use buffer pools for BVH build buffers

Private memory for BVH builds doesn't need to be mapped on the host,
it's purely for use by the GPU. So it can be put into a different
buffer pool that can put into VRAM only buffers.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25570>

anv: move bo_pool allocation flags to init caller

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25570>

anv: reduce working temporary memory for BVH builds

Part of the memory allocated (private) is a temporary working buffer
for the GRL kernels. Once the build operation is done, the buffer
becomes unused.

Rather than allocate a new buffer each time, reuse the current last
allocated one if its size fits the next build operation.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25570>

ci: drop unused ephemeral packages in alpine image

There's nothing between installing these packages and removing them that
uses them, so let's just drop them.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25546>

intel/fs: Tweak default case of fs_inst::size_read()

In the default case, there's a special case with a few conditions.
Prefer the cheapest conditions first, so we can take advantage of
short-circuiting.

Effect is a small but still significant reduce in shader compilation
times, as can be seen by:

- Fossil replay for Rise of the Tomb Raider

```
Difference at 95.0% confidence
-0.433333 +/- 0.028609
-1.42556% +/- 0.0941163%
(Student's t, pooled s = 0.0337886)
```

- Fossil replay for Batman Arkham City

```
Difference at 95.0% confidence
-8.84 +/- 0.146083
-1.65932% +/- 0.0274207%
(Student's t, pooled s = 0.125423)
```

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25549>

zink: don't check submit count for unflushed usage

unflushed usage is unflushed regardless of the submit count and is
critical for detecting multi-context synchronization

fixes Wolfenstein: The New Order load screen deadlock

Fixes: db12b881c7f ("zink: track/check submit info on resource batch usage")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25572>

egl/wayland: return sooner from swrast_update_buffers() if zink

Fixes: 0f50cc03ef0 ("egl/wayland: don't block in swrast when updating buffers for zink")

Acked-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24700>

egl/wayland: don't block in swrast when updating buffers for zink

this is broken, let vulkan wsi handle buffer management

Fixes: 74451ed3f08 ("egl/wayland: wait for compositor to release shm buffers")

Acked-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24700>

Revert "egl/wayland: Add image loader extension for swrast"

This reverts commit 45b9b0ba32c6a6eed388ff080f7eaf5a765fe970.

Acked-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24700>

ci/hasvk: Add a bunch of new CTS border color fails.

pretty sure this is from new coverage since the CTS uprev..

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25574>

ci/crocus: Add known piglit flakes

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25574>

ci/etnaviv: return gl-1.4-tex1d-2dborder as a known flake

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25574>

nouveau/winsys: use mmap instead of mmap64 in nouveau_bo

The function `mmap64` is part of the large file extension and should not be
called directly. Instead `mmap` should be use and let the system use the
correct interface.

Signed-off-by: Simon Zeni <simon.zeni@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25569>

radv: hard code format features for emulated formats

The format features are known.  No need to rely on
radv_is_sampler_format_supported which will not work for ASTC.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25071>

radv: simplify view format override for emulated formats

Override the view format to the format of plane 1 when the view format
is also emulated.  There is no functional change.

v2: check iview->vk.format directly (@yogeshmohan)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25071>

radv: add radv_is_format_emulated

This is a cleanup with no functional change.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25071>

vulkan/runtime, radv: remove 1D support from ETC2 emulation

The nir code deos not support 1D.  There is also no point in supporting
1D ETC2 images.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25071>

vulkan/runtime: fix a harmless typo for ETC2 emulation

Init input_img_3d correctly.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25071>

vulkan/runtime: fix image type check for ETC2 emulation

There was a typo causing the wrong push constant to be loaded.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25071>

radv: use vk_tecompress_etc2 from the runtime

There are some minor differences

 - fix incorrectly use of device->meta_state.resolve_compute.p_layout
 - when on_demand is true, the creation of ds and pipeline layouts are
   also deferred
 - unlike radv_meta_get_view_type, vk_texcompress_etc2_image_view_type
   returns 1d/2d array image views

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25071>

vulkan/runtime: add a helper for ETC2 emulation

This is based on radv's ETC2 emulation.  There is no real change to the
generated NIR shader.

v2: rename vk_texcompress_etc2_image_format to vk_texcompress_etc2_emulation_format
    update the comments

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25071>

tu: Fix VK_FORMAT_A8_UNORM_KHR using UBWC when !has_8bpp_ubwc

Fixes hangs in Anno 1800 with DXVK 2.3

Fixes: 302907e347612c3d748c88aed90fd6ab60a638f5
("tu: Expose VK_KHR_maintenance5")

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25567>

mesa: Fix glBegin/End when LINE_LOOP is not supported

Emits the first vertex inside glEnd.

cc: mesa-stable

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25346>

aco/gfx11: support vinterp as fma_mix

Totals from 718 (0.94% of 76572) affected shaders:
Instrs: 657897 -> 654219 (-0.56%)
CodeSize: 3471668 -> 3457352 (-0.41%); split: -0.41%, +0.00%
VGPRs: 34200 -> 34164 (-0.11%)
Latency: 11687698 -> 11677030 (-0.09%); split: -0.10%, +0.00%
InvThroughput: 1455371 -> 1451537 (-0.26%); split: -0.26%, +0.00%
VClause: 7598 -> 7600 (+0.03%)
SClause: 18293 -> 18241 (-0.28%); split: -0.44%, +0.15%
Copies: 34641 -> 34644 (+0.01%); split: -0.05%, +0.06%

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25220>

aco: support v_fma_f32_dpp as fma_mix

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25220>

aco/gfx11: apply clamp/omod to vinterp

Totals from 2504 (3.27% of 76572) affected shaders:
MaxWaves: 74098 -> 74106 (+0.01%)
Instrs: 1829278 -> 1823427 (-0.32%); split: -0.32%, +0.00%
CodeSize: 9775908 -> 9759308 (-0.17%); split: -0.18%, +0.01%
Latency: 13494107 -> 13485390 (-0.06%); split: -0.10%, +0.04%
InvThroughput: 2052428 -> 2048724 (-0.18%); split: -0.18%, +0.00%
VClause: 26637 -> 26640 (+0.01%); split: -0.04%, +0.05%
SClause: 62027 -> 61988 (-0.06%); split: -0.14%, +0.08%
Copies: 73776 -> 73815 (+0.05%); split: -0.07%, +0.12%
PreVGPRs: 84403 -> 84397 (-0.01%)

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25220>

Revert "ac/gpu_info: replace ib_alignment with per-IP IB base and size alignments"

This reverts commit b6f435888b718506e8b806eae2a17d6ecf027dfc.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25558>

Revert "ac/gpu_info: pad IBs according to ib_size_alignment"

This reverts commit 4f660f99378382871f0c29e0d4b4d6a044dfe715.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25558>

Revert "winsys/amdgpu: pad gfx and compute IBs with a single NOP packet"

This reverts commit 43e72850697e42cdf6d794407a5523a5e481bd41.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25558>

Revert "radv: fix alignment of DGC command buffers"

This reverts commit b01e87423433f6b39d244daee4b59f53baa4a02e.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25558>

Revert "radv/amdgpu: fix alignment of command buffers"

This reverts commit 4bc58c9f11f0f701be5446ee5e7e8ef9494e3c1e.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25558>

Revert "ac/gpu_info: override ib_size_alignment for VCN_DEC and JPEG"

This reverts commit 867a995ce759a725b58d3fa23e5e319035b7e3f9.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25558>

ci/bare-metal: drop unused imports, sort, use SPDX license

Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25285>

ci/bare-metal: correct workaround for R8152 issue while retrieving TFTP data

1. Move block used for detecting R8152 problems to the bootloader
phase where it belongs. Also remove requirement to 100 failures and just
retry immediatelly.

2. Consider job failed after 10 errors, not 100. From the logs on
   cheza-14, ~ 30 errors is enough to fail.

Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25285>

docs/panfrost: use math-role to denote powers of two

We do this elsewhere in the article, so let's be consistent here.

Reviewed-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24921>

docs/panfrost: use code-blocks with wrapping for long blocks

This makes it a lot easier to read the code-blocks, because we don't
*always* need to scroll.

Reviewed-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24921>

docs/panfrost: link to lima

In the age of the internet, we can use hyperlinking to content instead
of just telling users about something! Let's do that here as well!

Reviewed-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24921>

radv/ci: cleanup list of expected failures for NAVI10/NAVI21/VEGA10

These are flakes, not failures. Remove them from the list of expected
failures to avoid confusion.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25557>

radv/ci: remove no longer existing test for VANGOGH

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25557>

radv: fix synchronization with emulated GS primitives/invocations queries

Move emitting the EOP even which writes the availability bit after the
GDS copy to ensure it's available.

This should fix all GS primitives/invocations flakes in CI.

Cc: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25457>

radv/ci: exclude dEQP-VK.texture.explicit_lod.2d.sizes.128x128_* for all jobs

These tests usually take more than 20s to finish which is slow.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25556>

radv/ci: remove duplicate skipped tests for RAVEN/STONEY

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25556>

aco/gfx11: optimize dual source export

We can combine dpp with the v_cndmask_b32.

Foz-DB Navi31:
Totals from 222 (0.28% of 79330) affected shaders:
Instrs: 564392 -> 563373 (-0.18%); split: -0.19%, +0.01%
CodeSize: 2867040 -> 2864728 (-0.08%); split: -0.09%, +0.01%
Latency: 4278957 -> 4275199 (-0.09%); split: -0.09%, +0.00%
InvThroughput: 586636 -> 585824 (-0.14%); split: -0.14%, +0.00%
SClause: 20210 -> 20211 (+0.00%); split: -0.02%, +0.02%
Copies: 39763 -> 39778 (+0.04%); split: -0.13%, +0.17%
PreVGPRs: 13924 -> 13922 (-0.01%)

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25541>

radeonsi: "clear_12bytes_buffer" shader in nir

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25221>

radeonsi: "clear_render_target_1d_array" shader in nir

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25221>

radeonsi: "clear_render_target" shader in nir

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25221>

ac/surface: don't require exact pitch for gfx6-8 tiled imports

It was reported that it broke Stoney. Something probably uses a suboptimal
pitch, like minigbm.

Fixes: 7d066330e0c3d47a0ad - ac/surface: relax custom pitch requirements to any multiple of 256B on gfx10.3+

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25540>

radeonsi: upload shaders via a staging buffer so as not to map VRAM directly

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25494>

radeonsi: add another aux context for uploading shaders

When the first auxiliary context is locked and wants to compile and upload
a shader asynchronously, we need to use another auxiliary context
in the compiler thread because the first one is locked at that point.

This adds an array of auxiliary contexts into si_screen and changes how aux
contexts are accessed.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25494>

intel/eu/validate: Validate "packed word exception" stricter

Fixes: 75b7f5a2 ("i965: Validate "Region Alignment Rules"")
Signed-off-by: Sviatoslav Peleshko <sviatoslav.peleshko@globallogic.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25378>

intel/fs: Fix "packed word exception" condition for register regioning

Fixes: a6bf5f88 ("i965/fs: Enforce common regioning restrictions by SIMD splitting.")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9432
Signed-off-by: Sviatoslav Peleshko <sviatoslav.peleshko@globallogic.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25378>

nvk: Use align() and align64() instead of ALIGN_POT

For one thing, they actually assert that the alignment factor is a power
of two.  More importantly, though, because they're real functions and
not macros, they up-cast the alignment to a full uint32_t or uint64_t
before doing the alignment calculation.  If you do ALIGN_POT() on a
64-bit value with a 32-bit alignment, it truncates to 32 bits because
the NOT is done before the up-cast due to C implicit cast rules.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25555>

nvk: Handle zero-sized sparse buffers

In the zero case, we don't want to allocate any VMA.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25555>

zink: Enable edge flags with points

Fixes: 90a8525 ("zink: handle edgeflags")
Reviewed-by: Antonino Maniscalco <antonino.maniscalco@collabora.com>
Acked-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25335>

nir/passthrough_gs: Support edge flags with points

Fixes: 24535ff ("nir: handle edge flags in nir_create_passthrough_gs")
Reviewed-by: Antonino Maniscalco <antonino.maniscalco@collabora.com>
Acked-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25335>

zink: Initialize primitive types to an invalid value

The memory is zero initialized which corresponds to MESA_PRIM_POINTS.

Fixes: 659c39f ("zink: rework primitive rasterization type logic")
Reviewed-by: Antonino Maniscalco <antonino.maniscalco@collabora.com>
Acked-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25335>