Merge tag 'drm-vc4-next-2016-07-12' of https://github.com/anholt/linux into drm-next

This pull request brings in new vc4 plane formats for Android, precise
vblank timestamping, and a couple of small cleanups.

* tag 'drm-vc4-next-2016-07-12' of https://github.com/anholt/linux:
  drm/vc4: remove redundant ret status check
  drm/vc4: Implement precise vblank timestamping.
  drm/vc4: Bind the HVS before we bind the individual CRTCs.
  gpu: drm: vc4_hdmi: add missing of_node_put after calling of_parse_phandle
  drm: vc4: enable XBGR8888 and ABGR8888 pixel formats
  drm/vc4: clean up error exit path on failed dpi_connector allocation

Merge tag 'drm-intel-next-2016-07-11' of git://anongit.freedesktop.org/drm-intel into drm-next

- select igt testing depencies for CONFIG_DRM_I915_DEBUG (Chris)
- track outputs in crtc state and clean up all our ad-hoc connector/encoder
  walking in modest code (Ville)
- demidlayer drm_device/drm_i915_private (Chris Wilson)
- thundering herd fix from Chris Wilson, with lots of help from Tvrtko Ursulin
- piles of assorted clean and fallout from the thundering herd fix
- documentation and more tuning for waitboosting (Chris)
- pooled EU support on bxt (Arun Siluvery)
- bxt support is no longer considered prelimary!
- ring/engine vfunc cleanup from Tvrtko
- introduce intel_wait_for_register helper (Chris)
- opregion updates (Jani Nukla)
- tuning and fixes for wait_for macros (Tvrkto&Imre)
- more kabylake pci ids (Rodrigo)
- pps cleanup and fixes for bxt (Imre)
- move sink crc support over to atomic state (Maarten)
- fix up async fbdev init ordering (Chris)
- fbc fixes from Paulo and Chris

* tag 'drm-intel-next-2016-07-11' of git://anongit.freedesktop.org/drm-intel: (223 commits)
  drm/i915: Update DRIVER_DATE to 20160711
  drm/i915: Select DRM_VGEM for igt
  drm/i915: Select X86_MSR for igt
  drm/i915: Fill unused GGTT with scratch pages for VT-d
  drm/i915: Introduce Kabypoint PCH for Kabylake H/DT.
  drm/i915:gen9: implement WaMediaPoolStateCmdInWABB
  drm/i915: Check for invalid cloning earlier during modeset
  drm/i915: Simplify hdmi_12bpc_possible()
  drm/i915: Kill has_dsi_encoder
  drm/i915: s/INTEL_OUTPUT_DISPLAYPORT/INTEL_OUTPUT_DP/
  drm/i915: Replace some open coded intel_crtc_has_dp_encoder()s
  drm/i915: Kill has_dp_encoder from pipe_config
  drm/i915: Replace manual lvds and sdvo/hdmi counting with intel_crtc_has_type()
  drm/i915: Unify intel_pipe_has_type() and intel_pipe_will_have_type()
  drm/i915: Add output_types bitmask into the crtc state
  drm/i915: Remove encoder type checks from MST suspend/resume
  drm/i915: Don't mark eDP encoders as MST capable
  drm/i915: avoid wait_for_atomic() in non-atomic host2guc_action()
  drm/i915: Group the irq breadcrumb variables into the same cacheline
  drm/i915: Wake up the bottom-half if we steal their interrupt
  ...

Merge tag 'topic/drm-misc-2016-07-14' of git://anongit.freedesktop.org/drm-intel into drm-next

I recovered dri-devel backlog from my vacation, more misc stuff:
- of_put_node fixes from Peter Chen (not all yet)
- more patches from Gustavo to use kms-native drm_crtc_vblank_* funcs
- docs sphinxification from Lukas Wunner
- bunch of fixes all over from Dan Carpenter
- more follow up work from Chris register/unregister rework in various
  places
- vgem dma-buf export (for writing testcases)
- small things all over from tons of different people

* tag 'topic/drm-misc-2016-07-14' of git://anongit.freedesktop.org/drm-intel: (52 commits)
  drm: Don't overwrite user ioctl arg unless requested
  dma-buf/sync_file: improve Kconfig description for Sync Files
  MAINTAINERS: add entry for the Sync File Framework
  drm: Resurrect atomic rmfb code
  drm/vgem: Use PAGE_KERNEL in place of x86-specific PAGE_KERNEL_IO
  qxl: silence uninitialized variable warning
  qxl: check for kmap failures
  vga_switcheroo: Sphinxify docs
  drm: Restore double clflush on the last partial cacheline
  gpu: drm: rockchip_drm_drv: add missing of_node_put after calling of_parse_phandle
  gpu: drm: sti_vtg: add missing of_node_put after calling of_parse_phandle
  gpu: drm: sti_hqvdp: add missing of_node_put after calling of_parse_phandle
  gpu: drm: sti_vdo: add missing of_node_put after calling of_parse_phandle
  gpu: drm: sti_compositor: add missing of_node_put after calling of_parse_phandle
  drm/tilcdc: use drm_crtc_handle_vblank()
  drm/rcar-du: use drm_crtc_handle_vblank()
  drm/nouveau: use drm_crtc_handle_vblank()
  drm/atmel: use drm_crtc_handle_vblank()
  drm/armada: use drm_crtc_handle_vblank()
  drm: make drm_vblank_count_and_time() static
  ...

drm: Don't overwrite user ioctl arg unless requested

Currently, we completely ignore the user when it comes to the in/out
direction of the ioctl argument, as we simply cannot trust userspace.
(For example, they might request a copy of the modified ioctl argument
when the driver is not expecting such and so leak kernel stack.)
However, blindly copying over the target address may also lead to a
spurious EFAULT, and a failure after the ioctl was completed
successfully. This is important in order to avoid an ABI break when
extending an ioctl from IOR to IORW. Similar to how we only copy the
intersection of the kernel arg size and the user arg size, we only want
to copy back the kernel arg data iff both the kernel and userspace
request the copy.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Link: http://patchwork.freedesktop.org/patch/msgid/1468335590-21023-1-git-send-email-chris@chris-wilson.co.uk

Merge branch 'linux-4.8' of git://github.com/skeggsb/linux into drm-next

Here's an initial drm-next pull for nouveau 4.8, highlights:
- GK20A/GM20B volt and clock improvements.
- Initial support for GP100/GP104 GPUs, GP104 will not yet support
acceleration due to NVIDIA having not released firmware for them as of yet.

* 'linux-4.8' of git://github.com/skeggsb/linux: (97 commits)
  drm/nouveau/bus: remove cpu_coherent flag
  drm/nouveau/ttm: remove special handling of coherent objects
  drm/nouveau: check for supported chipset before booting fbdev off the hw
  drm/nouveau/ce/gp104: initial support
  drm/nouveau/fifo/gp104: initial support
  drm/nouveau/disp/gp104: initial support
  drm/nouveau/dma/gp104: initial support
  drm/nouveau/ltc/gp104: initial support
  drm/nouveau/ibus/gp104: initial support
  drm/nouveau/i2c/gp104: initial support
  drm/nouveau/gpio/gp104: initial support
  drm/nouveau/fuse/gp104: initial support
  drm/nouveau/bus/gp104: initial support
  drm/nouveau/bar/gp104: initial support
  drm/nouveau/mmu/gp104: initial support
  drm/nouveau/fb/gp104: initial support
  drm/nouveau/imem/gp104: initial support
  drm/nouveau/devinit/gp104: initial support
  drm/nouveau/bios/gp104: initial support
  drm/nouveau/tmr/gp104: initial support
  ...

drm/nouveau/bus: remove cpu_coherent flag

This flag's only remaining function is to ignore the uncached flag for
BOs on coherent architectures.

However the reason for allocating an object uncache on a non-coherent
architecture (namely because the cost of doing explicit flushes/
invalidations is higher than the benefit of caching the data because
accesses are few and far between) should also apply on architectures for
which coherency is maintained implicitly. Thus allocate coherent objects
as uncached on all architectures.

Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/ttm: remove special handling of coherent objects

TTM-allocated coherent objects were populated using the DMA API and
accessed using the mapping it returned to workaround coherency
issues. These issues seem to have been solved, thus remove this extra
case to handle and use the regular kernel mapping functions.

Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau: check for supported chipset before booting fbdev off the hw

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Cc: stable@vger.kernel.org

drm/nouveau/ce/gp104: initial support

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/fifo/gp104: initial support

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/disp/gp104: initial support

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/dma/gp104: initial support

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/ltc/gp104: initial support

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/ibus/gp104: initial support

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/i2c/gp104: initial support

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/gpio/gp104: initial support

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/fuse/gp104: initial support

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/bus/gp104: initial support

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/bar/gp104: initial support

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/mmu/gp104: initial support

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/fb/gp104: initial support

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/imem/gp104: initial support

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/devinit/gp104: initial support

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/bios/gp104: initial support

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/tmr/gp104: initial support

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/pci/gp104: initial support

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/mc/gp104: initial support

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/top/gp104: initial support

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/core: recognise GP104 chipset

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/sw/gp100: initial support

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/gr/gp100: initial support

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/ce/gp100: initial support

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/fifo/gp100: initial support

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/disp/gp100: initial support

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/dma/gp100: initial implementation

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/secboot/gm200: initial support

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/ltc/gp100: initial support

Due to the GPU preventing us from touching NV_PLTCG_LTCS_LTSS_CBC_BASE,
we cannot provide CBC/ZBC support without signed PMU firmware to handle
the task for us...

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/ibus/gp100: initial support

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/i2c/gm204: initial support

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/gpio/gp100: initial support

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/fuse/gp100: initial support

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/bus/gp100: initial support

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/bar/gp100: initial support

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/mmu/gp100: initial support

GP100 still supports the previous generations' page table layout, which
we will temporarily make use of here.

Proper support for the new MMU layout requires some rework to the common
MMU code, which is in progress.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/fb/gp100: initial support

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/imem/gp100: initial implementation

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/devinit/gp100: initial support

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/bios/rammap: 32-bit bios pointers

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/bios/pll: initial support for BIT 'C' version 2

Just enough to get at the PLL table.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/bios/dp: initial support for 4.2

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/bios/gp100: initial support

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/tmr/gp100: initial support

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/pci/gp100: initial support

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/mc/gp100: initial support

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/top/gp100: initial support

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/core: recognise GP100 chipset

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/core: increase maximum nvenc instances to 3

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/core: increase maximum ce instances to 6

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/fb/gf100-: allow selection of an alternate big page size

GFxxx/GM1xx support the selection of 64/128KiB big pages globally.

GM2xx supports the same, as well as another mode where the page size
can be selected per-instance.

We default to 128KiB pages (With per-instance for GM200, but the current
code selects 128KiB there already) as the MMU code isn't currently able
to handle otherwise.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau: prevent oops if no mmu subdev present

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/disp/g94: implement workaround for dvi issue on fx380

Fixes the second DVI output on Quadro FX380.

Thanks to NVIDIA for providing the details on the full workaround.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/bios: pointers beyond end of first image need special handling

Makes common the code that was previously used by the PMU table parsing,
as it appears other tables need this too.

Not much of an idea what this is all about...

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/bios: guard against out-of-bounds accesses to image

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/fifo/gk104-: translate engidx into human-readable name in debug output

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/disp/nv50-: fix lookup of udisp table under certain circumstances

Some VBIOS have separate tables for each link of a given output path,
which means we have to specify the specific link we're using instead
of all possible links.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/ltc/gm107-: decode interrupt status to human-readable strings

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/gr/gk20a: delete unneeded second newline

Signed-off-by: Julia Lawall <Julia.Lawall@lip6.fr>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/clk/gf100: Read secondary bypass postdiv when required

v2: fix typo it's -> its

Signed-off-by: Roy Spliet <nouveau@spliet.org>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/clk/gf100-: Clean up PLL locking test

Corresponds with GT215. Don't rely on the lock test logic being
unconditionally enabled, and disable test logic when done (presumably
to save power).

v2: Remove warning, nvkm_msec already warns on time-out

Signed-off-by: Roy Spliet <nouveau@spliet.org>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/secboot: lazy-load firmware and be more resilient

Defer the loading of firmware files to the chip-specific part of secure
boot. This allows implementations to retry loading firmware if the first
attempt failed ; for the GM200 implementation, this happens when trying
to reset a falcon, typically in reaction to GR init.

Firmware loading may fail for a variety of reasons, such as the
filesystem where they reside not being ready at init time. This new
behavior allows GR to be initialized the next time we try to use it if
the firmware has become available.

Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/secboot/gm200: make firmware loading re-callable

Make it possible to call gm20x_secboot_prepare_blobs() several times
after either success or failure without re-building already existing
blobs. The function will now try to load firmware files that have
previously failed before returning success.

Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/gr/gf100: handle secure boot errors

Handle and propagate secure boot errors. Failure to do so results in
Nouveau incorrectly believing init has succeeded and a completely
black display during boot. If we propagate the error, GR init will fail
and the user will at least have a working display.

Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/secboot: fix kerneldoc for secure boot structures

Some members were documented in the wrong structure.

Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/hwmon: add in_min and in_max

it is a little help for hardware monitoring tools

Signed-off-by: Karol Herbst <karolherbst@gmail.de>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/volt: save the voltage range we are able to set

We shouldn't set voltages below the min or above the max voltage the gpu is
able to set, so save the range for future lookups.

Signed-off-by: Karol Herbst <karolherbst@gmail.de>
Reviewed-by: Martin Peres <martin.peres@free.fr>
Tested-by: Pierre Moreau <pierre.morrow@free.fr>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/clk/gm20b: add glitchless and DFS support

This patch adds support for advanced features supported by the
Noise-Aware PLL of Maxwell. Glitchless switch allows the PL field to be
updated without disabling the PLL first if the SYNC_MODE bit of the CFG
register is set.

More significantly, DFS allows the PLL to monitor the actual input
voltage and to dynamically lower the output frequency accordingly. This
allows the clock to be more tolerant of lower voltages.

These improvements are only supported for Tegra speedos >= 1.

Also add the voltage table that is suitable for GM20B's NAPLL. This
change needs to be done atomically for the right voltages to be used by
the clock driver.

v2. Fix build on non-Tegra platforms

Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/clk/gk20a: rename constructor

Strip the _ prefix off the gk20a clock constructor.

Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/clk/gk20a: improve MNP programming

Split the MNP programming function into two functions for the cases
where we allow sliding or not, instead of making it take a parameter for
this. This results in less conditionals in the code and makes it easier
to read.

Also make the MNP programming functions take the PLL parameters as
arguments, and move bits of code to more relevant places (previous
programming tended to be just-in-time, which added more conditionnals in
the code).

Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/clk/gk20a: factorize n_lo computation code

Use a dedicated function instead of always calculating n_lo on the fly.

Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/clk/gk20a: parameterize PLL settings

Make functions manipulating PLL settings take them as an argument,
instead of assuming we want to work on the copy in the gk20a_clk
structure. This makes these functions more flexible, which we will need
in GM20B.

Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/clk/gk20a: add and use MNP programming functions

Add relevant functions to work with the gk20a_pll structure and use them
where they ought to be instead of directly manipulating registers.

Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/clk/gk20a: use nvkm_ functions in slide()

Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/clk/gk20a: reorganize MNP calculation a bit

Move variables declarations to their actual scope of use, and simplify
code a bit.

Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/clk/gk20a: setup slide once during init

Slide setup needs to be performed only once, during init. Also
use the proper parameters for different clock speeds.

Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/clk/gk20a: properly protect macro argument

Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/volt/gm20b: add support for vmin parameter

Chips may be characterized for a minimum voltage. Support this extra
parameter and select the appropriate minimum voltage for the detected
GPU speedo.

Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/volt/gk20a: rename constructor

Strip the _ prefix off the gk20a volt constructor.

Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/volt/gk20a: constify and name v_scale

Give a name to this constant so we at least get an idea of what it is
for.

Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/volt/gk20a: make unused public functions static

Nobody else is using these, so make them private.

Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/tegra: fetch gpu_speedo_id

The GPU speedo ID is required to select the right clk/volt parameters on
GM20B.

Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/secboot: use nvkm_mc_enable/disable()

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/secboot: use nvkm_mc_intr_mask/unmask()

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/mc/gk104-: add pmu reset mask

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/mc/gf100-: support for masking interrupts

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/mc/gt215: support for masking interrupts

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/mc: support for temporarily masking interrupts from a specific device

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/mc: s/intr_mask/intr_stat/

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/mc: expose device enable/disable separately, as well as reset

There are cases where subdevs need to perform additonal actions around
the master reset, so we want to expost the operations separately.

This commit also adds a flag to the NV_PMC_ENABLE bitfield definitions
which allow skipping the automatic reset() called from core/subdev.c.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/mc: take nvkm_device as argument to public functions

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/mc: allow construction of subclassed device

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>