Michael Walle [Wed, 16 Feb 2022 12:27:27 +0000 (13:27 +0100)]
pinctrl: ocelot: fix duplicate debugfs entry
This driver can have up to two regmaps. If the second one is registered
its debugfs entry will have the same name as the first one and the
following error will be printed:
[ 2.242568] debugfs: Directory '
e2004064.pinctrl' with parent 'regmap' already present!
Give the second regmap a name to avoid this.
Fixes:
076d9e71bcf8 ("pinctrl: ocelot: convert pinctrl to regmap")
Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Colin Foster <colin.foster@in-advantage.com>
Link: https://lore.kernel.org/r/20220216122727.1005041-1-michael@walle.cc
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Michael Walle [Wed, 16 Feb 2022 08:20:20 +0000 (09:20 +0100)]
pinctrl: ocelot: fix confops resource index
Prior to commit
ad96111e658a ("pinctrl: ocelot: combine get resource and
ioremap into single call") the resource index was 1, now it is 0. But 0
is the base region for the pinctrl block. Fix it.
I noticed this because there was an error that the memory region was
ioremapped twice.
Fixes:
ad96111e658a ("pinctrl: ocelot: combine get resource and ioremap into single call")
Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Colin Foster <colin.foster@in-advantage.com>
Link: https://lore.kernel.org/r/20220216082020.981797-1-michael@walle.cc
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Jacky Bai [Mon, 28 Feb 2022 01:01:03 +0000 (09:01 +0800)]
pinctrl: imx93: Add pinctrl driver support
Add i.MX93 pinctrl driver
Signed-off-by: Jacky Bai <ping.bai@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Link: https://lore.kernel.org/r/20220228010103.2725893-2-peng.fan@oss.nxp.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Peng Fan [Mon, 28 Feb 2022 01:01:02 +0000 (09:01 +0800)]
dt-bindings: pinctrl: imx93: Add pinctrl binding
Add pinctrl binding doc for i.MX93
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20220228010103.2725893-1-peng.fan@oss.nxp.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Guodong Liu [Wed, 16 Feb 2022 03:21:24 +0000 (11:21 +0800)]
pinctrl: canonical rsel resistance selection property
Change "mediatek,rsel_resistance_in_si_unit" to "mediatek,rsel-resistance-in-si-unit"
Fixes:
fb34a9ae383a ("pinctrl: mediatek: support rsel feature")
Signed-off-by: Guodong Liu <guodong.liu@mediatek.com>
Link: https://lore.kernel.org/r/20220216032124.28067-4-guodong.liu@mediatek.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Guodong Liu [Wed, 16 Feb 2022 03:21:23 +0000 (11:21 +0800)]
pinctrl: add pinctrl driver on mt8186
This commit includes pinctrl driver for mt8186.
Signed-off-by: Guodong Liu <guodong.liu@mediatek.com>
Link: https://lore.kernel.org/r/20220216032124.28067-3-guodong.liu@mediatek.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Guodong Liu [Wed, 16 Feb 2022 03:21:22 +0000 (11:21 +0800)]
dt-bindings: pinctrl: mt8186: add pinctrl file and binding document
1. This patch adds pinctrl file for mt8186.
2. This patch adds mt8186 compatible node in binding document.
Signed-off-by: Guodong Liu <guodong.liu@mediatek.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20220216032124.28067-2-guodong.liu@mediatek.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Linus Walleij [Mon, 28 Feb 2022 22:55:50 +0000 (23:55 +0100)]
Merge tag 'intel-pinctrl-v5.18-1' of gitolite.pub/scm/linux/kernel/git/pinctrl/intel into devel
intel-pinctrl for v5.18-1
* Introduce support for Alder Lake-N (required to revert misplaced ID)
* Add support for Raptor Lake-S
* Add support for Ice Lake-N (MacBookPro16,2)
* Miscellaneous fixes
The following is an automated git shortlog grouped by driver:
alderlake:
- Add Intel Alder Lake-N pin controller support
- Add Raptor Lake-S ACPI ID
baytrail:
- Clear direct_irq_en flag on broken configs
icelake:
- Add Ice Lake-N PCH pin controller support
intel:
- Fix a glitch when updating IRQ flags on a preconfigured line
- fix unexpected interrupt
Place correctly CONFIG_PINCTRL_ST in the Makefile:
- Place correctly CONFIG_PINCTRL_ST in the Makefile
tigerlake:
- Revert "Add Alder Lake-M ACPI ID"
Linus Walleij [Sun, 27 Feb 2022 01:18:54 +0000 (02:18 +0100)]
Merge tag 'renesas-pinctrl-for-v5.18-tag2' of git://git./linux/kernel/git/geert/renesas-drivers into devel
pinctrl: renesas: Updates for v5.18 (take two)
- Share more pin group data, to reduce kernel size and ease review,
- Improve the pin control table validator,
- Add support for the new R-Car S4-8 SoC,
- Miscellaneous fixes and improvements.
Geert Uytterhoeven [Mon, 21 Feb 2022 15:43:47 +0000 (16:43 +0100)]
pinctrl: renesas: r8a779f0: Add Ethernet pins, groups, and functions
Add pins, groups, and functions for the Ethernet Time-Sensitive
Networking (TSN) interfaces on the Renesas R-Car S4-8 (R8A779F0) SoC.
Based on a larger patch in the BSP by LUU HOAI.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Link: https://lore.kernel.org/r/e0a1dc7d2435d28811e3acb361dae050eb3aabc9.1645457792.git.geert+renesas@glider.be
Geert Uytterhoeven [Mon, 21 Feb 2022 15:43:46 +0000 (16:43 +0100)]
pinctrl: renesas: r8a779f0: Add QSPI pins, groups, and functions
Add pins, groups, and functions for the Quad SPI Controllers on the
Renesas R-Car S4-8 (R8A779F0) SoC.
Based on a larger patch in the BSP by LUU HOAI.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Link: https://lore.kernel.org/r/cd7f7feeabebf268adc9e050e348230e93b40829.1645457792.git.geert+renesas@glider.be
Geert Uytterhoeven [Mon, 21 Feb 2022 15:43:45 +0000 (16:43 +0100)]
pinctrl: renesas: r8a779f0: Add PCIe pins, groups, and function
Add pins, groups, and function for the PCIe Controllers on the Renesas
R-Car S4-8 (R8A779F0) SoC.
Extracted from a larger patch in the BSP by LUU HOAI.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Link: https://lore.kernel.org/r/b2f95db490d13e8cb7d97a63d58d47933317e28a.1645457792.git.geert+renesas@glider.be
Geert Uytterhoeven [Mon, 21 Feb 2022 15:43:44 +0000 (16:43 +0100)]
pinctrl: renesas: r8a779f0: Add MSIOF pins, groups, and functions
Add pins, groups, and function for the Clock-Synchronized Serial
Interfaces with FIFO (MSIOF) on the Renesas R-Car S4-8 (R8A779F0) SoC.
Based on a larger patch in the BSP by LUU HOAI.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Link: https://lore.kernel.org/r/c625769714b1027a756dd2ed4a017eb24708a041.1645457792.git.geert+renesas@glider.be
Geert Uytterhoeven [Mon, 21 Feb 2022 15:43:43 +0000 (16:43 +0100)]
pinctrl: renesas: r8a779f0: Add MMC pins, groups, and function
Add pins, groups, and function for the MMC interface on the Renesas
R-Car S4-8 (R8A779F0) SoC.
Based on a larger patch in the BSP by LUU HOAI.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Link: https://lore.kernel.org/r/81a35c1fac4616d25501942848eb9662d477f9ef.1645457792.git.geert+renesas@glider.be
Geert Uytterhoeven [Mon, 21 Feb 2022 15:43:42 +0000 (16:43 +0100)]
pinctrl: renesas: r8a779f0: Add INTC-EX pins, groups, and function
Add pins, groups, and function for the Interrupt Controller for External
Devices (INTC-EX) on the Renesas R-Car S4-8 (R8A779F0) SoC.
Based on a larger patch in the BSP by LUU HOAI.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Link: https://lore.kernel.org/r/dc6e25da42ac4bd19ca31b5b32b43a10a0e1aa7e.1645457792.git.geert+renesas@glider.be
Geert Uytterhoeven [Mon, 21 Feb 2022 15:43:41 +0000 (16:43 +0100)]
pinctrl: renesas: r8a779f0: Add HSCIF pins, groups, and functions
Add pins, groups, and functions for the High Speed Serial Communication
Interfaces with FIFO (HSCIF) on the Renesas R-Car S4-8 (R8A779F0) SoC.
Based on a larger patch in the BSP by LUU HOAI.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Link: https://lore.kernel.org/r/2b85b8857c1189fa6ee33e2f57fe746d740481d1.1645457792.git.geert+renesas@glider.be
Geert Uytterhoeven [Mon, 21 Feb 2022 15:43:40 +0000 (16:43 +0100)]
pinctrl: renesas: r8a779f0: Add I2C pins, groups, and functions
Add pins, groups, and functions for the I2C Bus Interfaces (I2C) on the
Renesas R-Car S4-8 (R8A779F0) SoC.
Extracted from a larger patch in the BSP by LUU HOAI.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Link: https://lore.kernel.org/r/217f5b3e3888b5899c375d3cb1ec8780f6a9e19b.1645457792.git.geert+renesas@glider.be
Geert Uytterhoeven [Mon, 21 Feb 2022 15:43:39 +0000 (16:43 +0100)]
pinctrl: renesas: r8a779f0: Add SCIF pins, groups, and functions
Add pins, groups, and functions for the Serial Communication Interfaces
with FIFO (SCIF) on the Renesas R-Car S4-8 (R8A779F0) SoC.
Extracted from a larger patch in the BSP by LUU HOAI.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Link: https://lore.kernel.org/r/6369359a53483291ee536787c8a232462ff1b3a9.1645457792.git.geert+renesas@glider.be
Geert Uytterhoeven [Mon, 21 Feb 2022 15:43:38 +0000 (16:43 +0100)]
pinctrl: renesas: Initial R8A779F0 PFC support
Add initial Pin Function Controller (PFC) support for the Renesas R-Car
S4-8 (R8A779F0) SoC, including bias, drive strength and voltage control.
Based on a larger patch in the BSP by LUU HOAI.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Link: https://lore.kernel.org/r/fd8201da404b7b0897130b254380ffc97f437266.1645457792.git.geert+renesas@glider.be
Geert Uytterhoeven [Mon, 21 Feb 2022 15:43:37 +0000 (16:43 +0100)]
pinctrl: renesas: Add PORT_GP_CFG_19 macros
Add PORT_GP_CFG_19() and PORT_GP_19() helper macros, to be used by the
r8a779f0 subdriver.
Based on a larger patch in the BSP by LUU HOAI.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Link: https://lore.kernel.org/r/f7fc711d065f78911bac1b616880ba3dbc858158.1645457792.git.geert+renesas@glider.be
LUU HOAI [Mon, 21 Feb 2022 15:43:36 +0000 (16:43 +0100)]
dt-bindings: pinctrl: renesas,pfc: Document r8a779f0 support
Document Pin Function Controller (PFC) support for the Renesas R-Car
S4-8 (R8A779F0) SoC.
Signed-off-by: LUU HOAI <hoai.luu.ub@renesas.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Link: https://lore.kernel.org/r/d51828853396773be2d6837f3301ac9da8b6f29e.1645457792.git.geert+renesas@glider.be
Geert Uytterhoeven [Wed, 23 Feb 2022 08:35:29 +0000 (09:35 +0100)]
pinctrl: renesas: Remove unneeded #include <linux/gpio.h>
Linus reports that some Renesas pin control sub-drivers are still
including <linux/gpio.h> instead of <linux/gpio/driver.h>. As these
sub-drivers don't need either, the includes can just be removed.
Reported-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/578825d779b45af745cc7623c7f69d2ddeadac4b.1645605227.git.geert+renesas@glider.be
Geert Uytterhoeven [Mon, 21 Feb 2022 16:21:58 +0000 (17:21 +0100)]
pinctrl: renesas: checker: Fix miscalculation of number of states
The checker failed to validate all enum IDs in the description of a
register with fixed-width register fields, due to a miscalculation of
the number of described states: each register field of n bits can have
"1 << n" possible states, not "1".
Increase SH_PFC_MAX_ENUMS accordingly, now more enum IDs are checked
(SH-Mobile AG5 has more than 4000 enum IDs defined).
Fixes:
12d057bad683b1c6 ("pinctrl: sh-pfc: checker: Add check for enum ID conflicts")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/6d8a6a05564f38f9d20464c1c17f96e52740cf6a.1645460429.git.geert+renesas@glider.be
Andy Shevchenko [Tue, 15 Feb 2022 15:28:00 +0000 (17:28 +0200)]
pinctrl: icelake: Add Ice Lake-N PCH pin controller support
This adds pinctrl/GPIO support for Intel Ice Lake-N PCH. The Ice Lake-N
PCH GPIO is based on the same version of the Intel GPIO hardware than
Intel Cannon Lake with different set of pins and ACPI ID.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Andy Shevchenko [Tue, 15 Feb 2022 15:27:59 +0000 (17:27 +0200)]
pinctrl: alderlake: Add Intel Alder Lake-N pin controller support
This change driver adds pinctrl/GPIO support for Intel Alder Lake-N SoC. The
GPIO controller is based on the next generation GPIO hardware but still
compatible with the one supported by the Intel core pinctrl/GPIO driver.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Andy Shevchenko [Tue, 15 Feb 2022 15:27:58 +0000 (17:27 +0200)]
pinctrl: alderlake: Add Raptor Lake-S ACPI ID
Intel Raptor Lake-S PCH has the same GPIO hardware than Alder Lake-S PCH
but the ACPI ID is different. Add this new ACPI ID to the list of supported
devices.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Andy Shevchenko [Tue, 15 Feb 2022 15:27:57 +0000 (17:27 +0200)]
pinctrl: tigerlake: Revert "Add Alder Lake-M ACPI ID"
It appears that last minute change moved ACPI ID of Alder Lake-M
to the INTC1055, which is already in the driver.
This ID on the other hand will be used elsewhere.
This reverts commit
258435a1c8187f559549e515d2f77fa0b57bcd27.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Geert Uytterhoeven [Thu, 23 Dec 2021 14:56:26 +0000 (15:56 +0100)]
pinctrl: renesas: checker: Check drive pin conflicts
Check that there is only a single entry for each pin with drive strength
capabilities.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/382206e737710afd3059abe75bc41e324823e657.1640270559.git.geert+renesas@glider.be
Geert Uytterhoeven [Thu, 23 Dec 2021 14:56:25 +0000 (15:56 +0100)]
pinctrl: renesas: checker: Check bias pin conflicts
Check that there is only a single entry for each pin with pull-up and/or
pull-down capabilities.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/dbda76f342258f8029f0420fbe3f341a9abd6f01.1640270559.git.geert+renesas@glider.be
Geert Uytterhoeven [Thu, 23 Dec 2021 14:56:24 +0000 (15:56 +0100)]
pinctrl: renesas: checker: Validate I/O voltage configs consistency
Validate consistency of the pin control tables for pins with I/O voltage
capabilities. If a pin has I/O voltage register bits declarations
through .pin_to_pocctrl(), the SH_PFC_PIN_CFG_IO_VOLTAGE flag should be
set in the pin's configs, and vice versa.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/de81cced01ae3f26d341177d66d4b8e918fbfb76.1640270559.git.geert+renesas@glider.be
Geert Uytterhoeven [Thu, 23 Dec 2021 14:56:23 +0000 (15:56 +0100)]
pinctrl: renesas: checker: Validate drive strength configs consistency
Validate consistency of the pin control tables for pins with drive
strength capabilities. If a pin has drive strength register bits
declarations in drive_regs[], the SH_PFC_PIN_CFG_DRIVE_STRENGTH flag
should be set in the pin's configs, and vice versa.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/0d5de01b5fe2c5fd23c3bea41077dc57ad105b9e.1640270559.git.geert+renesas@glider.be
Geert Uytterhoeven [Thu, 23 Dec 2021 14:56:22 +0000 (15:56 +0100)]
pinctrl: renesas: checker: Validate bias configs consistency
Validate consistency of the pin control tables for pins with pull-up
and/or pull-down capabilities. If a pin has bias register bits
declarations in bias_regs[] or through .pin_to_portcr(), the
corresponding SH_PFC_PIN_CFG_PULL* flags should be set in the pin's
configs, and vice versa, and the .get_bias() and .set_bias() callbacks
should be implemented.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/19b3e0773fbb36c015a43db683f79e75b0fec3ee.1640270559.git.geert+renesas@glider.be
Geert Uytterhoeven [Thu, 23 Dec 2021 14:56:21 +0000 (15:56 +0100)]
pinctrl: renesas: checker: Add pin group sharing checks
Add checks for discovering pin groups that could share pin data, as
sharing reduces kernel size.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/e16fdf729156e13b591d2f082f2cc934da580074.1640270559.git.geert+renesas@glider.be
Geert Uytterhoeven [Thu, 23 Dec 2021 14:56:20 +0000 (15:56 +0100)]
pinctrl: renesas: checker: Simplify same_name()
Simplify the helper that checks if two strings are valid and identical.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/509c70041bcf4302e284758abe1fd8165644b505.1640270559.git.geert+renesas@glider.be
Geert Uytterhoeven [Thu, 23 Dec 2021 14:56:19 +0000 (15:56 +0100)]
pinctrl: renesas: Pass sh_pfc_soc_info to rcar_pin_to_bias_reg()
Currently rcar_pin_to_bias_reg() takes a struct sh_pfc pointer, which is
only available after the pin control driver has been initialized,
thus preventing the checker from calling this function for validating
consistency of the pin control tables.
Fix this by replacing the parameter by a struct sh_pfc_soc_info pointer.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/3065a12dde606bacec9e5f14f10cabeaae75e265.1640270559.git.geert+renesas@glider.be
Geert Uytterhoeven [Thu, 23 Dec 2021 14:56:18 +0000 (15:56 +0100)]
pinctrl: renesas: Factor out .pin_to_portcr() address handling
All implementations of the .pin_to_portcr() method implement the same
conversion from Port Control Register offset to virtual address. Factor
it out into the two callers.
Remove the pfc parameter, as it is no longer used.
Note that the failure handling in r8a7740_pin_to_portcr() is pro forma,
as the function is never called with an invalid pin number.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/a485d4986a17259256988eb14e3a4c2b8d61c303.1640270559.git.geert+renesas@glider.be
Geert Uytterhoeven [Thu, 23 Dec 2021 14:56:17 +0000 (15:56 +0100)]
pinctrl: renesas: Remove unused pfc parameter from .pin_to_pocctrl()
The pfc parameter of the .pin_to_pocctrl() method was never used.
It is a relic of the old I/O voltage handling before commit
8775306dcf48092f ("pinctrl: sh-pfc: refactor voltage setting").
Remove the parameter, as it prevents the checker from calling this
function for validating consistency of the pin control tables.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/822133086f32618c7fc920123c6a96f5d4ea7ad6.1640270559.git.geert+renesas@glider.be
Geert Uytterhoeven [Thu, 23 Dec 2021 14:42:10 +0000 (15:42 +0100)]
pinctrl: renesas: r8a77990: Share more VIN pin group data
Pin group vin4_g8 is a subset of vin4_data24_a.
Pin group vin5_high8 is a subset of vin5_data16_a.
This reduces kernel size by 128 bytes.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/cfb71c90c19723ba2770f7512f138e4b17857141.1640269757.git.geert+renesas@glider.be
Geert Uytterhoeven [Thu, 23 Dec 2021 14:42:09 +0000 (15:42 +0100)]
pinctrl: renesas: r8a77965: Share more VIN pin group data
Pin group vin4_g8 is a subset of vin4_data24_a.
Pin group vin5_high8 is a subset of vin5_data16.
This reduces kernel size by 128 bytes.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/fd8779f5c7a397e8e4dc3604fe2af55e250a9f40.1640269757.git.geert+renesas@glider.be
Geert Uytterhoeven [Thu, 23 Dec 2021 14:42:08 +0000 (15:42 +0100)]
pinctrl: renesas: r8a7796: Share more VIN pin group data
Pin group vin4_g8 is a subset of vin4_data24_a.
Pin group vin5_high8 is a subset of vin5_data16.
This reduces kernel size by 128 bytes.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/1fc04bb08e2c26109509bd53b19ffbf9ce83d2f1.1640269757.git.geert+renesas@glider.be
Geert Uytterhoeven [Thu, 23 Dec 2021 14:42:07 +0000 (15:42 +0100)]
pinctrl: renesas: r8a77951: Share more VIN pin group data
Pin group vin4_g8 is a subset of vin4_data24_a.
Pin group vin5_high8 is a subset of vin5_data16.
This reduces kernel size by 128 bytes.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/100605798d02cbd8695aedfaaaa8a3b63e3a281f.1640269757.git.geert+renesas@glider.be
Geert Uytterhoeven [Thu, 23 Dec 2021 14:42:06 +0000 (15:42 +0100)]
pinctrl: renesas: r8a7790: Share more VIN pin group data
Pin group vin2_g8 is a subset of vin2_data24.
This reduces kernel size by 64 bytes.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/a4f6a70344654456abea1f15539219d1e02a74fe.1640269757.git.geert+renesas@glider.be
Geert Uytterhoeven [Thu, 23 Dec 2021 14:42:05 +0000 (15:42 +0100)]
pinctrl: renesas: r8a7790: Share USB1 pin group data
Pin group usb0_ovc_vbus is a subset of usb0.
Pin group usb1_pwen is a subset of usb1.
This reduces kernel size by 16 bytes.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/b9f37cf00064293b4b6f9068bda8c1ab819090f5.1640269757.git.geert+renesas@glider.be
Geert Uytterhoeven [Thu, 23 Dec 2021 14:42:04 +0000 (15:42 +0100)]
pinctrl: renesas: emev2: Share SDI pin group data
Pin groups sdi0_data[14] are subsets of sdi0_data8.
Pin groups sdi[12]_data1 are subsets of sdi[12]_data4.
This reduces kernel size by 56 bytes.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/0f35f01666748217b93c2debc0098f9442061a1a.1640269757.git.geert+renesas@glider.be
Geert Uytterhoeven [Thu, 23 Dec 2021 14:42:03 +0000 (15:42 +0100)]
pinctrl: renesas: sh73a0: Share SDHI pin group data
Pin groups sdhi[012]_data1 are subsets of sdhi[012]_data4.
This reduces kernel size by 24 bytes.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/96a5be0c34c66b302e16e915a7cc6272783aa73c.1640269757.git.geert+renesas@glider.be
Geert Uytterhoeven [Thu, 23 Dec 2021 14:42:02 +0000 (15:42 +0100)]
pinctrl: renesas: r8a77990: Share SDHI pin group data
Pin groups sdhi[01]_data1 are subsets of sdhi[01]_data4.
Pin groups sdhi3_data[14] are subsets of sdhi3_data8.
This reduces kernel size by 56 bytes.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/2f702b6c6114458a43a77ae04089e7f9e20482e5.1640269757.git.geert+renesas@glider.be
Geert Uytterhoeven [Thu, 23 Dec 2021 14:42:01 +0000 (15:42 +0100)]
pinctrl: renesas: r8a7796: Share SDHI pin group data
Pin groups sdhi[01]_data1 are subsets of sdhi[01]_data4.
Pin groups sdhi[23]_data[14] are subsets of sdhi[23]_data8.
This reduces kernel size by 96 bytes.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/b638b7ad4a874e64a35057fa1ce6ab23db3406cf.1640269757.git.geert+renesas@glider.be
Geert Uytterhoeven [Thu, 23 Dec 2021 14:42:00 +0000 (15:42 +0100)]
pinctrl: renesas: r8a77965: Share SDHI pin group data
Pin groups sdhi[01]_data1 are subsets of sdhi[01]_data4.
Pin groups sdhi[23]_data[14] are subsets of sdhi[23]_data8.
This reduces kernel size by 96 bytes.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/d40b65eaf5e18856b6df53a1b787a1432ef14dd2.1640269757.git.geert+renesas@glider.be
Geert Uytterhoeven [Thu, 23 Dec 2021 14:41:59 +0000 (15:41 +0100)]
pinctrl: renesas: r8a77951: Share SDHI pin group data
Pin groups sdhi[01]_data1 are subsets of sdhi[01]_data4.
Pin groups sdhi[23]_data[14] are subsets of sdhi[23]_data8.
This reduces kernel size by 96 bytes.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/f15024a4984f4b13e1171e3c40df9c6f7b672d7b.1640269757.git.geert+renesas@glider.be
Geert Uytterhoeven [Thu, 23 Dec 2021 14:41:58 +0000 (15:41 +0100)]
pinctrl: renesas: r8a77950: Share SDHI pin group data
Pin groups sdhi[01]_data1 are subsets of sdhi[01]_data4.
Pin groups sdhi[23]_data[14] are subsets of sdhi[23]_data8.
This reduces kernel size by 96 bytes.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/4a479a1126bb405dbc853f328d483f649d43c61e.1640269757.git.geert+renesas@glider.be
Geert Uytterhoeven [Thu, 23 Dec 2021 14:41:57 +0000 (15:41 +0100)]
pinctrl: renesas: r8a7794: Share SDHI pin group data
Pin groups sdhi[012]_data1 are subsets of sdhi[012]_data4.
This reduces kernel size by 24 bytes.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/e4d831e163010d2b62ecc20f8e4b79fd298b2172.1640269757.git.geert+renesas@glider.be
Geert Uytterhoeven [Thu, 23 Dec 2021 14:41:56 +0000 (15:41 +0100)]
pinctrl: renesas: r8a7792: Share SDHI pin group data
Pin group sdhi0_data1 is a subset of sdhi0_data4.
This reduces kernel size by 8 bytes.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/76a245f8b39f8e71e3311868ec15ce8c9c44bde0.1640269757.git.geert+renesas@glider.be
Geert Uytterhoeven [Thu, 23 Dec 2021 14:41:55 +0000 (15:41 +0100)]
pinctrl: renesas: r8a7791: Share SDHI pin group data
Pin groups sdhi[012]_data1 are subsets of sdhi[012]_data4.
This reduces kernel size by 24 bytes.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/cb39cb8fe9152197df56f70b4b146d8fe96fb0b7.1640269757.git.geert+renesas@glider.be
Geert Uytterhoeven [Thu, 23 Dec 2021 14:41:54 +0000 (15:41 +0100)]
pinctrl: renesas: r8a7790: Share SDHI pin group data
Pin groups sdhi[0-3]_data1 are subsets of sdhi[0-3]_data4.
This reduces kernel size by 32 bytes.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/88a3c2b09d34f2a528ecaa1bd55b6a96e156f5b1.1640269757.git.geert+renesas@glider.be
Geert Uytterhoeven [Thu, 23 Dec 2021 14:41:53 +0000 (15:41 +0100)]
pinctrl: renesas: r8a7779: Share SDHI pin group data
Pin groups sdhi[0-3]_data1 are subsets of sdhi[0-3]_data4.
This reduces kernel size by 32 bytes.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/01fd254a90be16bf37be5ecd20ada0ab2b50abd2.1640269757.git.geert+renesas@glider.be
Geert Uytterhoeven [Thu, 23 Dec 2021 14:41:52 +0000 (15:41 +0100)]
pinctrl: renesas: r8a7778: Share SDHI pin group data
Pin group sdhi0_data1 is a subset of sdhi0_data4.
Pin groups sdhi[12]_data1_[ab] are subsets of sdhi[12]_data4_[ab].
This reduces kernel size by 40 bytes.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/997df5b8a01657ede685c0869d73e4d6b71dce26.1640269757.git.geert+renesas@glider.be
Geert Uytterhoeven [Thu, 23 Dec 2021 14:41:51 +0000 (15:41 +0100)]
pinctrl: renesas: r8a77470: Share SDHI pin group data
Pin groups sdhi[02]_data1 are subsets of sdhi[02]_data4.
This reduces kernel size by 16 bytes.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/9888bbd36ec207d6e5ece6c661e2fb8bc05a7dd6.1640269757.git.geert+renesas@glider.be
Geert Uytterhoeven [Thu, 23 Dec 2021 14:41:50 +0000 (15:41 +0100)]
pinctrl: renesas: r8a7740: Share SDHI pin group data
Pin groups sdhi[012]_data1 are subsets of sdhi[012]_data4.
This reduces kernel size by 24 bytes.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/e07ae7b52efba55cc210d52de6a771129dd8a3b0.1640269757.git.geert+renesas@glider.be
Geert Uytterhoeven [Thu, 23 Dec 2021 14:41:49 +0000 (15:41 +0100)]
pinctrl: renesas: r8a73a4: Share SDHI pin group data
Pin groups sdhi[012]_data1 are subsets of sdhi[012]_data4.
This reduces kernel size by 24 bytes.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/fca0b9c7cc5a1b4dd8d9bf4eff35d88d37eeab21.1640269757.git.geert+renesas@glider.be
Geert Uytterhoeven [Thu, 23 Dec 2021 14:41:48 +0000 (15:41 +0100)]
pinctrl: renesas: r8a77980: Share RPC pin group data
Pin groups qspi[01]_data[24] are subsets of rpc_data.
Pin group rpc_clk1 is a subset of rpc_clk2.
This reduces kernel size by 104 bytes.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/6da6ef4184939a0793ca5fd805e9f6bc6c07a095.1640269757.git.geert+renesas@glider.be
Geert Uytterhoeven [Thu, 23 Dec 2021 14:41:47 +0000 (15:41 +0100)]
pinctrl: renesas: r8a77970: Share RPC pin group data
Pin groups qspi[01]_data[24] are subsets of rpc_data.
Pin group rpc_clk1 is a subset of rpc_clk2.
This reduces kernel size by 104 bytes.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/a71da3daa818a33c1e81bff07d643d3f30ff1b7d.1640269757.git.geert+renesas@glider.be
Geert Uytterhoeven [Thu, 23 Dec 2021 14:41:46 +0000 (15:41 +0100)]
pinctrl: renesas: r8a779a0: Share QSPI pin group data
Pin groups qspi[01]_data2 are subsets of qspi[01]_data4.
This reduces kernel size by 32 bytes.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/bba05f9ac803ecd55c6c480fa139fa1a0d268d78.1640269757.git.geert+renesas@glider.be
Geert Uytterhoeven [Thu, 23 Dec 2021 14:41:45 +0000 (15:41 +0100)]
pinctrl: renesas: r8a77990: Share QSPI pin group data
Pin groups qspi[01]_data2 are subsets of qspi[01]_data4.
This reduces kernel size by 32 bytes.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/54779df96c1e0fc9ce02786cfd9f66d4cfc063f0.1640269757.git.geert+renesas@glider.be
Geert Uytterhoeven [Thu, 23 Dec 2021 14:41:44 +0000 (15:41 +0100)]
pinctrl: renesas: r8a7796: Share QSPI pin group data
Pin groups qspi[01]_data2 are subsets of qspi[01]_data4.
This reduces kernel size by 32 bytes.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/602b718b26d5a61b59bfca785f804f0c4a8e09bc.1640269757.git.geert+renesas@glider.be
Geert Uytterhoeven [Thu, 23 Dec 2021 14:41:43 +0000 (15:41 +0100)]
pinctrl: renesas: r8a77965: Share QSPI pin group data
Pin groups qspi[01]_data2 are subsets of qspi[01]_data4.
This reduces kernel size by 32 bytes.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/725d18018c5899b33a20b8f898a421547b0bb6c5.1640269757.git.geert+renesas@glider.be
Geert Uytterhoeven [Thu, 23 Dec 2021 14:41:42 +0000 (15:41 +0100)]
pinctrl: renesas: r8a77951: Share QSPI pin group data
Pin groups qspi[01]_data2 are subsets of qspi[01]_data4.
This reduces kernel size by 32 bytes.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/3f81abaecbbca5e7a43586682472d44870c695ee.1640269757.git.geert+renesas@glider.be
Geert Uytterhoeven [Thu, 23 Dec 2021 14:41:41 +0000 (15:41 +0100)]
pinctrl: renesas: r8a77950: Share QSPI pin group data
Pin groups qspi[01]_data2 are subsets of qspi[01]_data4.
This reduces kernel size by 32 bytes.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/6d9de5b50bbad0c7b22f08d241a23c25e487c102.1640269757.git.geert+renesas@glider.be
Geert Uytterhoeven [Thu, 23 Dec 2021 14:41:40 +0000 (15:41 +0100)]
pinctrl: renesas: r8a7794: Share QSPI pin group data
Pin group qspi_data2 is a subset of qspi_data4.
This reduces kernel size by 16 bytes.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/114bde1f6e7405f9b299c67f1219adde16ea0212.1640269757.git.geert+renesas@glider.be
Geert Uytterhoeven [Thu, 23 Dec 2021 14:41:39 +0000 (15:41 +0100)]
pinctrl: renesas: r8a7792: Share QSPI pin group data
Pin group qspi_data2 is a subset of qspi_data4.
This reduces kernel size by 16 bytes.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/7887faaeed7bb0d6f06977aa0ef2873f74528bf0.1640269757.git.geert+renesas@glider.be
Geert Uytterhoeven [Thu, 23 Dec 2021 14:41:38 +0000 (15:41 +0100)]
pinctrl: renesas: r8a7791: Share QSPI pin group data
Pin groups qspi_data2{,_b} are subsets of qspi_data4{,_b}.
This reduces kernel size by 32 bytes.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/fbfd27a143e87fdb94acec2e3fa8db9029e2c99c.1640269757.git.geert+renesas@glider.be
Geert Uytterhoeven [Thu, 23 Dec 2021 14:41:37 +0000 (15:41 +0100)]
pinctrl: renesas: r8a7790: Share QSPI pin group data
Pin group qspi_data2 is a subset of qspi_data4.
This reduces kernel size by 16 bytes.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/5bf6a5bd35e619c5d5da4a49878a88f48bb62a30.1640269757.git.geert+renesas@glider.be
Geert Uytterhoeven [Thu, 23 Dec 2021 14:41:36 +0000 (15:41 +0100)]
pinctrl: renesas: r8a77470: Share QSPI pin group data
Pin groups qspi[01]_data2 are subsets of qspi[01]_data4.
This reduces kernel size by 32 bytes.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/2d877878bda39109a1a5caf5c01c798c771d3fda.1640269757.git.geert+renesas@glider.be
Geert Uytterhoeven [Thu, 23 Dec 2021 14:41:35 +0000 (15:41 +0100)]
pinctrl: renesas: sh73a0: Share MMC pin group data
Pin groups mmc0_data[14]_[01] are subsets of mmc0_data8_[01].
This reduces kernel size by 80 bytes.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/ee424be388e8b5780630eb06532d20a4cf5132b1.1640269757.git.geert+renesas@glider.be
Geert Uytterhoeven [Thu, 23 Dec 2021 14:41:34 +0000 (15:41 +0100)]
pinctrl: renesas: r8a779a0: Share MMC pin group data
Pin groups mmc_data[14] are subsets of mmc_data8.
This reduces kernel size by 40 bytes.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/cae71e970dbf49409673c2a7e2a74d549539a240.1640269757.git.geert+renesas@glider.be
Geert Uytterhoeven [Thu, 23 Dec 2021 14:41:33 +0000 (15:41 +0100)]
pinctrl: renesas: r8a77995: Share MMC pin group data
Pin groups mmc_data[14] are subsets of mmc_data8.
This reduces kernel size by 40 bytes.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/8da25ab2d65c31d9300b59d28b80c326aae9e787.1640269757.git.geert+renesas@glider.be
Geert Uytterhoeven [Thu, 23 Dec 2021 14:41:32 +0000 (15:41 +0100)]
pinctrl: renesas: r8a77980: Share MMC pin group data
Pin groups mmc_data[14] are subsets of mmc_data8.
This reduces kernel size by 40 bytes.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/32d708f423a3f0aa6c3cc87a9d5d3fa6686ab8c7.1640269757.git.geert+renesas@glider.be
Geert Uytterhoeven [Thu, 23 Dec 2021 14:41:31 +0000 (15:41 +0100)]
pinctrl: renesas: r8a77970: Share MMC pin group data
Pin groups mmc_data[14] are subsets of mmc_data8.
This reduces kernel size by 40 bytes.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/9354645f58c12a275923046fe913cfc9602ca710.1640269757.git.geert+renesas@glider.be
Geert Uytterhoeven [Thu, 23 Dec 2021 14:41:30 +0000 (15:41 +0100)]
pinctrl: renesas: r8a7794: Share MMC pin group data
Pin groups mmc_data[14] are subsets of mmc_data8.
This reduces kernel size by 40 bytes.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/ebeda8834f00ff07799cd6dc36aebae17f378e31.1640269757.git.geert+renesas@glider.be
Geert Uytterhoeven [Thu, 23 Dec 2021 14:41:29 +0000 (15:41 +0100)]
pinctrl: renesas: r8a7791: Share MMC pin group data
Pin groups mmc_data[14] are subsets of mmc_data8.
Treat mmc_data8_b the same for consistency. Note that there is no need
to define 1-bit and 4-bit wide subsets for the b-variant, as they're
identical to the normal variants.
This reduces kernel size by 40 bytes.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/be1f11c87e51224e043291f4d8e28b620811ac76.1640269757.git.geert+renesas@glider.be
Geert Uytterhoeven [Thu, 23 Dec 2021 14:41:28 +0000 (15:41 +0100)]
pinctrl: renesas: r8a7790: Share MMC pin group data
Pin groups mmc[01]_data[14] are subsets of mmc[01]_data8.
This reduces kernel size by 80 bytes.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/0990a63016ab87d16c19097bc43d79595c0c8b87.1640269757.git.geert+renesas@glider.be
Geert Uytterhoeven [Thu, 23 Dec 2021 14:41:27 +0000 (15:41 +0100)]
pinctrl: renesas: r8a7779: Share MMC pin group data
Pin groups mmc[01]_data[14] are subsets of mmc[01]_data8.
This reduces kernel size by 80 bytes.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/3484b3cd6b4ca19788fafc01f5ead4e067275e8d.1640269757.git.geert+renesas@glider.be
Geert Uytterhoeven [Thu, 23 Dec 2021 14:41:26 +0000 (15:41 +0100)]
pinctrl: renesas: r8a7778: Share MMC pin group data
Pin groups mmc_data[14] are subsets of mmc_data8.
This reduces kernel size by 40 bytes.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/d3bf7dfda2952a0265171f82024931d490d9178a.1640269757.git.geert+renesas@glider.be
Geert Uytterhoeven [Thu, 23 Dec 2021 14:41:25 +0000 (15:41 +0100)]
pinctrl: renesas: r8a77470: Share MMC pin group data
Pin groups mmc_data[14] and sdhi1_data[14] are subsets of mmc_data8.
Pin group sdhi1_ctrl can be an alias for mmc_ctrl.
This reduces kernel size by 96 bytes.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/e3d19e19f7666dbcefeec351a5096a86348404ae.1640269757.git.geert+renesas@glider.be
Geert Uytterhoeven [Thu, 23 Dec 2021 14:41:24 +0000 (15:41 +0100)]
pinctrl: renesas: r8a7740: Share MMC pin group data
Pin groups mmc0_data[14]_[01] are subsets of mmc0_data8_[01].
This reduces kernel size by 80 bytes.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/4b15d28bb8ac24417be83b1defe0bbb908abc1e6.1640269757.git.geert+renesas@glider.be
Geert Uytterhoeven [Thu, 23 Dec 2021 14:41:23 +0000 (15:41 +0100)]
pinctrl: renesas: r8a73a4: Share MMC pin group data
Pin groups mmc[01]_data[14] are subsets of mmc[01]_data8.
This reduces kernel size by 80 bytes.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/ad30961d71631577c2bdbf8dfa4874c9585caba9.1640269757.git.geert+renesas@glider.be
Geert Uytterhoeven [Thu, 23 Dec 2021 14:41:22 +0000 (15:41 +0100)]
pinctrl: renesas: sh73a0: Share LCD pin group data
Pin groups lcd{,2}_data{8,9,12,16,18} are subsets of lcd{,2}_data24.
This reduces kernel size by 1008 bytes.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/32561ca31b590424f494351a737473200102bf8c.1640269757.git.geert+renesas@glider.be
Geert Uytterhoeven [Thu, 23 Dec 2021 14:41:21 +0000 (15:41 +0100)]
pinctrl: renesas: r8a7740: Share LCD pin group data
Pin groups lcd0_data{8,9,12,16,18} are subsets of lcd0_data24_0.
Pin groups lcd1_data{8,9,12,16,18} are subsets of lcd1_data24.
This reduces kernel size by 1008 bytes.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/2018113779b3084c4175b04bb32acf2de0557a37.1640269757.git.geert+renesas@glider.be
Geert Uytterhoeven [Thu, 23 Dec 2021 14:41:20 +0000 (15:41 +0100)]
pinctrl: renesas: sh73a0: Share KEYIN pin group data
Pin groups keysc_in[567] are subsets of keysc_in8.
This reduces kernel size by 144 bytes.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/6d11be0accdaf4a42ce2a64e64201ab0670d65db.1640269757.git.geert+renesas@glider.be
Geert Uytterhoeven [Thu, 23 Dec 2021 14:41:19 +0000 (15:41 +0100)]
pinctrl: renesas: r8a7791: Share HSCIF1 pin group data
Pin group hscif1_data_e can be an alias for hscif1_data_c.
This reduces kernel size by 16 bytes.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/5afdfcaa24d41ebc50af37ff5da055203744f8b5.1640269757.git.geert+renesas@glider.be
Geert Uytterhoeven [Thu, 23 Dec 2021 14:41:18 +0000 (15:41 +0100)]
pinctrl: renesas: emev2: Share CF pin group data
Pin group cf_data8 is a subset of cf_data16.
This reduces kernel size by 64 bytes.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/370d823be136cc9ead7051915a1454252a57efc4.1640269757.git.geert+renesas@glider.be
Geert Uytterhoeven [Thu, 23 Dec 2021 14:41:17 +0000 (15:41 +0100)]
pinctrl: renesas: r8a7740: Share BSC pin group data
Pin groups bsc_data{8,16} are subsets of bsc_data32.
Pin groups bsc_rd_we{8,16} are subsets of bsc_rd_we32.
This reduces kernel size by 232 bytes.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/556873f8392b1a7d1a2cf9c10abb5e6c283f11cc.1640269757.git.geert+renesas@glider.be
Geert Uytterhoeven [Thu, 23 Dec 2021 14:41:16 +0000 (15:41 +0100)]
pinctrl: renesas: Add generic support for resizable buses
The VIN_DATA_PIN_GROUP() macro and vin_data{12,16,} unions are used to
define multiple VIN data groups with different numbers of lanes, while
referring to a single array of data pins, thus saving memory.
However, the same feature would be useful for other resizable buses,
like MMC, SDHI, QSPI, LCD, BSC, ...
Rework the mechanism for generic use:
- Use the new SH_PFC_PIN_GROUP_SUBSET() helper to remove the need for
bus-specific unions,
- Rename VIN_DATA_PIN_GROUP() to BUS_DATA_PIN_GROUP(),
- Rename the macro parameters to better reflect their purposes,
- Move the macro up, where it belongs.
Update all individual pin control drivers for the above changes.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/cccfcfd01eb8ab7a587b084c4ddbf97293bd7291.1640269757.git.geert+renesas@glider.be
Geert Uytterhoeven [Thu, 23 Dec 2021 14:41:15 +0000 (15:41 +0100)]
pinctrl: renesas: Add generic support for pin group subsets
It is fairly common for the pins in a pin group to be a subset of the
pins in another pin group. Add a macro for defining a pin group that
refers to a subset of an array of pins. This allows pin groups to share
pin data, and thus save memory.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/b56c4257aee1eab698bae2cf7a08aa05775c0a77.1640269757.git.geert+renesas@glider.be
Geert Uytterhoeven [Thu, 23 Dec 2021 14:41:14 +0000 (15:41 +0100)]
pinctrl: renesas: Rename SH_PFC_PIN_GROUP{,_ALIAS} args
Rename the arguments of the SH_PFC_PIN_GROUP_ALIAS() and
SH_PFC_PIN_GROUP() macros, to better reflect their purposes.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/495fd5cd910d59489f4c1336e4a02da3679b5ffb.1640269757.git.geert+renesas@glider.be
Geert Uytterhoeven [Thu, 23 Dec 2021 14:41:13 +0000 (15:41 +0100)]
pinctrl: renesas: Reformat macros defining struct initializers
Reformat all macros that define structure initializers, to visually
resemble structure definitions:
- Move the opening curly brace to the previous line,
- Move the closing curly brace to the first position,
- Reduce indentation of the block to a single TAB, decreasing the need
for line breaks,
- Align backslashes for line continuation to the last TAB block where
possible,
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/03a1eed3c4f57d7b14ef53ab49e04de10d0e383c.1640269757.git.geert+renesas@glider.be
Geert Uytterhoeven [Thu, 23 Dec 2021 14:41:12 +0000 (15:41 +0100)]
pinctrl: renesas: Rename sh_pfc_soc_operations instances
Some instances of struct sh_pfc_soc_operations are called
"<soc>_pfc_ops", others are called "<soc>_pinmux_ops" or just
"pinmux_ops". Settle on the first variant, to avoid confusion with
"struct pinmux_ops" in the pinctrl core, and to increase consistency.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/2ab33ad1d6a20a57d16922678b78810fa55b7fc0.1640269757.git.geert+renesas@glider.be
Geert Uytterhoeven [Thu, 23 Dec 2021 14:41:11 +0000 (15:41 +0100)]
pinctrl: renesas: r8a77470: Reduce size for narrow VIN1 channel
The second video-in channel on RZ/G1C has only 12 data lanes, but the
pin control driver uses the vin_data union, which is meant for 24 data
lanes, thus wasting space.
Fix this by using the vin_data12 union instead.
This reduces kernel size by 96 bytes.
Fixes:
50f3f2d73e3426ba ("pinctrl: sh-pfc: Reduce kernel size for narrow VIN channels")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/52716fa89139f6f92592633edb52804d4c5e18f0.1640269757.git.geert+renesas@glider.be
Geert Uytterhoeven [Thu, 23 Dec 2021 14:28:20 +0000 (15:28 +0100)]
pinctrl: renesas: r8a7794: Add range checking to .pin_to_pocctrl()
The .pin_to_pocctrl() implementation for R-Car E2 does not perform a
full range check, unlike on all other SoCs. Add the range check, so the
checker can validate better the consistency of the pin control tables.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/d23767ad7152327654192d7191f4b8ae19493966.1640269510.git.geert+renesas@glider.be
Samuel Holland [Wed, 16 Feb 2022 04:00:36 +0000 (22:00 -0600)]
pinctrl: sunxi: Use unique lockdep classes for IRQs
This driver, like several others, uses a chained IRQ for each GPIO bank,
and forwards .irq_set_wake to the GPIO bank's upstream IRQ. As a result,
a call to irq_set_irq_wake() needs to lock both the upstream and
downstream irq_desc's. Lockdep considers this to be a possible deadlock
when the irq_desc's share lockdep classes, which they do by default:
============================================
WARNING: possible recursive locking detected
5.17.0-rc3-00394-gc849047c2473 #1 Not tainted
--------------------------------------------
init/307 is trying to acquire lock:
c2dfe27c (&irq_desc_lock_class){-.-.}-{2:2}, at: __irq_get_desc_lock+0x58/0xa0
but task is already holding lock:
c3c0ac7c (&irq_desc_lock_class){-.-.}-{2:2}, at: __irq_get_desc_lock+0x58/0xa0
other info that might help us debug this:
Possible unsafe locking scenario:
CPU0
----
lock(&irq_desc_lock_class);
lock(&irq_desc_lock_class);
*** DEADLOCK ***
May be due to missing lock nesting notation
4 locks held by init/307:
#0:
c1f29f18 (system_transition_mutex){+.+.}-{3:3}, at: __do_sys_reboot+0x90/0x23c
#1:
c20f7760 (&dev->mutex){....}-{3:3}, at: device_shutdown+0xf4/0x224
#2:
c2e804d8 (&dev->mutex){....}-{3:3}, at: device_shutdown+0x104/0x224
#3:
c3c0ac7c (&irq_desc_lock_class){-.-.}-{2:2}, at: __irq_get_desc_lock+0x58/0xa0
stack backtrace:
CPU: 0 PID: 307 Comm: init Not tainted 5.17.0-rc3-00394-gc849047c2473 #1
Hardware name: Allwinner sun8i Family
unwind_backtrace from show_stack+0x10/0x14
show_stack from dump_stack_lvl+0x68/0x90
dump_stack_lvl from __lock_acquire+0x1680/0x31a0
__lock_acquire from lock_acquire+0x148/0x3dc
lock_acquire from _raw_spin_lock_irqsave+0x50/0x6c
_raw_spin_lock_irqsave from __irq_get_desc_lock+0x58/0xa0
__irq_get_desc_lock from irq_set_irq_wake+0x2c/0x19c
irq_set_irq_wake from irq_set_irq_wake+0x13c/0x19c
[tail call from sunxi_pinctrl_irq_set_wake]
irq_set_irq_wake from gpio_keys_suspend+0x80/0x1a4
gpio_keys_suspend from gpio_keys_shutdown+0x10/0x2c
gpio_keys_shutdown from device_shutdown+0x180/0x224
device_shutdown from __do_sys_reboot+0x134/0x23c
__do_sys_reboot from ret_fast_syscall+0x0/0x1c
However, this can never deadlock because the upstream and downstream
IRQs are never the same (nor do they even involve the same irqchip).
Silence this erroneous lockdep splat by applying what appears to be the
usual fix of moving the GPIO IRQs to separate lockdep classes.
Fixes:
a59c99d9eaf9 ("pinctrl: sunxi: Forward calls to irq_set_irq_wake")
Reported-by: Guenter Roeck <linux@roeck-us.net>
Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Tested-by: Guenter Roeck <linux@roeck-us.net>
Link: https://lore.kernel.org/r/20220216040037.22730-1-samuel@sholland.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Mans Rullgard [Thu, 17 Feb 2022 13:17:37 +0000 (13:17 +0000)]
pinctrl: sunxi: do not print error message for EPROBE_DEFER
Avoid printing an error message if getting a regulator fails with
EPROBE_DEFER. This can happen if, for example, a regulator supplying
one of the main banks is controlled by a PL pin.
Signed-off-by: Mans Rullgard <mans@mansr.com>
Acked-by: Chen-Yu Tsai <wens@csie.org>
Link: https://lore.kernel.org/r/20220217131737.10931-1-mans@mansr.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>