Evgenii Stepanov [Thu, 21 Apr 2022 22:17:29 +0000 (15:17 -0700)]
[sanitizer] Use canonical syscalls everywhere
These "new" syscalls have been added in 2.6.16, more than 16 years ago.
Surely that's enough time to migrate. Glibc 2.33 is using them on both
i386 and x86_64. Android has an selinux filter to block the legacy
syscalls in the apps.
Differential Revision: https://reviews.llvm.org/D124212
cpillmayer [Fri, 22 Apr 2022 18:52:54 +0000 (18:52 +0000)]
[MLIR] Add option to print users of an operation as comment in the printer
This allows printing the users of an operation as proposed in the git issue #53286.
To be able to refer to operations with no result, these operations are assigned an
ID in SSANameState.
Reviewed By: mehdi_amini
Differential Revision: https://reviews.llvm.org/D124048
Nikolas Klauser [Fri, 22 Apr 2022 18:56:58 +0000 (20:56 +0200)]
[libc++] Change vector<bool>::const_iterator::reference to bool in ABIv2
`vector<bool>::const_reference` and `vector<bool>::const_iterator::reference` should be the same type.
Reviewed By: Mordante, #libc
Spies: libcxx-commits
Differential Revision: https://reviews.llvm.org/D123851
Jacques Pienaar [Fri, 22 Apr 2022 18:35:34 +0000 (11:35 -0700)]
[mlir] Add shape.func
Add shape func op for use (primarily) in shape function_library op. Allows
setting default dialect for some simpler authoring. This is a minimal version
of the ops needed.
Differential Revision: https://reviews.llvm.org/D124055
Lei Zhang [Fri, 22 Apr 2022 18:22:10 +0000 (14:22 -0400)]
[mlir][vector] Fold 1-element reduction into extract or arith ops
If there is only one single element in the vector, then we can
just extract the element to compute the final result.
Reviewed By: mravishankar
Differential Revision: https://reviews.llvm.org/D124129
Vitaly Buka [Fri, 22 Apr 2022 18:13:20 +0000 (11:13 -0700)]
[nfc][msan] Add D123875 into release notes
Mohammed Nurul Hoque [Fri, 22 Apr 2022 17:25:54 +0000 (10:25 -0700)]
[RISCV] transform MI to W variant to remove sext.w
Backwards search
The sext.w removal pass (before the new patch) checks if the input to sext.w is already in sign-extended form, so it can eliminate it. It does that by checking every definition/source that reaches the sext.w is an instruction that produces a sign-extended value, either by definition (e.g. ADDW), or it propagates sign-extension (e.g. OR) so we check its sources recursively.
Forward search
Sometimes, one of the sources is an instruction that doesn't always produce a sign-extended value, but it has a W-version that does (e.g. ADD / ADDW). If we transform the ADD to ADDW, the sext.w can be removed (assuming other def paths are satisfied), but this transformation is sound only if every use of this ADD/W only reqruires the lower 32-bits either directly (like sll %x, 32) or they propagate dependency (lower word of output only depends on lower word of input) so we check its uses recursively.
When searching backwards, if an instruction that can be replaced with W-variant is encountered, this pass runs the forward search to verify it can be replaced, then adds it to a list of fixable instructions. After verifying all paths, it replaces the instruction and removes the sext.w.
Reviewed By: craig.topper
Differential Revision: https://reviews.llvm.org/D119928
Krzysztof Parzyszek [Fri, 22 Apr 2022 17:32:35 +0000 (10:32 -0700)]
[Hexagon] Generate TargetConstant in SelectAnyInt
At some point in instruction selection, A2_tfrsi Constant:i32<...> was
created, where the "Constant" came from SelectAnyInt. Since it wasn't
a TargetConstant, it was selected again, leading to
%vreg = A2_tfrsi ...
... = A2_tfrsi %vreg
which is not a valid code.
Keith Smiley [Fri, 22 Apr 2022 16:42:23 +0000 (09:42 -0700)]
[lld-macho] Fix crash on invalid framework tbd
Previously these would crash because `file` is null in the case there is
an invalid tbd file.
Differential Revision: https://reviews.llvm.org/D124271
Eric Schweitz [Fri, 22 Apr 2022 02:06:11 +0000 (19:06 -0700)]
[NFC] Cosmetic changes to OpenACC.cpp.
Differential Revision: https://reviews.llvm.org/D124272
Florian Hahn [Fri, 22 Apr 2022 17:09:04 +0000 (18:09 +0100)]
[SimpleLoopUnswitch] Add test where all conds are guaranteed non poison.
Extra test for D124259.
Alexey Lapshin [Wed, 13 Apr 2022 20:40:27 +0000 (23:40 +0300)]
[llvm-objcopy][NFC] refactor restoreStatOnFile out of llvm-objcopy.
Functionality of restoreStatOnFile may be reused. Move it into
FileUtilities.cpp. Create helper class FilePermissionsApplier
to store and apply permissions.
Differential Revision: https://reviews.llvm.org/D123821
Tom Eccles [Fri, 22 Apr 2022 17:03:28 +0000 (13:03 -0400)]
Fix crash getting name of a template decl
NamedDecl::getIdentifier can return a nullptr when
DeclarationName::isIdentifier is false, which leads to a null pointer
dereference when TypePrinter::printTemplateId calls ->getName().
NamedDecl::getName does the same thing in the successful case and
returns an empty string in the failure case.
This crash affects the llvm 14 packages on llvm.org.
Christopher Di Bella [Sat, 16 Apr 2022 00:22:43 +0000 (00:22 +0000)]
Revert "Revert "Revert "[clang][pp] adds '#pragma include_instead'"""
> Includes regression test for problem noted by @hans.
> is reverts commit 973de71.
>
> Differential Revision: https://reviews.llvm.org/D106898
Feature implemented as-is is fairly expensive and hasn't been used by
libc++. A potential reimplementation is possible if libc++ become
interested in this feature again.
Differential Revision: https://reviews.llvm.org/D123885
Fraser Cormack [Fri, 22 Apr 2022 16:19:27 +0000 (17:19 +0100)]
[RISCV][NFC] Adjust some formatting in VL patterns
Fraser Cormack [Wed, 3 Nov 2021 11:41:03 +0000 (11:41 +0000)]
[RISCV] Print human-readable VTYPE/SEW/LMUL in MIR
This patch adds custom MIR operand comments to VTYPE immediate operands
in VSETVLI instructions and SEW/LMUL operands in vector codegen pseudo
instructions. The result is intended to be more human-readable and
hopefully maintainable when working with MIR, particularly when
writing or reading test cases.
Reviewed By: craig.topper
Differential Revision: https://reviews.llvm.org/D124187
owenca [Thu, 21 Apr 2022 23:46:07 +0000 (16:46 -0700)]
[clang-format][NFC] Use isComment() in setCommentLineLevels()
Also replace an unnecessary check with assert() in the unwrapped
line parser.
Differential Revision: https://reviews.llvm.org/D124215
Matthias Springer [Fri, 22 Apr 2022 15:57:25 +0000 (00:57 +0900)]
[mlir][bufferize][NFC] Add function boundary bufferization flag to BufferizationOptions
This makes the API easier to use. Also allows us to check for incorrect API usage for easier debugging.
Differential Revision: https://reviews.llvm.org/D124265
Simon Pilgrim [Fri, 22 Apr 2022 15:58:55 +0000 (16:58 +0100)]
[InstCombine] Fold (A & 2^C1) + A => A & (2^C1 - 1) iff bit C1 in A is a sign bit (PR21929)
Alive2: https://alive2.llvm.org/ce/z/Ygq26C
This is the final missing fold to handle the modulo2 simplification: https://github.com/llvm/llvm-project/issues/22303
Fixes #22303
Differential Revision: https://reviews.llvm.org/D123374
Kadir Cetinkaya [Fri, 22 Apr 2022 08:47:46 +0000 (10:47 +0200)]
[clangd][NFC] Reduce memory usage while building dex
Reduce peak memory usage by tearing down the intermediate representation
as we build the final one. Rather than deleting it in the end.
Differential Revision: https://reviews.llvm.org/D124240
Simon Pilgrim [Fri, 22 Apr 2022 15:39:25 +0000 (16:39 +0100)]
[DAG] Fold freeze(bitcast(x)) -> bitcast(freeze(x))
This is a very specific fold to fix an upstream poor codegen issue.
InstCombine has the much more flexible pushFreezeToPreventPoisonFromPropagating but I don't think we're quite there with DAG/TLI handling for canCreateUndefOrPoison/isGuaranteedNotToBeUndefOrPoison value tracking yet.
Fixes #54911
Differential Revision: https://reviews.llvm.org/D124185
Matthias Springer [Fri, 22 Apr 2022 14:54:03 +0000 (23:54 +0900)]
[mlir][bufferize][NFC] Rewrite op filter logic
The `hasFilter` field is not needed. Instead, the filter accepts ops by default if no ALLOW rule was specified.
Differential Revision: https://reviews.llvm.org/D124264
Vasileios Porpodas [Fri, 22 Apr 2022 15:23:05 +0000 (08:23 -0700)]
Revert "[SLP][AArch64] Implement lookahead operand reordering score of splat loads for AArch64"
This reverts commit
7ba702644bac6df166a02bbd692c1599a95a7c8b.
Denis Antrushin [Fri, 22 Apr 2022 15:03:14 +0000 (22:03 +0700)]
[StatepointLowering] Add test for cross-BB gc.relocate lowering
Matt Arsenault [Wed, 20 Apr 2022 17:50:42 +0000 (13:50 -0400)]
llvm-reduce: Fix variable name typo
Matt Arsenault [Thu, 21 Apr 2022 12:58:15 +0000 (08:58 -0400)]
MIR: Serialize FunctionContextIdx in MachineFrameInfo
Nikita Popov [Fri, 22 Apr 2022 14:54:16 +0000 (16:54 +0200)]
[InstCombine] Fix typo in test (NFC)
Matt Arsenault [Fri, 15 Apr 2022 02:40:48 +0000 (22:40 -0400)]
AMDGPU: Directly implement computeKnownBits for workitem intrinsics
Currently metadata is inserted in a late pass which is lowered
to an AssertZext. The metadata would be more useful if it was
inserted earlier after inlining, but before codegen.
Probably shouldn't change anything now. Just replacing the
late metadata annotation needs more work, since we lose
out on optimizations after these are lowered to CopyFromReg.
Seems to be slightly better than relying on the AssertZext from the
metadata. The test change in cvt_f32_ubyte.ll is a quirk from it using
-start-before=amdgpu-isel instead of running the usual codegen
pipeline.
Matt Arsenault [Fri, 15 Apr 2022 14:54:33 +0000 (10:54 -0400)]
GlobalISel: Relax handling of G_ASSERT_* with source register classes
The most common situation where G_ASSERT_ZEXT appears for AMDGPU is a
copy from a physical register, which happens to use set the actual
register class on the virtual register. After copy coalescing, the
assert's source operand had a vreg with a set class. The verifier was
strictly rejecting cases where the set class/bank weren't an exact
match. Additionally, RegBankSelect was also expecting a register bank
to be set on the register, not a class.
This is much stricter than regular copies so relax this behavior. This
now allows these 2 cases:
1. Source register has either class or bank, and the result does not
2. Source register has a register class, and the result is a register
with a matching bank.
This should avoid needing some kind of special handling to avoid
violating this constraint when folding copies.
Nikita Popov [Fri, 22 Apr 2022 13:07:10 +0000 (15:07 +0200)]
[InstCombine] Extract code for or of icmp eq zero and icmp fold (NFC)
To make it easier to extend this to the congruent and case.
Vasileios Porpodas [Tue, 12 Apr 2022 19:49:44 +0000 (12:49 -0700)]
[SLP][AArch64] Implement lookahead operand reordering score of splat loads for AArch64
The original patch (https://reviews.llvm.org/D121354) targets x86 and adjusts
the lookahead score of splat loads ad they can be done by the `movddup`
instruction that combines the load and the broadcast and is cheap to execute.
A similar issue shows up on AArch64. The `ld1r` instruction performs a broadcast
load and is cheap to execute.
This patch implements the TargetTransformInfo hooks for AArch64.
Differential Revision: https://reviews.llvm.org/D123638
Martin Storsjö [Wed, 20 Apr 2022 08:13:43 +0000 (11:13 +0300)]
[doc] [cmake] Fix a typo in examples for the cmake directory docs. NFC.
The previous case was a tautology - this is probably what was intended.
Differential Revision: https://reviews.llvm.org/D124072
Biplob Mishra [Fri, 22 Apr 2022 14:22:47 +0000 (15:22 +0100)]
InstCombine: Add tests to show or-and scenarios which can be possibly be combined by ORing the masks
Paul Walker [Fri, 22 Apr 2022 14:07:55 +0000 (15:07 +0100)]
[AArch64][SVE] Remove BIC from logical operation DestructiveBinaryComm patterns
This reverts part of https://reviews.llvm.org/D124224 that causes
an assert because the register allocator triggers a pathological
situation where there's no safe way to insert a zeroing MOVPFRX
instruction.
Nikita Popov [Fri, 22 Apr 2022 12:44:59 +0000 (14:44 +0200)]
[InstCombine] Add tests for and of icmp ne zero and icmp uge (NFC)
Partially based on the conjugated or tests.
Nico Weber [Fri, 22 Apr 2022 12:53:59 +0000 (08:53 -0400)]
[lld/win] Mention in release notes that /winsysroot: currently requires /machine:
Differential Revision: https://reviews.llvm.org/D124254
Iain Sandoe [Thu, 20 Aug 2020 15:18:57 +0000 (16:18 +0100)]
[C++20][Modules][Driver][HU 2/N] Add fmodule-header, fmodule-header=
These command-line flags are alternates to providing the -x
c++-*-header indicators that we are building a header unit.
Act on fmodule-header= for headers on the c/l:
If we have x.hh -fmodule-header, then we should treat that header
as a header unit input (equivalent to -xc++-header-unit-header x.hh).
Likewise, for fmodule-header={user,system} the source should be now
recognised as a header unit input (since this can affect the job list
that we need).
It's not practical to recognise a header without any suffix so
-fmodule-header=system foo isn't going to happen. Although
-fmodule-header=system foo.hh will work OK. However we can make it
work if the user indicates that the item without a suffix is a valid
header. (so -fmodule-header=system -xc++-header vector)
Differential Revision: https://reviews.llvm.org/D121589
Lei Zhang [Fri, 22 Apr 2022 12:58:14 +0000 (08:58 -0400)]
[mlir][vector] Fold cancelling vector.shape_cast(vector.broadcast)
vector.broadcast can inject all size one dimensions. If it's
followed by a vector.shape_cast to the original type, we can
cancel the op pair, like cancelling consecutive shape_cast ops.
Reviewed By: mravishankar
Differential Revision: https://reviews.llvm.org/D124094
Byoungchan Lee [Fri, 22 Apr 2022 12:37:25 +0000 (08:37 -0400)]
[cc1as] Add support for emitting the build version load command for -darwin-target-variant
This patch extends cc1as to export the build version load command with
LC_VERSION_MIN_MACOSX.
This is especially important for Mac Catalyst as Mac Catalyst uses
the MacOS's compiler rt built-ins.
Differential Revision: https://reviews.llvm.org/D121868
zhongyunde [Fri, 22 Apr 2022 12:26:59 +0000 (20:26 +0800)]
[AArch64][SVE] Add some logical operation DestructiveBinaryComm patterns
Add DestructiveBinaryComm* patterns for ORR, EOR, AND and BIC.
The above instructions requires that the source and destination registers are
equal, so use movprfx should be beneficial to performance.
note: BIC (i.e. A & ~B) is not a commutative operation.
Reviewed By: paulwalker-arm, david-arm
Differential Revision: https://reviews.llvm.org/D124224
Vasileios Porpodas [Tue, 12 Apr 2022 20:11:11 +0000 (13:11 -0700)]
[SLP][AArch64][NFC] Add test for a follow-up patch that fixes the lookahead cost of splat-loads for AArch64
Haojian Wu [Thu, 21 Apr 2022 18:19:32 +0000 (20:19 +0200)]
[AST] QualifiedTemplateName::getTemplateDecl cleanup.
This is a followup cleanup of
1234b1c6d8113d50beef5801be607ad1d502b2f7
Differential Revision: https://reviews.llvm.org/D124238
Nico Weber [Fri, 22 Apr 2022 12:27:32 +0000 (08:27 -0400)]
Revert "[randstruct] Check final randomized layout ordering"
This reverts commit
a7815d33bf8f955f2a1888abbccf974bd4858f79.
Test fails on Windows, see comments on https://reviews.llvm.org/D124199
Matthias Springer [Fri, 22 Apr 2022 11:34:08 +0000 (20:34 +0900)]
[mlir][bufferize][NFC] Move SCF test cases to SCF dialect
Differential Revision: https://reviews.llvm.org/D124249
Daniel Kiss [Fri, 22 Apr 2022 10:04:19 +0000 (12:04 +0200)]
[AArch64] Emit .cfi_negate_ra_state for PAC-auth instructions.
autiasp, autibsp instructions are the counterpart of paciasp/pacibsp instructions
therefore let's emit .cfi_negate_ra_state for these too.
In case of Armv8.3 instruction set the retaa/retbb will do the return and authentication
in one step here we can't emit the . cfi_negate_ra_state because that would be point after
the ret* instruction.
Reviewed By: nickdesaulniers, MaskRay
Differential Revision: https://reviews.llvm.org/D111780
Ying Yi [Wed, 6 Apr 2022 11:18:15 +0000 (12:18 +0100)]
Bug 51277: [DWARF] DW_AT_alignment incorrect when
attribute((__aligned__)) is present but ignored`
In the original code, the 'getDeclAlignIfRequired' function is used.
The 'getDeclAlignIfRequired' function will return the max alignment
of all aligned attributes if the type has aligned attributes. The
function doesn't consider the type at all.
The 'getTypeAlignIfRequired' function uses the type's alignment value,
which also used by the 'alignof' function. I think we should use the
function of 'getTypeAlignIfRequired'.
Reviewed By: dblaikie, jmorse, wolfgangp
Differential Revision: https://reviews.llvm.org/D124006
Nikita Popov [Fri, 22 Apr 2022 10:21:32 +0000 (12:21 +0200)]
[InstCombine] Merge foldAndOfICmps() and foldOrOfICmps() (NFCI)
Folds are supposed to always be added in conjugated pairs for and
and or. Merge the two functions to make folds for which this is
currently not the case more obvious.
Matthias Springer [Fri, 22 Apr 2022 09:08:44 +0000 (18:08 +0900)]
[mlir][bufferization] Move ModuleBufferization to bufferization dialect
* Move Module Bufferization to the bufferization dialect. The implementation is split into `OneShotModuleBufferize.cpp` and `FuncBufferizableOpInterfaceImpl.cpp`, so that the external model implementation can be easily moved to the func dialect in the future.
* Split and clean up test cases. A few test cases are still remaining in Linalg and will be updated separately.
* `linalg.inplaceable` is renamed to `bufferization.writable` to accurately reflect its current usage.
* Attributes and their verifiers are moved from the Linalg dialect to the Bufferization dialect.
* Expand documentation.
* Add a new flag to One-Shot Bufferize to allow for function boundary bufferization.
Differential Revision: https://reviews.llvm.org/D122229
Nikita Popov [Fri, 22 Apr 2022 10:31:26 +0000 (12:31 +0200)]
[InstCombine] Fix or of commuted foldable predicates
1d90e530442477de247dcb613f5176fe7e9beded switch this code to store
the predicates and operands in variables, but retained a
swapOperands() call here. Thus the commuted cases were no longer
folded. Additionally, as the change was not reported, the next
InstCombine iteration would not pick it up either.
Nikita Popov [Fri, 22 Apr 2022 10:27:50 +0000 (12:27 +0200)]
[InstCombine] Add commuted or of icmp test (NFC)
Matthias Springer [Fri, 22 Apr 2022 09:07:39 +0000 (18:07 +0900)]
[mlir][bufferization][NFC] Remove layout post processing step
The layout postprocessing step was removed and is now part of the FuncOp bufferization. If the user specified a certain layout map for a tensor function arg, use that layout map directly when bufferizing the function signature. Previously, the bufferization used a generic layout map for every tensor function arg and then updated function signatures and CallOps in a separate step.
Differential Revision: https://reviews.llvm.org/D122228
Matthias Springer [Fri, 22 Apr 2022 09:05:49 +0000 (18:05 +0900)]
[mlir][bufferize][NFC] Move FuncOp bufferization to BufferizableOpInterface impl
FuncOps are now less special. They must still be analyzed + bufferized in a certain order, but they are now bufferized same as other ops that have a region: Bufferize the op first (`bufferize` interface method), then bufferize the region body with other bufferization patterns. In the case of FuncOps, the function signature is bufferized together with ReturnOps. Similar to how, e.g., scf.for ops are bufferized together with scf.yield ops.
This change is essentially a reimplementation of the FuncOp bufferization, but mostly NFC from a user's perspective (apart from error messages). This change is in preparation of moving the code to the bufferization dialect.
Differential Revision: https://reviews.llvm.org/D123214
Florian Hahn [Fri, 22 Apr 2022 09:44:29 +0000 (10:44 +0100)]
[IndVars] Add test for crash exposed by D114650.
Matthias Springer [Fri, 22 Apr 2022 09:03:28 +0000 (18:03 +0900)]
[mlir][bufferize][NFC] Use custom walk instead of GreedyPatternRewriter
The bufferization driver was previously using a GreedyPatternRewriter. This was problematic because bufferization must traverse ops top-to-bottom. The GreedyPatternRewriter was previously configured via `useTopDownTraversal`, but this was a hack; this API was just meant for performance improvements and should not affect the result of the rewrite.
BEGIN_PUBLIC
No public commit message needed.
END_PUBLIC
Differential Revision: https://reviews.llvm.org/D123618
jacquesguan [Fri, 22 Apr 2022 08:13:14 +0000 (08:13 +0000)]
[mlir][Arithmetic] Use common constant fold function in RemSI and RemUI to cover splat.
This patch replaces current fold function with the common constant fold funtion in order to cover the situation of constant splat.
Reviewed By: ftynse
Differential Revision: https://reviews.llvm.org/D124236
Andrzej Warzynski [Fri, 4 Mar 2022 13:05:21 +0000 (13:05 +0000)]
[flang] Make the plugin API independent of the driver internals
This patch adds a few new member methods in the `PluginParseTreeAction`
frontend action base class. With these new methods, the plugin API
becomes independent of the driver internals. In particular, plugin
writers no longer require the `CompilerInstance.h` header file to access
various driver data structures (instead, they can use newly added
hooks).
This change is desirable as `CompilerInstance.h` includes various
headers from Clang (both explicitly and implicitly). Some of these
header files are generated at build time (through TableGen) and
including them creates a dependency on some of Clang's build targets.
However, plugins in Flang should not depend on Clang build targets.
Note that plugins might still work fine most of the time, even without
this change and without adding Clang build targets as dependency in
plugin's CMake definition. Indeed, these Clang build targets are often
generated early in the build process. However, that's not guaranteed and
we did notice that on occasions plugins would fail to build.
Differential Revision: https://reviews.llvm.org/D120999
Nikita Popov [Fri, 22 Apr 2022 08:57:16 +0000 (10:57 +0200)]
[InstCombine] Add test for atomic load from constant global (NFC)
jacquesguan [Fri, 22 Apr 2022 07:46:01 +0000 (07:46 +0000)]
[mlir][Arithmetic] Use matchPattern to simplify code.
This patch replaces some code with matchPattern and move them before the constant folder function in order to avoid redundant invoking.
Differential Revision: https://reviews.llvm.org/D124235
David Green [Thu, 21 Apr 2022 14:48:07 +0000 (15:48 +0100)]
[AArch64] Add some splat of load cost model tests. NFC
They do not work yet, but we can hopefully adjust the cost for them to
get them to be recognized
Adrian Kuegel [Fri, 22 Apr 2022 07:44:28 +0000 (09:44 +0200)]
[mlir] Move isGuaranteedCollapsible to CollapseShapeOp (NFC).
It seems more natural than to have it as a static method of ExpandShapeOp.
Also fix a typo ("the the" -> "the").
Differential Revision: https://reviews.llvm.org/D124234
Abinav Puthan Purayil [Fri, 22 Apr 2022 07:05:40 +0000 (12:35 +0530)]
[AMDGPU] Use a wrapper multiclass for buffer atomic intrinsic patterns. NFC
Nikita Popov [Wed, 20 Apr 2022 15:03:45 +0000 (17:03 +0200)]
Reapply [SimplifyCFG] Handle branch on same condition in pred more directly
Reapplying without changes, after a fix to a dependent patch.
-----
Rather than creating a PHI node and then using the PHI threading
code, directly handle this case in
FoldCondBranchOnValueKnownInPredecessor().
This change is supposed to be NFC-ish, but may cause changes due
to different transform order.
Iain Sandoe [Mon, 10 Jan 2022 13:40:38 +0000 (13:40 +0000)]
[C++20][Modules][Driver][HU 1/N] Initial handling for -xc++-{system,user}-header.
This adds file types and handling for three input types, representing a C++20
header unit source:
1. When provided with a complete pathname for the header.
2. For a header to be looked up (by the frontend) in the user search paths
3. For a header to be looked up in the system search paths.
We also add a pre-processed file type (although that is a single type, regardless
of the original input type).
These types may be specified with -xc++-{user,system,header-unit}-header xxxx.
These types allow us to disambiguate header unit jobs from PCH ones, and thus
we handle these differently from other header jobs in two ways:
1. The job construction is altered to build a C++20 header unit (rather than a
PCH file, as would be the case for other headers).
2. When the type is "user" or "system" we defer checking for the file until the
front end is run, since we need to look up the header in the relevant paths
which are not known at this point.
Differential Revision: https://reviews.llvm.org/D121588
Siva Chandra Reddy [Tue, 19 Apr 2022 22:06:07 +0000 (22:06 +0000)]
[libc] Add the implementation of the GNU extension function fopencookie.
Reviewed By: lntue, michaelrj
Differential Revision: https://reviews.llvm.org/D124141
Nikita Popov [Wed, 20 Apr 2022 12:02:46 +0000 (14:02 +0200)]
Reapply [SimplifyCFG] Make FoldCondBranchOnPHI more amenable to extension (NFCI)
Reapply with SmallMapVector instead of SmallDenseMap, which should
address the non-determinism issue.
-----
This general threading transform can be performed whenever we know
a constant value for the condition in a predecessor, which would
currently just be the case of a phi node with constant arguments.
Jean Perier [Fri, 22 Apr 2022 07:37:08 +0000 (09:37 +0200)]
[flang] Fold transformational bessels when host runtime has bessels
Transformational bessel intrinsic functions require the same math runtime
as elemental bessel intrinsics.
Currently elemental bessels could be folded if f18 was linked with pgmath
(cmake -DLIBPGMATH_DIR option). `j0`, `y0`, ... C libm functions were not
used because they are not standard C functions: they are Posix
extensions.
This patch enable:
- Using the Posix bessel host runtime functions when available.
- folding the transformational bessel using the elemental version.
Differential Revision: https://reviews.llvm.org/D124167
Fraser Cormack [Fri, 22 Apr 2022 06:38:36 +0000 (07:38 +0100)]
[RISCV] Update test from SEW to Log2SEW
This test somehow slipped through the cracks during the time we switched
from encoding SEW to its log2 form.
Michael Liao [Fri, 22 Apr 2022 06:45:56 +0000 (02:45 -0400)]
[Testing] Fix the shared build. NFC.
Brad Smith [Fri, 22 Apr 2022 06:23:12 +0000 (02:23 -0400)]
Fix test for
c7ee0b8bda8b32a800bc01e9151b364446a6e1b1
OpenBSD/sparc is dead and support was removed awhile ago.
Abinav Puthan Purayil [Fri, 22 Apr 2022 06:14:20 +0000 (11:44 +0530)]
[AMDGPU] Rename the FlatSignedIntrPat multiclass to FlatSignedAtomicIntrPat. NFC
Mark Kettenis [Fri, 22 Apr 2022 05:55:58 +0000 (01:55 -0400)]
[Clang] Fix the guaranteed alignment of memory returned by malloc/new on OpenBSD
The guaranteed alignment is 16 bytes on OpenBSD.
Jun Zhang [Fri, 22 Apr 2022 03:32:38 +0000 (11:32 +0800)]
Use range based for loop in Sema::CheckParameterPacksForExpansion. NFC
Signed-off-by: Jun Zhang <jun@junz.org>
wangpc [Fri, 22 Apr 2022 04:22:36 +0000 (12:22 +0800)]
[RISCV] Do not outline CFI instructions when they are needed in EH
We saw a failure caused by unwinding with incomplete CFIs, so we
can't outline CFI instructions when they are needed in EH.
This is a recommit of 0d40688, which was reverted in ce83883 as
related precommit test 360d44e caused some errors.
Reviewed By: luismarques
Differential Revision: https://reviews.llvm.org/D122634
wangpc [Fri, 22 Apr 2022 03:33:38 +0000 (11:33 +0800)]
[RISCV] Precommit test for D122634
This is a recommit of 360d44e, which was reverted
in b1620d4 because it caused some errors due to no
`nounwind` attrs in `machine-outliner-cfi.mir`.
Reviewed By: luismarques
Differential Revision: https://reviews.llvm.org/D123364
Abinav Puthan Purayil [Tue, 19 Apr 2022 17:57:34 +0000 (23:27 +0530)]
[AMDGPU] Remove no-ret atomic ops selection in the post-isel hook
No-ret atomic ops are now selected in tblgen.
Differential Revision: https://reviews.llvm.org/D124086
Abinav Puthan Purayil [Tue, 19 Apr 2022 17:32:38 +0000 (23:02 +0530)]
[AMDGPU] Remove atomic pattern args in FLAT_[Global_]Atomic_Pseudo defs
We already have explicit patterns for these.
Differential Revision: https://reviews.llvm.org/D124084
Abinav Puthan Purayil [Sat, 9 Apr 2022 12:43:03 +0000 (18:13 +0530)]
[AMDGPU] Select no-return DS_PK_ADD_F16 in tblgen
Differential Revision: https://reviews.llvm.org/D123584
Abinav Puthan Purayil [Fri, 8 Apr 2022 09:26:18 +0000 (14:56 +0530)]
[AMDGPU] Select no-return atomic intrinsics in tblgen
This is to avoid relying on the post-isel hook.
This change also enable the saddr pattern selection for atomic
intrinsics in GlobalISel.
Differential Revision: https://reviews.llvm.org/D123583
Fangrui Song [Fri, 22 Apr 2022 03:44:56 +0000 (20:44 -0700)]
[tsan][test] Change -tsan to -passes=tsan
Xiang1 Zhang [Fri, 22 Apr 2022 01:40:00 +0000 (09:40 +0800)]
[x86] Support 3 builtin functions for 32-bits mode
_mm_cvtsi128_si64, _mm_cvtsi64_si128, _mm_extract_epi64
Reviewed By:RKSimon, Topper Craig
Differential Revision: https://reviews.llvm.org/D124067
Ping Deng [Fri, 22 Apr 2022 02:44:56 +0000 (02:44 +0000)]
[RISCV][NFC] Use defvar to simplify pattern definations.
Reviewed By: jacquesguan, frasercrmck
Differential Revision: https://reviews.llvm.org/D123839
Bill Wendling [Fri, 22 Apr 2022 02:40:28 +0000 (19:40 -0700)]
[randstruct] Check final randomized layout ordering
This uses "llvm::shuffle" to stop differences in shuffle ordering on
different platforms.
Reviewed By: MaskRay
Differential Revision: https://reviews.llvm.org/D124199
Fangrui Song [Fri, 22 Apr 2022 02:25:57 +0000 (19:25 -0700)]
[LegacyPM] Remove AddressSanitizerLegacyPass
Using the legacy PM for the optimization pipeline was deprecated in 13.0.0.
Following recent changes to remove non-core features of the legacy
PM/optimization pipeline, remove AddressSanitizerLegacyPass,
ModuleAddressSanitizerLegacyPass, and ASanGlobalsMetadataWrapperPass.
MemorySanitizerLegacyPass was removed in D123894.
Reviewed By: #sanitizers, vitalybuka
Differential Revision: https://reviews.llvm.org/D124216
Fangrui Song [Fri, 22 Apr 2022 02:22:47 +0000 (19:22 -0700)]
[DebugInfo][test] Delete a legacy asan test
Fangrui Song [Fri, 22 Apr 2022 02:21:27 +0000 (19:21 -0700)]
[DebugInfo][test] Delete a legacy asan test
Nico Weber [Fri, 22 Apr 2022 02:14:36 +0000 (22:14 -0400)]
Revert "[LegacyPM] Remove AddressSanitizerLegacyPass"
This reverts commit
e68c589e53da4a53bf1cea79a9cb38308edbb8c6.
Breaks check-llvm, see comments on https://reviews.llvm.org/D124216
Nico Weber [Fri, 22 Apr 2022 01:32:23 +0000 (21:32 -0400)]
[gn build] (manually) port
a7691dee2d3c (TestAST)
This makes clang/lib/Testing the very first non-test()-target that includes
gtest headers, which means it needs an explicit dep on gtest.
Xiang1 Zhang [Fri, 22 Apr 2022 01:18:41 +0000 (09:18 +0800)]
[Clang Format] emmintrin.h smmintrin.h (NFC)
Will Dietz [Thu, 21 Apr 2022 22:14:45 +0000 (17:14 -0500)]
[MLIR] prefer /bin/sh over /bin/bash for simple test scripts
These scripts do not appear to require bash, and while /bin/sh
is not guaranteed either it's more commonly available.
Fixes tests on NixOS and in certain sandbox build environments.
Reviewed By: mehdi_amini
Differential Revision: https://reviews.llvm.org/D124205
Fangrui Song [Fri, 22 Apr 2022 01:18:39 +0000 (18:18 -0700)]
[LegacyPM] Remove AddressSanitizerLegacyPass
Using the legacy PM for the optimization pipeline was deprecated in 13.0.0.
Following recent changes to remove non-core features of the legacy
PM/optimization pipeline, remove AddressSanitizerLegacyPass,
ModuleAddressSanitizerLegacyPass, and ASanGlobalsMetadataWrapperPass.
MemorySanitizerLegacyPass was removed in D123894.
Reviewed By: #sanitizers, vitalybuka
Differential Revision: https://reviews.llvm.org/D124216
Xiang1 Zhang [Fri, 22 Apr 2022 01:11:40 +0000 (09:11 +0800)]
Revert "[x86] Support 3 builtin functions for 32-bits mode"
This reverts commit
a69c219a8c9f7eaff142b6b4d135ac0456e0d4ae.
Xiang1 Zhang [Thu, 21 Apr 2022 01:10:45 +0000 (09:10 +0800)]
[x86] Support 3 builtin functions for 32-bits mode
_mm_cvtsi128_si64, _mm_cvtsi64_si128, _mm_extract_epi64
Matt Arsenault [Fri, 15 Apr 2022 13:50:45 +0000 (09:50 -0400)]
AMDGPU: Fix fneg combine test not checking full result
This wasn't accounting for the canonicalize of the input, or checking
the output fneg isn't folded as intended. Avoids test failure in
unrelated patch which happens to change register numberings.
Amy Zhuang [Fri, 22 Apr 2022 00:09:13 +0000 (17:09 -0700)]
[mlir] Modify SuperVectorize to generate select op->combiner op
Insert the select op before the combiner op when vectorizing a
reduction loop that needs a mask, so the vectorized reduction loop
can pass isLoopParallel check and be transformed correctly in later
passes.
Reviewed By: dcaballe
Differential Revision: https://reviews.llvm.org/D124047
Dominic Chen [Thu, 21 Apr 2022 00:33:25 +0000 (17:33 -0700)]
[scudo] Disable memory tagging on arm64_32
arm64_32 is an ILP32 platform
Differential Revision: https://reviews.llvm.org/D124135
Brad Smith [Fri, 22 Apr 2022 00:00:59 +0000 (20:00 -0400)]
[libcxx] Add some missing xlocale wrapper functions for OpenBSD
Reviewed By: Mordante
Differential Revision: https://reviews.llvm.org/D122861
Vitaly Buka [Thu, 21 Apr 2022 23:20:04 +0000 (16:20 -0700)]
Revert "[asan] Emit .size directive for global object size before redzone"
Revert "[docs] Fix underline"
Breaks a lot of asan tests in google.
This reverts commit
365c3e85bced1fb56c2d94adc34bff7a94abe4a6.
This reverts commit
78a784bea443cdcecf894155ab37893d7a8e8332.
Zequan Wu [Thu, 21 Apr 2022 23:06:49 +0000 (16:06 -0700)]
[LLDB][NativePDB] Make sure the number of param symbol records is the same as the number get from function type record before setting parameters.
Alexander Yermolovich [Thu, 21 Apr 2022 22:47:49 +0000 (15:47 -0700)]
[BOLT][DWARF] Implement monolithic DWARF5
Added implementation to support DWARF5 in monolithic mode.
Next step DWARF5 split dwarf support.
Reviewed By: maksfb
Differential Revision: https://reviews.llvm.org/D121876
Joseph Huber [Thu, 21 Apr 2022 22:49:31 +0000 (18:49 -0400)]
[OpenMP] Properly guard linker input using the new driver
Summary:
A new offloading action builder line was added that wasn't guarded with
the new driver for OpenMP. This doesn't affect anything now but could
potentially cause problems.