platform/upstream/llvm.git
2 years ago[AArch64] Regenerate CHECK lines for llvm/test/CodeGen/AArch64/sve2-int-mul.ll
Paul Walker [Mon, 24 Jan 2022 12:03:16 +0000 (12:03 +0000)]
[AArch64] Regenerate CHECK lines for llvm/test/CodeGen/AArch64/sve2-int-mul.ll

2 years ago[X86] Add cmp-equality bool reductions
Simon Pilgrim [Mon, 24 Jan 2022 14:04:42 +0000 (14:04 +0000)]
[X86] Add cmp-equality bool reductions

PR53379 test coverage

2 years ago[X86] Rename cmp-with-zero bool reductions
Simon Pilgrim [Mon, 24 Jan 2022 13:44:08 +0000 (13:44 +0000)]
[X86] Rename cmp-with-zero bool reductions

Explicitly name them icmp0_* - I'm intending to add PR53379 test coverage shortly

2 years ago[X86] Fix v8i8 -> v8i16 typo in bool reductions
Simon Pilgrim [Mon, 24 Jan 2022 13:36:22 +0000 (13:36 +0000)]
[X86] Fix v8i8 -> v8i16 typo in bool reductions

We were supposed to be testing <8 x i16> reductions

2 years agoAdd missing STLExtras.h include from lldb/unittests/TestingSupport/MockTildeExpressio...
serge-sans-paille [Mon, 24 Jan 2022 14:02:44 +0000 (15:02 +0100)]
Add missing STLExtras.h include from lldb/unittests/TestingSupport/MockTildeExpressionResolver.cpp

2 years ago[RISCV] Add side-effect-free vsetvli intrinsics
Fraser Cormack [Fri, 21 Jan 2022 17:58:39 +0000 (17:58 +0000)]
[RISCV] Add side-effect-free vsetvli intrinsics

This patch introduces new intrinsics that enable the use of vsetvli in
contexts where only the returned vector length is of interest. The
pre-existing intrinsics are marked with side-effects, which prevents
even trivial optimizations on/across them.

These intrinsics are intended to be used in situations where the vector
length is fed in turn to RVV intrinsics or to vector-predication
intrinsics during loop vectorization, for example. Those codegen paths
ensure that instructions are generated with their own implicit vsetvli,
so the vector length and vtype can be relied upon to be correct.

No corresponding C builtins are planned at this stage, though that is a
possibility for the future if the need arises.

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D117910

2 years ago[LoopFlatten] Address FIXME about getTripCountFromExitCount. NFC.
Sjoerd Meijer [Mon, 24 Jan 2022 12:54:16 +0000 (12:54 +0000)]
[LoopFlatten] Address FIXME about getTripCountFromExitCount. NFC.

Together with the previous commit which mainly documents better LoopFlatten's
overall strategy, this addresses a concern added as a FIXME comment in D110587;
the code refactoring (NFC) introduces functions (also for the SCEV usage) to
make this clearer.

2 years ago[LoopFlatten] Added comments about usage of various Loop APIs. NFC.
Sjoerd Meijer [Mon, 24 Jan 2022 11:41:06 +0000 (11:41 +0000)]
[LoopFlatten] Added comments about usage of various Loop APIs. NFC.

2 years agoAdd missing include llvm/ADT/STLExtras
serge-sans-paille [Mon, 24 Jan 2022 13:40:51 +0000 (14:40 +0100)]
Add missing include llvm/ADT/STLExtras

2 years agoAdd `isConstinit` matcher
Evgeny Shulgin [Mon, 24 Jan 2022 13:35:42 +0000 (08:35 -0500)]
Add `isConstinit` matcher

Support C++20 constinit variables for AST Matchers.

2 years ago[demangler][NFC] Refactor some parsing
Nathan Sidwell [Mon, 24 Jan 2022 12:28:09 +0000 (04:28 -0800)]
[demangler][NFC] Refactor some parsing

There's some unnecessary code duplication in the parser.  This
refactors that and deploys boolean variables to avoid the duplication.
These also happen to help adding module demangling (with an updated
mangling scheme).

1a) The grammar requires some lookahead concerning <template-args>. We
may discover an <unscoped-name> is actually <unscoped-template-name>
<template-args>.  (When <unscoped-name> was a substitution, there must
be a following <template-args>.)  Refactor parseName to only have one
code path looking for the 'I' indicating <template-args>.

1b) While there I altered the control flow to hold the result in a
variable, rather than tail call.  Made it easier to debug (and of
course an optimizer will DTRT here anyway).

2a) An <unscoped-name> can have an St or StL prefix.  No need for
completely separate code paths handling the following unqualified-name
though.

2b) Also no need to look for both 'St' and 'StL' separately.  Look for
'St' and then conditionally swallow an 'L'.

3) We get a similar issue as #1a when parsing a typeName.  Here I just
change the control flow slightly to bring the 'break' out to the end
of the 'S' block and embed the early return inside an if.  That's more
in keeping with the code style.

4) Although NFC, there's a new testcase as that's not covered by the
existing demangler tests and is significant in the #1a case above.

Reviewed By: ChuanqiXu

Differential Revision: https://reviews.llvm.org/D117879

2 years ago[demangler] write-protect non-canonical source
Nathan Sidwell [Mon, 24 Jan 2022 12:14:47 +0000 (04:14 -0800)]
[demangler] write-protect non-canonical source

To try and avoid undesired changes to the non-canonical demangler
sources, change the cp-to-llvm script to (a) write-protect the target
files and (b) prepend 'do not edit' comments that are significant to
emacs[*], and hopefully humans.

Reviewed By: ChuanqiXu

Differential Revision: https://reviews.llvm.org/D118008

2 years ago[demangler] Resync demangler sources
Nathan Sidwell [Mon, 24 Jan 2022 12:11:59 +0000 (04:11 -0800)]
[demangler] Resync demangler sources

Recent commits changed llvm/include/llvm/Demangle without also
changing libcxxabi/src/Demangle, which is the canonical source
location.  This resyncs those commits to the libcxxabi directory.

Commits:
1f9e18b6565fd1bb69c4b649b9efd3467b3c7c7d
f53d359816e66a107195e1e4b581e2a33bbafaa4
065044c443f4041f32e0a8d6e633f9d92580fbca

Reviewed By: ChuanqiXu

Differential Revision: https://reviews.llvm.org/D117990.diff

2 years ago[flang] Update tco tool pipline and add translation to LLVM IR
Valentin Clement [Mon, 24 Jan 2022 13:14:49 +0000 (14:14 +0100)]
[flang] Update tco tool pipline and add translation to LLVM IR

tco is a tool to test the FIR to LLVM IR pipeline of the Flang compiler.

This patch update tco pipelines and adds the translation to LLVM IR.

A simple test is added to make sure the tool is working with a simple
FIR program.
More tests will be upstream in follow up patch from the fir-dev branch.

This patch is part of the upstreaming effort from fir-dev branch.

Reviewed By: kiranchandramohan, awarzynski, schweitz, mehdi_amini

Differential Revision: https://reviews.llvm.org/D117781

Co-authored-by: Eric Schweitz <eschweitz@nvidia.com>
Co-authored-by: Jean Perier <jperier@nvidia.com>
Co-authored-by: Andrzej Warzynski <andrzej.warzynski@arm.com>
2 years agoMove STLFunctionalExtras out of STLExtras
serge-sans-paille [Mon, 24 Jan 2022 10:57:09 +0000 (05:57 -0500)]
Move STLFunctionalExtras out of STLExtras

Only using that change in StringRef already decreases the number of
preoprocessed lines from 7837621 to 7776151 for LLVMSupport

Perhaps more interestingly, it shows that many files were relying on the
inclusion of StringRef.h to have the declaration from STLExtras.h. This
patch tries hard to patch relevant part of llvm-project impacted by this
hidden dependency removal.

Potential impact:
- "llvm/ADT/StringRef.h" no longer includes <memory>,
  "llvm/ADT/Optional.h" nor "llvm/ADT/STLExtras.h"

Related Discourse thread:
https://llvm.discourse.group/t/include-what-you-use-include-cleanup/5831

2 years ago[LV] Make some tests more robust by adding missing users.
Florian Hahn [Mon, 24 Jan 2022 13:04:09 +0000 (13:04 +0000)]
[LV] Make some tests more robust by adding missing users.

2 years ago[X86] Add PR46249 test case showing poorly widened select predicate mask
Simon Pilgrim [Mon, 24 Jan 2022 12:58:03 +0000 (12:58 +0000)]
[X86] Add PR46249 test case showing poorly widened select predicate mask

2 years ago[AMDGPU][NFC] Fix debug prints
Sebastian Neubauer [Mon, 24 Jan 2022 12:44:54 +0000 (13:44 +0100)]
[AMDGPU][NFC] Fix debug prints

Print the instructions instead of pointers.

2 years ago[NFC] New test case for BasicAA and memcy/memmove with deopt
Evgeniy Brevnov [Mon, 24 Jan 2022 11:01:03 +0000 (18:01 +0700)]
[NFC] New test case for BasicAA and memcy/memmove with deopt

New test checks results of BasicAA for llvm.memcpy.*/llvm.memmove.* intrinsics in presence of deopt bundle. By specification expected result for unrelated global memory should be Ref. Currently this is not the case and will be fixed in upcoming patches.

Reviewed By: fhahn

Differential Revision: https://reviews.llvm.org/D118031

2 years ago[MLIR][Presburger] Refactor duplicate division merging to Utils
Groverkss [Mon, 24 Jan 2022 12:41:55 +0000 (18:11 +0530)]
[MLIR][Presburger] Refactor duplicate division merging to Utils

This patch moves merging of duplicate divisions to presburger utility
functions. This is required to support division merging in structures other
than IntegerPolyhedron.

Reviewed By: arjunp

Differential Revision: https://reviews.llvm.org/D118001

2 years ago[RISCV] add support for zbkx subextension in MC layer.
SForeKeeper [Mon, 24 Jan 2022 12:33:46 +0000 (20:33 +0800)]
[RISCV] add support for zbkx subextension in MC layer.

This patch adds support for zbkx extension from K extension(v1.0.0) in MC layer.
Instructions with same functionality and same encoding is defined in the bitmanip extension.
It defines {Xperm8, Xperm4} as instruction aliases for xperm.* in Zbp extension. When Zbkx is enabled while Zbp is not, xperm.h will not be available. When Zbkx and Zbp are both enabled, the instructions will be decoded in Zbp format.

[[ https://reviews.llvm.org/D94999 | D94999 ]] this is the patch that introduces xperm.* instructions.

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D117889

2 years ago[LV] Name values and blocks in same induction tests (NFC).
Florian Hahn [Mon, 24 Jan 2022 11:27:27 +0000 (11:27 +0000)]
[LV] Name values and blocks in same induction tests (NFC).

This reduces the churn in the test in future updates due to numbering
changes.

2 years ago[gn build] Port 3696c70e67d9
LLVM GN Syncbot [Mon, 24 Jan 2022 12:06:49 +0000 (12:06 +0000)]
[gn build] Port 3696c70e67d9

2 years ago[LoopVectorize] Support epilogue vectorisation of loops with reductions
Kerry McLaughlin [Mon, 24 Jan 2022 10:41:51 +0000 (10:41 +0000)]
[LoopVectorize] Support epilogue vectorisation of loops with reductions

isCandidateForEpilogueVectorization will currently return false for loops
which contain reductions. This patch removes this restriction and makes
the following changes to support epilogue vectorisation with reductions:

- `fixReduction`: If fixReduction is being called during vectorisation of the
    epilogue, the phi node it creates will need to additionally carry incoming
     values from the middle block of the main loop.

- `createEpilogueVectorizedLoopSkeleton`: The incoming values of the phi
    created by fixReduction are updated after the vec.epilog.iter.check block
    is added. The phi is also moved to the preheader of the epilogue.

- `processLoop`: The start value of any VPReductionPHIRecipes are updated before
    vectorising the epilogue loop. The getResumeInstr function added to the ILV
    will return the resume instruction associated with the recurrence descriptor.

Reviewed By: sdesmalen

Differential Revision: https://reviews.llvm.org/D116928

2 years ago[X86] Remove avx512f integer and/or/xor/min/max reduction intrinsics and use generic...
Simon Pilgrim [Mon, 24 Jan 2022 11:57:23 +0000 (11:57 +0000)]
[X86] Remove avx512f integer and/or/xor/min/max reduction intrinsics and use generic equivalents

None of these have any reordering issues, and they still emit the same reduction intrinsics without any change in the existing test coverage:

llvm-project\clang\test\CodeGen\X86\avx512-reduceIntrin.c
llvm-project\clang\test\CodeGen\X86\avx512-reduceMinMaxIntrin.c

Differential Revision: https://reviews.llvm.org/D117881

2 years ago[clang-tidy] Add `readability-container-contains` check
Adrian Vogelsgesang [Wed, 27 Oct 2021 18:49:00 +0000 (11:49 -0700)]
[clang-tidy] Add `readability-container-contains` check

This commit introduces a new check `readability-container-contains` which finds
usages of `container.count()` and `container.find() != container.end()` and
instead recommends the `container.contains()` method introduced in C++20.

For containers which permit multiple entries per key (`multimap`, `multiset`,
...), `contains` is more efficient than `count` because `count` has to do
unnecessary additional work.

While this this performance difference does not exist for containers with only
a single entry per key (`map`, `unordered_map`, ...), `contains` still conveys
the intent better.

Reviewed By: xazax.hun, whisperity

Differential Revision: http://reviews.llvm.org/D112646

2 years ago[X86] Remove `__builtin_ia32_pmax/min` intrinsics and use generic `__builtin_elementw...
Simon Pilgrim [Mon, 24 Jan 2022 11:40:16 +0000 (11:40 +0000)]
[X86] Remove `__builtin_ia32_pmax/min` intrinsics and use generic `__builtin_elementwise_max/min`

D111985 added the generic `__builtin_elementwise_max` and `__builtin_elementwise_min` intrinsics with the same integer behaviour as the SSE/AVX instructions

This patch removes the `__builtin_ia32_pmax/min` intrinsics and just uses `__builtin_elementwise_max/min` - the existing tests see no changes:
```
__m256i test_mm256_max_epu32(__m256i a, __m256i b) {
  // CHECK-LABEL: test_mm256_max_epu32
  // CHECK: call <8 x i32> @llvm.umax.v8i32(<8 x i32> %{{.*}}, <8 x i32> %{{.*}})
  return _mm256_max_epu32(a, b);
}
```
This requires us to add a `__v64qs` explicitly signed char vector type (we already have `__v16qs` and `__v32qs`).

Sibling patch to D117791

Differential Revision: https://reviews.llvm.org/D117798

2 years ago[mlir][bufferize][NFC] Refactor createAlloc function signature
Matthias Springer [Mon, 24 Jan 2022 11:18:40 +0000 (20:18 +0900)]
[mlir][bufferize][NFC] Refactor createAlloc function signature

Pass a ValueRange instead of an ArrayRef<Value> for better compatibility. Also provide an additional function overload that automatically deallocates the buffer if specified.

Differential Revision: https://reviews.llvm.org/D118025

2 years ago[X86] Remove __builtin_ia32_pabs intrinsics and use generic __builtin_elementwise_abs
Simon Pilgrim [Mon, 24 Jan 2022 11:15:45 +0000 (11:15 +0000)]
[X86] Remove __builtin_ia32_pabs intrinsics and use generic __builtin_elementwise_abs

D111986 added the generic `__builtin_elementwise_abs()` intrinsic with the same integer absolute behaviour as the SSE/AVX instructions (abs(INT_MIN) == INT_MIN)

This patch removes the `__builtin_ia32_pabs*` intrinsics and just uses `__builtin_elementwise_abs` - the existing tests see no changes:
```
__m256i test_mm256_abs_epi8(__m256i a) {
  // CHECK-LABEL: test_mm256_abs_epi8
  // CHECK: [[ABS:%.*]] = call <32 x i8> @llvm.abs.v32i8(<32 x i8> %{{.*}}, i1 false)
  return _mm256_abs_epi8(a);
}
```
This requires us to add a `__v64qs` explicitly signed char vector type (we already have `__v16qs` and `__v32qs`).

Differential Revision: https://reviews.llvm.org/D117791

2 years ago[DAGCombiner] Adjust some checks in DAGCombiner::reduceLoadWidth
Bjorn Pettersson [Tue, 18 Jan 2022 18:50:50 +0000 (19:50 +0100)]
[DAGCombiner] Adjust some checks in DAGCombiner::reduceLoadWidth

In code review for D117104 two slightly weird checks were found
in DAGCombiner::reduceLoadWidth. They were typically checking
if BitsA was a mulitple of BitsB by looking at (BitsA & (BitsB - 1)),
but such a comparison actually only make sense if BitsB is a power
of two.

The checks were related to the code that attempted to shrink a load
based on the fact that the loaded value would be right shifted.

Afaict the legality of the value types is checked later (typically in
isLegalNarrowLdSt), so the existing checks were both overly
conservative as well as being wrong whenever ExtVTBits wasn't a
power of two. The latter was a situation triggered by a number of
lit tests so we could not just assert on ExtVTBIts being a power of
two).

When attempting to simply remove the checks I found some problems,
that seems to have been guarded by the checks (maybe just out of
luck). A typical example would be a pattern like this:

  t1 = load i96* ptr
  t2 = srl t1, 64
  t3 = truncate t2 to i64

When DAGCombine is visiting the truncate reduceLoadWidth is called
attempting to narrow the load to 64 bits (ExtVT := MVT::i64). Then
the SRL is detected and we set ShAmt to 64.

In the past we've bailed out due to i96 not being a multiple of 64.
If we simply remove that check then we would end up replacing the
load with a new load that would read 64 bits but with a base pointer
adjusted by 64 bits. So we would read 32 bits the wasn't accessed by
the original load.
This patch will instead utilize the fact that the logical left shift
can be folded away by using a zextload. Thus, the pattern above will
now be combined into

  t3 = load i32* ptr+offset, zext to i64

Another case is shown in the X86/shift-folding.ll test case:

  t1 = load i32* ptr
  t2 = srl i32 t1, 8
  t3 = truncate t2 to i16

In the past we bailed out due to the shift count (8) not being a
multiple of 16. Now the narrowing kicks in and we get

  t3 = load i16* ptr+offset

Differential Revision: https://reviews.llvm.org/D117406

2 years agoPre-commit test case for trunc+lshr+load folds
Bjorn Pettersson [Tue, 18 Jan 2022 18:48:35 +0000 (19:48 +0100)]
Pre-commit test case for trunc+lshr+load folds

This is a pre-commit of test cases relevant for D117406.

@srl_load_narrowing1 is showing a pattern that could be folded into
a more narrow load.

@srl_load_narrowing2 is showing a similar pattern that happens to
be optimized already, but that happens in two steps (first triggering
a combine based on SRL and later another combine based on TRUNCATE).

Differential Revision: https://reviews.llvm.org/D117588

2 years ago[lldb] Update release notes with non-address bit handling changes
David Spickett [Mon, 24 Jan 2022 11:16:34 +0000 (11:16 +0000)]
[lldb] Update release notes with non-address bit handling changes

This adds the "memory find" (https://reviews.llvm.org/D117299)
and "memory tag" (https://reviews.llvm.org/D117672) commands
and puts them all in one list.

2 years ago[RISCV][VP] Lower VP_MERGE to RVV instructions
Fraser Cormack [Tue, 18 Jan 2022 14:13:13 +0000 (14:13 +0000)]
[RISCV][VP] Lower VP_MERGE to RVV instructions

This patch adds lowering of the llvm.vp.merge.* intrinsic
(ISD::VP_MERGE) to RVV vmerge/vfmerge instructions. It introduces a
special pseudo form of vmerge which allows a tied merge operand,
allowing us to specify the tail elements as being equal to the "on
false" operand, using a tied-def constraint and a "tail undisturbed"
policy.

While this strategy allows us to often lower the intrinsic to just one
instruction, it may be less efficient in fixed-vector types as the
number of tail elements may extend far beyond the length of the fixed
vector. Another strategy could be to use a vmerge/vfmerge instruction
with an AVL equal to the length of the vector type, and manipulate the
condition operand such that mask elements greater than the operation's
EVL are false.

I've also observed inefficient codegen in which our 'VF' patterns don't
match raw floating-point SPLAT_VECTORs, which occur in scalable-vector
code.

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D117561

2 years ago[RISCV] Match VF variants for masked VFRDIV/VFRSUB
Fraser Cormack [Thu, 20 Jan 2022 14:46:28 +0000 (14:46 +0000)]
[RISCV] Match VF variants for masked VFRDIV/VFRSUB

This patch follows up on D117697 to help the simple binary operations
behave similarly in the presence of masks.

It also enables CGP sinking support for vp.fdiv and vp.fsub intrinsics,
now that VFRDIV and VFRSUB are consistently matched with a LHS splat for
masked and unmasked variants.

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D117783

2 years ago[X86] getVectorMaskingNode - fix indentation. NFC.
Simon Pilgrim [Mon, 24 Jan 2022 11:08:13 +0000 (11:08 +0000)]
[X86] getVectorMaskingNode - fix indentation. NFC.

clang-format

2 years ago[AMDGPU][GlobalISel] Remove the post ':' part of vreg operands in fsh combine tests.
Abinav Puthan Purayil [Mon, 24 Jan 2022 10:54:54 +0000 (16:24 +0530)]
[AMDGPU][GlobalISel] Remove the post ':' part of vreg operands in fsh combine tests.

2 years ago[flang] Update the description of `!fir.coordinate_of`
Andrzej Warzynski [Tue, 11 Jan 2022 13:16:03 +0000 (13:16 +0000)]
[flang] Update the description of `!fir.coordinate_of`

This change was suggested in one of the comments for
https://reviews.llvm.org/D115333. Basically, the following usage is
valid, but the current wording suggests otherwise:
```
%1 = fir.coordinate_of %a, %k : (!fir.ref<!fir.array<10 x 10 x i32>>, index) -> !fir.ref<!fir.array<10 x i32>>
```
A test is also added to better document this particular case.

Differential revision: https://reviews.llvm.org/D115929

2 years ago[lldb] Ignore non-address bits in "memory find" arguments
David Spickett [Thu, 13 Jan 2022 16:54:04 +0000 (16:54 +0000)]
[lldb] Ignore non-address bits in "memory find" arguments

This removes the non-address bits before we try to use
the addresses.

Meaning that when results are shown, those results won't
show non-address bits either. This follows what "memory read"
has done. On the grounds that non-address bits are a property
of a pointer, not the memory pointed to.

I've added testing and merged the find and read tests into one
file.

Note that there are no API side changes because "memory find"
does not have an equivalent API call.

Reviewed By: omjavaid

Differential Revision: https://reviews.llvm.org/D117299

2 years ago[AMDGPU][GlobalISel] Add more sign/zero/any-extension tests
Jay Foad [Fri, 21 Jan 2022 17:18:03 +0000 (17:18 +0000)]
[AMDGPU][GlobalISel] Add more sign/zero/any-extension tests

Add s1 to s16 cases, and for sgprs s1 to s64 and s32 to s64.

2 years ago[AMDGPU][GlobalISel] Regenerate checks in inst-select-*ext.mir
Jay Foad [Fri, 21 Jan 2022 17:03:03 +0000 (17:03 +0000)]
[AMDGPU][GlobalISel] Regenerate checks in inst-select-*ext.mir

2 years ago[LLD][ELF][AArch64] Update test with incorrect REQUIRES line [NFC]
Peter Smith [Fri, 21 Jan 2022 16:19:22 +0000 (16:19 +0000)]
[LLD][ELF][AArch64] Update test with incorrect REQUIRES line [NFC]

D54759 introduced aarch64-combined-dynrel.s and
aarch64-combined-dynrel-ifunc.s . Unfortunately the requires line
at the top was AArch64 instead of aarch64 which means they were never
run. Update the tests to use aarch64 and fix to match current lld output.

Differential Revision: https://reviews.llvm.org/D117896

2 years ago[AArch64][GlobalISel] Support returned argument with multiple registers
Nikita Popov [Fri, 21 Jan 2022 09:32:21 +0000 (10:32 +0100)]
[AArch64][GlobalISel] Support returned argument with multiple registers

The call lowering code assumed that a returned argument could only
consist of one register. Pass an ArrayRef<Register> instead of
Register to make sure that all parts get assigned.

Fixes https://github.com/llvm/llvm-project/issues/53315.

Differential Revision: https://reviews.llvm.org/D117866

2 years ago[SDAG] Don't move DBG_VALUE instructions after insertion point during scheduling...
Nikita Popov [Mon, 17 Jan 2022 14:48:01 +0000 (15:48 +0100)]
[SDAG] Don't move DBG_VALUE instructions after insertion point during scheduling (PR53243)

EmitSchedule() shouldn't be touching instructions after the provided
insertion point. The change introduced in D83561 performs a scan to
the end of the block, and thus may move unrelated instructions. In
particular, this ends up moving instructions that have been produced
by FastISel and will later be deleted. Moving them means that more
instructions than intended are removed.

Fix this by stopping the iteration when the insertion point is
reached.

Fixes https://github.com/llvm/llvm-project/issues/53243.

Differential Revision: https://reviews.llvm.org/D117489

2 years ago[ISEL] Canonicalise constant splats to RHS.
Sander de Smalen [Wed, 19 Jan 2022 14:40:22 +0000 (14:40 +0000)]
[ISEL] Canonicalise constant splats to RHS.

SelectionDAG::getNode() canonicalises constants to the RHS if the
operation is commutative, but it doesn't do so for constant splat
vectors. Doing this early helps making certain folds on vector types,
simplifying the code required for target DAGCombines that are enabled
before Type legalization.

Somewhat to my surprise, DAGCombine doesn't seem to traverse the
DAG in a post-order DFS, so at the time of doing some custom fold where
the input is a MUL, DAGCombiner::visitMUL hasn't yet reordered the
constant splat to the RHS.

This patch leads to a few improvements, but also a few  minor regressions,
which I traced down to D46492. When I tried reverting this change to see
if the changes were still necessary, I ran into some segfaults. Not sure
if there is some latent bug there.

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D117794

2 years ago[flang][examples] Add missing CMake dependencies
Andrzej Warzynski [Tue, 11 Jan 2022 13:16:03 +0000 (13:16 +0000)]
[flang][examples] Add missing CMake dependencies

Currently, everything that includes "flang/Parser/parse-tree.h" in Flang
depends on the `gen_acc` and `gen_omp` CMake targets (these targets
generate include files that are used in "parse-tree.h"). The examples in
Flang do use this header file and hence also depend on
`gen_acc`/`gen_omp`. This patch updates relevant CMake scripts
accordingly.

I've also taken the liberty to rename some of the example files so that
their names follow LLVM's coding guidelines.

Differential Revision: https://reviews.llvm.org/D117016

2 years ago[Attributor] Use MemoryLocation to get pointer operand and accessed type (NFCI)
Nikita Popov [Fri, 21 Jan 2022 11:01:18 +0000 (12:01 +0100)]
[Attributor] Use MemoryLocation to get pointer operand and accessed type (NFCI)

This relies on existing APIs and avoids accessing the pointer
element type. The alternative would be to extend getPointerOperand()
to also return the accessed type, but I figured going through
MemoryLocation would be cleaner.

Differential Revision: https://reviews.llvm.org/D117868

2 years ago[OpaquePtrs] Add getNonOpaquePointerElementType() method (NFC)
Nikita Popov [Fri, 21 Jan 2022 11:48:31 +0000 (12:48 +0100)]
[OpaquePtrs] Add getNonOpaquePointerElementType() method (NFC)

This method is intended for use in places that cannot be reached
with opaque pointers, or part of deprecated methods. This makes
it easier to see that some uses of getPointerElementType() don't
need further action.

Differential Revision: https://reviews.llvm.org/D117870

2 years ago[clang][tests] Fix a c++/libc++ -stdlib value typo
Timm Bäder [Fri, 21 Jan 2022 08:48:43 +0000 (09:48 +0100)]
[clang][tests] Fix a c++/libc++ -stdlib value typo

"c++" is not usually a valid value for -stdlib.

Differential Revision: https://reviews.llvm.org/D117862

2 years ago[clang][sema] Add missing diagnostic parameter
Timm Bäder [Tue, 4 Jan 2022 12:38:10 +0000 (13:38 +0100)]
[clang][sema] Add missing diagnostic parameter

The test case otherwise fails an assertion in Diagnostic::getArgKind().

Differential Revision: https://reviews.llvm.org/D116595

2 years ago[RISCV] Add patterns of SET[U]LT_VI for STECC forms
Chenbing.Zheng [Mon, 24 Jan 2022 08:48:39 +0000 (08:48 +0000)]
[RISCV] Add patterns of SET[U]LT_VI for STECC forms

This patch optmizes "li a0, 5
                     vmsgt[u].vx v10, v8, a0"
                 -> "vmsgt[u].vi v10, v8, 5"

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D118014

2 years ago[clang-format] Assert Line->First and State.NextToken->Previous. NFC.
Marek Kurdej [Mon, 24 Jan 2022 08:28:11 +0000 (09:28 +0100)]
[clang-format] Assert Line->First and State.NextToken->Previous. NFC.

Cf. scan-build reports:
* https://llvm.org/reports/scan-build/report-FormatToken.cpp-precomputeFormattingInfos-35-93e1e1.html#EndPath
* https://llvm.org/reports/scan-build/report-ContinuationIndenter.cpp-addTokenOnCurrentLine-15-dfdc6d.html#EndPath

2 years ago[MLIR][Presburger] Silence -Wdangling-else warning (NFC)
Lorenzo Chelini [Mon, 24 Jan 2022 08:07:20 +0000 (09:07 +0100)]
[MLIR][Presburger] Silence -Wdangling-else warning (NFC)

gcc suggests explicit braces to avoid ambiguous ‘else’.

2 years ago[Hexagon] Use llvm::Register instead of unsigned in HexagonConstExtenders.cpp. NFC.
Jim Lin [Mon, 24 Jan 2022 05:31:23 +0000 (13:31 +0800)]
[Hexagon] Use llvm::Register instead of unsigned in HexagonConstExtenders.cpp. NFC.

Reviewed By: kparzysz

Differential Revision: https://reviews.llvm.org/D117851

2 years ago[clang-format] Assert Line->First. NFC.
Marek Kurdej [Mon, 24 Jan 2022 07:48:14 +0000 (08:48 +0100)]
[clang-format] Assert Line->First. NFC.

Cf. scan-build reports:
* https://llvm.org/reports/scan-build/report-AffectedRangeManager.cpp-nonPPLineAffected-34-16c04b.html#EndPath
* https://llvm.org/reports/scan-build/report-SortJavaScriptImports.cpp-parseModuleReferences-34-96a7f8.html#EndPath
* https://llvm.org/reports/scan-build/report-TokenAnnotator.cpp-setCommentLineLevels-26-77bdba.html#EndPath
* https://llvm.org/reports/scan-build/report-AffectedRangeManager.cpp-nonPPLineAffected-31-714434.html#EndPath
* https://llvm.org/reports/scan-build/report-TokenAnnotator.cpp-setCommentLineLevels-16-bd39d0.html#EndPath
* https://llvm.org/reports/scan-build/report-UnwrappedLineFormatter.cpp-format-90-668b2d.html#EndPath

2 years agoAdded OpenMP 5.0 specification based semantic checks for atomic update construct
Nimish Mishra [Mon, 24 Jan 2022 04:32:58 +0000 (10:02 +0530)]
Added OpenMP 5.0 specification based semantic checks for atomic update construct

2 years ago[clang-format] Remove unused assignment. NFC.
Marek Kurdej [Mon, 24 Jan 2022 07:34:24 +0000 (08:34 +0100)]
[clang-format] Remove unused assignment. NFC.

Fixes scan-build reported warning: https://llvm.org/reports/scan-build/report-QualifierAlignmentFixer.cpp-analyzeRight-55-191910.html#EndPath.

2 years ago[PowerPC] Emit warning for ieeelongdouble on older GNU toolchain
Qiu Chaofan [Mon, 24 Jan 2022 07:23:28 +0000 (15:23 +0800)]
[PowerPC] Emit warning for ieeelongdouble on older GNU toolchain

GCC 12 should have proper support for IEEE-754 compliant 128-bit
floating point in libstdc++. So warning is needed when linking against
older libstdc++ versions or LLVM libc++.

Glibc starts supporting float128 in both header and libraries since
2.32.

Reviewed By: jsji

Differential Revision: https://reviews.llvm.org/D112906

2 years ago[RISCV] Decouple Zve* extensions and the V extension.
jacquesguan [Fri, 21 Jan 2022 06:35:20 +0000 (14:35 +0800)]
[RISCV] Decouple Zve* extensions and the V extension.

According to the spec, there are some difference between V and Zve64d. For example, the vmulh integer multiply variants that return the high word of the product (vmulh.vv, vmulh.vx, vmulhu.vv, vmulhu.vx, vmulhsu.vv, vmulhsu.vx) are not included for EEW=64 in Zve64*, but V extension does support these instructions. So we should decouple Zve* extensions and the V extension.

Differential Revision: https://reviews.llvm.org/D117854

2 years ago[Target] Use range-based for loops (NFC)
Kazu Hirata [Mon, 24 Jan 2022 06:53:15 +0000 (22:53 -0800)]
[Target] Use range-based for loops (NFC)

2 years ago[RISCV] Initially support the K-extension instructions on the LLVM MC layer
Wu Xinlong [Mon, 24 Jan 2022 04:00:09 +0000 (12:00 +0800)]
[RISCV] Initially support the K-extension instructions on the LLVM MC layer

This commit is currently implementing supports for scalar cryptography extension for LLVM according to version v1.0.0 of [K Ext specification](https://github.com/riscv/riscv-crypto/releases)(scala crypto has been ratified already). Currently, we are implementing the MC (Machine Code) layer of his extension and the majority of work is done under `llvm/lib/Target/RISCV` directory. There are also some test files in `llvm/test/MC/RISCV` directory.

Remove the subfeature of Zbk* which conflict with b extensions to reduce the size of the patch.
(Zbk* will be resubmit after this patch has been merged)

**Co-author:**@ksyx & @VincentWu & @lihongliang & @achieveartificialintelligence

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D98136

2 years ago[TSan] Mark test unsupported on Darwin
Julian Lettner [Mon, 24 Jan 2022 06:01:48 +0000 (22:01 -0800)]
[TSan] Mark test unsupported on Darwin

2 years agoRough guess at fixing lldb tests to handle Clang defaulting to DWARFv5
David Blaikie [Mon, 24 Jan 2022 05:24:05 +0000 (21:24 -0800)]
Rough guess at fixing lldb tests to handle Clang defaulting to DWARFv5

2 years ago[GlobalISel] Fold or of shifts with constant amount to funnel shift.
Abinav Puthan Purayil [Mon, 3 Jan 2022 10:15:52 +0000 (15:45 +0530)]
[GlobalISel] Fold or of shifts with constant amount to funnel shift.

This change folds (or (shl x, C0), (lshr y, C1)) to funnel shift iff C0
and C1 are constants where C0 + C1 is the bit-width of the shift
instructions.

Differential Revision: https://reviews.llvm.org/D116529

2 years agoAdd missing function implementation from DWARF default change
David Blaikie [Mon, 24 Jan 2022 05:10:16 +0000 (21:10 -0800)]
Add missing function implementation from DWARF default change

Fix for d3b26dea16108c427b19b5480c9edc76edf8f5b4

2 years agoClang: Change the default DWARF version to 5
David Blaikie [Mon, 24 Jan 2022 04:45:25 +0000 (20:45 -0800)]
Clang: Change the default DWARF version to 5

(except on platforms that already opt in to specific versions - SCE,
Android, and Darwin using DWARFv4 explicitly, for instance)

2 years ago[Analysis] Use default member initialization (NFC)
Kazu Hirata [Mon, 24 Jan 2022 04:32:56 +0000 (20:32 -0800)]
[Analysis] Use default member initialization (NFC)

Identified with modernize-use-default-member-init.

2 years ago[Vectorize] Remove unused variables (NFC)
Kazu Hirata [Mon, 24 Jan 2022 04:32:54 +0000 (20:32 -0800)]
[Vectorize] Remove unused variables (NFC)

2 years agoAdd modernize-use-default-member-init.UseAssignment to .clang-tidy
Kazu Hirata [Mon, 24 Jan 2022 04:32:52 +0000 (20:32 -0800)]
Add modernize-use-default-member-init.UseAssignment to .clang-tidy

2 years ago[NFC] [Coroutines] Rename tests in coro-align
Chuanqi Xu [Mon, 24 Jan 2022 03:03:12 +0000 (11:03 +0800)]
[NFC] [Coroutines] Rename tests in coro-align

This is required by ychen. See https://reviews.llvm.org/D117542

2 years ago[RISCV][NFC] Remove tailing whitespaces in RISCVInstrInfoVSDPatterns.td and RISCVInst...
Jim Lin [Mon, 24 Jan 2022 02:20:16 +0000 (10:20 +0800)]
[RISCV][NFC] Remove tailing whitespaces in RISCVInstrInfoVSDPatterns.td and RISCVInstrInfoVVLPatterns.td

2 years ago[C++20] [Module] fix bug 47716 and implement [module.interface]/p6
Chuanqi Xu [Mon, 24 Jan 2022 02:22:33 +0000 (10:22 +0800)]
[C++20] [Module] fix bug 47716 and implement [module.interface]/p6

This fixes bug 47716.

According to [module.interface]p2, it is meaningless to export an entity
which is not in namespace scope.
The reason why the compiler crashes is that the compiler missed
ExportDecl when the compiler traverse the subclass of DeclContext. So
here is the crash.

Also, the patch implements [module.interface]p6 in
Sema::CheckRedeclaration* functions.

Reviewed By: aaron.ballman, urnathan

Differential Revision: https://reviews.llvm.org/D112903

2 years agoDebugInfo: Include template parameters for simplified template decls in type units
David Blaikie [Mon, 24 Jan 2022 00:07:43 +0000 (16:07 -0800)]
DebugInfo: Include template parameters for simplified template decls in type units

LLVM DebugInfo CodeGen synthesizes type declarations in type units when
referencing types that are not in type units. When those synthesized
types are templates and simplified template names (or mangled simplified
template names) are in use, the template arguments must be attached to
those declarations.

A deeper fix (with a CU or DICompositeType flag) that would also support
other uses of clang's -debug-forward-template-args (such as Sony's
platform) could/should be implemented to fix this more broadly.

2 years ago[X86] Add some basic tests for PR46809
Simon Pilgrim [Sun, 23 Jan 2022 22:48:26 +0000 (22:48 +0000)]
[X86] Add some basic tests for PR46809

2 years agoDebugInfo: Don't put types in type units if they reference internal linkage types
David Blaikie [Sat, 22 Jan 2022 04:20:39 +0000 (20:20 -0800)]
DebugInfo: Don't put types in type units if they reference internal linkage types

Doing this causes a declaration of the internal linkage (anonymous
namespace) type to be emitted in the type unit, which would then be
ambiguous as to which internal linkage definition it refers to (since
the name is only valid internally).

It's possible these internal linkage types could be resolved relative to
the unit the TU is referred to from - but that doesn't seem ideal, and
there's no reason to put the type in a type unit since it can only be
defined in one CU anyway (since otherwise it'd be an ODR violation) & so
avoiding the type unit should be a smaller DWARF encoding anyway.

This also addresses an issue with Simplified Template Names where the
template parameter could not be rebuilt from the declaration emitted
into the TU (specifically for an enum non-type template parameter, where
looking up the enumerators is necessary to rebuild the full template
name)

2 years ago[Analysis] Remove a redundant const from a return type (NFC)
Kazu Hirata [Sun, 23 Jan 2022 22:00:03 +0000 (14:00 -0800)]
[Analysis] Remove a redundant const from a return type (NFC)

Identified with readability-const-return-type.

2 years ago[Sema] Fix a bugprone argument comment (NFC)
Kazu Hirata [Sun, 23 Jan 2022 22:00:01 +0000 (14:00 -0800)]
[Sema] Fix a bugprone argument comment (NFC)

Identified with bugprone-argument-comment.

2 years ago[mlir] Ensure a newline at the end of a file (NFC)
Kazu Hirata [Sun, 23 Jan 2022 21:59:59 +0000 (13:59 -0800)]
[mlir] Ensure a newline at the end of a file (NFC)

2 years ago[RISCV] Add tests that do a bitreverse before or after a bswap. NFC
Craig Topper [Sun, 23 Jan 2022 21:37:33 +0000 (13:37 -0800)]
[RISCV] Add tests that do a bitreverse before or after a bswap. NFC

We don't optimize this as well as we could. Bitreverse is always
expanded to bswap and a shift/and/or sequence to swap bits within a
byte. The newly created bswap will either becomes a shift/and/or
sequence or rev8 instruction. We don't always realize the bswap is
redundant with another bswap before or after the bitreverse.

Found while thinking about the brev8 instruction from the
Cryptography extension. It's equivalent to bswap(bitreverse(x)) or
bitreverse(bswap(x)).

2 years ago[RISCV] Add bitreverse tests to bswap-ctlz-cttz-ctpop.ll. Add Zbb command lines. NFC
Craig Topper [Sun, 23 Jan 2022 17:42:18 +0000 (09:42 -0800)]
[RISCV] Add bitreverse tests to bswap-ctlz-cttz-ctpop.ll. Add Zbb command lines. NFC

Rename to include bitreverse. Add additional tests and Zbb command lines.

There's some overlapping tests with rv32zbb.ll and rv64zbb.ll. Maybe
I'll clean that up in a future patch.

2 years ago[X86] LowerFunnelShift - always lower vXi8 fshl by constant amounts as unpack(y,x...
Simon Pilgrim [Sun, 23 Jan 2022 21:34:55 +0000 (21:34 +0000)]
[X86] LowerFunnelShift - always lower vXi8 fshl by constant amounts as unpack(y,x) << zext(z)

This can always be lowered as PMULLW+PSRLWI+PACKUSWB

2 years ago[clang] Remove unused forward declarations (NFC)
Kazu Hirata [Sun, 23 Jan 2022 21:28:06 +0000 (13:28 -0800)]
[clang] Remove unused forward declarations (NFC)

2 years ago[clang] Forward-declare DynTypedNode (NFC)
Kazu Hirata [Sun, 23 Jan 2022 21:28:04 +0000 (13:28 -0800)]
[clang] Forward-declare DynTypedNode (NFC)

This patch adds a forward declaraiton of DynTypedNode.

DumpAST.h is relying on the forward declaration of DynTypedNode in
ASTContext.h, which is undesirable.

2 years ago[clang] Move the definition of ASTDiff (NFC)
Kazu Hirata [Sun, 23 Jan 2022 21:28:02 +0000 (13:28 -0800)]
[clang] Move the definition of ASTDiff (NFC)

This patch moves the definition of ASTDiff later within the header
file.

Without this patch, the header depends on the forward decalrations of
SyntaxTree and ComparisonOptions from another header file, which is
not desirable.  Since SyntaxTree and ComparisonOptions are defined in
ASTDiff.h, we can move the definition of ASTDiff later and stop
relying on the forward declarations from another header file.

2 years ago[X86] LowerFunnelShift - use supportedVectorShiftWithBaseAmnt to check for supported...
Simon Pilgrim [Sun, 23 Jan 2022 21:13:58 +0000 (21:13 +0000)]
[X86] LowerFunnelShift - use supportedVectorShiftWithBaseAmnt to check for supported scalar shifts

Allows us to reuse the ISD shift opcode instead of a mixture of ISD/X86ISD variants

2 years ago[RISCV] Adjust the header comment in RISCVInstrInfoZb.td to better integrate Zbk...
Craig Topper [Sun, 23 Jan 2022 17:42:18 +0000 (09:42 -0800)]
[RISCV] Adjust the header comment in RISCVInstrInfoZb.td to better integrate Zbk* extensions.

The Zbk* extensions have some overlap with Zb so have been placed in this file.

Reviewed By: VincentWu

Differential Revision: https://reviews.llvm.org/D117958

2 years ago[MLIR][Presburger] Clean PresburgerSet identifier interface to match IntegerPolyhedro...
Groverkss [Sun, 23 Jan 2022 19:38:54 +0000 (01:08 +0530)]
[MLIR][Presburger] Clean PresburgerSet identifier interface to match IntegerPolyhedron's interface

This patch changes names of identifiers and their corresponding getters in
PresburgerSet to match those of IntegerPolyhedron.

Reviewed By: arjunp

Differential Revision: https://reviews.llvm.org/D117998

2 years ago[Object] Remove a redundant return statement (NFC)
Kazu Hirata [Sun, 23 Jan 2022 19:07:16 +0000 (11:07 -0800)]
[Object] Remove a redundant return statement (NFC)

Identified with readability-redundant-control-flow.

2 years ago[Commands] Remove redundant member initialization (NFC)
Kazu Hirata [Sun, 23 Jan 2022 19:07:14 +0000 (11:07 -0800)]
[Commands] Remove redundant member initialization (NFC)

Identified with readability-redundant-member-init.

2 years ago[llvm] Fix header guards (NFC)
Kazu Hirata [Sun, 23 Jan 2022 19:07:12 +0000 (11:07 -0800)]
[llvm] Fix header guards (NFC)

Identified with llvm-header-guard.

2 years ago[NewGVN][NFC] precommit tests for PR53277
Nuno Lopes [Sun, 23 Jan 2022 19:06:21 +0000 (19:06 +0000)]
[NewGVN][NFC] precommit tests for PR53277

2 years ago[Support] Simplify parallelForEach{,N}
Fangrui Song [Sun, 23 Jan 2022 18:35:44 +0000 (10:35 -0800)]
[Support] Simplify parallelForEach{,N}

* Merge parallel_for_each into parallelForEach (this removes 1 `Fn(...)` call)
* Change parallelForEach to use parallelForEachN
* Move parallelForEachN into Parallel.cpp

My x86-64 `lld` executable is 100KiB smaller.
No noticeable difference in performance.

Reviewed By: lattner

Differential Revision: https://reviews.llvm.org/D117510

2 years ago[libcxx][test] Make MSVC `<charconv>` test compile when testing MSVC
Casey Carter [Thu, 30 Dec 2021 00:02:00 +0000 (16:02 -0800)]
[libcxx][test] Make MSVC `<charconv>` test compile when testing MSVC

<meme>How many layers of irony are you on?</meme>

Differential Revision: https://reviews.llvm.org/D117967

2 years ago[InstCombine] Add test coverage for PR48683
Simon Pilgrim [Sun, 23 Jan 2022 18:03:12 +0000 (18:03 +0000)]
[InstCombine] Add test coverage for PR48683

D108992 added self-multiply handling to KnownBits::mul but we don't use it yet..

2 years ago[RISCV] Merge some rvv intrinsic test cases that only differ by XLen type.
Craig Topper [Sun, 23 Jan 2022 07:05:19 +0000 (23:05 -0800)]
[RISCV] Merge some rvv intrinsic test cases that only differ by XLen type.

Instead of having a test for i32 XLen and i64 XLen, use sed to
replace iXLen with i32/i64 before running llc.

This change covers all of the floating point tests.

2 years ago[DAG] Fold (X & Y) != 0 --> zextOrTrunc(X & Y) iff everything but LSB is known zero...
Simon Pilgrim [Sun, 23 Jan 2022 16:36:18 +0000 (16:36 +0000)]
[DAG] Fold (X & Y) != 0 --> zextOrTrunc(X & Y) iff everything but LSB is known zero (PR51312)

Fixes parity codegen issue where we know all but the lowest bit is zero, we can replace the ICMPNE with 0 comparison with a ext/trunc

Differential Revision: https://reviews.llvm.org/D117983

2 years ago[gn build] Port d2e8fb331835
LLVM GN Syncbot [Sun, 23 Jan 2022 16:30:34 +0000 (16:30 +0000)]
[gn build] Port d2e8fb331835

2 years agoRevert rG7c66aaddb128dc0f342830c1efaeb7a278bfc48c "[DAG] Fold (X & Y) != 0 --> zextOr...
Simon Pilgrim [Sun, 23 Jan 2022 16:28:38 +0000 (16:28 +0000)]
Revert rG7c66aaddb128dc0f342830c1efaeb7a278bfc48c "[DAG] Fold (X & Y) != 0 --> zextOrTrunc(X & Y) iff everything but LSB is known zero (PR51312)"

Noticed a typo in the getBooleanContents call just after I pressed commit :(

2 years ago[clang-tidy] Add readability-duplicate-include check
Richard [Sun, 2 Jan 2022 05:47:22 +0000 (22:47 -0700)]
[clang-tidy] Add readability-duplicate-include check

Looks for duplicate includes and removes them.

Every time an include directive is processed, check a vector of filenames
to see if the included file has already been included.  If so, it issues
a warning and a replacement to remove the entire line containing the
duplicated include directive.

When a macro is defined or undefined, the vector of filenames is cleared.
This enables including the same file multiple times, but getting
different expansions based on the set of active macros at the time of
inclusion.  For example:

  #undef NDEBUG
  #include "assertion.h"
  // ...code with assertions enabled

  #define NDEBUG
  #include "assertion.h"
  // ...code with assertions disabled

Since macros are redefined between the inclusion of assertion.h,
they are not flagged as redundant.

Differential Revision: https://reviews.llvm.org/D7982

2 years ago[IR] document and update ctlz/cttz intrinsics to optionally return poison rather...
Sanjay Patel [Sun, 23 Jan 2022 16:11:26 +0000 (11:11 -0500)]
[IR] document and update ctlz/cttz intrinsics to optionally return poison rather than undef

The behavior in Analysis (knownbits) implements poison semantics already,
and we expect the transforms (for example, in instcombine) derived from
those semantics, so this patch changes the LangRef and remaining code to
be consistent. This is one more step in removing "undef" from LLVM.

Without this, I think https://github.com/llvm/llvm-project/issues/53330
has a legitimate complaint because that report wants to allow subsequent
code to mask off bits, and that is allowed with undef values. The clang
builtins are not actually documented anywhere AFAICT, but we might want
to add that to remove more uncertainty.

Differential Revision: https://reviews.llvm.org/D117912

2 years ago[DAG] Fold (X & Y) != 0 --> zextOrTrunc(X & Y) iff everything but LSB is known zero...
Simon Pilgrim [Sun, 23 Jan 2022 16:20:34 +0000 (16:20 +0000)]
[DAG] Fold (X & Y) != 0 --> zextOrTrunc(X & Y) iff everything but LSB is known zero (PR51312)

Fixes parity codegen issue where we know all but the lowest bit is zero, we can replace the ICMPNE with 0 comparison with a ext/trunc

Differential Revision: https://reviews.llvm.org/D117983