platform/upstream/llvm.git
4 years agoAMDGPU: Stop setting attributes based on TargetOptions
Matt Arsenault [Thu, 5 Dec 2019 09:45:32 +0000 (15:15 +0530)]
AMDGPU: Stop setting attributes based on TargetOptions

Having arbitrary passes looking at the TargetOptions is pretty
messy. This was also disregarding if a function already had an
explicit attribute setting on it. opt/llc now add the attributes to
functions that don't specify the attribute. clang and lld do not call
the function to do this, which they maybe should.

This was also treating unsafe-fp-math as implying the others, and
setting the other attributes based on it. This is not done anywhere
else, and I'm not sure is correct based on the current description of
the option bit.

Effectively reverts 1d8cf2be89087a2babc1dc38b16040fad0a555e2

4 years agoRevert "[Dexter] Add support for Windows to regression test suite."
Davide Italiano [Fri, 27 Mar 2020 20:12:00 +0000 (13:12 -0700)]
Revert "[Dexter] Add support for Windows to regression test suite."

This reverts commit 89025da9f676aebff7daf055824d6fd102a70c34 as
it breaks the lldb macOS bot.

4 years agoFix denormal-fp-math flag and attribute interaction
Matt Arsenault [Wed, 11 Mar 2020 21:12:20 +0000 (17:12 -0400)]
Fix denormal-fp-math flag and attribute interaction

Make these behave the same way unsafe-fp-math and co. The command line
flag should add the attribute to functions that do not already have
it, and leave existing attributes. The attribute is the actual
implementation, but the flag is useful in some testing situations.

AMDGPU has a variety of tests with denormals enabled/disabled that
would require a painful level of test duplication without a flag. This
doesn't expose setting the separate input/output modes, or add a flag
for the f32 version yet.

Tests will be included in future patch.

4 years ago[COFF] Don't treat DWARF sections as GC roots
Reid Kleckner [Fri, 27 Mar 2020 16:09:06 +0000 (09:09 -0700)]
[COFF] Don't treat DWARF sections as GC roots

DWARF sections are typically live and not COMDAT, so they would be
treated as GC roots. Enabling DWARF would essentially keep all code with
debug info alive, preventing any section GC.

Fixes PR45273

Reviewed By: mstorsjo, MaskRay

Differential Revision: https://reviews.llvm.org/D76935

4 years ago[lldb/PlatformMacOSX] Re-implement GetDeveloperDirectory
Jonas Devlieghere [Fri, 27 Mar 2020 19:31:49 +0000 (12:31 -0700)]
[lldb/PlatformMacOSX] Re-implement GetDeveloperDirectory

GetDeveloperDirectory returns a const char* which is NULL when we cannot
find the developer directory. This crashes in
PlatformDarwinKernel::CollectKextAndKernelDirectories because we're
unconditionally assigning it to a std::string. Coincidentally I just
refactored a bunch of code in PlatformMacOSX so instead of a ad-hoc fix
I've reimplemented the method based on GetXcodeContentsDirectory.

The change is mostly NFC. Obviously it fixes the crash, but it also
removes support for finding the Xcode directory through he legacy
$XCODE_SELECT_PREFIX_DIR/usr/share/xcode-select/xcode_dir_path.

Differential revision: https://reviews.llvm.org/D76938

4 years ago[MC][AArch64] Make .reloc support arbitrary relocation types
Fangrui Song [Wed, 25 Mar 2020 03:06:31 +0000 (20:06 -0700)]
[MC][AArch64] Make .reloc support arbitrary relocation types

Depends on D76746. Generalizes D61973.

Differential Revision: https://reviews.llvm.org/D76754

4 years ago[MC][ARM] Make .reloc support arbitrary relocation types
Fangrui Song [Wed, 25 Mar 2020 01:31:39 +0000 (18:31 -0700)]
[MC][ARM] Make .reloc support arbitrary relocation types

Generalizes D61992. In GNU as, the .reloc directive supports arbitrary relocation types.

A MCFixupKind value `V` larger than or equal to FirstLiteralRelocationKind
is used to represent the relocation type whose number is V-FirstLiteralRelocationKind.

This is useful for linker tests. Without the feature the assembler
cannot produce certain relocation records (e.g.  R_ARM_ALU_PC_G0/R_ARM_LDR_PC_G0)
This helps move forward D75349 and D76575.

Differential Revision: https://reviews.llvm.org/D76746

4 years agoFix a Diag call not to assume option spelling
Paul Robinson [Fri, 27 Mar 2020 18:51:37 +0000 (11:51 -0700)]
Fix a Diag call not to assume option spelling

4 years ago[lit] Avoid global imports in module declaration
Julian Lettner [Fri, 27 Mar 2020 17:46:32 +0000 (10:46 -0700)]
[lit] Avoid global imports in module declaration

A previous attempt to cleanup module imports broke installing via
pip/setup.py [1].  This should be fixed now.

[1] cf252240e8819d0c90a5e10f773078bdeba33e44

Reviewed By: paquette

Differential Revision: https://reviews.llvm.org/D76940

4 years ago[ELF][test] Split basic.s
Fangrui Song [Fri, 27 Mar 2020 18:35:02 +0000 (11:35 -0700)]
[ELF][test] Split basic.s

4 years ago[AST] Fix typo on NoInitExpr dependence computation
Sam McCall [Fri, 27 Mar 2020 17:53:23 +0000 (18:53 +0100)]
[AST] Fix typo on NoInitExpr dependence computation

4 years ago[LLDB] Fix handling of bit-fields when there is a base class when parsing DWARF
shafik [Fri, 27 Mar 2020 18:00:24 +0000 (11:00 -0700)]
[LLDB] Fix handling of bit-fields when there is a base class when parsing DWARF

When parsing DWARF and laying out bit-fields we currently don't take into account whether we have a base class or not.
Currently if the first field is a bit-field but the bit offset is due a field we inherit from a base class we currently
treat it as an unnamed bit-field and therefore add an extra field.

This fix will not check if we have a base class and assume that this offset is due to members we are inheriting from the base.
We are currently seeing asserts during codegen when debugging clang::DiagnosticOptions.

This assumption will fail in the case where the first field in the derived class in an unnamed bit-field. Fixing the first field
being an unnamed bit-field looks like it will require a larger change since we will need a way to track or discover the last field offset of the bases(s).

Differential Revision: https://reviews.llvm.org/D76808

4 years agoOnly add `darwin_log_cmd` lit shell test feature when the log can be queried.
Dan Liew [Fri, 27 Mar 2020 01:17:53 +0000 (18:17 -0700)]
Only add `darwin_log_cmd` lit shell test feature when the log can be queried.

Summary:
Follow up fix to 445b810fbd4. The `log show` command only works for
privileged users so run a quick test of the command during lit config to
see if the command works and only add the `darwin_log_cmd` feature if
this is the case.

Unfortunately this means the `asan/TestCases/Darwin/duplicate_os_log_reports.cpp`
test and any other tests in the future that use this feature won't run
for unprivileged users which is likely the case in CI.

rdar://problem/55986279

Reviewers: kubamracek, yln, dcoughlin

Subscribers: Charusso, #sanitizers, llvm-commits

Tags: #sanitizers

Differential Revision: https://reviews.llvm.org/D76899

4 years ago[Dexter] Add support for Windows to regression test suite.
Tom Weaver [Fri, 27 Mar 2020 18:15:17 +0000 (18:15 +0000)]
[Dexter] Add support for Windows to regression test suite.

This patch addresses the issue of the regression suite not running on windows hardware. It changes the following things:

add new dexter regression suite command to lit.cfg.py that makes use of the clang-cl_vs2015 and dbgend builder and debuggers.
sprinkle the new regression suite command through the feature and tool tests that require them.
mark certain problem tests on windows

There's a couple of tests that fail (or pass) in unexpected ways on Windows.

Problem tests are both the penalty and perfect expect_watch_type.cpp tests. Type information reporting parity is not possible a this time in dexter due to the nature of how different debuggers report type information back to their users.

reviewers: Orlando

Differential Revision: https://reviews.llvm.org/D76609

4 years ago[ORC] Introduce JITSymbolFlags::HasMaterializeSideEffectsOnly flag.
Lang Hames [Wed, 25 Mar 2020 20:07:00 +0000 (13:07 -0700)]
[ORC] Introduce JITSymbolFlags::HasMaterializeSideEffectsOnly flag.

This flag can be used to mark a symbol as existing only for the purpose of
enabling materialization. Such a symbol can be looked up to trigger
materialization with the lookup returning only once materialization is
complete. Symbols with this flag will never resolve however (to avoid
permanently polluting the symbol table), and should only be looked up using
the SymbolLookupFlags::WeaklyReferencedSymbol flag. The primary use case for
this flag is initialization symbols.

4 years ago[ORC] Don't create MaterializingInfo entries unnecessarily.
Lang Hames [Thu, 26 Mar 2020 20:06:13 +0000 (13:06 -0700)]
[ORC] Don't create MaterializingInfo entries unnecessarily.

4 years ago[OPENMP50]Add basic support for inscan reduction modifier.
Alexey Bataev [Fri, 27 Mar 2020 15:27:04 +0000 (11:27 -0400)]
[OPENMP50]Add basic support for inscan reduction modifier.

Added basic support (parsing/sema checks) for the inscan modifier in the
reduction clauses.

4 years ago[X86] Don't form masked instructions if the operation has an additional user.
Craig Topper [Fri, 27 Mar 2020 17:18:13 +0000 (10:18 -0700)]
[X86] Don't form masked instructions if the operation has an additional user.

This will cause the operation to be repeated in both a mask and another masked
or unmasked form. This can a wasted of execution resources.

Differential Revision: https://reviews.llvm.org/D60940

4 years ago[AST][SVE] Treat built-in SVE types as trivial
Richard Sandiford [Tue, 3 Mar 2020 11:27:57 +0000 (11:27 +0000)]
[AST][SVE] Treat built-in SVE types as trivial

Built-in SVE types are trivial, since they're trivially copyable
and support default construction.

Differential Revision: https://reviews.llvm.org/D76692

4 years ago[AST][SVE] Treat built-in SVE types as trivially copyable
Richard Sandiford [Thu, 5 Mar 2020 20:12:27 +0000 (20:12 +0000)]
[AST][SVE] Treat built-in SVE types as trivially copyable

SVE types are trivially copyable: they can be copied simply
by reproducing the byte representation of the source object.

Differential Revision: https://reviews.llvm.org/D76691

4 years ago[X86][SSE] Add some additional v8i16 'truncation' style shuffle tests
Simon Pilgrim [Fri, 27 Mar 2020 17:29:15 +0000 (17:29 +0000)]
[X86][SSE] Add some additional v8i16 'truncation' style shuffle tests

4 years agoExport Segment.IsGapRegion to JSON
Dennis Felsing [Fri, 27 Mar 2020 16:43:25 +0000 (17:43 +0100)]
Export Segment.IsGapRegion to JSON

Summary:
So that external tools can make use of that information and not display such lines as uncovered.

Fixes https://bugs.llvm.org/show_bug.cgi?id=45300

Reviewers: vsk

Reviewed By: vsk

Differential Revision: https://reviews.llvm.org/D76763

4 years ago[AST][SVE] Treat built-in SVE types as POD
Richard Sandiford [Tue, 3 Mar 2020 11:25:38 +0000 (11:25 +0000)]
[AST][SVE] Treat built-in SVE types as POD

Built-in SVE types are POD in much the same that scalars and
fixed-length vectors are.

Differential Revision: https://reviews.llvm.org/D76690

4 years ago[X86] Remove orphan LowerSTRICT_FSETCC declaration. NFCI.
Simon Pilgrim [Fri, 27 Mar 2020 17:02:58 +0000 (17:02 +0000)]
[X86] Remove orphan LowerSTRICT_FSETCC declaration. NFCI.

LowerSETCC handles strict cases as well, we don't have a separate function.

4 years agoRevert "[cuda][hip] Add CUDA builtin surface/texture reference support."
Artem Belevich [Fri, 27 Mar 2020 17:01:38 +0000 (10:01 -0700)]
Revert "[cuda][hip] Add CUDA builtin surface/texture reference support."

This reverts commit 6a9ad5f3f4ac66f0cae592e911f4baeb6ee5eca6.
The patch breaks CUDA copmilation.

Differential Revision: https://reviews.llvm.org/D76365

4 years ago[mlir] On Windows, silence warning on functions definition
Alexandre Ganea [Fri, 27 Mar 2020 16:24:00 +0000 (12:24 -0400)]
[mlir] On Windows, silence warning on functions definition

This fixes a number of warnings, where a function is re-defined after it is tagged as "being imported":

D:\llvm-project\mlir\lib\ExecutionEngine\CRunnerUtils.cpp(24,17): warning: 'print_i32' redeclared without 'dllimport' attribute: 'dllexport' attribute added [-Winconsistent-dllimport]
extern "C" void print_i32(int32_t i) { fprintf(stdout, "%" PRId32, i); }
                ^
D:\llvm-project\mlir\include\mlir/ExecutionEngine/CRunnerUtils.h(168,42): note: previous declaration is here
extern "C" MLIR_CRUNNERUTILS_EXPORT void print_i32(int32_t i);
                                         ^

Differential Revision: https://reviews.llvm.org/D76654

4 years ago[gn build] Port d60d7d69de9
LLVM GN Syncbot [Fri, 27 Mar 2020 16:07:06 +0000 (16:07 +0000)]
[gn build] Port d60d7d69de9

4 years ago[llvm-objdump][XCOFF][AIX] Implement -r option
jasonliu [Fri, 27 Mar 2020 16:02:27 +0000 (16:02 +0000)]
[llvm-objdump][XCOFF][AIX] Implement -r option

Summary:
Implement several XCOFF hooks to get '-r' option working for llvm-objdump -r.

Reviewer: DiggerLin, hubert.reinterpretcast, jhenderson, MaskRay

Differential Revision: https://reviews.llvm.org/D75131

4 years ago[ARM,CDE] Improve CDE intrinsics testing
Mikhail Maltsev [Fri, 27 Mar 2020 16:05:18 +0000 (16:05 +0000)]
[ARM,CDE] Improve CDE intrinsics testing

Summary:
This patch:
* adds tests for vreinterpret intinsics in big-endian mode
* adds C++ runs to the CDE+MVE header compatibility test

Reviewers: simon_tatham, MarkMurrayARM, ostannard, dmgreen

Reviewed By: simon_tatham

Subscribers: kristof.beyls, cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D76927

4 years ago[Alignment][NFC] MachineMemOperand::getAlign/getBaseAlign
Guillaume Chatelet [Fri, 27 Mar 2020 13:51:59 +0000 (13:51 +0000)]
[Alignment][NFC] MachineMemOperand::getAlign/getBaseAlign

Summary:
This is patch is part of a series to introduce an Alignment type.
See this thread for context: http://lists.llvm.org/pipermail/llvm-dev/2019-July/133851.html
See this patch for the introduction of the type: https://reviews.llvm.org/D64790

Reviewers: courbet

Subscribers: arsenm, dschuff, sdardis, nemanjai, jvesely, nhaehnle, sbc100, jgravelle-google, hiraditya, aheejin, kbarton, jrtc27, atanasyan, jfb, kerbowa, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D76925

4 years ago[lldb-vscode] fix breakpoint result ordering
Walter Erquinigo [Thu, 26 Mar 2020 22:33:12 +0000 (15:33 -0700)]
[lldb-vscode] fix breakpoint result ordering

Summary:
The DAP specifies the following for the SetBreakpoints request:

  The breakpoints returned are in the same order as the elements of the 'breakpoints' arguments

This was not followed, as lldb-vscode was returning the breakpoints in a different order, because they were first stored into a map, and then traversed. Of course, maps normally don't preserve ordering.

See this log I captured:

  -->
  {"command":"setBreakpoints",
   "arguments":{
     "source":{
       "name":"main.cpp",
       "path":"/Users/wallace/fbsource/xplat/sand/test-projects/buck-cpp/main.cpp"
     },
     "lines":[6,10,11],
     "breakpoints":[{"line":6},{"line":10},{"line":11}],
     "sourceModified":false
   },
   "type":"request",
   "seq":3
  }

  <--
  {"body":{
     "breakpoints":[
       {"id":1, "line":11,"source":{"name":"main.cpp","path":"xplat/sand/test-projects/buck-cpp/main.cpp"},"verified":true},
       {"id":2,"line":6,"source":{"name":"main.cpp","path":"xplat/sand/test-projects/buck-cpp/main.cpp"},"verified":true},
       {"id":3,"line":10,"source":{"name":"main.cpp","path":"xplat/sand/test-projects/buck-cpp/main.cpp"},"verified":true}]},
     "command":"setBreakpoints",
     "request_seq":3,
     "seq":0,
     "success":true,
     "type":"response"
  }

As you can see, the order was not respected. This was causing the IDE not to be able to disable/enable breakpoints by clicking on them in the breakpoint view in the lower corner of the Debug tab.

This diff fixes the ordering problem. The traversal + querying was done very fast in O(nlogn) time. I'm keeping the same complexity.

I also updated a couple of tests to account for the ordering.

Reviewers: clayborg, aadsm, kusmour, labath

Subscribers: lldb-commits

Tags: #lldb

Differential Revision: https://reviews.llvm.org/D76891

4 years ago[libc++] Use braces around %file_dependencies substitution
Louis Dionne [Fri, 27 Mar 2020 15:33:00 +0000 (11:33 -0400)]
[libc++] Use braces around %file_dependencies substitution

This one was left out from a previous commit.

4 years ago[ARM][LowOverheadLoops] DoubleWidthResult instructions canGenerateZeros
Sam Parker [Fri, 27 Mar 2020 13:58:50 +0000 (13:58 +0000)]
[ARM][LowOverheadLoops] DoubleWidthResult instructions canGenerateZeros

Given that some instructions generate wider result elements than
their inputs, flag them as being able to generate non zeros in the
false lanes.

Differential Revision: https://reviews.llvm.org/D76766

4 years agoRevert "[OPENMP50]Add basic support for inscan reduction modifier."
Alexey Bataev [Fri, 27 Mar 2020 15:16:44 +0000 (11:16 -0400)]
Revert "[OPENMP50]Add basic support for inscan reduction modifier."

This reverts commit 36ed0ceec7d3b0bff9de462d4f4f544d4b5285e4 to fix a
crash in scan_messages.cpp test.

4 years agoFix build after 09158252f777c2e2f06a86b154c44abcbcf9bb74
Alexandre Ganea [Fri, 27 Mar 2020 15:22:51 +0000 (11:22 -0400)]
Fix build after 09158252f777c2e2f06a86b154c44abcbcf9bb74

4 years ago[libc++] NFC: Simplify substitutions by using lit recursive substitutions
Louis Dionne [Fri, 27 Mar 2020 13:50:31 +0000 (09:50 -0400)]
[libc++] NFC: Simplify substitutions by using lit recursive substitutions

Since lit supports expanding substitutions recursively, we can define
substitutions in terms of other substitutions. This allows us to simplify
how libc++ substitutions are defined.

This doesn't change the substitutions at all, it only makes them simpler
to define.

4 years ago[InstCombine][X86] Add repeated ops demanded elts tests for SSE intrinsics (PR24523)
Simon Pilgrim [Fri, 27 Mar 2020 14:41:29 +0000 (14:41 +0000)]
[InstCombine][X86] Add repeated ops demanded elts tests for SSE intrinsics (PR24523)

4 years ago[InstCombine][X86] Regenerate SSE2 tests
Simon Pilgrim [Fri, 27 Mar 2020 14:29:43 +0000 (14:29 +0000)]
[InstCombine][X86] Regenerate SSE2 tests

4 years ago[OPENMP50]Add basic support for inscan reduction modifier.
Alexey Bataev [Thu, 26 Mar 2020 19:58:02 +0000 (15:58 -0400)]
[OPENMP50]Add basic support for inscan reduction modifier.

Added basic support (parsing/sema checks) for the inscan modifier in the
reduction clauses.

4 years ago[libc++/libc++abi] Properly delimit lit substitutions
Louis Dionne [Fri, 27 Mar 2020 14:04:13 +0000 (10:04 -0400)]
[libc++/libc++abi] Properly delimit lit substitutions

lit is not very clever when it performs substitution on RUN lines. It
simply looks for a match anywhere in the line (without tokenization)
and replaces it by the expansion. This means that a RUN line containing
e.g. `-verify-ignore-unexpected=note` wouod be expanded to
`-verify-ignore-unexpected=<substitution for not>e`, which is
surprising and nonsensical.

It also means that something like `%compile_module` could be expanded
to `<substitution-for-%compile>_module` or to the correct substitution,
depending on the order in which substitutions are evaluated by lit.

To avoid such problems, it is a good habit to delimit custom substitutions
with some token. This commit does that for all substitutions used in the
libc++ and libc++abi test suites.

4 years agoSimplify implementation of Type::isXXXType(); NFC
Yannic Bonenberger [Fri, 27 Mar 2020 14:24:10 +0000 (10:24 -0400)]
Simplify implementation of Type::isXXXType(); NFC

4 years ago[ThinLTO] Allow usage of all hardware threads in the system
Alexandre Ganea [Fri, 27 Mar 2020 14:20:39 +0000 (10:20 -0400)]
[ThinLTO] Allow usage of all hardware threads in the system

Before this patch, it wasn't possible to extend the ThinLTO threads to all SMT/CMT threads in the system. Only one thread per core was allowed, instructed by usage of llvm::heavyweight_hardware_concurrency() in the ThinLTO code. Any number passed to the LLD flag /opt:lldltojobs=..., or any other ThinLTO-specific flag, was previously interpreted in the context of llvm::heavyweight_hardware_concurrency(), which means SMT disabled.

One can now say in LLD:
/opt:lldltojobs=0 -- Use one std::thread / hardware core in the system (no SMT). Default value if flag not specified.
/opt:lldltojobs=N -- Limit usage to N threads, regardless of usage of heavyweight_hardware_concurrency().
/opt:lldltojobs=all -- Use all hardware threads in the system. Equivalent to /opt:lldltojobs=$(nproc) on Linux and /opt:lldltojobs=%NUMBER_OF_PROCESSORS% on Windows. When an affinity mask is set for the process, threads will be created only for the cores selected by the mask.

When N > number-of-hardware-threads-in-the-system, the threads in the thread pool will be dispatched equally on all CPU sockets (tested only on Windows).
When N <= number-of-hardware-threads-on-a-CPU-socket, the threads will remain on the CPU socket where the process started (only on Windows).

Differential Revision: https://reviews.llvm.org/D75153

4 years ago[libc++] Remove unused lit substitutions
Louis Dionne [Fri, 27 Mar 2020 14:07:58 +0000 (10:07 -0400)]
[libc++] Remove unused lit substitutions

4 years ago[mlir] Extended Dominance analysis with a function to find the nearest common dominat...
Marcel Koester [Tue, 3 Mar 2020 09:33:16 +0000 (10:33 +0100)]
[mlir] Extended Dominance analysis with a function to find the nearest common dominator of two given blocks.

The Dominance analysis currently misses a utility function to find the nearest common dominator of two given blocks. This is required for a huge variety of different control-flow analyses and transformations. This commit adds this function and moves the getNode function from DominanceInfo to DominanceInfoBase, as it also works for post dominators.

Differential Revision: https://reviews.llvm.org/D75507

4 years ago[ARM][MVE] Add DoubleWidthResult flag
Sam Parker [Fri, 27 Mar 2020 13:38:54 +0000 (13:38 +0000)]
[ARM][MVE] Add DoubleWidthResult flag

Add a flag for those instructions which read from the top/bottom
halves of their inputs and produce a vector of results with double
width elements.

Differential Revision: https://reviews.llvm.org/D76762

4 years ago[analyzer][NFC] Change LangOptions to CheckerManager in the shouldRegister* functions
Kirstóf Umann [Fri, 27 Mar 2020 13:29:31 +0000 (14:29 +0100)]
[analyzer][NFC] Change LangOptions to CheckerManager in the shouldRegister* functions

Some checkers may not only depend on language options but also analyzer options.
To make this possible this patch changes the parameter of the shouldRegister*
function to CheckerManager to be able to query the analyzer options when
deciding whether the checker should be registered.

Differential Revision: https://reviews.llvm.org/D75271

4 years ago[lit] NFC: Move the flaky test logic to _runShTest
Louis Dionne [Thu, 26 Mar 2020 15:04:24 +0000 (11:04 -0400)]
[lit] NFC: Move the flaky test logic to _runShTest

This minor refactoring allows reducing the amount of processing that
is duplicated when we re-run a flaky test. It also has the nice
side effect that libc++'s current test format supports flaky .sh.cpp
tests, because those are built on top of _runShTest, not executeShTest.

4 years ago[lit] Recursively expand substitutions
Louis Dionne [Sat, 14 Mar 2020 16:09:52 +0000 (12:09 -0400)]
[lit] Recursively expand substitutions

This allows defining substitutions in terms of other substitutions. For
example, a %build substitution could be defined in terms of a %cxx
substitution as '%cxx %s -o %t.exe' and the script would be properly
expanded.

Differential Revision: https://reviews.llvm.org/D76178

4 years ago[LV] Refactor widenIntOrFpInduction. NFC.
Sjoerd Meijer [Fri, 27 Mar 2020 12:52:03 +0000 (12:52 +0000)]
[LV] Refactor widenIntOrFpInduction. NFC.

This untangles the logic in widenIntOrFpInduction in order to make more
explicit and visible how exactly the induction variable is lowered.

Differential Revision: https://reviews.llvm.org/D76686

4 years ago[Alignment] Fix overaligning bug
Guillaume Chatelet [Fri, 27 Mar 2020 10:09:22 +0000 (10:09 +0000)]
[Alignment] Fix overaligning bug

Summary:
This was discovered while converting to Align type.

See this thread for context: http://lists.llvm.org/pipermail/llvm-dev/2019-July/133851.html
See this patch for the introduction of the type: https://reviews.llvm.org/D64790

Reviewers: courbet

Subscribers: hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D76914

4 years ago[analyzer][MallocChecker] Fix that kfree only takes a single argument
Kirstóf Umann [Fri, 27 Mar 2020 11:35:08 +0000 (12:35 +0100)]
[analyzer][MallocChecker] Fix that kfree only takes a single argument

Exactly what it says on the tin!

https://www.kernel.org/doc/htmldocs/kernel-api/API-kfree.html

Differential Revision: https://reviews.llvm.org/D76917

4 years agoRevert rGa3c715e9788d829031989b0a5ea4eb43c7288be9 "Twine - fix uninitialized variable...
Simon Pilgrim [Fri, 27 Mar 2020 10:49:36 +0000 (10:49 +0000)]
Revert rGa3c715e9788d829031989b0a5ea4eb43c7288be9 "Twine - fix uninitialized variable warnings. NFCI."

@dblaikie noticed that this may interfere with msan analysis

4 years agoRevert rG6ff1ea3244c543ad24fc99c7f4979db2f2078593 "Fix "use of uninitialized variable...
Simon Pilgrim [Fri, 27 Mar 2020 10:45:47 +0000 (10:45 +0000)]
Revert rG6ff1ea3244c543ad24fc99c7f4979db2f2078593 "Fix "use of uninitialized variable" static analyzer warning. NFCI."

@dblaikie noticed that this may interfere with msan analysis

4 years ago[MLIR][LLVM] Make index type bitwidth configurable.
Stephan Herhut [Thu, 26 Mar 2020 11:12:06 +0000 (12:12 +0100)]
[MLIR][LLVM] Make index type bitwidth configurable.

This change adds a new option to the StandardToLLVM lowering to configure
the bitwidth of the index type independently of the target architecture's
pointer size.

Differential revision: https://reviews.llvm.org/D76353

4 years ago[SystemZ] Fix typos in comments.
Jonas Paulsson [Fri, 27 Mar 2020 11:31:48 +0000 (12:31 +0100)]
[SystemZ]  Fix typos in comments.

4 years ago[ARM] Fix MVE VCMPr f16 pattern
David Green [Fri, 27 Mar 2020 07:24:15 +0000 (07:24 +0000)]
[ARM] Fix MVE VCMPr f16 pattern

This patterns seemed to be using the f32 instruction, not f16. Fix it to
use the correct one.

Differential Revision: https://reviews.llvm.org/D76841

4 years ago[mlir][vulkan-runner] Add support for 2D memref.
Denis Khalikov [Tue, 24 Mar 2020 12:13:59 +0000 (15:13 +0300)]
[mlir][vulkan-runner] Add support for 2D memref.

Summary:
This patch adds support for 2D memref in mlir-vulkan-runner.

Differential Revision: https://reviews.llvm.org/D76737

4 years ago[llvm-readobj] - Fix a crash when DT_STRTAB is broken.
Georgii Rymar [Tue, 24 Mar 2020 14:26:52 +0000 (17:26 +0300)]
[llvm-readobj] - Fix a crash when DT_STRTAB is broken.

We might have a crash scenario when we have an invalid DT_STRTAB value
that is larger than the file size. I've added a test case to demonstrate.

Differential revision: https://reviews.llvm.org/D76706

4 years ago[mlir] StandardToLLVM: use template aliases instead of dummy classes
Alex Zinenko [Fri, 27 Mar 2020 10:14:44 +0000 (11:14 +0100)]
[mlir] StandardToLLVM: use template aliases instead of dummy classes

Multiple operation conversions from the Standard dialect to the LLVM dialect
are trivial one-to-one conversions that use only the pattern defined in base
utility classes such as OneToOneConvertToLLVMPattern and
VectorConvertToLLVMPattern. Use template aliases ("using" declarations) instead
of creating derived classes without new functionality.

4 years agoclang-format: Fix pointer alignment for overloaded operators (PR45107)
Hans Wennborg [Wed, 25 Mar 2020 16:20:06 +0000 (17:20 +0100)]
clang-format: Fix pointer alignment for overloaded operators (PR45107)

This fixes a regression from D69573 which broke the following example:

  $ echo 'operator C<T>*();' | bin/clang-format --style=Chromium
  operator C<T> *();

(There should be no space before the asterisk.)

It seems the problem is in TokenAnnotator::spaceRequiredBetween(),
which only looked at the token to the left of the * to see if it was a
type or not. That code only handled simple types or identifiers, not
templates or qualified types. This patch addresses that.

Differential revision: https://reviews.llvm.org/D76850

4 years agoFix TBAA for unsigned fixed-point types
Mikael Holmen [Fri, 27 Mar 2020 09:12:11 +0000 (10:12 +0100)]
Fix TBAA for unsigned fixed-point types

Summary:
Unsigned types can alias the corresponding signed types. I don't see
that this is explicitly mentioned in the Embedded-C specification, but
I think it should work the same as for the integer types.

Patch by: materi

Reviewers: ebevhan, leonardchan

Reviewed By: leonardchan

Subscribers: kosarev, cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D76856

4 years ago[Alignment][NFC] Update MachineMemOperand implementation to use MaybeAlign
Guillaume Chatelet [Thu, 26 Mar 2020 15:58:11 +0000 (15:58 +0000)]
[Alignment][NFC] Update MachineMemOperand implementation to use MaybeAlign

Summary:
This is patch is part of a series to introduce an Alignment type.
See this thread for context: http://lists.llvm.org/pipermail/llvm-dev/2019-July/133851.html
See this patch for the introduction of the type: https://reviews.llvm.org/D64790

Reviewers: courbet

Reviewed By: courbet

Subscribers: hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D76625

4 years ago[MCInstPrinter] Add parameter `Address` to printCustomAliasOperand. NFC
Fangrui Song [Fri, 27 Mar 2020 07:17:56 +0000 (00:17 -0700)]
[MCInstPrinter] Add parameter `Address` to printCustomAliasOperand. NFC

Follow-up of D72172 and llvmorg-11-init-6896-gb3cc5dcef0f.

4 years ago[OpenMP] `omp begin/end declare variant` - part 2, sema ("+CG")
Johannes Doerfert [Tue, 25 Feb 2020 22:04:06 +0000 (14:04 -0800)]
[OpenMP] `omp begin/end declare variant` - part 2, sema ("+CG")

This is the second part loosely extracted from D71179 and cleaned up.

This patch provides semantic analysis support for `omp begin/end declare
variant`, mostly as defined in OpenMP technical report 8 (TR8) [0].
The sema handling makes code generation obsolete as we generate "the
right" calls that can just be handled as usual. This handling also
applies to the existing, albeit problematic, `omp declare variant
support`. As a consequence a lot of unneeded code generation and
complexity is removed.

A major purpose of this patch is to provide proper `math.h`/`cmath`
support for OpenMP target offloading. See PR42061, PR42798, PR42799. The
current code was developed with this feature in mind, see [1].

The logic is as follows:

If we have seen a `#pragma omp begin declare variant match(<SELECTOR>)`
but not the corresponding `end declare variant`, and we find a function
definition we will:
  1) Create a function declaration for the definition we were about to generate.
  2) Create a function definition but with a mangled name (according to
     `<SELECTOR>`).
  3) Annotate the declaration with the `OMPDeclareVariantAttr`, the same
     one used already for `omp declare variant`, using and the mangled
     function definition as specialization for the context defined by
     `<SELECTOR>`.

When a call is created we inspect it. If the target has an
`OMPDeclareVariantAttr` attribute we try to specialize the call. To this
end, all variants are checked, the best applicable one is picked and a
new call to the specialization is created. The new call is used instead
of the original one to the base function. To keep the AST printing and
tooling possible we utilize the PseudoObjectExpr. The original call is
the syntactic expression, the specialized call is the semantic
expression.

[0] https://www.openmp.org/wp-content/uploads/openmp-TR8.pdf
[1] https://reviews.llvm.org/D61399#change-496lQkg0mhRN

Reviewers: kiranchandramohan, ABataev, RaviNarayanaswamy, gtbercea, grokos, sdmitriev, JonChesterfield, hfinkel, fghanim, aaron.ballman

Subscribers: bollu, guansong, openmp-commits, cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D75779

4 years ago[OpenMP] `omp begin/end declare variant` - part 1, parsing
Johannes Doerfert [Fri, 21 Feb 2020 01:50:47 +0000 (19:50 -0600)]
[OpenMP] `omp begin/end declare variant` - part 1, parsing

This is the first part extracted from D71179 and cleaned up.

This patch provides parsing support for `omp begin/end declare variant`,
as defined in OpenMP technical report 8 (TR8) [0].

A major purpose of this patch is to provide proper math.h/cmath support
for OpenMP target offloading. See PR42061, PR42798, PR42799. The current
code was developed with this feature in mind, see [1].

[0] https://www.openmp.org/wp-content/uploads/openmp-TR8.pdf
[1] https://reviews.llvm.org/D61399#change-496lQkg0mhRN

Reviewed By: aaron.ballman

Differential Revision: https://reviews.llvm.org/D74941

4 years ago[OpenMP][NFC] Open `llvm` and `llvm::omp` namespace in OpenMPClause.cpp
Johannes Doerfert [Thu, 26 Mar 2020 00:33:48 +0000 (19:33 -0500)]
[OpenMP][NFC] Open `llvm` and `llvm::omp` namespace in OpenMPClause.cpp

4 years ago[OpenMP][NFC] Outline common functionality (skipUntilPragmaOpenMPEnd)
Johannes Doerfert [Fri, 21 Feb 2020 19:48:56 +0000 (13:48 -0600)]
[OpenMP][NFC] Outline common functionality (skipUntilPragmaOpenMPEnd)

The same code was repeated multiple times, we put it in a function now.

4 years ago[MCInstPrinter] Add parameter `Address` to MCInstPrinter::printAliasInstr. NFC
Fangrui Song [Fri, 27 Mar 2020 06:55:43 +0000 (23:55 -0700)]
[MCInstPrinter] Add parameter `Address` to MCInstPrinter::printAliasInstr. NFC

Follow-up of D72172.

4 years ago[X86][MC] Fix the bug for prefix padding support
Shengchen Kan [Tue, 17 Mar 2020 14:35:46 +0000 (22:35 +0800)]
[X86][MC] Fix the bug for prefix padding support

Summary:
There is a tiny logic error of D75300, making branch is not
correctly aligned with option -x86-pad-max-prefix-size

Reviewers: reames, MaskRay, craig.topper, LuoYuanke, jyknight

Reviewed By: reames

Subscribers: hiraditya, llvm-commits, annita.zhang

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D76285

4 years ago[PowerPC] Fix test for PR45297 to adapt build without asserts. NFC.
Kai Luo [Fri, 27 Mar 2020 05:28:34 +0000 (05:28 +0000)]
[PowerPC] Fix test for PR45297 to adapt build without asserts. NFC.

4 years ago[PowerPC] Enhance test for PR45297. NFC.
Kai Luo [Fri, 27 Mar 2020 03:30:33 +0000 (03:30 +0000)]
[PowerPC] Enhance test for PR45297. NFC.

4 years ago[MLIR][NFC] drop some unnecessary includes
Uday Bondhugula [Thu, 26 Mar 2020 16:18:53 +0000 (21:48 +0530)]
[MLIR][NFC] drop some unnecessary includes

 Drop unnecessary includes

Differential Revision: https://reviews.llvm.org/D76898

4 years ago[DAGCombine] Add basic optimizations for FREEZE in SelDag
Juneyoung Lee [Tue, 24 Mar 2020 14:57:40 +0000 (23:57 +0900)]
[DAGCombine] Add basic optimizations for FREEZE in SelDag

Summary: This patch is the first effort to adding basic optimizations for FREEZE in SelDag.

Reviewers: spatel, lebedev.ri

Reviewed By: spatel

Subscribers: xbolva00, hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D76707

4 years agoUse llvm_unreachable after a fully covered/always-returning switch
David Blaikie [Fri, 27 Mar 2020 03:09:14 +0000 (20:09 -0700)]
Use llvm_unreachable after a fully covered/always-returning switch

4 years agoMake llvm::function_ref's operator bool explicit
David Blaikie [Thu, 26 Mar 2020 20:47:34 +0000 (13:47 -0700)]
Make llvm::function_ref's operator bool explicit

This can avoid all sorts of mistakes with implicit conversion
(indirectly) to int, etc. I'm quite surprise there aren't any things to
fixup with this - but I guess most uses of function_ref aren't
optional/nullable.

4 years agoFix typo, targetFeature should be lowercase.
Zakk Chen [Tue, 24 Mar 2020 16:42:22 +0000 (09:42 -0700)]
Fix typo, targetFeature should be lowercase.

this fixing also enable llc -mattr=+cpuhelp

Reviewers: ziangwan, kongyi

Reviewed By: kongyi

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D76757

4 years ago[NFC] Clang format for the ELF header and ARM build attributes.
Kai Wang [Thu, 26 Mar 2020 01:39:46 +0000 (09:39 +0800)]
[NFC] Clang format for the ELF header and ARM build attributes.

Differential Revision: https://reviews.llvm.org/D76819

4 years agoMove setBugReportMsg() out from under a conditional
Leonard Chan [Thu, 26 Mar 2020 23:39:03 +0000 (16:39 -0700)]
Move setBugReportMsg() out from under a conditional

Fixes a build break with LLVM_ENABLE_BACKTRACES=OFF.

Differential Revision: https://reviews.llvm.org/D76893

4 years ago[llvm][TextAPI/MachO] silence clang-tidy warnings, NFC
Cyndy Ishida [Thu, 26 Mar 2020 23:29:21 +0000 (16:29 -0700)]
[llvm][TextAPI/MachO] silence clang-tidy warnings, NFC

* applies only to tests

4 years ago[WebAssembly] Support wasm exports with zero-length names.
Dan Gohman [Sat, 21 Dec 2019 05:44:24 +0000 (21:44 -0800)]
[WebAssembly] Support wasm exports with zero-length names.

Zero-length strings are valid export names in WebAssembly, so allow
users to specify them.

Differential Revision: https://reviews.llvm.org/D71793

4 years ago[WebAssembly] Fix the order of destructors in the LowerGlobalDtors pass.
Dan Gohman [Sun, 24 Nov 2019 15:27:54 +0000 (07:27 -0800)]
[WebAssembly] Fix the order of destructors in the LowerGlobalDtors pass.

Fix the LowerGlobalDtors pass to run destructors in the same order as the
regular LLVM destructor lowering -- in reverse order. Adjacent
destructors with the same associated object are grouped, but destructors
are not reordered based on associated objects.

Differential Revision: https://reviews.llvm.org/D70685

4 years agoMake PS4 use -fno-use-init-array only as the ABI does not support .init_array.
Douglas Yung [Thu, 26 Mar 2020 22:45:40 +0000 (15:45 -0700)]
Make PS4 use -fno-use-init-array only as the ABI does not support .init_array.

Reviewed by Paul Robinson

4 years ago[Hexagon] Add support for Linux/Musl ABI (part 2)
Sid Manning [Tue, 3 Mar 2020 14:19:59 +0000 (08:19 -0600)]
[Hexagon] Add support for Linux/Musl ABI (part 2)

A continuation of https://reviews.llvm.org/D72701.  This
adds support needed in clang.

Differential Revision: https://reviews.llvm.org/D75638

4 years ago[AMDGPU] Propagate amdgpu-waves-per-eu to callees
Stanislav Mekhanoshin [Wed, 25 Mar 2020 19:57:44 +0000 (12:57 -0700)]
[AMDGPU] Propagate amdgpu-waves-per-eu to callees

Differential Revision: https://reviews.llvm.org/D76868

4 years ago[OPENMP50]Fix the checks for the nesting of scan directives.
Alexey Bataev [Thu, 26 Mar 2020 21:12:45 +0000 (17:12 -0400)]
[OPENMP50]Fix the checks for the nesting of scan directives.

Fixed the check for the orhaned scan directives and improved checks for
parallel for and parallel for simd directives.

4 years ago[lld][Wasm] Wasm-ld emits invalid .debug_ranges entries for non-live symbols
Paolo Severini [Thu, 26 Mar 2020 21:26:31 +0000 (14:26 -0700)]
[lld][Wasm] Wasm-ld emits invalid .debug_ranges entries for non-live symbols

When the debug info contains a relocation against a dead symbol, wasm-ld
may emit spurious range-list terminator entries (entries with Start==0
and End==0). This change fixes this by emitting the WasmRelocation
Addend as End value for a non-live symbol.

Reviewed by: sbc100, dblaikie

Differential Revision: https://reviews.llvm.org/D74781

4 years ago[gn build] Port 9f7d4150b9e
LLVM GN Syncbot [Thu, 26 Mar 2020 21:10:45 +0000 (21:10 +0000)]
[gn build] Port 9f7d4150b9e

4 years ago[X86] Move combineLoopMAddPattern and combineLoopSADPattern to an IR pass before...
Craig Topper [Thu, 26 Mar 2020 18:09:08 +0000 (11:09 -0700)]
[X86] Move combineLoopMAddPattern and combineLoopSADPattern to an IR pass before SelecitonDAG.

These transforms rely on a vector reduction flag on the SDNode
set by SelectionDAGBuilder. This flag exists because SelectionDAG
can't see across basic blocks so SelectionDAGBuilder is looking
across and saving the info. X86 is the only target that uses this
flag currently. By removing the X86 code we can remove the flag
and the SelectionDAGBuilder code.

This pass adds a dedicated IR pass for X86 that looks across the
blocks and transforms the IR into a form that the X86 SelectionDAG
can finish.

An advantage of this new approach is that we can enhance it to
shrink the phi nodes and final reduction tree based on the zeroes
that we need to concatenate to bring the partially reduced
reduction back up to the original width.

Differential Revision: https://reviews.llvm.org/D76649

4 years ago[clang] Allow -DDEFAULT_SYSROOT to be a relative path
Sam Clegg [Thu, 19 Mar 2020 22:20:49 +0000 (15:20 -0700)]
[clang] Allow -DDEFAULT_SYSROOT to be a relative path

In this case we interpret the path as relative the clang driver binary.

This allows SDKs to be built that include clang along with a custom
sysroot without requiring users to specify --sysroot to point to the
directory where they installed the SDK.

See https://github.com/WebAssembly/wasi-sdk/issues/58

Differential Revision: https://reviews.llvm.org/D76653

4 years ago[X86] Prefer PACKUS(AND(),AND()) to SHUFFLE(PSHUFB(),PSHUFB()) on all targets
Simon Pilgrim [Thu, 26 Mar 2020 20:46:11 +0000 (20:46 +0000)]
[X86] Prefer PACKUS(AND(),AND()) to SHUFFLE(PSHUFB(),PSHUFB()) on all targets

Extends rG9d1721ce3926 to support AVX2+ targets.

4 years ago[AMDGPU] Rename overloaded getMaxWavesPerEU to getWavesPerEUForWorkGroup
Jay Foad [Thu, 26 Mar 2020 14:58:31 +0000 (14:58 +0000)]
[AMDGPU] Rename overloaded getMaxWavesPerEU to getWavesPerEUForWorkGroup

Summary: I think Max in the name was misleading. NFC.

Reviewers: arsenm, rampitec

Subscribers: kzhuravl, jvesely, wdng, nhaehnle, yaxunl, dstuttard, tpr, t-tye, hiraditya, kerbowa, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D76860

4 years ago[AMDGPU] Remove getMaxWavesPerCU in favour of getWavesPerWorkGroup.
Jay Foad [Thu, 26 Mar 2020 13:44:07 +0000 (13:44 +0000)]
[AMDGPU] Remove getMaxWavesPerCU in favour of getWavesPerWorkGroup.

Summary:
These methods were identical. I chose to remove getMaxWavesPerCU because
I think Max in the name was misleading. NFC.

Reviewers: arsenm, rampitec

Subscribers: kzhuravl, jvesely, wdng, nhaehnle, yaxunl, dstuttard, tpr, t-tye, hiraditya, kerbowa, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D76859

4 years ago[WEbAssembly] Clear frame base vreg in explicit-locals when stack pointer is dead
Derek Schuff [Wed, 25 Mar 2020 17:35:12 +0000 (10:35 -0700)]
[WEbAssembly] Clear frame base vreg in explicit-locals when stack pointer is dead

Having an alloca in a function causes the stack pointer to be generated in the
prolog, but if it's unused other than for debug info, explicit-locals will drop
it and not allocate a local. In this case we need to reset the FrameBaseVreg.

Differential Revision: https://reviews.llvm.org/D76784

4 years ago[X86] lowerV16I8Shuffle - create v8i16 mask for PACKUS(AND(),AND()) patterns.
Simon Pilgrim [Thu, 26 Mar 2020 19:59:37 +0000 (19:59 +0000)]
[X86] lowerV16I8Shuffle - create v8i16 mask for PACKUS(AND(),AND()) patterns.

We can improve computeKnownBits results by avoiding excess bitcasts.

For this pattern we were doing:

  (v16i8 PACKUS(v8i16 BITCAST(v16i8 AND(V1, MASK)), v8i16 BITCAST(v16i8 AND(V2, MASK))))

By performing the MASK/AND with a v8i16 type and bitcasting V1/V2 directly we can help computeKnownBits see that the mask is clearing the upper bits and allows shuffle combining to peek through later on.

This will be necessary to extend rG9d1721ce3926 to AVX2+ targets in a future patch.

4 years agoRevert "[OPENMP50]Add basic support for inscan reduction modifier."
Alexey Bataev [Thu, 26 Mar 2020 19:47:50 +0000 (15:47 -0400)]
Revert "[OPENMP50]Add basic support for inscan reduction modifier."

This reverts commit 8099e0fe82ce78c15bc6c4cf52caca5b6fbe28f5 to fix the
problems with the Windows-based buildbots.

4 years ago[sanitizer][RISCV] Implement SignalContext::GetWriteFlag for RISC-V
Luís Marques [Thu, 26 Mar 2020 19:54:29 +0000 (19:54 +0000)]
[sanitizer][RISCV] Implement SignalContext::GetWriteFlag for RISC-V

This patch follows the approach also used for MIPS, where we decode the
offending instruction to determine if the fault was caused by a read or
write operation, as that seems to be the only relevant information we have
in the signal context structure to determine that.

Differential Revision: https://reviews.llvm.org/D75168

4 years ago[AIX] discard the label in the csect of function description and use qualname for...
diggerlin [Thu, 26 Mar 2020 19:46:52 +0000 (15:46 -0400)]
[AIX] discard the label in the csect of function description and use qualname for linkage

SUMMARY:

SUMMARY
for a source file  "test.c"

void foo() {};

llc will generate assembly code as (assembly patch)
     .globl  foo
     .globl  .foo
     .csect foo[DS]
foo:

        .long   .foo
        .long   TOC[TC0]
        .long   0

   and symbol table as (xcoff object file)
   [4]     m   0x00000004     .data     1  unamex                    foo
   [5]     a4  0x0000000c       0    0     SD       DS    0    0
   [6]     m   0x00000004     .data     1  extern                    foo
   [7]     a4  0x00000004       0    0     LD       DS    0    0

   After first patch, the assembly will be as

        .globl  foo[DS]                 # -- Begin function foo
        .globl  .foo
        .align  2
        .csect foo[DS]
        .long   .foo
        .long   TOC[TC0]
        .long   0

    and symbol table will as
   [6]     m   0x00000004     .data     1  extern                    foo
   [7]     a4  0x00000004       0    0     DS      DS    0    0
Change the code for the assembly path and xcoff objectfile patch for llc.

Reviewers: Jason Liu
Subscribers: wuzish, nemanjai, hiraditya

Differential Revision: https://reviews.llvm.org/D76162

4 years ago[libomptarget] Add missing elf_end call in elf_common.c
Jon Chesterfield [Thu, 26 Mar 2020 19:07:31 +0000 (19:07 +0000)]
[libomptarget] Add missing elf_end call in elf_common.c

Summary:
[libomptarget] Add missing elf_end call in elf_common.c
Noticed when reviewing D76843.

Reviewers: simoll, jdoerfert, efocht, AndreyChurbanov, grokos, manorom

Reviewed By: grokos

Subscribers: openmp-commits

Tags: #openmp

Differential Revision: https://reviews.llvm.org/D76874

4 years ago[OPENMP50]Add basic support for inscan reduction modifier.
Alexey Bataev [Wed, 25 Mar 2020 21:14:07 +0000 (17:14 -0400)]
[OPENMP50]Add basic support for inscan reduction modifier.

Added basic support (parsing/sema checks) for the inscan modifier in the
reduction clauses.

4 years ago[cuda][hip] Add CUDA builtin surface/texture reference support.
Michael Liao [Sat, 7 Mar 2020 06:49:58 +0000 (01:49 -0500)]
[cuda][hip] Add CUDA builtin surface/texture reference support.

Summary:
- Even though the bindless surface/texture interfaces are promoted,
  there are still code using surface/texture references. For example,
  [PR#26400](https://bugs.llvm.org/show_bug.cgi?id=26400) reports the
  compilation issue for code using `tex2D` with texture references. For
  better compatibility, this patch proposes the support of
  surface/texture references.
- Due to the absent documentation and magic headers, it's believed that
  `nvcc` does use builtins for texture support. From the limited NVVM
  documentation[^nvvm] and NVPTX backend texture/surface related
  tests[^test], it's believed that surface/texture references are
  supported by replacing their reference types, which are annotated with
  `device_builtin_surface_type`/`device_builtin_texture_type`, with the
  corresponding handle-like object types, `cudaSurfaceObject_t` or
  `cudaTextureObject_t`, in the device-side compilation. On the host
  side, that global handle variables are registered and will be
  established and updated later when corresponding binding/unbinding
  APIs are called[^bind]. Surface/texture references are most like
  device global variables but represented in different types on the host
  and device sides.
- In this patch, the following changes are proposed to support that
  behavior:
  + Refine `device_builtin_surface_type` and
    `device_builtin_texture_type` attributes to be applied on `Type`
    decl only to check whether a variable is of the surface/texture
    reference type.
  + Add hooks in code generation to replace that reference types with
    the correponding object types as well as all accesses to them. In
    particular, `nvvm.texsurf.handle.internal` should be used to load
    object handles from global reference variables[^texsurf] as well as
    metadata annotations.
  + Generate host-side registration with proper template argument
    parsing.

---
[^nvvm]: https://docs.nvidia.com/cuda/pdf/NVVM_IR_Specification.pdf
[^test]: https://raw.githubusercontent.com/llvm/llvm-project/master/llvm/test/CodeGen/NVPTX/tex-read-cuda.ll
[^bind]: See section 3.2.11.1.2 ``Texture reference API` in [CUDA C Programming Guide](https://docs.nvidia.com/cuda/pdf/CUDA_C_Programming_Guide.pdf).
[^texsurf]: According to NVVM IR, `nvvm.texsurf.handle` should be used.  But, the current backend doesn't have that supported. We may revise that later.

Reviewers: tra, rjmccall, yaxunl, a.sidorin

Subscribers: cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D76365