Lokesh Vutla [Thu, 27 Apr 2017 10:13:59 +0000 (15:43 +0530)]
configs: am335x: Enable TI_COMMON_CMD_OPTIONS
Enable TI_COMMON_CMD_OPTIONS on all am335x platforms.
Also sync with savedefconfig.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
[trini: Re-sync, add in boneblack*, evm_hs_{norboot,spiboot,usbspl} configs]
Signed-off-by: Tom Rini <trini@konsulko.com>
Lokesh Vutla [Thu, 27 Apr 2017 10:13:58 +0000 (15:43 +0530)]
board: ti: Define Kconfig symbol for common cmd options
Instead of defining command options in every defconfig,
define a common Kconfig symbol that consolidates all command
options that are supported by any TI platform. Also use imply
keyword so that that specific option can be disabled if
not required.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Nisal Menuka [Wed, 26 Apr 2017 21:18:01 +0000 (16:18 -0500)]
Add ARM errata workaround 852421 and 852423 for Cortex-A17
ARM errata 852421 and 852423 applies to r1p0, r1p1 and r1p2
revisions of Cortex-A17 processors. These workarounds
exist in Linux kernel and I thought it would be better
to add them in to U-Boot.
Signed-off-by: Nisal Menuka <nisalmenuka23@gmail.com>
maxims@google.com [Mon, 17 Apr 2017 19:00:34 +0000 (12:00 -0700)]
aspeed: Cleanup ast2500-u-boot.dtsi Device Tree
Remove unnecessary apb and ahb nodes and just override necessary
nodes/values.
Signed-off-by: Maxim Sloyko <maxims@google.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
maxims@google.com [Mon, 17 Apr 2017 19:00:33 +0000 (12:00 -0700)]
aspeed: Refactor SCU to use consistent mask & shift
Refactor SCU header to use consistent Mask & Shift values.
Now, consistently, to read value from SCU register, mask needs
to be applied before shift.
Signed-off-by: Maxim Sloyko <maxims@google.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
maxims@google.com [Mon, 17 Apr 2017 19:00:32 +0000 (12:00 -0700)]
aspeed: Add support for Clocks needed by MACs
Add support for clocks needed by MACs to ast2500 clock driver.
The clocks are D2-PLL, which is used by both MACs and PCLK_MAC1 and
PCLK_MAC2 for MAC1 and MAC2 respectively.
The rate of D2-PLL is hardcoded to 250MHz -- the value used in Aspeed
SDK. It is not entirely clear from the datasheet how this clock is used
by MACs, so not clear if the rate would ever need to be different. So,
for now, hardcoding it is probably safer.
The rate of PCLK_MAC{1,2} is chosen based on MAC speed selected through
hardware strapping.
So, the network driver would only need to enable these clocks, no need
to configure the rate.
Signed-off-by: Maxim Sloyko <maxims@google.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
maxims@google.com [Mon, 17 Apr 2017 19:00:31 +0000 (12:00 -0700)]
aspeed: Enable I2C in EVB defconfig
Enable I2C driver in ast2500 Eval Board defconfig.
Also enable i2c command.
Signed-off-by: Maxim Sloyko <maxims@google.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
maxims@google.com [Mon, 17 Apr 2017 19:00:30 +0000 (12:00 -0700)]
aspeed: Add I2C Driver
Add Device Model based I2C driver for ast2500/ast2400 SoCs.
The driver is very limited, it only supports master mode and
synchronous byte-by-byte reads/writes, no DMA or Pool Buffers.
Signed-off-by: Maxim Sloyko <maxims@google.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Heiko Schocher <hs@denx.de>
maxims@google.com [Mon, 17 Apr 2017 19:00:29 +0000 (12:00 -0700)]
aspeed: Add P-Bus clock in ast2500 clock driver
Add P-Bus Clock support to ast2500 clock driver.
This is the clock used by I2C devices.
Signed-off-by: Maxim Sloyko <maxims@google.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
maxims@google.com [Mon, 17 Apr 2017 19:00:28 +0000 (12:00 -0700)]
aspeed: Enable Pinctrl Driver in AST2500 EVB
Enable Pinctrl Driver in AST2500 Eval Board's defconfig
Signed-off-by: Maxim Sloyko <maxims@google.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
maxims@google.com [Mon, 17 Apr 2017 19:00:27 +0000 (12:00 -0700)]
aspeed: AST2500 Pinctrl Driver
This driver uses Generic Pinctrl framework and is compatible with
the Linux driver for ast2500: it uses the same device tree
configuration.
Not all pins are supported by the driver at the moment, so it actually
compatible with ast2400. In general, however, there are differences that
in the future would be easier to maintain separately.
Signed-off-by: Maxim Sloyko <maxims@google.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
maxims@google.com [Mon, 17 Apr 2017 19:00:26 +0000 (12:00 -0700)]
aspeed: Refactor AST2500 RAM Driver and Sysreset Driver
This change switches all existing users of ast2500 Watchdog to Driver
Model based Watchdog driver.
To perform system reset Sysreset Driver uses first Watchdog device found
via uclass_first_device call. Since the system is going to be reset
anyway it does not make much difference which watchdog is used.
Instead of using Watchdog to reset itself, SDRAM driver now uses Reset
driver to do that.
These were the only users of the old Watchdog API, so that API is
removed.
This all is done in one change to avoid having to maintain dual API for
watchdog in between.
Signed-off-by: Maxim Sloyko <maxims@google.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
maxims@google.com [Mon, 17 Apr 2017 19:00:25 +0000 (12:00 -0700)]
aspeed: Device Tree configuration for Reset Driver
Add Reset Driver configuration to ast2500 SoC Device Tree and bindings
for various reset signals
Signed-off-by: Maxim Sloyko <maxims@google.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
maxims@google.com [Mon, 17 Apr 2017 19:00:24 +0000 (12:00 -0700)]
aspeed: Reset Driver
Add Reset Driver for ast2500 SoC. This driver uses Watchdog Timer to
perform resets and thus depends on it. The actual Watchdog device used
needs to be configured in Device Tree using "aspeed,wdt" property, which
must be WDT phandle, for example:
rst: reset-controller {
compatible = "aspeed,ast2500-reset";
aspeed,wdt = <&wdt1>;
}
Signed-off-by: Maxim Sloyko <maxims@google.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
maxims@google.com [Mon, 17 Apr 2017 19:00:23 +0000 (12:00 -0700)]
aspeed: Make SCU lock/unlock functions part of SCU API
Make functions for locking and unlocking SCU part of SCU API.
Many drivers need to modify settings in SCU and thus need to unlock it
first. This change makes it possible.
Signed-off-by: Maxim Sloyko <maxims@google.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
maxims@google.com [Mon, 17 Apr 2017 19:00:22 +0000 (12:00 -0700)]
aspeed: Watchdog Timer Driver
This driver supports ast2500 and ast2400 SoCs.
Only ast2500 supports reset_mask and thus the option of resettting
individual peripherals using WDT.
Signed-off-by: Maxim Sloyko <maxims@google.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
maxims@google.com [Mon, 17 Apr 2017 19:00:21 +0000 (12:00 -0700)]
dm: Simple Watchdog uclass
This is a simple uclass for Watchdog Timers. It has four operations:
start, restart, reset, stop. Drivers must implement start, restart and
stop operations, while implementing reset is optional: It's default
implementation expires watchdog timer in one clock tick.
Signed-off-by: Maxim Sloyko <maxims@google.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
maxims@google.com [Mon, 17 Apr 2017 19:00:20 +0000 (12:00 -0700)]
aspeed: Update ast2500 Device Tree
Pull in the Device Tree for ast2500 from the mainline Linux kernel.
The file is copied from
https://raw.githubusercontent.com/torvalds/linux/
34ea5c9d/arch/arm/boot/dts/aspeed-g5.dtsi
Signed-off-by: Maxim Sloyko <maxims@google.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Vikas Manocha [Wed, 12 Apr 2017 21:16:36 +0000 (14:16 -0700)]
ARM: DT: STM32F746: add u-boot, dm-pre-reloc property to sub nodes
This patch is required for correct SPL device tree creation by fdtgrep
as fdtgrep looks for u-boot,dm-pre-reloc property of the node to include
it in the spl device tree.
Not adding it in these subnodes ignores the pin muxing of peripherals
which is almost always in the subnodes.
Signed-off-by: Vikas Manocha <vikas.manocha@st.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Chris Packham [Tue, 2 May 2017 09:30:49 +0000 (21:30 +1200)]
README: remove CONFIG_CMD_DATE
CONFIG_CMD_DATE was recently moved to Kconfig. Remove the now duplicate
description of the option.
Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Chris Packham [Tue, 2 May 2017 09:30:48 +0000 (21:30 +1200)]
tools: moveconfig: cleanup README entires
The Kconfig description replaces the description in the README file so
as options are migrated they can be removed from the README.
Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Chris Packham [Tue, 2 May 2017 09:30:47 +0000 (21:30 +1200)]
tools: moveconfig: cleanup whitelist entries
After moving to KConfig and removing from all headers options should be
removed from config_whitelist.txt so the build starts complaining if
someone adds them back.
Acked-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Chris Packham [Tue, 2 May 2017 09:30:46 +0000 (21:30 +1200)]
tools: moveconfig: extract helper function for user confirmation
Avoid repetitive code dealing with asking the user for confirmation.
Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Chris Packham [Sat, 29 Apr 2017 03:20:29 +0000 (15:20 +1200)]
rtc: Add DM support to ds1307
Add an implementation of the ds1307 driver that uses the driver model
i2c APIs.
Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Pau Pajuelo [Sat, 1 Apr 2017 15:19:43 +0000 (17:19 +0200)]
igep003x: Add netboot support
netboot allows to boot an external image using TFTP and NFS protocols
Signed-off-by: Pau Pajuelo <ppajuelo@iseebcn.com>
Signed-off-by: Ladislav Michl <ladis@linux-mips.org>
Tested-by: Pau Pajuelo <ppajuel@gmail.com>
Pau Pajuelo [Sat, 1 Apr 2017 15:18:40 +0000 (17:18 +0200)]
igep003x: Add support for IGEP SMARC AM335x
The IGEP SMARC AM335x is an industrial processor module with
following highlights:
o AM3352 TI processor (Up to AM3359)
o Cortex-A8 ARM CPU
o SMARC form factor module
o Up to 512 MB DDR3 SDRAM / 512 MB FLASH
o WiFi a/b/g/n and Bluetooth v4.0 on-board
o Ethernet 10/100/1000 Mbps and 10/100 Mbps controller on-board
o JTAG debug connector available
o Designed for industrial range purposes
Signed-off-by: Pau Pajuelo <ppajuelo@iseebcn.com>
Signed-off-by: Ladislav Michl <ladis@linux-mips.org>
Tested-by: Pau Pajuelo <ppajuel@gmail.com>
Ladislav Michl [Sat, 1 Apr 2017 15:17:57 +0000 (17:17 +0200)]
igep003x: UBIize
Convert IGEP board to use UBI volumes for U-Boot, its environment and
kernel. With exception of first four sectors read by SoC BootROM whole
NAND is UBI managed.
Signed-off-by: Ladislav Michl <ladis@linux-mips.org>
Reviewed-by: Heiko Schocher<hs@denx.de>
Tested-by: Pau Pajuelo <ppajuel@gmail.com>
Ladislav Michl [Sat, 1 Apr 2017 15:17:16 +0000 (17:17 +0200)]
igep0033: Rename to igep003x
Rename igep0033 to igep003x as IGEP SMARC AM335x module (igep0034)
can use the same source files.
Signed-off-by: Ladislav Michl <ladis@linux-mips.org>
Tested-by: Pau Pajuelo <ppajuel@gmail.com>
Ladislav Michl [Sun, 16 Apr 2017 13:31:59 +0000 (15:31 +0200)]
mtd: nand: Consolidate nand spl loaders implementation
nand_spl_load_image implementation was copied over into three
different drivers and now with nand_spl_read_block used for
ubispl situation gets even worse. For now use least intrusive
solution and #include the same implementation to nand drivers.
Signed-off-by: Ladislav Michl <ladis@linux-mips.org>
Tested-by: Pau Pajuelo <ppajuel@gmail.com>
Ladislav Michl [Sat, 1 Apr 2017 15:15:04 +0000 (17:15 +0200)]
ARM: am33xx: define BOOT_DEVICE_ONENAND
am33xx does not support OneNAND, but we need this define anyway
to let UBI SPL code compile.
Signed-off-by: Ladislav Michl <ladis@linux-mips.org>
Tested-by: Pau Pajuelo <ppajuel@gmail.com>
Ladislav Michl [Sat, 1 Apr 2017 15:14:28 +0000 (17:14 +0200)]
ARM: am33xx: fix typo in spl.h
Signed-off-by: Ladislav Michl <ladis@linux-mips.org>
Tested-by: Pau Pajuelo <ppajuel@gmail.com>
Vikas Manocha [Mon, 10 Apr 2017 22:03:07 +0000 (15:03 -0700)]
stm32f7: remove not needed configuration from board config
This patch removes:
- CONFIG_CMD_MEM: enabled by default
- CONFIG_DESIGNWARE_ETH : not being used anywhere.
Signed-off-by: Vikas Manocha <vikas.manocha@st.com>
cc: Christophe KERELLO <christophe.kerello@st.com>
Vikas Manocha [Mon, 10 Apr 2017 22:03:06 +0000 (15:03 -0700)]
stm32f7: add support for stm32f769 disco board
This board support stm32f7 family device stm32f769-I with 2MB internal Flash &
512KB RAM.
STM32F769 lines offer the performance of the Cortex-M7 core (with double
precision floating point unit) running up to 216 MHz.
To compile for stm32f769 board, use same defconfig as stm32f746-disco,
the only difference is to pass "DEVICE_TREE=stm32f769-disco".
Signed-off-by: Vikas Manocha <vikas.manocha@st.com>
cc: Christophe KERELLO <christophe.kerello@st.com>
Vikas Manocha [Mon, 10 Apr 2017 22:03:05 +0000 (15:03 -0700)]
stm32f7: move board specific pin muxing to dts
Signed-off-by: Vikas Manocha <vikas.manocha@st.com>
cc: Christophe KERELLO <christophe.kerello@st.com>
Vikas Manocha [Mon, 10 Apr 2017 22:03:04 +0000 (15:03 -0700)]
stm32f7: increase the max no of pin configuration to 70
The number of pins to be configured could be more than 50 e.g. in case
of sdram controller, there are about 56 pins (32 data lines, 12 address
& some control signals).
Signed-off-by: Vikas Manocha <vikas.manocha@st.com>
cc: Christophe KERELLO <christophe.kerello@st.com>
Vikas Manocha [Mon, 10 Apr 2017 22:03:03 +0000 (15:03 -0700)]
stm32f7: sdram: correct sdram configuration as per micron sdram
Actually the sdram memory on stm32f746 discovery board is micron part
MT48LC_4M32_B2B5_6A. This patch does the modification required in the
device tree node & driver for the same.
Also we are passing here all the timing parameters in terms of clock
cycles, so no need to convert time(ns or ms) to cycles.
Signed-off-by: Vikas Manocha <vikas.manocha@st.com>
cc: Christophe KERELLO <christophe.kerello@st.com>
Vikas Manocha [Mon, 10 Apr 2017 22:03:02 +0000 (15:03 -0700)]
stm32f7: enable board info read from device tree
Signed-off-by: Vikas Manocha <vikas.manocha@st.com>
cc: Christophe KERELLO <christophe.kerello@st.com>
Vikas Manocha [Mon, 10 Apr 2017 22:03:01 +0000 (15:03 -0700)]
stm32f7: stm32f746-disco: read memory info from device tree
Signed-off-by: Vikas Manocha <vikas.manocha@st.com>
cc: Christophe KERELLO <christophe.kerello@st.com>
Vikas Manocha [Mon, 10 Apr 2017 22:03:00 +0000 (15:03 -0700)]
stm32f746: to switch on user LED1 & read user button
All discovery boards have one user button & one user LED. Here we are
just reading the button status & switching ON the user LED.
Signed-off-by: Vikas Manocha <vikas.manocha@st.com>
cc: Christophe KERELLO <christophe.kerello@st.com>
Vikas Manocha [Mon, 10 Apr 2017 22:02:59 +0000 (15:02 -0700)]
stm32f7: use stm32f7 gpio driver supporting driver model
With this gpio driver supporting DM, there is no need to enable clocks
for different gpios (for pin muxing) in the board specific code.
Need to increase the allocatable area required before relocation from 0x400 to
0xC00 becuase of 10 new gpio devices(& new gpio class) added in device tree.
Signed-off-by: Vikas Manocha <vikas.manocha@st.com>
cc: Christophe KERELLO <christophe.kerello@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Vikas Manocha [Mon, 10 Apr 2017 22:02:58 +0000 (15:02 -0700)]
ARM: DT: stm32f7: add gpio device tree nodes
Also created alias for gpios for stm32f7 discovery board. Based on these
aliases, it would be possible to get gpio devices by sequence.
Signed-off-by: Vikas Manocha <vikas.manocha@st.com>
cc: Christophe KERELLO <christophe.kerello@st.com>
Vikas Manocha [Mon, 10 Apr 2017 22:02:57 +0000 (15:02 -0700)]
dm: gpio: Add driver for stm32f7 gpio controller
This patch adds gpio driver supporting driver model for stm32f7 gpio.
Signed-off-by: Vikas Manocha <vikas.manocha@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Cc: Christophe KERELLO <christophe.kerello@st.com>
[trini: Add depends on STM32]
Signed-off-by: Tom Rini <trini@konsulko.com>
Vikas Manocha [Mon, 10 Apr 2017 22:02:56 +0000 (15:02 -0700)]
stm32f7: sdram: use sdram device tree node to configure sdram controller
Signed-off-by: Vikas Manocha <vikas.manocha@st.com>
cc: Christophe KERELLO <christophe.kerello@st.com>
Vikas Manocha [Mon, 10 Apr 2017 22:02:55 +0000 (15:02 -0700)]
stm32f7: use clock driver to enable sdram controller clock
This patch also removes the sdram/fmc clock enable from board specific
code.
Signed-off-by: Vikas Manocha <vikas.manocha@st.com>
cc: Christophe KERELLO <christophe.kerello@st.com>
Vikas Manocha [Mon, 10 Apr 2017 22:02:54 +0000 (15:02 -0700)]
stm32f7: use driver model for sdram initialization
As driver model takes care of pin control configuraion, this patch also
removes the sdram/fmc pin configuration.
Signed-off-by: Vikas Manocha <vikas.manocha@st.com>
cc: Christophe KERELLO <christophe.kerello@st.com>
Vikas Manocha [Mon, 10 Apr 2017 22:02:53 +0000 (15:02 -0700)]
ARM: DT: stm32f7: add sdram pin contol node
Also added DT binding doc for stm32 fmc(flexible memory controller).
Signed-off-by: Vikas Manocha <vikas.manocha@st.com>
cc: Christophe KERELLO <christophe.kerello@st.com>
Vikas Manocha [Mon, 10 Apr 2017 22:02:52 +0000 (15:02 -0700)]
stm32f7: dm: add driver model support for sdram
Signed-off-by: Vikas Manocha <vikas.manocha@st.com>
cc: Christophe KERELLO <christophe.kerello@st.com>
Vikas Manocha [Mon, 10 Apr 2017 22:02:51 +0000 (15:02 -0700)]
stm32f7: sdram: move sdram driver code to ram drivers area
Signed-off-by: Vikas Manocha <vikas.manocha@st.com>
cc: Christophe KERELLO <christophe.kerello@st.com>
Vikas Manocha [Mon, 10 Apr 2017 22:02:50 +0000 (15:02 -0700)]
stm32f7: use clock driver to enable qspi controller clock
Signed-off-by: Vikas Manocha <vikas.manocha@st.com>
cc: Christophe KERELLO <christophe.kerello@st.com>
Vikas Manocha [Fri, 7 Apr 2017 22:38:13 +0000 (15:38 -0700)]
spl: make image arg or fdt blob address reconfigurable
At present fdt blob or argument address being passed to kernel is fixed at
compile time using macro CONFIG_SYS_SPL_ARGS_ADDR. FDT blob from
different media like nand, nor flash are copied to the address pointed
by the macro.
The problem is, it makes args/fdt blob compulsory to copy which is not required
in cases like for NOR Flash. This patch removes this limitation.
Signed-off-by: Vikas Manocha <vikas.manocha@st.com>
Uri Mashiach [Thu, 23 Feb 2017 13:39:41 +0000 (15:39 +0200)]
arm: am57xx: cl-som-am57x: enable USB commands
Add CONFIG_CMD_USB to the defconfig file.
Signed-off-by: Uri Mashiach <uri.mashiach@compulab.co.il>
Reviewed-by: Tom Rini <trini@konsulko.com>
Uri Mashiach [Thu, 23 Feb 2017 13:39:40 +0000 (15:39 +0200)]
arm: am57xx: cl-som-am57x: enable USB storage
Add CONFIG_USB_STORAGE to the defconfig file.
Signed-off-by: Uri Mashiach <uri.mashiach@compulab.co.il>
Reviewed-by: Tom Rini <trini@konsulko.com>
Uri Mashiach [Thu, 23 Feb 2017 13:39:39 +0000 (15:39 +0200)]
arm: am57xx: cl-som-am57x: fix USB scan
USB bus scan attempt:
----------------------------------cut----------------------------------
=> usb start
starting USB...
USB0: Register 2000140 NbrPorts 2
Starting the controller
USB XHCI 1.00
scanning bus 0 for devices... data abort
pc : [<
fff6240e>] lr : [<
fff623b3>]
reloc pc : [<
8081b40e>] lr : [<
8081b3b3>]
sp :
fdf42930 ip :
fdf42960 fp :
00000000
r10:
00000001 r9 :
fdf42ef0 r8 :
48890020
r7 :
00000002 r6 :
fffa5840 r5 :
fff8b140 r4 :
fdf429c0
r3 :
00000000 r2 :
00000004 r1 :
00000000 r0 :
00000000
Flags: nZcv IRQs off FIQs off Mode SVC_32
Resetting CPU ...
resetting ...
----------------------------------cut----------------------------------
Fix by enabling USB configuration in the SPL.
Signed-off-by: Uri Mashiach <uri.mashiach@compulab.co.il>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Igor Grinberg <grinberg@compulab.co.il>
Uri Mashiach [Thu, 23 Feb 2017 13:39:38 +0000 (15:39 +0200)]
arm: am57xx: cl-som-am57x: invoke clock API to enable/disable clocks
Invoke enable_usb_clocks during board_usb_init and disable_usb_clocks
during board_usb_exit to enable and disable clocks respectively.
Modifications:
* Enable USB clocks in the OMAP version of the function
board_usb_init.
* Disable USB clocks in the OMAP version of the function
board_usb_cleanup.
Cc: Marek Vasut <marex@denx.de>
Signed-off-by: Uri Mashiach <uri.mashiach@compulab.co.il>
Reviewed-by: Marek Vasut <marex@denx.de>
Reviewed-by: Tom Rini <trini@konsulko.com>
Uri Mashiach [Thu, 23 Feb 2017 13:39:37 +0000 (15:39 +0200)]
usb: host: xhci-omap: fix double weak board_usb_init functions
A weak version of the function board_usb_init is implemented in:
common/usb.c
drivers/usb/host/xhci-omap.c
To fix the double implementations:
* Convert the board_usb_init function in drivers/usb/host/xhci-omap.c
normal (not weak).
* The function board_usb_init in drivers/usb/host/xhci-omap.c calls to
the weak function omap_xhci_board_usb_init.
* Rename board version of the function board_usb_init to
omap_xhci_board_usb_init.
Done only for boards that defines CONFIG_USB_XHCI_OMAP.
To achieve the same flexibility with the function board_usb_cleanup:
* Add a normal (not weak) implementation of the function
board_usb_cleanup in drivers/usb/host/xhci-omap.c
* The function board_usb_cleanup in drivers/usb/host/xhci-omap.c calls
to the weak function omap_xhci_board_usb_cleanup.
* Rename board version of the function board_usb_cleanup to
omap_xhci_board_usb_cleanup.
Done only for boards that defines CONFIG_USB_XHCI_OMAP.
Cc: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Uri Mashiach <uri.mashiach@compulab.co.il>
Acked-by: Marek Vasut <marex@denx.de>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Roger Quadros <rogerq@ti.com>
Uri Mashiach [Thu, 23 Feb 2017 13:39:36 +0000 (15:39 +0200)]
arm: usb: dra7xx: xHCI registers based on USB port index
Modify the determination of the base address of xHCI registers of DRA7XX
targets.
Before the commit: by the target.
After the commit: by the USB port index.
Cc: Lokesh Vutla <lokeshvutla@ti.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Roger Quadros <rogerq@ti.com>
Signed-off-by: Uri Mashiach <uri.mashiach@compulab.co.il>
Reviewed-by: Marek Vasut <marex@denx.de>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Roger Quadros <rogerq@ti.com>
Acked-by: Marek Vasut <marex@denx.de>
Acked-by: Marek Vasut <marex@denx.de>
Uri Mashiach [Thu, 23 Feb 2017 13:39:35 +0000 (15:39 +0200)]
arm: dra7xx: move CONFIG_DRA7XX to Kconfig
The symbol CONFIG_DRA7XX is needed for Kconfig conditions.
Cc: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Uri Mashiach <uri.mashiach@compulab.co.il>
Reviewed-by: Tom Rini <trini@konsulko.com>
Tom Rini [Mon, 8 May 2017 14:11:08 +0000 (10:11 -0400)]
Prepare v2017.05
Signed-off-by: Tom Rini <trini@konsulko.com>
xypron.glpk@gmx.de [Fri, 5 May 2017 18:57:32 +0000 (20:57 +0200)]
board/BuR/common: incorrect check of dtb
The logical expression to check the dtb is incorrect in
load_devicetree.
The problem was indicated by cppcheck.
The inconsistent variable name dtppart is changed to dtbpart.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Hannes Schmelzer <oe5hpm@oevsv.at>
Acked-by: Hannes Schmelzer <oe5hpm@oevsv.at>
xypron.glpk@gmx.de [Thu, 4 May 2017 20:26:42 +0000 (22:26 +0200)]
tools: sunxi: avoid read after end of string
The evaluation of option -c is incorrect:
According to the C99 standard endptr in the first strtol is always
set as &endptr is not NULL.
So the first part of the or condition is always true.
If all digits in optarg are valid endptr will point to the closing \0
and the second strtol will read beyond the end of the string optarg
points to.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Acked-by: Boris Brezillon <boris.brezillon@free-electrons.com>
xypron.glpk@gmx.de [Wed, 3 May 2017 20:40:11 +0000 (22:40 +0200)]
relocate-rela: add missing va_end()
va_start must always be matched by va_end.
The problem was indicated by cppcheck.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
xypron.glpk@gmx.de [Wed, 3 May 2017 21:20:10 +0000 (23:20 +0200)]
lib: circbuf: avoid possible null pointer dereference
We should not first dereference p and afterwards assert that is
was not NULL. Instead do the assert first.
The problem was indicated by cppcheck.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
xypron.glpk@gmx.de [Wed, 3 May 2017 21:31:58 +0000 (23:31 +0200)]
arm64: mvebu: incorrect check of fdt address cells
In dram_init_banksize there seems to be a typo concerning
a plausibility check of the fdt.
Testing sc > 2 twice does not make any sense.
The problem was indicated by cppcheck.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
xypron.glpk@gmx.de [Fri, 14 Apr 2017 17:54:40 +0000 (19:54 +0200)]
meson: gxbb: increase CONFIG_SYS_BOOTM_LEN
A feature rich Linux kernel needs more than 8 MiB.
Hence enlarge CONFIG_SYS_BOOTM_LEN to 64 MiB for the GXBB systems.
As all known GXBB systems have at least 512 MiB of RAM this poses no problem.
Cc: Andreas Färber <afaerber@suse.de>
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Tom Rini [Fri, 5 May 2017 20:45:30 +0000 (16:45 -0400)]
Merge branch 'master' of git://git.denx.de/u-boot-spi
Suniel Mahesh [Wed, 3 May 2017 06:17:29 +0000 (11:47 +0530)]
drivers: spi: Remove duplicate .probe method
.probe method has been assigned twice when declaring
a driver with U_BOOT_DRIVER(). Removed one of them.
Here is the last commit which had the duplicate entry:
"spi: omap3: Convert to driver model"
(sha1:
77b8d04854f486741471ad02b93b473b5b3d72f8)
Signed-off-by: Suniel Mahesh <suniel.spartan@gmail.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Moritz Fischer [Thu, 8 Dec 2016 20:11:09 +0000 (12:11 -0800)]
zynq: spi: Honour the activation / deactivation delay
This is not currently implemented. Add support for this so that the
Chrome OS EC can be used reliably.
Signed-off-by: Moritz Fischer <moritz.fischer@ettus.com>
Acked-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Wenyou Yang [Fri, 7 Apr 2017 07:14:46 +0000 (15:14 +0800)]
spi: atmel: check GPIO validity before using cs_gpios
Before using the cs_gpio, check if the GPIO is valid or not.
Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Tom Rini [Mon, 1 May 2017 23:54:41 +0000 (19:54 -0400)]
Prepare v2017.05-rc3
Signed-off-by: Tom Rini <trini@konsulko.com>
xypron.glpk@gmx.de [Sat, 15 Apr 2017 09:29:06 +0000 (11:29 +0200)]
odroid-c2: README: MMC is supported
Mention eMMC and microSD as supported devices.
They have been enabled with patch
d0c5c8d529f16fa88ab52a3b5dd2d4fc03664f19
odroid-c2: enable new Meson GX MMC driver in board defconfig
which was accepted for u-boot-mmc.git.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
xypron.glpk@gmx.de [Fri, 14 Apr 2017 18:04:46 +0000 (20:04 +0200)]
meson: gxbb: change ramdisk_addr_r
0x10000000 is the start of a 2 MiB area used by the
ARM Trusted Firmware (BL31).
See
https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux-stable.git/tree/arch/arm64/boot/dts/amlogic/meson-gx.dtsi?id=refs/tags/v4.10.10
So we should not load the ramdisk here.
The legacy Ubuntu image for the Odroid C2 comes with the
following line in boot.ini:
setenv initrd_loadaddr "0x13000000"
See
http://odroid.in/ubuntu_16.04lts/ubuntu64-16.04-minimal-odroid-c2-
20160815.img.xz
http://deb.odroid.in/c2/pool/main/u/u-boot/u-boot_20170226-752a100-8_arm64.deb
So let's use the same address.
With the patch booting Linux with booti succeeds on an Odroid C2,
without the patch Linux hangs.
Cc: Andreas Färber <afaerber@suse.de>
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Vagrant Cascadian <vagrant@debian.org>
xypron.glpk@gmx.de [Sat, 15 Apr 2017 19:30:39 +0000 (21:30 +0200)]
meson: gxbb: enable MMC as boot target
To enable automatic booting from SD card or eMMC the MMC
devices 0, 1, and 2 are added to the BOOT_TARGET_DEVICES.
Booting from SD card, eMMC, and DHCP are tried in sequence.
A missing or failing device is gracefully handled.
Cc: Andreas Färber <afaerber@suse.de>
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Tested-by: Vagrant Cascadian <vagrant@debian.org>
Reviewed-by: Andreas Färber <afaerber@suse.de>
Tested-by: Andreas Färber <afaerber@suse.de>
Tom Rini [Mon, 1 May 2017 15:41:11 +0000 (11:41 -0400)]
configs: Re-sync
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Mon, 1 May 2017 15:34:12 +0000 (11:34 -0400)]
scripts/config_whitelist.txt: Re-sync
Signed-off-by: Tom Rini <trini@konsulko.com>
Fabio Estevam [Sat, 29 Apr 2017 22:01:57 +0000 (19:01 -0300)]
warp7: MAINTAINERS: Add warp7_secure_defconfig entry
Add warp7_secure_defconfig entry to avoid the following warning:
WARNING: no maintainers for 'warp7_secure'
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Tom Rini [Fri, 28 Apr 2017 12:51:44 +0000 (08:51 -0400)]
fdt: Move fdt_fixup_ethernet to a common place
With
3f66149d9fb4 we no longer have a common call fdt_fixup_ethernet.
This was fine to do on PowerPC as they largely had calls already in
ft_cpu_fixup. On ARM however we largely relied on this call. Rather
than introduce a large number of changes to ft_cpu_fixup /
ft_board_fixup we recognize that this is a common enough call that we
should be doing it in a central location. Do it early enough that we
can do any further updates in ft_cpu_fixup / ft_board_fixup.
Cc: Gerd Hoffmann <kraxel@redhat.com>
Cc: Chen-Yu Tsai <wens@csie.org>
Cc: Maxime Ripard <maxime.ripard@free-electrons.com>
Cc: Thomas Chou <thomas@wytron.com.tw> (maintainer:NIOS)
Cc: York Sun <york.sun@nxp.com> (maintainer:POWERPC MPC85XX)
Cc: Stefan Roese <sr@denx.de> (maintainer:POWERPC PPC4XX)
Cc: Simon Glass <sjg@chromium.org>
Cc: Joakim Tjernlund <Joakim.Tjernlund@infinera.com>
Fixes:
3f66149d9fb4 ("Remove extra fdt_fixup_ethernet() call")
Signed-off-by: Tom Rini <trini@konsulko.com>
Acked-by: Stefan Roese <sr@denx.de>
Acked-by: York Sun <york.sun@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Chris Packham [Sat, 29 Apr 2017 03:20:28 +0000 (15:20 +1200)]
cmd: add Kconfig option for 'date' command
Signed-off-by: Chris Packham <judge.packham@gmail.com>
[trini: default y if DM_RTC, re-sync]
Signed-off-by: Tom Rini <trini@konsulko.com>
Simon Glass [Thu, 27 Apr 2017 04:28:11 +0000 (22:28 -0600)]
Drop the pdsp188x driver
This is not used in U-Boot.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Thu, 27 Apr 2017 04:28:10 +0000 (22:28 -0600)]
powerpc: Drop configs/manroland
This is not used in U-Boot. Drop it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Thu, 27 Apr 2017 04:28:09 +0000 (22:28 -0600)]
Convert CONFIG_CMD_DISPLAY to Kconfig
This converts the following to Kconfig:
CONFIG_CMD_DISPLAY
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Thu, 27 Apr 2017 04:28:08 +0000 (22:28 -0600)]
Convert CONFIG_CMD_DIAG to Kconfig
This converts the following to Kconfig:
CONFIG_CMD_DIAG
Signed-off-by: Simon Glass <sjg@chromium.org>
[trini: imply CMD_DIAG on some keymile configs]
Signed-off-by: Tom Rini <trini@konsulko.com>
Simon Glass [Thu, 27 Apr 2017 04:28:07 +0000 (22:28 -0600)]
Kconfig: Drop CONFIG_CMD_DFL
This option is not used in U-Boot. Drop it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Thu, 27 Apr 2017 04:28:06 +0000 (22:28 -0600)]
Convert CONFIG_CMD_DEKBLOB to Kconfig
This converts the following to Kconfig:
CONFIG_CMD_DEKBLOB
Note: This option does not seem to actually be enabled by any board.
Signed-off-by: Simon Glass <sjg@chromium.org>
[trini: imply under SECURE_BOOT for mx5/6/7]
Signed-off-by: Tom Rini <trini@konsulko.com>
Simon Glass [Thu, 27 Apr 2017 04:28:05 +0000 (22:28 -0600)]
Kconfig: Drop CONFIG_CMD_DEFAULTENV_VARS
This option does not exist in U-Boot. Drop it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Thu, 27 Apr 2017 04:28:04 +0000 (22:28 -0600)]
fs: Kconfig: Add a separate option for FS_CRAMFS
Rather than using CMD_CRAMFS for both the filesystem and its command, we
should have a separate option for each. This allows us to enable CRAMFS
support without the command, if desired, which reduces U-Boot's size
slightly.
Signed-off-by: Simon Glass <sjg@chromium.org>
[trini: imply FS_CRAMFS for keymile]
Signed-off-by: Tom Rini <trini@konsulko.com>
Simon Glass [Thu, 27 Apr 2017 04:28:03 +0000 (22:28 -0600)]
fs: Convert CONFIG_CMD_CRAMFS to Kconfig
This converts the following to Kconfig:
CONFIG_CMD_CRAMFS
Signed-off-by: Simon Glass <sjg@chromium.org>
[trini: imply CMD_CRAMFS for keymile]
Signed-off-by: Tom Rini <trini@konsulko.com>
Simon Glass [Thu, 27 Apr 2017 04:28:02 +0000 (22:28 -0600)]
Convert CONFIG_CMD_CLK to Kconfig
This converts the following to Kconfig:
CONFIG_CMD_CLK
Signed-off-by: Simon Glass <sjg@chromium.org>
[trini: imply CMD_CLK on ARCH_ZYNQ]
Signed-off-by: Tom Rini <trini@konsulko.com>
Simon Glass [Thu, 27 Apr 2017 04:28:01 +0000 (22:28 -0600)]
Drop CONFIG_CMD_CLEAR
This option is not used in U-Boot. Drop it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Thu, 27 Apr 2017 04:28:00 +0000 (22:28 -0600)]
Convert CONFIG_CMD_CHIP_CONFIG to Kconfig
This converts the following to Kconfig:
CONFIG_CMD_CHIP_CONFIG
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Thu, 27 Apr 2017 04:27:59 +0000 (22:27 -0600)]
fs: Kconfig: Add a separate config for FS_CBFS
Rather than using CMD_CBFS for both the filesystem and its command, we
should have a separate option for each. This allows us to enable CBFS
support without the command, if desired, which reduces U-Boot's size
slightly.
Signed-off-by: Simon Glass <sjg@chromium.org>
[trini: imply FS_CBFS on SYS_COREBOOT]
Signed-off-by: Tom Rini <trini@konsulko.com>
Simon Glass [Thu, 27 Apr 2017 04:27:58 +0000 (22:27 -0600)]
fs: Convert CONFIG_CMD_CBFS to Kconfig
This converts the following to Kconfig:
CONFIG_CMD_CBFS
Signed-off-by: Simon Glass <sjg@chromium.org>
[trini: imply CMD_CBFS on SYS_COREBOOT]
Signed-off-by: Tom Rini <trini@konsulko.com>
Simon Glass [Thu, 27 Apr 2017 04:27:57 +0000 (22:27 -0600)]
Convert CONFIG_SYS_WHITE_ON_BLACK to Kconfig
This converts the following to Kconfig:
CONFIG_SYS_WHITE_ON_BLACK
Signed-off-by: Simon Glass <sjg@chromium.org>
[trini: Make this default y on various SoCs]
Signed-off-by: Tom Rini <trini@konsulko.com>
Simon Glass [Thu, 27 Apr 2017 04:27:56 +0000 (22:27 -0600)]
Convert CONFIG_CMD_BSP to Kconfig
This converts the following to Kconfig:
CONFIG_CMD_BSP
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Thu, 27 Apr 2017 04:27:55 +0000 (22:27 -0600)]
Convert CONFIG_CMD_BMP to Kconfig
This converts the following to Kconfig:
CONFIG_CMD_BMP
Signed-off-by: Simon Glass <sjg@chromium.org>
[trini: Add depends on LCD || DM_VIDEO || VIDEO]
Signed-off-by: Tom Rini <trini@konsulko.com>
Simon Glass [Thu, 27 Apr 2017 04:27:54 +0000 (22:27 -0600)]
Convert CONFIG_CMD_BMODE to Kconfig
This converts the following to Kconfig:
CONFIG_CMD_BMODE
Signed-off-by: Simon Glass <sjg@chromium.org>
[trini: Make this default y and depend on mx5/6/7]
Signed-off-by: Tom Rini <trini@konsulko.com>
Simon Glass [Thu, 27 Apr 2017 04:27:53 +0000 (22:27 -0600)]
Convert CONFIG_CMD_BLOB to Kconfig
This converts the following to Kconfig:
CONFIG_CMD_BLOB
Signed-off-by: Simon Glass <sjg@chromium.org>
[trini: Add imply CMD_BLOB under CHAIN_OF_TRUST]
Signed-off-by: Tom Rini <trini@konsulko.com>
Simon Glass [Thu, 27 Apr 2017 04:27:52 +0000 (22:27 -0600)]
Convert CONFIG_CMD_BEDBUG to Kconfig
This converts the following to Kconfig:
CONFIG_CMD_BEDBUG
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Thu, 27 Apr 2017 04:27:51 +0000 (22:27 -0600)]
Convert CONFIG_CMD_BAT to Kconfig
This converts the following to Kconfig:
CONFIG_CMD_BAT
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Thu, 27 Apr 2017 04:27:50 +0000 (22:27 -0600)]
ti816x_evm: Change CONFIG_CMD_ASKEN to CONFIG_CMD_ASKENV
This looks like a typo. Fix it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Thu, 27 Apr 2017 04:27:49 +0000 (22:27 -0600)]
Convert CONFIG_CMD_AES et al to Kconfig
This converts the following to Kconfig:
CONFIG_CMD_AES
CONFIG_AES
Signed-off-by: Simon Glass <sjg@chromium.org>
[trini: Add select AES to CMD_AES]
Signed-off-by: Tom Rini <trini@konsulko.com>