review.tizen.org Git - platform/upstream/gcc.git/log

libstdc++: Add returns_nonnull to non-inline std::map detail [PR108554]

std::map uses a non-inline function to rebalance its tree and the
compiler can't see that it always returns a valid pointer (assuming
valid inputs, which is a precondition anyway). This can result in
-Wnull-derefernce warnings for valid code, because the compiler thinks
there is a path where the function returns null.

Adding the returns_nonnull attribute tells the compiler that is can't
happen. While we're doing that, we might as well also add a nonnull
attribute to the rebalancing functions too.

libstdc++-v3/ChangeLog:

PR libstdc++/108554
* include/bits/stl_tree.h (_Rb_tree_insert_and_rebalance): Add
nonnull attribute.
(_Rb_tree_rebalance_for_erase): Add nonnull and returns_nonnull
attributes.
* testsuite/23_containers/map/modifiers/108554.cc: New test.

libstdc++: Fix strings read from /etc/sysconfig/clock [PR108530]

In r13-5339-ge00d5cafbe1a77 I made std::chrono::current_zone() look for
DEFAULT_TIMEZONE in /etc/sysconfig/clock but that is the wrong variable.
Old Suse systems use TIMEZONE to determine which zone /etc/localtime is
a copy of, and old RHEL system use ZONE.

libstdc++-v3/ChangeLog:

PR libstdc++/108530
* src/c++20/tzdb.cc (current_zone): Look for TIMEZONE or ZONE in
/etc/sysconfig/clock, not DEFAULT_TIMEZONE.

libstdc++: Move open-std.org to https in bugs manual

libstdc++-v3/ChangeLog:

* doc/xml/manual/intro.xml: Update links to www.open-std.org to
use https.
* doc/html/manual/bugs.html: Regenerate.

tree-optimization/108547 - robustify uninit predicate analysis

Predicate analysis, when looking through casts doesn't bother to
convert boundary constants to the type of the bounded variables.
The following robustifies value_sat_pred_p to use widest_ints
to deal with this, like other code in predicate analysis.

PR tree-optimization/108547
* gimple-predicate-analysis.cc (value_sat_pred_p):
Use widest_int.

* gcc.dg/uninit-pr108547.c: New testcase.

tree-optimization/108522 Use component_ref_field_offset

Instead of using TREE_OPERAND (expr, 2) directly, use
component_ref_field_offset instead, which does scaling for us. The
function also substitutes PLACEHOLDER_EXPRs but it is not relevant for
tree-object-size.

gcc/ChangeLog:

PR tree-optimization/108522
* tree-object-size.cc (compute_object_offset): Make EXPR
argument non-const. Call component_ref_field_offset.

gcc/testsuite/ChangeLog:

PR tree-optimization/108522
* gcc.dg/builtin-dynamic-object-size-0.c (DEFSTRUCT): New
macro.
(test_dynarray_struct_member_b, test_dynarray_struct_member_c,
test_dynarray_struct_member_d,
test_dynarray_struct_member_subobj_b,
test_dynarray_struct_member_subobj_c,
test_dynarray_struct_member_subobj_d): New tests.
(main): Call them.

Signed-off-by: Siddhesh Poyarekar <siddhesh@gotplt.org>

aarch64: Add Linux kernel hwcap string for FEAT_CSSC

The Linux kernel has done basic enablement and detection of FEAT_CSSC so
we can use the cpuinfo string that they've specified.

This patchlet does that.

Bootstrapped and tested on aarch64-none-linux-gnu.

gcc/ChangeLog:

* config/aarch64/aarch64-option-extensions.def (cssc): Specify
FEATURE_STRING field.

doc: Refer to projects as GCC and GDB

...instead of gcc and gdb which are the executables (and in case of
GCC the C language front end).

gcc/ChangeLog:

* doc/sourcebuild.texi: Refer to projects as GCC and GDB.

openmp, c++: Workaround fold_for_warn ICE on invalid OpenMP collapsed loops [PR108503]

My recent change to deduce structured binding vars earlier caused the following
invalid testcase to ICE.  The problem is that because at cp_convert_omp_range_for
when !processing_template_decl we aren't yet ready to finalize the structured bindings
(e.g. can't emit there associated code) but need to deduce types of the vars so that
we don't get errors if we parse invalid uses of those vars in inner loops of the
collapsed construct.  This is done by temporarily bumping processing_template_decl
around the call to cp_finish_decomp.  Unfortunately, as we can't finalize it yet,
the types of the vars will be deduced, but their DECL_VALUE_EXPR is not finalized
yet and if say fold_for_warn tries to constant expression evaluate them, it
recurses on DECL_VALUE_EXPR and ICEs because it sees e.g. ARRAY_REF (with NULL type)
on a VAR_DECL with class type.

The following patch works around that by temporarily hiding the DECL_VALUE_EXPRs
by clearing DECL_HAS_VALUE_EXPR_P in that case during cp_convert_omp_range_for
and arranging for cp_finish_omp_range_for to set it back before doing the
final cp_finish_decomp.

2023-01-25  Jakub Jelinek  <jakub@redhat.com>

PR c++/108503
* parser.cc (cp_convert_omp_range_for): If cp_finish_decomp has been
called in !processing_template_decl with processing_template_decl
temporarily set, clear DECL_HAS_VALUE_EXPR_P on the vars temporarily.
(cp_finish_omp_range_for): And set it back again here.

* g++.dg/gomp/pr108503.C: New test.

tree-optimization/108523 - testcase for the bug

This adds a reduced testcase for the PR.

PR tree-optimization/108523
* gcc.dg/torture/pr108523.c: New testcase.

libgm2/configure.ac use newer automake (1.15.1)

Use a newer automake (1.15.1).

libgm2/ChangeLog:

* configure.ac (AM_INIT_AUTOMAKE): Specify 1.15.1.

Signed-off-by: Gaius Mulley <gaiusmod2@gmail.com>

PR-108135 Remove PACKAGE_* definitions from gm2config.h

PR-108135 gcc/m2/configure generates gm2config.h and
automatically adds PACKAGE defines. gcc/m2/Make-lang.in
now removes these PACKAGE definitions. The patch also
contains fixes to remove an unused variable Dim from
BuildConstHighFromSym and also uses withTok in StartBuildWith.
StartBuildWith will generate a nop (for improved debugging)
if requested.

gcc/m2/ChangeLog:

* Make-lang.in (m2/gm2config.h): Rewrite rule to be
dependent upon m2/gm2config.aci.
(m2/gm2config.aci): Newrule.
* configure.ac (AC_CONFIG_HEADERS): Change destination
to gm2config.aci.
* configure: Regenerate.
* gm2-libs/config-host: Regenerate.
* gm2-compiler/M2GCCDeclare.mod (AddSymToWatch): Comment
out.
* gm2-compiler/M2Quads.mod (BuildConstHighFromSym): Remove
Dim.
(StartBuildWith): Call BuildStmtNoteTok.
(BuildStmtNoteTok): New procedure.
(BuildStmtNote): Re-implement re-factor into two
procedures and call BuildStmtNoteTok.
* gm2config.h.in: Remove.
* gm2config.aci.in: New file.

Signed-off-by: Gaius Mulley <gaiusmod2@gmail.com>

Daily bump.

Fortran: ICE in gfc_compare_array_spec [PR108528]

gcc/fortran/ChangeLog:

PR fortran/108528
* array.cc (compare_bounds): Return false instead of generating an
internal error on an invalid argument type.

gcc/testsuite/ChangeLog:

PR fortran/108528
* gfortran.dg/pr108528.f90: New test.

modula-2: Fixes for preprocessing [PR102343, PR108182].

Modula-2 uses the C preprocessor to implement handling for conditional
code and macros. However, this is not done directly, because the process
is applied recursively to imported definitions and modules.

The cc1gm2 executable records the parameters as a template command line
needed to create a composite 'cc1 -E' for each file to be preprocessed
starting with the main file from the original command line.

This patch fixes the capture of the C preprocessor template to include
the target information needed for correct multilib operation.

In order to match the existing semantics of '-E, -M and -MM' these have
to be handled as a 'pre-processor only' job (i.e. the recursion is omitted
and only the main file is processed).

Whereas C-family front ends always pre-process, Modula-2 only does so
when specifically requested (via the -fcpp option).

'-MD, -MMD and -MQ' also require special handling, since (in principle)
these options can be applied to any command line (with -fcpp) providing
dependency information as a by-product.

TODO: the preprocessor is not able to determine def and mod dependencies
for Modula-2 and so the output of this only shows the object to module
dep. We should be able to append the .def and .mod dependencies.

The patch amends save-temps handling to cater for the preprocessor
recursion and to avoid writing saved files into the source directories.

The patch changes the extension for Modula-2 preprocessed source to .m2i
to avoid clashes with .i.

The main driver code is amended to add default handlers for .mod and .m2i
so that a useful error message will be emitted if the Modula-2 compiler
is not built-in.

The compiler will now also handle code generation from a .m2i preprocessed
source.

TODO: We should not need to pass the '-c' option to the compiler to alter
the processing of init code.

Signed-off-by: Iain Sandoe <iain@sandoe.co.uk>
PR modula2/102343
PR modula2/108182

gcc/ChangeLog:

* gcc.cc: Provide default specs for Modula-2 so that when the
language is not built-in better diagnostics are emitted for
attempts to use .mod or .m2i file extensions.

gcc/m2/ChangeLog:

* gm2-compiler/M2Comp.mod: Early exit for pre-processor-only jobs.
* gm2-compiler/M2Options.def (SetPPOnly, GetPPOnly, SetMD, GetMD,
SetMMD, GetMMD, SetMQ, GetMQ, SetObj, GetObj, SetDumpDir,
GetDumpDir):New.
* gm2-compiler/M2Options.mod:(SetPPOnly, GetPPOnly, SetMD, GetMD,
SetMMD, GetMMD, SetMQ, GetMQ, SetObj, GetObj, SetDumpDir,
GetDumpDir):New.
* gm2-compiler/M2Preprocess.def (PreprocessModule): Add flag to
indicate the main file.
* gm2-compiler/M2Preprocess.mod: Handle Preprocess-only jobs,
handle MD, MMD and MQ options.
* gm2-gcc/m2options.h (M2Options_SetPPOnly, M2Options_GetPPOnly,
M2Options_SetDumpDir, M2Options_SetMD, M2Options_GetMD,
M2Options_SetMMD, M2Options_GetMMD, M2Options_SetMQ, M2Options_GetMQ,
M2Options_SetObj, M2Options_GetObj): New.
* gm2-gcc/m2type.cc (m2type_InitBaseTypes): Early exit for pre-
processor-only jobs.
* gm2-lang.cc (gm2_langhook_init): Handle preprocess-only commands.
(gm2_langhook_option_lang_mask): Claim C and Driver options so that
we can intercept them for building pre-processor commands.
(gm2_langhook_init_options): Collect the preprocessor line here.
Save options that have different actions for preprocessor and compile
commands.
(gm2_langhook_handle_option): Only handle the modula-2 options here.
(gm2_langhook_post_options): Do not create a back-end for pre-
processor-only jobs.
* gm2spec.cc (lang_specific_driver): Ignore PCH options, append a
scaffold-main for cases where we are building a main module with
-c.
* lang-specs.h: Revise to handle preprocessor-only jobs and to
consume pre-processed files.
* lang.opt: Remove Driver and C options copies (we claim these
separately).

c++: Fix up mangling of static lambdas [PR108525]

Before the P1169R4 changes, operator () of a lambda was
always a method, so it was fine to pass method_p = 1 unconditionally,
but it isn't always the case, so this patch adds a check for whether
it is a method or nor.

2023-01-25 Jakub Jelinek <jakub@redhat.com>

PR c++/108525
* mangle.cc (write_closure_type_name): Don't assume all
lambda operator() fns are methods.

* g++.dg/cpp23/static-operator-call5.C: New test.

arm: fix missing extern "C" in MVE tests

gcc/testsuite/ChangeLog:

* gcc.target/arm/mve/intrinsics/vhaddq_n_s16.c: Add missing extern
"C".
* gcc.target/arm/mve/intrinsics/vhaddq_n_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vhaddq_n_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vhaddq_n_u16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vhaddq_n_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vhaddq_n_u8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vhaddq_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vhaddq_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vhaddq_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vhaddq_u16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vhaddq_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vhaddq_u8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vhaddq_x_n_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vhaddq_x_n_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vhaddq_x_n_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vhaddq_x_n_u16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vhaddq_x_n_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vhaddq_x_n_u8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vhaddq_x_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vhaddq_x_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vhaddq_x_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vhaddq_x_u16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vhaddq_x_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vhaddq_x_u8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vhsubq_n_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vhsubq_n_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vhsubq_n_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vhsubq_n_u16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vhsubq_n_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vhsubq_n_u8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vhsubq_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vhsubq_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vhsubq_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vhsubq_u16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vhsubq_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vhsubq_u8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vhsubq_x_n_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vhsubq_x_n_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vhsubq_x_n_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vhsubq_x_n_u16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vhsubq_x_n_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vhsubq_x_n_u8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vhsubq_x_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vhsubq_x_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vhsubq_x_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vhsubq_x_u16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vhsubq_x_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vhsubq_x_u8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmladavaxq_p_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmladavaxq_p_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmladavaxq_p_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmladavaxq_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmladavaxq_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmladavaxq_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqaddq_n_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqaddq_n_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqaddq_n_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqaddq_n_u16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqaddq_n_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqaddq_n_u8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqaddq_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqaddq_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqaddq_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqaddq_u16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqaddq_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqaddq_u8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqdmlahq_n_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqdmlahq_n_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqdmlahq_n_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqdmlashq_m_n_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqdmlashq_m_n_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqdmlashq_m_n_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqdmlashq_n_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqdmlashq_n_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqdmlashq_n_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vsetq_lane_f16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vsetq_lane_f32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vsetq_lane_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vsetq_lane_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vsetq_lane_s64.c: Likewise.
* gcc.target/arm/mve/intrinsics/vsetq_lane_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vsetq_lane_u16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vsetq_lane_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vsetq_lane_u64.c: Likewise.
* gcc.target/arm/mve/intrinsics/vsetq_lane_u8.c: Likewise.

arm: improve tests for vld2q*

gcc/testsuite/ChangeLog:

* gcc.target/arm/mve/intrinsics/vld2q_f16.c: Use
check-function-bodies instead of scan-assembler checks. Use
extern "C" for C++ testing.
* gcc.target/arm/mve/intrinsics/vld2q_f32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vld2q_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vld2q_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vld2q_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vld2q_u16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vld2q_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vld2q_u8.c: Likewise.

arm: improve tests and fix vqnegq*

gcc/ChangeLog:

* config/arm/mve.md (mve_vqnegq_s<mode>): Fix spacing.

gcc/testsuite/ChangeLog:

* gcc.target/arm/mve/intrinsics/vqnegq_m_s16.c: Use
check-function-bodies instead of scan-assembler checks. Use
extern "C" for C++ testing.
* gcc.target/arm/mve/intrinsics/vqnegq_m_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqnegq_m_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqnegq_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqnegq_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqnegq_s8.c: Likewise.

arm: improve tests for vqrdmulhq*

gcc/testsuite/ChangeLog:

* gcc.target/arm/mve/intrinsics/vqrdmulhq_m_n_s16.c: Use
check-function-bodies instead of scan-assembler checks. Use
extern "C" for C++ testing.
* gcc.target/arm/mve/intrinsics/vqrdmulhq_m_n_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqrdmulhq_m_n_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqrdmulhq_m_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqrdmulhq_m_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqrdmulhq_m_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqrdmulhq_n_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqrdmulhq_n_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqrdmulhq_n_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqrdmulhq_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqrdmulhq_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqrdmulhq_s8.c: Likewise.

arm: improve tests for vqrdmlsdhxq*

gcc/testsuite/ChangeLog:

* gcc.target/arm/mve/intrinsics/vqrdmlsdhxq_m_s16.c: Use
check-function-bodies instead of scan-assembler checks. Use
extern "C" for C++ testing.
* gcc.target/arm/mve/intrinsics/vqrdmlsdhxq_m_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqrdmlsdhxq_m_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqrdmlsdhxq_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqrdmlsdhxq_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqrdmlsdhxq_s8.c: Likewise.

arm: improve tests for vqrdmlsdhq*

gcc/testsuite/ChangeLog:

* gcc.target/arm/mve/intrinsics/vqrdmlsdhq_m_s16.c: Use
check-function-bodies instead of scan-assembler checks. Use
extern "C" for C++ testing.
* gcc.target/arm/mve/intrinsics/vqrdmlsdhq_m_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqrdmlsdhq_m_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqrdmlsdhq_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqrdmlsdhq_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqrdmlsdhq_s8.c: Likewise.

arm: improve tests for vqdmlsdhxq*

gcc/testsuite/ChangeLog:

* gcc.target/arm/mve/intrinsics/vqdmlsdhxq_m_s16.c: Use
check-function-bodies instead of scan-assembler checks. Use
extern "C" for C++ testing.
* gcc.target/arm/mve/intrinsics/vqdmlsdhxq_m_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqdmlsdhxq_m_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqdmlsdhxq_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqdmlsdhxq_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqdmlsdhxq_s8.c: Likewise.

arm: improve tests for vqdmlsdhq*

gcc/testsuite/ChangeLog:

* gcc.target/arm/mve/intrinsics/vqdmlsdhq_m_s16.c: Use
check-function-bodies instead of scan-assembler checks. Use
extern "C" for C++ testing.
* gcc.target/arm/mve/intrinsics/vqdmlsdhq_m_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqdmlsdhq_m_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqdmlsdhq_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqdmlsdhq_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqdmlsdhq_s8.c: Likewise.

arm: improve tests for vqrdmlashq*

gcc/testsuite/ChangeLog:

* gcc.target/arm/mve/intrinsics/vqrdmlashq_n_s16.c: Use
check-function-bodies instead of scan-assembler checks. Use
extern "C" for C++ testing.
* gcc.target/arm/mve/intrinsics/vqrdmlashq_n_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqrdmlashq_n_s8.c: Likewise.

arm: improve tests for vqrdmladhxq*

gcc/testsuite/ChangeLog:

* gcc.target/arm/mve/intrinsics/vqrdmladhxq_m_s16.c: Use
check-function-bodies instead of scan-assembler checks. Use
extern "C" for C++ testing.
* gcc.target/arm/mve/intrinsics/vqrdmladhxq_m_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqrdmladhxq_m_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqrdmladhxq_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqrdmladhxq_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqrdmladhxq_s8.c: Likewise.

arm: improve tests for vqrdmladhq*

gcc/testsuite/ChangeLog:

* gcc.target/arm/mve/intrinsics/vqrdmladhq_m_s16.c: Use
check-function-bodies instead of scan-assembler checks. Use
extern "C" for C++ testing.
* gcc.target/arm/mve/intrinsics/vqrdmladhq_m_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqrdmladhq_m_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqrdmladhq_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqrdmladhq_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqrdmladhq_s8.c: Likewise.

arm: improve tests for vqdmladhxq*

gcc/testsuite/ChangeLog:

* gcc.target/arm/mve/intrinsics/vqdmladhxq_m_s16.c: Use
check-function-bodies instead of scan-assembler checks. Use
extern "C" for C++ testing.
* gcc.target/arm/mve/intrinsics/vqdmladhxq_m_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqdmladhxq_m_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqdmladhxq_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqdmladhxq_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqdmladhxq_s8.c: Likewise.

arm: improve tests for vqdmladhq*

gcc/testsuite/ChangeLog:

* gcc.target/arm/mve/intrinsics/vqdmladhq_m_s16.c: Use
check-function-bodies instead of scan-assembler checks. Use
extern "C" for C++ testing.
* gcc.target/arm/mve/intrinsics/vqdmladhq_m_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqdmladhq_m_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqdmladhq_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqdmladhq_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqdmladhq_s8.c: Likewise.

arm: improve tests and fix vqabsq*

gcc/ChangeLog:

* config/arm/mve.md (mve_vqabsq_s<mode>): Fix spacing.

gcc/testsuite/ChangeLog:

* gcc.target/arm/mve/intrinsics/vqabsq_m_s16.c: Use
check-function-bodies instead of scan-assembler checks. Use
extern "C" for C++ testing.
* gcc.target/arm/mve/intrinsics/vqabsq_m_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqabsq_m_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqabsq_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqabsq_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqabsq_s8.c: Likewise.

arm: improve tests for vcmulq*

gcc/testsuite/ChangeLog:

* gcc.target/arm/mve/intrinsics/vcmulq_f16.c: Use
check-function-bodies instead of scan-assembler checks. Use
extern "C" for C++ testing.
* gcc.target/arm/mve/intrinsics/vcmulq_f32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmulq_m_f16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmulq_m_f32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmulq_rot180_f16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmulq_rot180_f32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmulq_rot180_m_f16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmulq_rot180_m_f32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmulq_rot180_x_f16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmulq_rot180_x_f32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmulq_rot270_f16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmulq_rot270_f32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmulq_rot270_m_f16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmulq_rot270_m_f32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmulq_rot270_x_f16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmulq_rot270_x_f32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmulq_rot90_f16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmulq_rot90_f32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmulq_rot90_m_f16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmulq_rot90_m_f32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmulq_rot90_x_f16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmulq_rot90_x_f32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmulq_x_f16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmulq_x_f32.c: Likewise.

arm: improve tests for vcmlaq*

gcc/testsuite/ChangeLog:

* gcc.target/arm/mve/intrinsics/vcmlaq_f16.c: Use
check-function-bodies instead of scan-assembler checks. Use
extern "C" for C++ testing.
* gcc.target/arm/mve/intrinsics/vcmlaq_f32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmlaq_m_f16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmlaq_m_f32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmlaq_rot180_f16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmlaq_rot180_f32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmlaq_rot180_m_f16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmlaq_rot180_m_f32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmlaq_rot270_f16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmlaq_rot270_f32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmlaq_rot270_m_f16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmlaq_rot270_m_f32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmlaq_rot90_f16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmlaq_rot90_f32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmlaq_rot90_m_f16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmlaq_rot90_m_f32.c: Likewise.

arm: improve tests for vcaddq*

gcc/testsuite/ChangeLog:

* gcc.target/arm/mve/intrinsics/vcaddq_rot270_f16.c: Use
check-function-bodies instead of scan-assembler checks. Use
extern "C" for C++ testing.
* gcc.target/arm/mve/intrinsics/vcaddq_rot270_f32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_f16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_f32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_u16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_u8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcaddq_rot270_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcaddq_rot270_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcaddq_rot270_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcaddq_rot270_u16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcaddq_rot270_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcaddq_rot270_u8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_f16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_f32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_u16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_u8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcaddq_rot90_f16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcaddq_rot90_f32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_f16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_f32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_u16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_u8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcaddq_rot90_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcaddq_rot90_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcaddq_rot90_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcaddq_rot90_u16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcaddq_rot90_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcaddq_rot90_u8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_f16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_f32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_u16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_u8.c: Likewise.

arm: improve tests for vmulltq*

gcc/testsuite/ChangeLog:

* gcc.target/arm/mve/intrinsics/vmulltq_int_m_s16.c: Use
check-function-bodies instead of scan-assembler checks. Use
extern "C" for C++ testing.
* gcc.target/arm/mve/intrinsics/vmulltq_int_m_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmulltq_int_m_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmulltq_int_m_u16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmulltq_int_m_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmulltq_int_m_u8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmulltq_int_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmulltq_int_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmulltq_int_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmulltq_int_u16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmulltq_int_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmulltq_int_u8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmulltq_int_x_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmulltq_int_x_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmulltq_int_x_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmulltq_int_x_u16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmulltq_int_x_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmulltq_int_x_u8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmulltq_poly_m_p16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmulltq_poly_m_p8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmulltq_poly_p16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmulltq_poly_p8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmulltq_poly_x_p16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmulltq_poly_x_p8.c: Likewise.

arm: improve tests for vmullbq*

gcc/testsuite/ChangeLog:

* gcc.target/arm/mve/intrinsics/vmullbq_int_m_s16.c: Use
check-function-bodies instead of scan-assembler checks. Use
extern "C" for C++ testing.
* gcc.target/arm/mve/intrinsics/vmullbq_int_m_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmullbq_int_m_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmullbq_int_m_u16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmullbq_int_m_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmullbq_int_m_u8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmullbq_int_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmullbq_int_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmullbq_int_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmullbq_int_u16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmullbq_int_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmullbq_int_u8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmullbq_int_x_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmullbq_int_x_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmullbq_int_x_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmullbq_int_x_u16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmullbq_int_x_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmullbq_int_x_u8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmullbq_poly_m_p16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmullbq_poly_m_p8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmullbq_poly_p16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmullbq_poly_p8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmullbq_poly_x_p16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmullbq_poly_x_p8.c: Likewise.

arm: improve tests for vmulhq*

gcc/testsuite/ChangeLog:

* gcc.target/arm/mve/intrinsics/vmulhq_m_s16.c: Use
check-function-bodies instead of scan-assembler checks. Use
extern "C" for C++ testing.
* gcc.target/arm/mve/intrinsics/vmulhq_m_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmulhq_m_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmulhq_m_u16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmulhq_m_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmulhq_m_u8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmulhq_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmulhq_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmulhq_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmulhq_u16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmulhq_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmulhq_u8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmulhq_x_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmulhq_x_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmulhq_x_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmulhq_x_u16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmulhq_x_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmulhq_x_u8.c: Likewise.

arm: improve tests and fix vnegq*

gcc/ChangeLog:

* config/arm/mve.md (mve_vnegq_f<mode>, mve_vnegq_s<mode>):
Fix spacing.

gcc/testsuite/ChangeLog:

* gcc.target/arm/mve/intrinsics/vnegq_f16.c: Use
check-function-bodies instead of scan-assembler checks. Use
extern "C" for C++ testing.
* gcc.target/arm/mve/intrinsics/vnegq_f32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vnegq_m_f16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vnegq_m_f32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vnegq_m_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vnegq_m_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vnegq_m_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vnegq_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vnegq_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vnegq_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vnegq_x_f16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vnegq_x_f32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vnegq_x_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vnegq_x_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vnegq_x_s8.c: Likewise.
* gcc.target/arm/simd/mve-vneg.c: Update test.
* gcc.target/arm/simd/mve-vshr.c: Likewise

arm: improve tests and fix vclzq*

gcc/ChangeLog:

* config/arm/mve.md (@mve_vclzq_s<mode>): Fix spacing.

gcc/testsuite/ChangeLog:

* gcc.target/arm/mve/intrinsics/vclzq_m_s16.c: Use
check-function-bodies instead of scan-assembler checks. Use
extern "C" for C++ testing.
* gcc.target/arm/mve/intrinsics/vclzq_m_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vclzq_m_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vclzq_m_u16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vclzq_m_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vclzq_m_u8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vclzq_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vclzq_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vclzq_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vclzq_u16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vclzq_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vclzq_u8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vclzq_x_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vclzq_x_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vclzq_x_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vclzq_x_u16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vclzq_x_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vclzq_x_u8.c: Likewise.
* gcc.target/arm/simd/mve-vclz.c: Update test.

arm: improve tests and fix vclsq*

gcc/ChangeLog:

* config/arm/mve.md (mve_vclsq_s<mode>): Fix spacing.

gcc/testsuite/ChangeLog:

* gcc.target/arm/mve/intrinsics/vclsq_m_s16.c: Use
check-function-bodies instead of scan-assembler checks. Use extern
"C" for C++ testing.
* gcc.target/arm/mve/intrinsics/vclsq_m_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vclsq_m_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vclsq_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vclsq_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vclsq_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vclsq_x_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vclsq_x_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vclsq_x_s8.c: Likewise.

tree-optimization/108523 - fix endless iteration in VN

The following fixes not converging iteration in value-numbering of
PHI nodes when we use an equivalence to prove the PHI node is
degenerate. We have to avoid the situation where we oscillate
between the two equivalent values because the result is fed back
via a backedge.

PR tree-optimization/108523
* tree-ssa-sccvn.cc (visit_phi): Avoid using the exclusive
backedge value for the result when using predication to
prove equivalence.

Fixup LTO internal docs for option processing

Andreas noticed that when I removed lto_read_all_file_options I
failed to update the internals manual which refers to it. The
following attempts to reflect the current situation.

* doc/lto.texi (Command line options): Reword and update reference
to removed lto_read_all_file_options.

aarch64: Restore generation of SVE UQDEC instructions

The addition of TARGET_CSSC meant that we wouldn't generate SVE
UQDEC instructions unless +cssc was also enabled.

Fixes:
- gcc.target/aarch64/sve/slp_4.c
- gcc.target/aarch64/sve/slp_10.c
- gcc.target/aarch64/sve/while_4.c

gcc/
* config/aarch64/aarch64.md (umax<mode>3): Separate the CNT and CSSC
tests.

aarch64: Update sizeless tests

The sizeless-*.c tests contained (deliberately) invalid constructors
that had two errors. The first error now suppresses the second error,
but the second error was the main focus of the test. This patch
therefore rewrites it into a different form.

gcc/testsuite/
* gcc.target/aarch64/sve/acle/general-c/sizeless-1.c: Avoid
"initializer element is not constant" error.
* gcc.target/aarch64/sve/acle/general-c/sizeless-2.c: Likewise.

doc/contrib.texi: Add Jose E. Marchesi

gcc/ChangeLog:

* doc/contrib.texi: Add Jose E. Marchesi.

aarch64: Add aarch64*-*-* to the list of vect_long_long targets

This patch adds aarch64 to the list of vect_long_long targets. Regression tested
on aarch64-none-linux-gnu.

gcc/testsuite/ChangeLog:

* lib/target-supports.exp (check_effective_target_vect_long_long): Add
aarch64 to list of targets supporting long long vectorization.

store-merging: Disable string_concatenate mode if start or end aren't byte aligned [PR108498]

The first of the following testcases is miscompiled on powerpc64-linux -O2
-m64 at least, the latter at least on x86_64-linux -m32/-m64.
Since GCC 11 store-merging has a separate string_concatenation mode which
turns stores into setting a MEM_REF from a STRING_CST.
This mode is triggered if at least one of the to be merged stores
is a STRING_CST store and either the first store (to earliest address)
is that STRING_CST store or the first store is 8-bit INTEGER_CST store
and then there are some rules when to turn that mode off or not merge
further stores into it.

The problem with these 2 testcases is that the actual implementation
relies on start/width of the store to be at byte boundaries, as it
simply creates a char array, MEM_REF can be only on byte boundaries
and the char array too, plus obviously STRING_CST as well.
But as can be easily seen in the second testcase, nothing verifies this,
while the first store has to be a STRING_CST (which will be aligned)
or 8-bit INTEGER_CST, that 8-bit INTEGER_CST store could be a bitfield
store, nothing verifies any stores in between whether they actually are
8-bit and aligned, the only major requirement is that all the stores
are consecutive.

For GCC 14 I think we should reconsider this, simply treat STRING_CST
stores during the merging like INTEGER_CST stores and deal with it only
during split_group where we can create multiple parts, this part
would be a normal store, this part would be STRING_CST store, this part
another normal store etc. But that is quite a lot of work, the following
patch just disables the string_concatenate mode if boundaries aren't byte
aligned in the spot where we disable it if it is too short too.
If that happens, we'll just try to do the merging using normal 1/2/4/8 etc.
byte stores as usually with RMW masking for any bits that shouldn't be
touched or punt if we end up with too many stores compared to the original.

Note, an original STRING_CST store will count as one store in that case,
something we might want to reconsider later too (but, after all, CONSTRUCTOR
stores (aka zeroing) already have the same problem, they can be large and
expensive and we still count them as one store).

2023-01-25 Jakub Jelinek <jakub@redhat.com>

PR tree-optimization/108498
* gimple-ssa-store-merging.cc (class store_operand_info):
End coment with full stop rather than comma.
(split_group): Likewise.
(merged_store_group::apply_stores): Clear string_concatenation if
start or end aren't on a byte boundary.

* gcc.c-torture/execute/pr108498-1.c: New test.
* gcc.c-torture/execute/pr108498-2.c: New test.

tree-optimization/108522 Use COMPONENT_REF offset when available

Use the offset in TREE_OPERAND(component_ref, 2) when available instead
of DECL_FIELD_OFFSET when trying to compute offset for a COMPONENT_REF.

Co-authored-by: Jakub Jelinek <jakub@redhat.com>
gcc/ChangeLog:

PR tree-optimization/108522
* tree-object-size.cc (compute_object_offset): Use
TREE_OPERAND(ref, 2) for COMPONENT_REF when available.

gcc/testsuite/ChangeLog:

PR tree-optimization/108522
* gcc.dg/builtin-dynamic-object-size-0.c
(test_dynarray_struct_member): New test.
(main): Call it.

Signed-off-by: Siddhesh Poyarekar <siddhesh@gotplt.org>

Daily bump.

libstdc++: Use /etc/sysconfig/clock for std::chrono::current_zone() [PR108530]

On some systems /etc/localtime is a tzfile, not a symlink to one. We
cannot use it to determine the current time zone in that case. See if
/etc/sysconfig/clock sets the variable DEFAULT_TIMEZONE instead.

libstdc++-v3/ChangeLog:

PR libstdc++/108530
* src/c++20/tzdb.cc (current_zone): Look for DEFAULT_TIMEZONE in
/etc/sysconfig/clock.

libstdc++: Include std::ranges::subrange definition in <tuple> [PR102301]

In order for std::make_from_tuple to work with tuple-like types, the
overloads of std::get for those types must have been declared before the
definition of std::make_from_tuple. That means we need to include the
definition of std::ranges::subrange in <tuple>.

The definitions of std::pair and its overloads of std::get are already
included in <tuple>. We provide forward declarations of std::array and
its std::get overloads in <tuple>. We could just declare subrange
without defining it, and give ranges::get a non-deduced return type,
like so:

  namespace ranges
  {
    enum class subrange_kind : bool { unsized, sized};

    template<input_or_output_iterator I, sentinel_for<I> S,
     subrange_kind K>
      requires (K == subrange_kind::sized || !sized_sentinel_for<S, I>)
      class subrange;

    template<size_t _Num, class _It, class _Sent, subrange_kind _Kind>
      requires (_Num < 2)
      constexpr __conditional_t<_Num == 0, _It, _Sent>
      get(const subrange<_It, _Sent, _Kind>& __r);

    template<size_t _Num, class _It, class _Sent, subrange_kind _Kind>
      requires (_Num < 2)
      constexpr __conditional_t<_Num == 0, _It, _Sent>
      get(subrange<_It, _Sent, _Kind>&& __r)
  }
  using ranges::get;

It is a bit late in the GCC 13 dev cycle to do this, so just include the
right headers for now.

Also add the dangling check to std::make_from_tuple added by P2255.

libstdc++-v3/ChangeLog:

PR libstdc++/102301
* include/bits/ranges_base.h: Include <bits/stl_iterator.h> for
std::make_reverse_iterator.
* include/std/tuple: Include <bits/ranges_util.h> for subrange.
(make_from_tuple): Add static assertion from P2255 to diagnose
dangling references.
* testsuite/20_util/tuple/make_from_tuple/dangling_ref.cc: New test.
* testsuite/20_util/tuple/make_from_tuple/tuple_like.cc: New test.

testsuite: Fix up new51.C test on various targets [PR108533]

The test fails on targets where size_t is not unsigned long
due to extra diagnostics.

As the testcase is tested in C++98 too, I'm not using decltype (sizeof 0)
but __SIZE_TYPE__.

2023-01-25 Jakub Jelinek <jakub@redhat.com>

PR c++/107329
PR testsuite/108533
* g++.dg/init/new51.C (size_t): New typedef.
(RexxClass::operator new, RexxClass::operator delete): Use size_t
instead of unsigned long.

Introduce new module to create search paths of dynamic strings.

Introduce a simple DynamicStringPath module to allow the front end
to create and modify a search path from dynamic strings.

gcc/m2/ChangeLog:

* Make-lang.in (GM2-COMP-BOOT-DEFS): Add
DynamicStringPath.def.
(GM2-COMP-BOOT-MODS): Add DynamicStringPath.mod.
(GM2-COMP-DEFS): Add DynamicStringPath.def.
(GM2-COMP-MODS): Add DynamicStringPath.mod.
($(objdir)/m2/gm2-libs-min/SYSTEM.def): Split path into
multiple -I components.
($(objdir)/m2/gm2-libs/SYSTEM.def): Ditto.
($(objdir)/m2/gm2-libs-coroutines/SYSTEM.def): Ditto.
* gm2-compiler/M2Options.mod: Import DynamicStringPath.
(SetSearchPath): Reimplement using DynamicStringPath
procedures.
* gm2-compiler/M2Search.def (InitSearchPath): Remove.
(PrependSearchPath): Remove.
* gm2-compiler/M2Search.mod (SFIO): Remove import.
(DynamicStringPath): Add import.
(Directory): Remove.
(UserPath): Remove.
(InitialPath): Remove.
(InitSearchPath): Remove.
(PrependSearchPath): Remove.
(FindSourceFile): Re-implement.
(FindSourceDefFile): Re-implement.
(FindSourceModFile): Re-implement.
* gm2-gcc/init.cc (_M2_DynamicStringPath_init):
New prototype.
(init_FrontEndInit): Call _M2_DynamicStringPath_init.
* tools-src/makeSystem: Allow multiple -I paths.
* gm2-compiler/DynamicStringPath.def: New file.
* gm2-compiler/DynamicStringPath.mod: New file.
* gm2-gcc/m2options.h (M2Options_SetMakeIncludePath): Add
prototype.
Co-Authored by: Iain Sandoe <iain@sandoe.co.uk>

libgm2/ChangeLog:

* libm2cor/Makefile.am (SYSTEM.def): Split path into
multiple -I components.
* libm2cor/Makefile.in: Rebuild.
* libm2min/Makefile.am (SYSTEM.def): Split path into
multiple -I components.
* libm2min/Makefile.in: Rebuild.
* libm2iso/Makefile.am (SYSTEM.def): Split path into
multiple -I components.
* libm2iso/Makefile.in: Rebuild.
Co-Authored by: Iain Sandoe <iain@sandoe.co.uk>

Signed-off-by: Gaius Mulley <gaiusmod2@gmail.com>

c++: "" #pragma at BOF [PR108504]

Since r11-2095 we pass flags to cp_lexer_get_preprocessor_token, and
cp_lexer_new_main passes C_LEX_STRING_NO_JOIN when lexing most of the
translation unit, but doesn't do that for the very first token; as a
result, if the first token is a string literal, we try to join strings and
get confused if that encounters a pragma.

PR c++/108504

gcc/cp/ChangeLog:

* parser.cc (cp_lexer_new_main): Pass C_LEX_STRING_NO_JOIN for first
token, too.

gcc/testsuite/ChangeLog:

* g++.dg/ext/pragma1.C: New test.

c++: static lambda in template [PR108526]

tsubst_lambda_expr uses build_memfn_type to build a METHOD_TYPE for the new
lamba op(). This is not what we want for a C++23 static op(), but since we
also use that METHOD_TYPE to communicate the closure type down to
tsubst_function_decl, let's wait and turn it back at that point.

PR c++/108526

gcc/cp/ChangeLog:

* pt.cc (tsubst_function_decl): Handle static lambda.

gcc/testsuite/ChangeLog:

* g++.dg/cpp23/static-operator-call5.C: New test.

xtensa: Revise complex hard register clobber elimination

In the previously posted patch
"xtensa: Make complex hard register clobber elimination more robust and accurate",
the check code for insns that refer to the [DS]Cmode hard register before
it is overwritten after it is clobbered is incomplete. Fortunately such
insns are seldom emitted, so it didn't matter.

This patch fixes that for the sake of completeness.

gcc/ChangeLog:

* config/xtensa/xtensa.md:
Fix exit from loops detecting references before overwriting in the
split pattern.

LRA: Always do elimination and only for hard register to check insn constraints

LRA does elimination but not always checks insn constraints in this case.
This results in LRA failure for PDP11 target whose addition is only 2-op insn.
The same might happen for other analogous targets.  The patch fixes this problem.

        PR rtl-optimization/108388

gcc/ChangeLog:

* lra-constraints.cc (get_hard_regno): Remove final_p arg.  Always
do elimination but only for hard register.
(operands_match_p, uses_hard_regs_p, process_alt_operands): Adjust
calls of get_hard_regno.

gcc/testsuite/ChangeLog:

* gcc.target/pdp11/pdp11.exp: New.
* gcc.target/pdp11/pr108388.c: New.

Fortran: ICE in transformational_result [PR108529]

gcc/fortran/ChangeLog:

PR fortran/108529
* simplify.cc (simplify_transformation): Do not try to simplify
transformational intrinsic when the ARRAY argument has a NULL shape.

gcc/testsuite/ChangeLog:

PR fortran/108529
* gfortran.dg/pr108529.f90: New test.

IBM zSystems: Fix TARGET_D_CPU_VERSIONS

In the context of D the interpretation of S390, S390X, and SystemZ is a
bit fuzzy.  The wording S390X was wrongly deprecated in favour of
SystemZ by commit
https://github.com/dlang/dlang.org/commit/3b50a4c3faf01c32234d0ef8be5f82915a61c23f
Thus, SystemZ is used for 64-bit targets, now, and S390 for 31-bit
targets.  However, in TARGET_D_CPU_VERSIONS depending on TARGET_ZARCH we
set the CPU version to SystemZ.  This is also the case if compiled for
31-bit targets leading to the following error:

libphobos/libdruntime/core/sys/posix/sys/stat.d:967:13: error: static assert:  '96u == 144u' is false
  967 |             static assert(stat_t.sizeof == 144);
      |             ^

Thus in order to keep this patch simple I went for keeping SystemZ for
64-bit targets and S390, as usual, for 31-bit targets and dropped the
distinction between ESA and z/Architecture.

gcc/ChangeLog:

* config/s390/s390-d.cc (s390_d_target_versions): Fix detection
of CPU version.

Change m2 lexical analysis to optionally consume C comments.

This patch allows a subsequent patch to turn on/off the consuming
of C comments.

gcc/m2/ChangeLog:

* m2.flex (cpreprocessor): Add temporary variable
which is initialized to 0.
(commentCLevel): New variable.
(endOfCComment): New function.
(splitSlashStar): New function to split /* into / and *
tokens.
(COMMENTC): New flex state.
("/*"): New rule to test whether we should treat /*
as a single token or as two tokens.
(<COMMENTC>.): New rule to skip a character.
(<COMMENTC>\n.*): New rule to consume the line.
(<COMMENTC>"*/"): New rule to call endOfCComment.

Signed-off-by: Gaius Mulley <gaiusmod2@gmail.com>

Bugfix ensure RTentity is a dependent of RTco.cc

RTco is a definition for C module and therefore there is no
RTco.mod. The RTco.cc uses RTentity and the import in RTco.def
ensures that cc1gm2 can build a graph of all dependencies
should -fscaffold-static be used.

gcc/m2/ChangeLog:

* gm2-libs-iso/RTco.def: Import RTentity.
Declare RTco as a definition for C module.

Signed-off-by: Gaius Mulley <gaiusmod2@gmail.com>

arm: Make MVE masked stores read memory operand [PR 108177]

This patch adds the memory operand of MVE masked stores as input operands to
mimic the 'partial' writes, to prevent erroneous write-after-write
optimizations as described in the PR.

gcc/ChangeLog:

PR target/108177
* config/arm/mve.md (mve_vstrbq_p_<supf><mode>, mve_vstrhq_p_fv8hf,
mve_vstrhq_p_<supf><mode>, mve_vstrwq_p_<supf>v4si): Add memory operand
as input operand.

gcc/testsuite/ChangeLog:

* gcc.target/arm/mve/pr108177-1-run.c: New test.
* gcc.target/arm/mve/pr108177-1.c: New test.
* gcc.target/arm/mve/pr108177-10-run.c: New test.
* gcc.target/arm/mve/pr108177-10.c: New test.
* gcc.target/arm/mve/pr108177-11-run.c: New test.
* gcc.target/arm/mve/pr108177-11.c: New test.
* gcc.target/arm/mve/pr108177-12-run.c: New test.
* gcc.target/arm/mve/pr108177-12.c: New test.
* gcc.target/arm/mve/pr108177-13-run.c: New test.
* gcc.target/arm/mve/pr108177-13.c: New test.
* gcc.target/arm/mve/pr108177-14-run.c: New test.
* gcc.target/arm/mve/pr108177-14.c: New test.
* gcc.target/arm/mve/pr108177-2-run.c: New test.
* gcc.target/arm/mve/pr108177-2.c: New test.
* gcc.target/arm/mve/pr108177-3-run.c: New test.
* gcc.target/arm/mve/pr108177-3.c: New test.
* gcc.target/arm/mve/pr108177-4-run.c: New test.
* gcc.target/arm/mve/pr108177-4.c: New test.
* gcc.target/arm/mve/pr108177-5-run.c: New test.
* gcc.target/arm/mve/pr108177-5.c: New test.
* gcc.target/arm/mve/pr108177-6-run.c: New test.
* gcc.target/arm/mve/pr108177-6.c: New test.
* gcc.target/arm/mve/pr108177-7-run.c: New test.
* gcc.target/arm/mve/pr108177-7.c: New test.
* gcc.target/arm/mve/pr108177-8-run.c: New test.
* gcc.target/arm/mve/pr108177-8.c: New test.
* gcc.target/arm/mve/pr108177-9-run.c: New test.
* gcc.target/arm/mve/pr108177-9.c: New test.
* gcc.target/arm/mve/pr108177-main.x: New test include.
* gcc.target/arm/mve/pr108177.x: New test include.

C-SKY: Fix wrong sysroot suffix when disable multilib.

The SYSROOT_SUFFIX_SPEC works even when multilib is disabled.
So when build no-multilib glibc toolchain and the options are
not same as MULTILIB_DEFAULTS, the sysroot will specify wrong
because the libc will not be installed as such.
This bug causes glibc regression test error:
https://sourceware.org/pipermail/libc-testresults/2023q1/010706.html
The error is:
/scratch/jmyers/glibc-bot/install/compilers/csky-linux-gnuabiv2/csky-glibc-linux-gnuabiv2/bin/ld: cannot find -lc: No such file or directory

gcc/
* config.gcc(csky-*-linux*): Define CSKY_ENABLE_MULTILIB
and only include 'csky/t-csky-linux' when enable multilib.
* config/csky/csky-linux-elf.h(SYSROOT_SUFFIX_SPEC): Don't
define it when disable multilib.

tree-optimization/108500 - avoid useless fast-query compute in CFG cleanup

CFG cleanup computes dominators before the loop over blocks looking
for merging opportunities. That computes also the fast-query DFS
numbers but that's a bit pointless since any CFG cleanup will invalidate
them immediately (they are re-computed before fixing up loops).
The following avoids this and fixes the SIGSEGV due to the deep
recursion in assign_dfs_numbers after inlining very many small
functions.

PR tree-optimization/108500
* dominance.h (calculate_dominance_info): Add parameter
to indicate fast-query compute, defaulted to true.
* dominance.cc (calculate_dominance_info): Honor
fast-query compute parameter.
* tree-cfgcleanup.cc (cleanup_tree_cfg_noloop): Do
not compute the dominator fast-query DFS numbers.

options: fix cl_target_option_print_diff() with strings

Fix an obvious copy-and-paste error where ptr1 was used instead of ptr2.
This bug caused the dump file produced by -fdump-ipa-inline-details to
not correctly show the difference in target options when a function
could not be inlined due to a target option mismatch.

gcc/ChangeLog:
PR bootstrap/90543
* optc-save-gen.awk: Fix copy-and-paste error.

Signed-off-by: Eric Biggers <ebiggers@google.com>

c++: Handle structured bindings like anon unions in initializers [PR108474]

As reported by Andrew Pinski, structured bindings (with the exception
of the ones using std::tuple_{size,element} and get which are really
standalone variables in addition to the binding one) also use
DECL_VALUE_EXPR and needs the same treatment in static initializers.

On Sun, Jan 22, 2023 at 07:19:07PM -0500, Jason Merrill wrote:
> Though, actually, why not instead fix expand_expr_real_1 (and staticp) to
> look through DECL_VALUE_EXPR?

Doing it when emitting the initializers seems to be too late to me,
we in various spots try to put parts of the static var DECL_INITIAL expressions
into the IL, or e.g. for varpool purposes remember which vars are referenced
there.

This patch moves it to record_reference, which is called from varpool_node::analyze
and so about the same time as gimplification of the bodies which also
replaces DECL_VALUE_EXPRs.

2023-01-24 Jakub Jelinek <jakub@redhat.com>

PR c++/108474
* cgraphbuild.cc: Include gimplify.h.
(record_reference): Replace VAR_DECLs with DECL_HAS_VALUE_EXPR_P with
their corresponding DECL_VALUE_EXPR expressions after unsharing.

* cp-gimplify.cc (cp_fold_r): Revert 2023-01-19 changes.

* g++.dg/cpp1z/decomp57.C: New test.
* g++.dg/cpp1z/decomp58.C: New test.

arm: Fix inclusion of arm-mlib.h header more than once (pr108505).

The patch fixes the build issue for arm-none-eabi target configured with
--with-multilib-list=aprofile,rmprofile, in which case the header file
arm/arm-mlib.h is being included more than once and the toolchain build
is failing (PR108505).

gcc/ChangeLog:

2023-01-24 Srinath Parvathaneni <srinath.parvathaneni@arm.com>

PR target/108505
* config.gcc (tm_file): Move the variable out of loop.

testsuite: Fix gcc.dg/vect/vect-bitfield-write-[23].c on SPARC [PR107808]

The gcc.dg/vect/vect-bitfield-write-[23].c tests FAIL on 32 and 64-bit
SPARC:

FAIL: gcc.dg/vect/vect-bitfield-write-2.c -flto -ffat-lto-objects
scan-tree-dump-times vect "vectorized 1 loops" 1
FAIL: gcc.dg/vect/vect-bitfield-write-2.c scan-tree-dump-times vect
"vectorized 1 loops" 1
FAIL: gcc.dg/vect/vect-bitfield-write-3.c -flto -ffat-lto-objects
scan-tree-dump-times vect "vectorized 1 loops" 1
FAIL: gcc.dg/vect/vect-bitfield-write-3.c scan-tree-dump-times vect
"vectorized 1 loops" 1

As discussed in the PR, they require vect_long_long support, but fail
to require that.

This patch fixes this.

Tested on sparc-sun-solaris2.11 and i386-pc-solaris2.11.

2023-01-20 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>

gcc/testsuite:
PR testsuite/107808
* gcc.dg/vect/vect-bitfield-write-2.c: Require vect_long_long.
* gcc.dg/vect/vect-bitfield-write-3.c: Likewise.

testsuite: Fix gcc.dg/vect/vect-fmax-1.c etc. on SPARC [PR104756]

The gcc.dg/vect/vect-fmax-?.c etc. tests FAIL on 32 and 64-bit SPARC:

FAIL: gcc.dg/vect/vect-fmax-1.c -flto -ffat-lto-objects scan-tree-dump vect
"Detected reduction"
FAIL: gcc.dg/vect/vect-fmax-1.c scan-tree-dump vect "Detected reduction"
FAIL: gcc.dg/vect/vect-fmax-2.c -flto -ffat-lto-objects scan-tree-dump vect
"Detected reduction"
FAIL: gcc.dg/vect/vect-fmax-2.c scan-tree-dump vect "Detected reduction"
FAIL: gcc.dg/vect/vect-fmax-3.c -flto -ffat-lto-objects scan-tree-dump vect
"Detected reduction"
FAIL: gcc.dg/vect/vect-fmax-3.c scan-tree-dump vect "Detected reduction"
FAIL: gcc.dg/vect/vect-fmin-1.c -flto -ffat-lto-objects scan-tree-dump vect
"Detected reduction"
FAIL: gcc.dg/vect/vect-fmin-1.c -flto -ffat-lto-objects scan-tree-dump vect
"Detected reduction"
FAIL: gcc.dg/vect/vect-fmin-1.c scan-tree-dump vect "Detected reduction"
FAIL: gcc.dg/vect/vect-fmin-1.c scan-tree-dump vect "Detected reduction"
FAIL: gcc.dg/vect/vect-fmin-2.c -flto -ffat-lto-objects scan-tree-dump vect
"Detected reduction"
FAIL: gcc.dg/vect/vect-fmin-2.c scan-tree-dump vect "Detected reduction"
FAIL: gcc.dg/vect/vect-fmin-3.c -flto -ffat-lto-objects scan-tree-dump vect
"Detected reduction"
FAIL: gcc.dg/vect/vect-fmin-3.c scan-tree-dump vect "Detected reduction"

As discussed in the PR, they require vect_float support, but the tests
don't declare it.

This patch fixes this.

Tested on sparc-sun-solaris2.11 and i386-pc-solaris2.11.

2023-01-20 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>

gcc/testsuite:
PR testsuite/104756
* gcc.dg/vect/vect-fmax-1.c: Require vect_float.
* gcc.dg/vect/vect-fmax-2.c: Likewise.
* gcc.dg/vect/vect-fmax-3.c: Likewise.
* gcc.dg/vect/vect-fmin-1.c: Likewise.
* gcc.dg/vect/vect-fmin-2.c: Likewise.
* gcc.dg/vect/vect-fmin-3.c: Likewise.

LoongArch: Fixed a compilation failure with '%c' in inline assembly [PR107731].

Co-authored-by: Yang Yujie <yangyujie@loongson.cn>
PR target/107731

gcc/ChangeLog:

* config/loongarch/loongarch.cc (loongarch_classify_address):
Add precessint for CONST_INT.
(loongarch_print_operand_reloc): Operand modifier 'c' is supported.
(loongarch_print_operand): Increase the processing of '%c'.
* doc/extend.texi: Adds documents for LoongArch operand modifiers.
And port the public operand modifiers information to this document.

gcc/testsuite/ChangeLog:

* gcc.target/loongarch/tst-asm-const.c: Moved to...
* gcc.target/loongarch/pr107731.c: ...here.

c++: TARGET_EXPR collapsing [PR107303]

In r13-2978 I tried to eliminate TARGET_EXPR around TARGET_EXPR by
discarding the outer one, but as in this testcase that breaks if the
TARGET_EXPR_SLOT of the outer one is used elsewhere. But it should always
be safe to strip the inner one; if its slot were reused, there would be a
COMPOUND_EXPR around the TARGET_EXPR.

For 107329, if we're setting *walk_subtrees, we also need to fold
TARGET_EXPR_CLEANUP.

PR c++/107303
PR c++/107329

gcc/cp/ChangeLog:

* cp-gimplify.cc (cp_fold_r) [TARGET_EXPR]: In case of double
TARGET_EXPR, keep the outer one instead of the inner one.
(maybe_replace_decl): New.

gcc/testsuite/ChangeLog:

* g++.dg/ext/builtin-shufflevector-5.C: New test.
* g++.dg/init/new51.C: New test.

Daily bump.

c++: TARGET_EXPR_ELIDING_P and std::move [PR107267]

With -ffold-simple-inlines, we turn calls to std::move into the static_cast
equivalent. In this testcase, this exposes the FindResult temporary to copy
elision which is not specified by the standard, through an optimization in
gimplify_modify_expr_rhs. Since the type is not TREE_ADDRESSABLE, this is
not detectable by the user, so we just need to soften the assert.

PR c++/107267

gcc/cp/ChangeLog:

* cp-gimplify.cc (cp_gimplify_init_expr): Allow unexpected elision
of trivial types.

gcc/testsuite/ChangeLog:

* g++.dg/cpp0x/move2.C: New test.

Fortran: fix NULL pointer dereference in gfc_check_dependency [PR108502]

gcc/fortran/ChangeLog:

PR fortran/108502
* dependency.cc (gfc_check_dependency): Prevent NULL pointer
dereference while recursively checking expressions.

gcc/testsuite/ChangeLog:

PR fortran/108502
* gfortran.dg/pr108502.f90: New test.

c++: Quash bogus -Wunused-value with new [PR107797]

We shouldn't emit "right operand of comma operator has no effect"
when that comma operator was created by the compiler for "new int{}".
convert_to_void/COMPOUND_EXPR already checks warning_suppressed_p so
we can just suppress -Wunused-value.

PR c++/107797

gcc/cp/ChangeLog:

* cvt.cc (ocp_convert): copy_warning when creating a new
COMPOUND_EXPR.
* init.cc (build_new_1): Suppress -Wunused-value on
compiler-generated COMPOUND_EXPRs.

gcc/testsuite/ChangeLog:

* g++.dg/warn/Wunused-value-1.C: New test.

c++: vector of class with bool ctor [PR108195]

The transformation done by r13-4564 to use the iterator constructor instead
of the initializer-list constructor breaks if the iterator pointers are
themselves treated as elements of an initializer-list, so check for that.

PR c++/108195

gcc/cp/ChangeLog:

* call.cc (build_user_type_conversion_1): Check whether the
iterators also find a list ctor.

gcc/testsuite/ChangeLog:

* g++.dg/cpp0x/initlist-vect2.C: New test.

Fortran: avoid ICE on invalid array subscript triplets [PR108501]

gcc/fortran/ChangeLog:

PR fortran/108501
* interface.cc (get_expr_storage_size): Check array subscript triplets
that we actually have integer values before trying to extract with
mpz_get_si.

gcc/testsuite/ChangeLog:

PR fortran/108501
* gfortran.dg/pr108501.f90: New test.

Fortran: fix ICE in check_charlen_present [PR108420]

gcc/fortran/ChangeLog:

PR fortran/108420
* iresolve.cc (check_charlen_present): Preserve character length if
there is no array constructor.

gcc/testsuite/ChangeLog:

PR fortran/108420
* gfortran.dg/pr108420.f90: New test.

c++: result location and explicit inst [PR108496]

In r13-4469 we started to build the RESULT_DECL in grokdeclarator, while we
still know the location of the return type. But in this testcase, we hit
that code again when parsing the explicit instantiation, and clobber the
DECL_RESULT that was previously used in parsing the function. So, only set
DECL_RESULT if it isn't already set.

PR c++/108496

gcc/cp/ChangeLog:

* decl.cc (grokdeclarator): Check whether DECL_RESULT is already
set.

gcc/testsuite/ChangeLog:

* g++.dg/template/explicit-instantiation5.C: New test.

libstdc++: [_GLIBCXX_DEBUG] Remove useless constructor checks

Creating a safe iterator from a normal iterator is done within the library where we
already know that it is done correctly. The rare situation where a user would use safe
iterators for his own purpose is non-Standard code so outside _GLIBCXX_DEBUG scope. For
those reasons the __msg_init_singular is useless and can be removed.

Additionally in the copy constructor used for post-increment and post-decrement operators
the __msg_init_copy_singular check can also be ommitted because of the preliminary
__msg_bad_incr and __msg_bad_decr checks.

libstdc++-v3/ChangeLog:

* include/debug/safe_iterator.h (_Safe_iterator<>::_Unchecked): New.
(_Safe_iterator(const _Safe_iterator&, _Unchecked)): New.
(_Safe_iterator::operator++(int)): Use latter.
(_Safe_iterator::operator--(int)): Likewise.
(_Safe_iterator(_Iterator, const _Safe_sequence_base*)): Remove !_M_insular()
check.
* include/debug/safe_local_iterator.h (_Safe_local_iterator<>::_Unchecked):
New.
(_Safe_local_iterator(const _Safe_local_iterator&, _Unchecked)): New.
(_Safe_local_iterator::operator++(int)): Use latter.
* src/c++11/debug.cc (_S_debug_messages): Add as comment the _Debug_msg_id
entry associated to the array entry.

modula-2, driver, Front end: Revise handling of I and L paths [PR108182].

The adds the includes in the FE as done in other GCC languages.
It also revises the library handling to avoid additional -L options
from hiding LIBDIR.

For the include/import paths as presented to the front end initialisation,
we capture them and then arrange to emit the 'standard library' paths in
the same order as specified for C.

The specs are tidied up.

The use of the internal prefix also fixes searching in a relocated compiler.

Signed-off-by: Iain Sandoe <iain@sandoe.co.uk>
PR modula2/108182
PR modula2/108480

gcc/m2/ChangeLog:

* Make-lang.in: Pass libsubdir to the language init
build.
* gm2-lang.cc (INCLUDE_VECTOR): Define.
(add_one_import_path): New.
(add_m2_import_paths): New.
(gm2_langhook_post_options): Arrange to add the include
paths (and add the system ones) in the same order as C
uses.
* gm2spec.cc (build_archive_path): Remove.
(add_default_combination): Remove.
(add_default_archives): Remove.
(add_default_libs): We no longer need a '-L' option, just
emit the -l and each library in use.
(build_include_path): Remove.
(add_include): Remove.
(add_default_includes): Remove.
(library_installed): Remove.
(check_valid_library): Remove.
(check_valid_list): Remove.
(convert_abbreviation): Diagnose unhandled cases.
(lang_specific_driver): Skip options where we will add back
a validated version.
* lang-specs.h (M2CPP): Reformat, append %I when -fcpp is not
in use. Revise the cc1gm2 spec to omit mentioning options that
are handled in the c pre-processor line.
* lang.opt: Allow preprocessing and path options as input to the
cc1gm2 invocation, so that they can be passed to the preprocessor
invocation.

modula-2: Fix stack size request in initPreemptive [PR108405]

As noted in the PR, the problem is that we make a request for additional
stack that violates the constraints on some systems.

This patch chooses a value that is divisible by common OS page sizes.

TODO: the user value should be checked and then an exception thrown if it
is not suitable.

Signed-off-by: Iain Sandoe <iain@sandoe.co.uk>
PR modula2/108405

gcc/m2/ChangeLog:

* gm2-libs-iso/Preemptive.mod (initPreemptive): Use a value for
extra space that is divisible by common OS pagesizes.

arm: Documentation fix for -mbranch-protection option.

This patch fixes the documentation for -mbranch-protection command line option.

gcc/ChangeLog:

2023-01-23 Srinath Parvathaneni <srinath.parvathaneni@arm.com>

* doc/invoke.texi (-mbranch-protection): Update documentation.

sparc: Don't add crtfastmath.o for -shared

Don't add crtfastmath.o for -shared to avoid altering the FP
environment when loading a shared library.

PR target/55522
* config/sparc/freebsd.h (ENDFILE_SPEC): Don't add crtfastmath.o
for -shared.
* config/sparc/linux.h (ENDFILE_SPEC): Likewise.
* config/sparc/linux64.h (ENDFILE_SPEC): Likewise.
* config/sparc/sp-elf.h (ENDFILE_SPEC): Likewise.
* config/sparc/sp64-elf.h (ENDFILE_SPEC): Likewise.

arm: Add support for new frame unwinding instruction "0xb5".

This patch adds support for Arm frame unwinding instruction "0xb5" [1]. When
an exception is taken and "0xb5" instruction is encounter during runtime
stack-unwinding, we use effective vsp as modifier in pointer authentication.
On completion of stack unwinding if "0xb5" instruction is not encountered
then CFA will be used as modifier in pointer authentication.

[1] https://github.com/ARM-software/abi-aa/releases/download/2022Q3/ehabi32.pdf

libgcc/ChangeLog:

2022-11-09 Srinath Parvathaneni <srinath.parvathaneni@arm.com>

* config/arm/pr-support.c (__gnu_unwind_execute): Decode opcode
"0xb5".

arm: Add support for dwarf debug directives and pseudo hard-register for PAC feature.

This patch teaches the DWARF support in gcc about RA_AUTH_CODE pseudo hard-register and also
updates the ".save", ".cfi_register", ".cfi_offset", ".cfi_restore" directives accordingly.
This patch also adds support to emit ".pacspval" directive when "pac ip, lr, sp" instruction
in generated in the assembly.

RA_AUTH_CODE register number is 107 and it's dwarf register number is 143.

Applying this patch on top of PACBTI series posted here
https://gcc.gnu.org/pipermail/gcc-patches/2022-August/599658.html and when compiling the following
test.c with "-march=armv8.1-m.main+mve+pacbti -mbranch-protection=pac-ret -mthumb -mfloat-abi=hard
fasynchronous-unwind-tables -g -O0 -S" command line options, the assembly output after this patch
looks like below:

$cat test.c

void fun1(int a);
void fun(int a,...)
{
  fun1(a);
}

int main()
{
  fun (10);
  return 0;
}

$ arm-none-eabi-gcc -march=armv8.1-m.main+mve+pacbti -mbranch-protection=pac-ret -mthumb -mfloat-abi=hard
-fasynchronous-unwind-tables -g -O0 -S test.s

Assembly output:
...
fun:
...
        .pacspval
        pac     ip, lr, sp
        .cfi_register 143, 12
        push    {r3, r7, ip, lr}
        .save {r3, r7, ra_auth_code, lr}
...
        .cfi_offset 143, -24
...
        .cfi_restore 143
...
        aut     ip, lr, sp
        bx      lr
...
main:
...
        .pacspval
        pac     ip, lr, sp
        .cfi_register 143, 12
        push    {r3, r7, ip, lr}
        .save {r3, r7, ra_auth_code, lr}
...
        .cfi_offset 143, -8
...
        .cfi_restore 143
...
        aut     ip, lr, sp
        bx      lr
...

gcc/ChangeLog:

2023-01-11  Srinath Parvathaneni  <srinath.parvathaneni@arm.com>

* config/arm/aout.h (ra_auth_code): Add entry in enum.
* config/arm/arm.cc (emit_multi_reg_push): Add RA_AUTH_CODE register
to dwarf frame expression.
(arm_emit_multi_reg_pop): Restore RA_AUTH_CODE register.
(arm_expand_prologue): Update frame related information and reg notes
for pac/pacbit insn.
(arm_regno_class): Check for pac pseudo reigster.
(arm_dbx_register_number): Assign ra_auth_code register number in dwarf.
(arm_init_machine_status): Set pacspval_needed to zero.
(arm_debugger_regno): Check for PAC register.
(arm_unwind_emit_sequence): Print .save directive with ra_auth_code
register.
(arm_unwind_emit_set): Add entry for IP_REGNUM in switch case.
(arm_unwind_emit): Update REG_CFA_REGISTER case._
* config/arm/arm.h (FIRST_PSEUDO_REGISTER): Modify.
(DWARF_PAC_REGNUM): Define.
(IS_PAC_REGNUM): Likewise.
(enum reg_class): Add PAC_REG entry.
(machine_function): Add pacbti_needed state to structure.
* config/arm/arm.md (RA_AUTH_CODE): Define.

gcc/testsuite/ChangeLog:

2023-01-11  Srinath Parvathaneni  <srinath.parvathaneni@arm.com>

* g++.target/arm/pac-1.C: New test.
* gcc.target/arm/pac-15.c: Likewise.

arm: Add pacbti related multilib support for armv8.1-m.main.

This patch adds the support for pacbti multlilib linking by making
"-mbranch-protection=none" as default multilib option for arm-none-eabi
target.

Eg 1.

If the passed command line flags are (without mbranch-protection):
a) -march=armv8.1-m.main+mve -mfloat-abi=hard -mfpu=auto

"-mbranch-protection=none" will be used in the multilib matching.

Eg 2.

If the passed command line flags are (with mbranch-protection):
a) -march=armv8.1-m.main+mve+pacbti -mfloat-abi=hard -mfpu=auto  -mbranch-protection=pac-ret

"-mbranch-protection=standard" will be used in the multilib matching.

gcc/ChangeLog:

2023-01-11  Srinath Parvathaneni  <srinath.parvathaneni@arm.com>

* config.gcc ($tm_file): Update variable.
* config/arm/arm-mlib.h: Create new header file.
* config/arm/t-rmprofile (MULTI_ARCH_DIRS_RM): Rename mbranch-protection
multilib arch directory.
(MULTILIB_REUSE): Add multilib reuse rules.
(MULTILIB_MATCHES): Add multilib match rules.

gcc/testsuite/ChangeLog:

2023-01-11  Srinath Parvathaneni  <srinath.parvathaneni@arm.com>

* gcc.target/arm/multilib.exp (multilib_config "rmprofile"): Update
tests.
* gcc.target/arm/pac-12.c: New test.
* gcc.target/arm/pac-13.c: Likewise.
* gcc.target/arm/pac-14.c: Likewise.

arm: Add support for Arm Cortex-M85 CPU.

This patch adds the -mcpu support for the Arm Cortex-M85 CPU which is
an Armv8.1-M Mainline CPU supporting MVE and PACBTI by default.

-mpcu=cortex-m85 switch by default matches to -march=armv8.1-m.main+pacbti+mve.fp+fp.dp.

Also following options are provided to disable default features.
+nomve.fp (disables MVE Floating point)
+nomve (disables MVE Integer and MVE Floating point)
+nodsp (disables dsp, MVE Integer and MVE Floating point)
+nopacbti (disables pacbti)
+nofp (disables floating point and MVE floating point)

gcc/ChangeLog:

2022-08-12 Srinath Parvathaneni <srinath.parvathaneni@arm.com>

* config/arm/arm-cpus.in (cortex-m85): Define new CPU.
* config/arm/arm-tables.opt: Regenerate.
* config/arm/arm-tune.md: Likewise.
* doc/invoke.texi (Arm Options): Document -mcpu=cortex-m85.
* (-mfix-cmse-cve-2021-35465): Likewise.

gcc/testsuite/ChangeLog:

2022-08-12 Srinath Parvathaneni <srinath.parvathaneni@arm.com>

* gcc.target/arm/multilib.exp: Add tests for cortex-m85.

tree-optimization/108482 - remove stray .LOOP_DIST_ALIAS calls

The following deals with .LOOP_DIST_ALIAS surviving vectorization
because any of the loops involved were elided between loop distribution
and vectorization. As opposed to .LOOP_VECTORIZED which exists only
between if-conversion and vectorization with no intermediate passes
this is more difficult to deal with in advance and thus cleaning
up after vectorization looks better. There's the unconditional
vector lowering pass which looks like a good place for this (for
SIMD uid we have pass_simduid_cleanup).

PR tree-optimization/108482
* tree-vect-generic.cc (expand_vector_operations): Fold remaining
.LOOP_DIST_ALIAS calls.

* gcc.dg/torture/pr108482.c: New testcase.

[PATCH 12/15] arm: implement bti injection

Hi all,

this patch enables Branch Target Identification Armv8.1-M Mechanism
[1].

This is achieved by using the bti pass made common with Aarch64.

The pass iterates through the instructions and adds the necessary BTI
instructions at the beginning of every function and at every landing
pads targeted by indirect jumps.

Best Regards

  Andrea

[1]
<https://community.arm.com/developer/ip-products/processors/b/processors-ip-blog/posts/armv8-1-m-pointer-authentication-and-branch-target-identification-extension>

gcc/ChangeLog

2022-04-07  Andrea Corallo  <andrea.corallo@arm.com>

* config.gcc (arm*-*-*): Add 'aarch-bti-insert.o' object.
* config/arm/arm-protos.h: Update.
* config/arm/aarch-common-protos.h: Declare
'aarch_bti_arch_check'.
* config/arm/arm.cc (aarch_bti_enabled) Update.
(aarch_bti_j_insn_p, aarch_pac_insn_p, aarch_gen_bti_c)
(aarch_gen_bti_j, aarch_bti_arch_check): New functions.
* config/arm/arm.md (bti_nop): New insn.
* config/arm/t-arm (PASSES_EXTRA): Add 'arm-passes.def'.
(aarch-bti-insert.o): New target.
* config/arm/unspecs.md (VUNSPEC_BTI_NOP): New unspec.
* config/arm/aarch-bti-insert.cc (rest_of_insert_bti): Verify arch
compatibility.
(gate): Make use of 'aarch_bti_arch_check'.
* config/arm/arm-passes.def: New file.
* config/aarch64/aarch64.cc (aarch_bti_arch_check): New function.

gcc/testsuite/ChangeLog

2022-04-07  Andrea Corallo  <andrea.corallo@arm.com>

* gcc.target/arm/bti-1.c: New testcase.
* gcc.target/arm/bti-2.c: Likewise.

[PATCH 11/15] aarch64: Make bti pass generic so it can be used by the arm backend

Hi all,

this patch splits and restructures the aarch64 bti pass code in order
to have it usable by the arm backend as well. These changes have no
functional impact.

Best Regards

Andrea

gcc/Changelog

* config.gcc (aarch64*-*-*): Rename 'aarch64-bti-insert.o' into
'aarch-bti-insert.o'.
* config/aarch64/aarch64-protos.h: Remove 'aarch64_bti_enabled'
proto.
* config/aarch64/aarch64.cc (aarch_bti_enabled): Rename.
(aarch_bti_j_insn_p, aarch_pac_insn_p): New functions.
(aarch64_output_mi_thunk)
(aarch64_print_patchable_function_entry)
(aarch64_file_end_indicate_exec_stack): Update renamed function
calls to renamed functions.
* config/aarch64/aarch64-c.cc (aarch64_update_cpp_builtins): Likewise.
* config/aarch64/t-aarch64 (aarch-bti-insert.o): Update
target.
* config/aarch64/aarch64-bti-insert.cc: Delete.
* config/arm/aarch-bti-insert.cc: New file including and
generalizing code from aarch64-bti-insert.cc.
* config/arm/aarch-common-protos.h: Update.

[PATCH 10/15] arm: Implement cortex-M return signing address codegen

Hi all,

this patch enables address return signature and verification based on
Armv8.1-M Pointer Authentication [1].

To sign the return address, we use the PAC R12, LR, SP instruction
upon function entry.  This is signing LR using SP and storing the
result in R12.  R12 will be pushed into the stack.

During function epilogue R12 will be popped and AUT R12, LR, SP will
be used to verify that the content of LR is still valid before return.

Here an example of PAC instrumented function prologue and epilogue:

void foo (void);

int main()
{
  foo ();
  return 0;
}

Compiled with '-march=armv8.1-m.main -mbranch-protection=pac-ret
-mthumb' translates into:

main:
pac ip, lr, sp
push {r3, r7, ip, lr}
add r7, sp, #0
bl foo
movs r3, #0
mov r0, r3
pop {r3, r7, ip, lr}
aut ip, lr, sp
bx lr

The patch also takes care of generating a PACBTI instruction in place
of the sequence BTI+PAC when Branch Target Identification is enabled
contextually.

Ex. the previous example compiled with '-march=armv8.1-m.main
-mbranch-protection=pac-ret+bti -mthumb' translates into:

main:
pacbti ip, lr, sp
push {r3, r7, ip, lr}
add r7, sp, #0
bl foo
movs r3, #0
mov r0, r3
pop {r3, r7, ip, lr}
aut ip, lr, sp
bx lr

As part of previous upstream suggestions a test for varargs has been
added and '-mtpcs-frame' is deemed being incompatible with this return
signing address feature being introduced.

[1] <https://community.arm.com/developer/ip-products/processors/b/processors-ip-blog/posts/armv8-1-m-pointer-authentication-and-branch-target-identification-extension>

gcc/
* config/arm/arm.h (arm_arch8m_main): Declare it.
* config/arm/arm-protos.h (arm_current_function_pac_enabled_p):
Declare it.
* config/arm/arm.cc (arm_arch8m_main): Define it.
(arm_option_reconfigure_globals): Set arm_arch8m_main.
(arm_compute_frame_layout, arm_expand_prologue)
(thumb2_expand_return, arm_expand_epilogue)
(arm_conditional_register_usage): Update for pac codegen.
(arm_current_function_pac_enabled_p): New function.
(aarch_bti_enabled) New function.
(use_return_insn): Return zero when pac is enabled.
* config/arm/arm.md (pac_ip_lr_sp, pacbti_ip_lr_sp, aut_ip_lr_sp):
Add new patterns.
* config/arm/unspecs.md (UNSPEC_PAC_NOP)
(VUNSPEC_PACBTI_NOP, VUNSPEC_AUT_NOP): Add unspecs.

gcc/testsuite/

* gcc.target/arm/pac.h : New file.
* gcc.target/arm/pac-1.c : New test case.
* gcc.target/arm/pac-2.c : Likewise.
* gcc.target/arm/pac-3.c : Likewise.
* gcc.target/arm/pac-4.c : Likewise.
* gcc.target/arm/pac-5.c : Likewise.
* gcc.target/arm/pac-6.c : Likewise.
* gcc.target/arm/pac-7.c : Likewise.
* gcc.target/arm/pac-8.c : Likewise.
* gcc.target/arm/pac-9.c : Likewise.
* gcc.target/arm/pac-10.c : Likewise.
* gcc.target/arm/pac-11.c : Likewise.

[PATCH 8/15] arm: Introduce multilibs for PACBTI target feature

This patch add the following new multilibs.

thumb/v8.1-m.main+pacbti/mbranch-protection/nofp
thumb/v8.1-m.main+pacbti+dp/mbranch-protection/soft
thumb/v8.1-m.main+pacbti+dp/mbranch-protection/hard
thumb/v8.1-m.main+pacbti+fp/mbranch-protection/soft
thumb/v8.1-m.main+pacbti+fp/mbranch-protection/hard
thumb/v8.1-m.main+pacbti+mve/mbranch-protection/hard

Triggering the following compiler flags:

-mthumb -march=armv8.1-m.main+pacbti -mbranch-protection=standard -mfloat-abi=soft
-mthumb -march=armv8.1-m.main+pacbti+fp -mbranch-protection=standard -mfloat-abi=softfp
-mthumb -march=armv8.1-m.main+pacbti+fp -mbranch-protection=standard -mfloat-abi=hard
-mthumb -march=armv8.1-m.main+pacbti+fp.dp -mbranch-protection=standard -mfloat-abi=softfp
-mthumb -march=armv8.1-m.main+pacbti+fp.dp -mbranch-protection=standard -mfloat-abi=hard
-mthumb -march=armv8.1-m.main+pacbti+mve -mbranch-protection=standard -mfloat-abi=hard

gcc/

* config/arm/t-rmprofile: Add multilib rules for march +pacbti and
mbranch-protection.

gcc/testsuite/

* gcc.target/arm/multilib.exp: Add pacbti related entries.

[PATCH 7/15] arm: Emit build attributes for PACBTI target feature

This patch emits assembler directives for PACBTI build attributes as
defined by the
ABI.

<https://github.com/ARM-software/abi-aa/releases/download/2021Q1/addenda32.pdf>

gcc/ChangeLog:

* config/arm/arm.cc (arm_file_start): Emit EABI attributes for
Tag_PAC_extension, Tag_BTI_extension, TAG_BTI_use, TAG_PACRET_use.

gcc/testsuite/ChangeLog:

* gcc.target/arm/acle/pacbti-m-predef-1.c: New test.
* gcc.target/arm/acle/pacbti-m-predef-3.c: Likewise.
* gcc.target/arm/acle/pacbti-m-predef-6.c: Likewise.
* gcc.target/arm/acle/pacbti-m-predef-7.c: Likewise.

Co-Authored-By: Tejas Belagod <tbelagod@arm.com>

[PATCH 6/15] arm: Add pointer authentication for stack-unwinding runtime

This patch adds authentication for when the stack is unwound when an
exception is taken. All the changes here are done to the runtime code
in libgcc's unwinder code for Arm target. All the changes are guarded
under defined (__ARM_FEATURE_PAC_DEFAULT) and activated only if the
+pacbti feature is switched on for the architecture. This means that
switching on the target feature via -march or -mcpu is sufficient and
-mbranch-protection need not be enabled. This ensures that the
unwinder is authenticated only if the PACBTI instructions are
available in the non-NOP space as it uses AUTG. Just generating
PAC/AUT instructions using -mbranch-protection will not enable
authentication on the unwinder.

Pre-approved with the requested changes here
<https://gcc.gnu.org/pipermail/gcc-patches/2021-December/586555.html>.

gcc/ChangeLog:

* ginclude/unwind-arm-common.h (_Unwind_VRS_RegClass): Introduce
new pseudo register class _UVRSC_PAC.

libgcc/ChangeLog:
* config/arm/pr-support.c (__gnu_unwind_execute): Decode
exception opcode (0xb4) for saving RA_AUTH_CODE and authenticate
with AUTG if found.
* config/arm/unwind-arm.c (struct pseudo_regs): New.
(phase1_vrs): Introduce new field to store pseudo-reg state.
(phase2_vrs): Likewise.
(_Unwind_VRS_Get): Load pseudo register state from virtual reg set.
(_Unwind_VRS_Set): Store pseudo register state to virtual reg set.
(_Unwind_VRS_Pop): Load pseudo register value from stack into VRS.

Co-Authored-By: Tejas Belagod <tbelagod@arm.com>
Co-Authored-By: Srinath Parvathaneni <srinath.parvathaneni@arm.com>

[PATCH 5/15] arm: Implement target feature macros for PACBTI

This patch implements target feature macros when PACBTI is enabled
through the -march option or -mbranch-protection. The target feature
macros __ARM_FEATURE_PAC_DEFAULT and __ARM_FEATURE_BTI_DEFAULT are
specified in ARM ACLE
<https://developer.arm.com/documentation/101028/0012/5--Feature-test-macros?lang=en>
__ARM_FEATURE_PAUTH and __ARM_FEATURE_BTI are specified in the
pull-request <https://github.com/ARM-software/acle/pull/55>.

Approved here
<https://gcc.gnu.org/pipermail/gcc-patches/2021-December/586334.html>.

gcc/

* config/arm/arm-c.cc (arm_cpu_builtins): Define
__ARM_FEATURE_BTI_DEFAULT, __ARM_FEATURE_PAC_DEFAULT,
__ARM_FEATURE_PAUTH and __ARM_FEATURE_BTI.

gcc/testsuite/

* lib/target-supports.exp
(check_effective_target_mbranch_protection_ok): New function.
* gcc.target/arm/acle/pacbti-m-predef-2.c: New test.
* gcc.target/arm/acle/pacbti-m-predef-4.c: Likewise.
* gcc.target/arm/acle/pacbti-m-predef-5.c: Likewise.
* gcc.target/arm/acle/pacbti-m-predef-8.c: Likewise.
* gcc.target/arm/acle/pacbti-m-predef-9.c: Likewise.
* gcc.target/arm/acle/pacbti-m-predef-10.c: Likewise.
* gcc.target/arm/acle/pacbti-m-predef-11.c: Likewise.
* gcc.target/arm/acle/pacbti-m-predef-12.c: Likewise.

Co-Authored-By: Tejas Belagod <tbelagod@arm.com>

[PATCH 4/15] arm: Add testsuite library support for PACBTI target

Add targeting-checking entities for PACBTI in testsuite
framework.

Pre-approved with the requested changes here
<https://gcc.gnu.org/pipermail/gcc-patches/2021-December/586331.html>.

gcc/testsuite/ChangeLog

* lib/target-supports.exp:
(check_effective_target_arm_pacbti_hw): New.

gcc/ChangeLog:
* doc/sourcebuild.texi: Document arm_pacbti_hw.

Co-Authored-By: Tejas Belagod <tbelagod@arm.com>

[PATCH 3/15] arm: Add option -mbranch-protection

Add -mbranch-protection option. This option enables the
code-generation of pointer signing and authentication instructions in
function prologues and epilogues.

gcc/ChangeLog:

* config/arm/arm.cc (arm_configure_build_target): Parse and validate
-mbranch-protection option and initialize appropriate data structures.
* config/arm/arm.opt (-mbranch-protection): New option.
* doc/invoke.texi (Arm Options): Document it.

Co-Authored-By: Tejas Belagod <tbelagod@arm.com>
Co-Authored-By: Richard Earnshaw <Richard.Earnshaw@arm.com>

[PATCH 2/15] arm: Add Armv8.1-M Mainline target feature +pacbti

This patch adds the -march feature +pacbti to Armv8.1-M Mainline.
This feature enables pointer signing and authentication instructions
on M-class architectures.

Pre-approved here
<https://gcc.gnu.org/pipermail/gcc-patches/2021-December/586144.html>.

gcc/Changelog:

* config/arm/arm.h (TARGET_HAVE_PACBTI): New macro.
* config/arm/arm-cpus.in (pacbti): New feature.
* doc/invoke.texi (Arm Options): Document it.

Co-Authored-By: Tejas Belagod <tbelagod@arm.com>

[PATCH 1/15] arm: Make mbranch-protection opts parsing common to AArch32/64

Hi all,

This change refactors all the mbranch-protection option parsing code and
types to make it common to both AArch32 and AArch64 backends.

This change also pulls in some supporting types from AArch64 to make
it common (aarch_parse_opt_result).

The significant changes in this patch are the movement of all branch
protection parsing routines from aarch64.c to aarch-common.c and
supporting data types and static data structures.

This patch also pre-declares variables and types required in the
aarch32 back-end for moved variables for function sign scope and key
to prepare for the impending series of patches that support parsing
the feature mbranch-protection in the aarch32 back-end.

gcc/ChangeLog:

* common/config/aarch64/aarch64-common.cc: Include aarch-common.h.
(all_architectures): Fix comment.
(aarch64_parse_extension): Rename return type, enum value names.
* config/aarch64/aarch64-c.cc (aarch64_update_cpp_builtins): Rename
factored out aarch_ra_sign_scope and aarch_ra_sign_key variables.
Also rename corresponding enum values.
* config/aarch64/aarch64-opts.h (aarch64_function_type): Factor
out aarch64_function_type and move it to common code as
aarch_function_type in aarch-common.h.
* config/aarch64/aarch64-protos.h: Include common types header,
move out types aarch64_parse_opt_result and aarch64_key_type to
aarch-common.h
* config/aarch64/aarch64.cc: Move mbranch-protection parsing types
and functions out into aarch-common.h and aarch-common.cc. Fix up
all the name changes resulting from the move.
* config/aarch64/aarch64.md: Fix up aarch64_ra_sign_key type name change
and enum value.
* config/aarch64/aarch64.opt: Include aarch-common.h to import
type move. Fix up name changes from factoring out common code and
data.
* config/arm/aarch-common-protos.h: Export factored out routines to both
backends.
* config/arm/aarch-common.cc: Include newly factored out types.
Move all mbranch-protection code and data structures from
aarch64.cc.
* config/arm/aarch-common.h: New header that declares types shared
between aarch32 and aarch64 backends.
* config/arm/arm-protos.h: Declare types and variables that are
made common to aarch64 and aarch32 backends - aarch_ra_sign_key,
aarch_ra_sign_scope and aarch_enable_bti.
* config/arm/arm.opt (config/arm/aarch-common.h): Include header.
(aarch_ra_sign_scope, aarch_enable_bti): Declare variable.
* config/arm/arm.cc: Add missing includes.

Co-Authored-By: Tejas Belagod <tbelagod@arm.com>

modula2/108144 - fix mistake in previous change

The previous change to avoid a duplicate multi directory
caused the m2/m2{cor,iso,log,min,pim} installs to happen
relative to the main library directory when not using
--enable-version-specific-runtime-libs which doesn't match
the drivers expectation where to find them. The following
fixes the original issue by simply dropping the duplicate
multi directory since the one in the $(inst_libdir) variable
now works.

Tested by building and installing with and without
--enable-version-specific-runtime-libs and compiling and
linking a modula-2 testcase successfully with the installed
compilers.

PR modula2/108144
libgm2/
* libm2cor/Makefile.am: Revert previous change, instead
drop the redundant $(MULTIDIR).
* libm2iso/Makefile.am: Likewise.
* libm2log/Makefile.am: Likewise.
* libm2min/Makefile.am: Likewise.
* libm2pim/Makefile.am: Likewise.
* libm2cor/Makefile.in: Regenerate.
* libm2iso/Makefile.in: Likewise.
* libm2log/Makefile.in: Likewise.
* libm2min/Makefile.in: Likewise.
* libm2pim/Makefile.in: Likewise.

libgomp.texi: Impl. status - non-rect loop nest only partial

libgomp/
* libgomp.texi (OpenMP 5.0): Set non-rectangular
loop nest back to 'P' as Fortran support is incomplete.