Jonas Devlieghere [Fri, 9 Jul 2021 20:20:37 +0000 (13:20 -0700)]
[lldb] Drop REQUIRES where redundant because of lit.local.cfg
Stanislav Mekhanoshin [Fri, 9 Jul 2021 19:41:11 +0000 (12:41 -0700)]
[AMDGPU] Added v_accvgpr_read_b32 rematerialization test. NFC.
Alexey Bataev [Wed, 7 Jul 2021 12:26:53 +0000 (05:26 -0700)]
[OPENMP]Fix overlapped mapping for dereferenced pointer members.
If the base is used in a map clause and later we have a memberexpr with
this base, and the member is a pointer, and this pointer is dereferenced
anyhow (subscript, array section, dereference, etc.), such components
should be considered as overlapped, otherwise it may lead to incorrect
size computations, since we try to map a pointee as a part of the whole
struct, which is not true for the pointer members.
Differential Revision: https://reviews.llvm.org/D105562
Stanislav Mekhanoshin [Fri, 9 Jul 2021 18:48:19 +0000 (11:48 -0700)]
[AMDGPU] Fix flags of V_MOV_B64_PSEUDO
In particular it was not rematerializable.
Differential Revision: https://reviews.llvm.org/D105724
Jonas Devlieghere [Fri, 9 Jul 2021 19:40:19 +0000 (12:40 -0700)]
[lldb] Use custom script instead of lldb.macosx.crashlog in test
I'm not entirely sure this is the problem, but the Windows bot doesn't
seem to like this test. Let's do something similar to
command_import.test which doesn't have that issue.
Nikita Popov [Fri, 9 Jul 2021 19:38:41 +0000 (21:38 +0200)]
[IR] Add GEPOperator::indices() (NFC)
In order to mirror the GetElementPtrInst::indices() API.
Wanted to use this in the IRForTarget code, and was surprised to
find that it didn't exist yet.
Sanjay Patel [Fri, 9 Jul 2021 19:08:03 +0000 (15:08 -0400)]
[PhaseOrdering] add tests for vector cmp reductions; NFC
These are based on PR41312. There needs to be effort
from all of SimplifyCFG, InstCombine, SLP, and possibly
VectorCombine to get this into ideal form.
Sanjay Patel [Fri, 9 Jul 2021 17:47:38 +0000 (13:47 -0400)]
[SLP] add tests for poison-safe logical reductions; NFC
Sanjay Patel [Fri, 9 Jul 2021 17:30:42 +0000 (13:30 -0400)]
[SLP] make invalid operand explicit for extra arg in reduction matching; NFC
This makes it clearer when we have encountered the extra arg.
Also, we may need to adjust the way the operand iteration
works when handling logical and/or.
David Spickett [Fri, 9 Jul 2021 19:29:40 +0000 (15:29 -0400)]
[libcxx][CI] Work around Arm buildkite failures
For reasons unknown, the build is now using compilers
from /usr/bin instead of /usr/local/bin which is where
we have our clang-12 aliases placed.
Reviewed By: #libc, ldionne
Differential Revision: https://reviews.llvm.org/D105704
Florian Mayer [Fri, 9 Jul 2021 15:44:12 +0000 (16:44 +0100)]
[hwasan] More realistic setjmp test.
The existing one actually failed on the int* p, not on int z (as can be
seen by the fault being 8 bytes rather than 4).
This is also needed to make sure the stack safety analysis does not
classify the alloca as safe.
Reviewed By: hctim
Differential Revision: https://reviews.llvm.org/D105705
Graham Yiu [Wed, 7 Jul 2021 16:46:06 +0000 (09:46 -0700)]
[ARC][NFC] Include file re-ordering
- Sort includes in alphabetical order via clang-format
Stanislav Mekhanoshin [Fri, 9 Jul 2021 19:08:45 +0000 (12:08 -0700)]
[AMDGPU] Add VOP rematerialization test. NFC.
Nikita Popov [Thu, 8 Jul 2021 18:56:05 +0000 (20:56 +0200)]
Reapply [IR] Don't accept nullptr as GEP element type
Reapply after fixing another occurrence in lldb that was relying
on this in the preceding commit.
-----
GetElementPtrInst::Create() (and IRBuilder methods based on it)
currently accept nullptr as the element type, and will fetch the
element type from the pointer in that case. Remove this fallback,
as it is incompatible with opaque pointers. I've removed a handful
of leftover calls using this behavior as a preliminary step.
Out-of-tree code affected by this change should either pass a proper
type, or can temporarily explicitly call getPointerElementType(),
if the newly added assertion is encountered.
Differential Revision: https://reviews.llvm.org/D105653
Nikita Popov [Fri, 9 Jul 2021 19:12:44 +0000 (21:12 +0200)]
[IRForTarget] Don't pass nullptr to GetElementPtrInst::Create() (NFC)
In one case use the source element type of the original GEP. In the
other the correct type isn't obvious to me, so use
getPointerElementType() for now.
Riccardo Mori [Fri, 9 Jul 2021 18:10:57 +0000 (20:10 +0200)]
[Polly][Isl] Use isl::*::ctx instead of isl::*::get_ctx. NFC
This is part of an effort to reduce the differences between the custom C++ bindings used right now by polly in `lib/External/isl/include/isl/isl-noxceptions.h` and the official isl C++ interface.
Changes made:
- Use `isl::*::ctx()` instead of `isl::*::get_ctx()` (for example `isl::space::ctx()` instead of `isl::space::get_ctx()`)
- Add `isl::` namespace in front of isl types to avoid confusion (for example `isl::space::ctx` and `isl::ctx`
- `isl-noexceptions.h` has been generated by this https://github.com/patacca/isl/commit/
b64e33c62d3fe7db506f6630f9e935b663f9c5a4
Reviewed By: Meinersbur
Differential Revision: https://reviews.llvm.org/D105691
David Blaikie [Fri, 9 Jul 2021 18:56:37 +0000 (11:56 -0700)]
PR51034: Debug Info: Remove 'prototyped' from K&R function declarations
Regression caused by
6c9559b67b91966bfeff9e17808a3e84a92e64a0.
Nikita Popov [Fri, 9 Jul 2021 15:58:48 +0000 (17:58 +0200)]
Reapply [IR] Don't mark mustprogress as type attribute
Reapply with fixes for clang tests.
-----
This is a simple enum attribute. Test changes are because enum
attributes are sorted before type attributes, so mustprogress is
now in a different position.
Varun Gandhi [Tue, 22 Jun 2021 21:44:29 +0000 (14:44 -0700)]
[Clang] Introduce Swift async calling convention.
This change is intended as initial setup. The plan is to add
more semantic checks later. I plan to update the documentation
as more semantic checks are added (instead of documenting the
details up front). Most of the code closely mirrors that for
the Swift calling convention. Three places are marked as
[FIXME: swiftasynccc]; those will be addressed once the
corresponding convention is introduced in LLVM.
Reviewed By: rjmccall
Differential Revision: https://reviews.llvm.org/D95561
Stella Stamenova [Fri, 9 Jul 2021 18:32:39 +0000 (11:32 -0700)]
Revert "[IR] Don't accept nullptr as GEP element type"
This reverts commit
5035e7be1a8ab923e1a82def7e313cc11c0b176f.
This change broke several lldb bots.
Andrzej Warzynski [Wed, 7 Jul 2021 10:41:45 +0000 (11:41 +0100)]
[flang][driver] Fix how output filename is generated
Currently, `flang -c file.f` generates `flang_unparsed_source_file_0.o`.
This is incorrect. This patch:
* simplifies the logic around output filename generation, and
* makes sure that `file.o` is produced instead of e.g.
`flang_unparsed_source_file_0.o` when using the `-c` flag
The output filename generation is moved to a dedicated function. I've
also made a few minor improvements, e.g. marked variables as local,
added comments, refined error messages.
Differential Revision: https://reviews.llvm.org/D105546
Leonard Chan [Thu, 8 Jul 2021 22:04:30 +0000 (15:04 -0700)]
[NFC][compiler-rt][hwasan] Move TagMemoryAligned into hwasan_linux.cpp
Based on comments in D91466, we can make the current implementation
linux-speciic. The fuchsia implementation will just be a call to
`__sanitizer_fill_shadow`.
Differential Revision: https://reviews.llvm.org/D105663
Leonard Chan [Thu, 8 Jul 2021 22:32:20 +0000 (15:32 -0700)]
[NFC][compiler-rt][hwasan] Rename InitPrctl to InitializeOsSupport
The new name is something less linux-y and more platform generic. Once we
finalize the tagged pointer ABI in zircon, we will do the appropriate check
for fuchsia to see that TBI is enabled.
Differential Revision: https://reviews.llvm.org/D105667
Leonard Chan [Thu, 8 Jul 2021 22:49:04 +0000 (15:49 -0700)]
[NFC][compiler-rt][hwasan] Move __hwasan_tag_mismatch4 to hwasan.cpp
This can be moved out of hwasan_linux.cpp because it can be re-used in the fuchsia port.
Differential Revision: https://reviews.llvm.org/D105669
Krzysztof Drewniak [Thu, 1 Jul 2021 18:45:03 +0000 (18:45 +0000)]
[AMDGPU][Docs] Update Code Object V3 example to includes args section
The documentation for the AMDGPU assembler's examples don't show the
.args section, which, if ommitted, will cause arguments to silently
not be passed into the kernel. This commit fixes this issue.
Reviewed By: #amdgpu, scott.linder
Differential Revision: https://reviews.llvm.org/D105222
Fangrui Song [Fri, 9 Jul 2021 17:30:16 +0000 (10:30 -0700)]
[llvm-mca] Fix -Wunused-private-field after D105618
Arthur Eubanks [Fri, 9 Jul 2021 17:28:50 +0000 (10:28 -0700)]
[OpaquePtr][InferAddrSpace] Use PointerType::getWithSamePointeeType()
Fangrui Song [Fri, 9 Jul 2021 17:26:53 +0000 (10:26 -0700)]
[llvm-size] Switch command line parsing from llvm::cl to OptTable
Part of https://lists.llvm.org/pipermail/llvm-dev/2021-July/151622.html
"Binary utilities: switch command line parsing from llvm::cl to OptTable"
* `--totals=false` and `--totals=0` cannot be used. Omit the option.
* `--help-list` is removed. This is a `cl::` specific option.
OptTable avoids global option collision if we decide to support multiplexing for binary utilities.
Note: because the tool is simple, and its long options are uncommon, I just drop
the one-dash forms except `-arch <value>` (Darwin style).
Reviewed By: jhenderson
Differential Revision: https://reviews.llvm.org/D105598
LLVM GN Syncbot [Fri, 9 Jul 2021 17:14:37 +0000 (17:14 +0000)]
[gn build] Port
0e09a41b415b
zoecarver [Fri, 9 Jul 2021 17:12:16 +0000 (10:12 -0700)]
[libcxx][ranges] Add `ranges::transform_view`.
Reviewed By: cjdb, ldionne, #libc
Differential Revision: https://reviews.llvm.org/D103056
zoecarver [Wed, 7 Jul 2021 22:25:53 +0000 (15:25 -0700)]
[libcxx][nfc] Remove <variant>'s dependence on <array>.
This will allow us to use variant in common_iterator. We do this by introducing a new `__light_array` type that variant uses instead of `std::array`.
Differential Revision: https://reviews.llvm.org/D105597
Jeremy Morse [Fri, 9 Jul 2021 16:49:46 +0000 (17:49 +0100)]
[X86] Return src/dest register from stack spill/restore recogniser
LLVM provides target hooks to recognise stack spill and restore
instructions, such as isLoadFromStackSlot, and it also provides post frame
elimination versions such as isLoadFromStackSlotPostFE. These are supposed
to return the store-source and load-destination registers; unfortunately on
X86, the PostFE recognisers just return "1", apparently to signify "yes
it's a spill/load". This patch alters the hooks to correctly return the
store-source and load-destination registers:
This is really useful for debug-info as we it helps follow variable values
as they move on/off the stack. There should be no codegen changes: the only
other users of these PostFE target hooks are MachineInstr::getRestoreSize
and MachineInstr::getSpillSize, which don't attempt to interpret the
returned register location.
While we're here, delete the (InstrRef) LiveDebugValues heuristic that
tries to find the spill source register by looking for a killed reg -- we
should be able to rely on the target hooks for that. This involves
temporarily turning off a n InstrRef LivedDebugValues test on aarch64
(patch to re-enable it is in D104521).
Differential Revision: https://reviews.llvm.org/D105428
Fangrui Song [Fri, 9 Jul 2021 17:10:45 +0000 (10:10 -0700)]
[llvm-cxxfilt] Switch command line parsing from llvm::cl to OptTable
Similar to D104889. The tool is very simple and its long options are uncommon,
so just drop the one-dash form in this patch.
Reviewed By: jhenderson
Differential Revision: https://reviews.llvm.org/D105605
Jonas Devlieghere [Fri, 9 Jul 2021 16:23:54 +0000 (09:23 -0700)]
[lldb] Add the ability to silently import scripted commands
Add the ability to silence command script import. The motivation for
this change is being able to add command script import -s
lldb.macosx.crashlog to your ~/.lldbinit without it printing the
following message at the beginning of every debug session.
"malloc_info", "ptr_refs", "cstr_refs", "find_variable", and
"objc_refs" commands have been installed, use the "--help" options on
these commands for detailed help.
In addition to forwarding the silent option to LoadScriptingModule, this
also changes ScriptInterpreterPythonImpl::ExecuteOneLineWithReturn and
ScriptInterpreterPythonImpl::ExecuteMultipleLines to honor the enable IO
option in ExecuteScriptOptions, which until now was ignored.
Note that IO is only enabled (or disabled) at the start of a session,
and for this particular use case, that's done when taking the Python
lock in LoadScriptingModule, which means that the changes to these two
functions are not strictly necessary, but (IMO) desirable nonetheless.
Differential revision: https://reviews.llvm.org/D105327
Sylvestre Ledru [Fri, 9 Jul 2021 16:55:06 +0000 (18:55 +0200)]
m86k: adjust the usage of ArgInfo after change
9b057f647d70fc958d4a1a7a00e2deba65
Fails with:
```
/build/llvm-toolchain-snapshot-13~++
20210709092633+
88326bbce38c/llvm/lib/Target/M68k/GlSel/M68kCallLowering.cpp: In member function 'virtual bool llvm::M68kCallLowering::lowerReturn(llvm::MachineIRBuilder&, const llvm::Value*, llvm::ArrayRef<llvm::Register>, llvm::FunctionLoweringInfo&, llvm::Register) const':
/build/llvm-toolchain-snapshot-13~++
20210709092633+
88326bbce38c/llvm/lib/Target/M68k/GlSel/M68kCallLowering.cpp:71:42: error: no matching function for call to 'llvm::CallLowering::ArgInfo::ArgInfo(<brace-enclosed initializer list>)'
ArgInfo OrigArg{VRegs, Val->getType()};
```
Differential Revision: https://reviews.llvm.org/D105689
Arthur Eubanks [Fri, 9 Jul 2021 16:55:07 +0000 (09:55 -0700)]
[NFC][OpaquePtr] Use GlobalValue::getValueType() more
Instead of getType()->getElementType().
Sanjay Patel [Fri, 9 Jul 2021 16:48:42 +0000 (12:48 -0400)]
[SLP] improve code comments; NFC
This likely started out only supporint binops,
but now we handle min/max using cmp+sel, and
we may extend to handle bool logic in the form
of select.
Nikita Popov [Fri, 9 Jul 2021 16:45:28 +0000 (18:45 +0200)]
Revert "[IR] Don't mark mustprogress as type attribute"
This reverts commit
84ed3a794b4ffe7bd673f1e5a17d507aa3113d12.
A number of clang tests are also affected by this change. Revert
until I can update them.
Sanjay Patel [Fri, 9 Jul 2021 15:56:26 +0000 (11:56 -0400)]
[SLP] make checks for cmp+select min/max more explicit
This is NFC-intended currently (so no test diffs). The motivation
is to eventually allow matching for poison-safe logical-and and
logical-or (these are in the form of a select-of-bools).
( https://llvm.org/PR41312 )
Those patterns will not have all of the same constraints as min/max
in the form of cmp+sel. We may also end up removing the cmp+sel
min/max matching entirely (if we canonicalize to intrinsics), so
this will make that step easier.
Arthur Eubanks [Fri, 9 Jul 2021 16:32:40 +0000 (09:32 -0700)]
[OpaquePointers][CallPromotion] Don't look at pointee type for byval
byval's type parameter is now always required.
Nikita Popov [Fri, 9 Jul 2021 16:27:57 +0000 (18:27 +0200)]
[AttrBuilder] Try to fix build
Some buildbots fail with undefined references to ByValTypeIndex
etc. Replace static consts with an enum to ensure the address is
not taken.
Nikita Popov [Fri, 9 Jul 2021 15:58:48 +0000 (17:58 +0200)]
[IR] Don't mark mustprogress as type attribute
This is a simple enum attribute.
Test changes are because enum attributes are sorted before type
attributes.
Louis Dionne [Fri, 9 Jul 2021 16:22:48 +0000 (12:22 -0400)]
[libc++][ci] Keep the C++03 build job on Clang 12
Because of https://reviews.llvm.org/D104500, libc++ is broken with
recent Clangs in C++03 mode.
Marcos Horro [Fri, 9 Jul 2021 15:58:57 +0000 (17:58 +0200)]
[llvm-mca] Fix JSON format for multiple regions
Instead of printing each region individually when using JSON format,
this patch creates a JSON object which is updated with the values of
each region, printing them at the end. New test is added for JSON output
with multiple regions.
Bug: https://bugs.llvm.org/show_bug.cgi?id=51008
Reviewed By: andreadb
Differential Revision: https://reviews.llvm.org/D105618
Alex Zinenko [Thu, 8 Jul 2021 08:59:02 +0000 (10:59 +0200)]
[mlir] add support for reductions in OpenMP WsLoopOp
Use a modeling similar to SCF ParallelOp to support arbitrary parallel
reductions. The two main differences are: (1) reductions are named and declared
beforehand similarly to functions using a special op that provides the neutral
element, the reduction code and optionally the atomic reduction code; (2)
reductions go through memory instead because this is closer to the OpenMP
semantics.
See https://llvm.discourse.group/t/rfc-openmp-reduction-support/3367.
Reviewed By: kiranchandramohan
Differential Revision: https://reviews.llvm.org/D105358
Alex Zinenko [Thu, 8 Jul 2021 14:07:09 +0000 (16:07 +0200)]
[mlir] don't drop undef initializers in translation to LLVM IR
LLVM IR allows globals with external linkage to have initializers, including
undef. The translation was incorrectly using undef as a indicator that the
initializer should be ignored in translation, leading to the impossibility to
create an external global with an explicit undef initializer. Fix this and use
nullptr as a marker instead.
Reviewed By: wsmoses
Differential Revision: https://reviews.llvm.org/D105631
Nikita Popov [Thu, 8 Jul 2021 20:40:56 +0000 (22:40 +0200)]
[AttrBuilder] Make handling of type attributes more generic (NFCI)
While working on the elementtype attribute, I felt that the type
attribute handling in AttrBuilder is overly repetitive. This patch
converts the separate Type* members into an std::array<Type*>, so
that all type attribute kinds can be handled generically.
There's more room for improvement here (especially when it comes to
converting the AttrBuilder to an Attribute), but this seems like a
good starting point.
Differential Revision: https://reviews.llvm.org/D105658
Nico Weber [Fri, 9 Jul 2021 15:39:40 +0000 (11:39 -0400)]
Revert "Revert "Temporarily do not drop volatile stores before unreachable""
This reverts commit
52aeacfbf5ce5f949efe0eae029e56db171ea1f7.
There isn't full agreement on a path forward yet, but there is agreement that
this shouldn't land as-is. See discussion on https://reviews.llvm.org/D105338
Also reverts unreviewed "[clang] Improve `-Wnull-dereference` diag to be more in-line with reality"
This reverts commit
f4877c78c0fc98be47b926439bbfe33d5e1d1b6d.
And all the related changes to tests:
This reverts commit
9a0152799f8e4a59e0483728c9f11c8a7805616f.
This reverts commit
3f7c9cc27422f7302cf5a683eeb3978e6cb84270.
This reverts commit
329f8197ef59f9bd23328b52d623ba768b51dbb2.
This reverts commit
aa9f58cc2c48ca6cfc853a2467cd775dc7622746.
This reverts commit
2df37d5ddd38091aafbb7d338660e58836f4ac80.
This reverts commit
a72a44181264fd83e05be958c2712cbd4560aba7.
Nikita Popov [Thu, 8 Jul 2021 18:56:05 +0000 (20:56 +0200)]
[IR] Don't accept nullptr as GEP element type
GetElementPtrInst::Create() (and IRBuilder methods based on it)
currently accept nullptr as the element type, and will fetch the
element type from the pointer in that case. Remove this fallback,
as it is incompatible with opaque pointers. I've removed a handful
of leftover calls using this behavior as a preliminary step.
Out-of-tree code affected by this change should either pass a proper
type, or can temporarily explicitly call getPointerElementType(),
if the newly added assertion is encountered.
Differential Revision: https://reviews.llvm.org/D105653
Kevin P. Neal [Thu, 8 Jul 2021 19:12:11 +0000 (15:12 -0400)]
[FPEnv][InstSimplify] Constrained FP support for NaN
Currently InstructionSimplify.cpp knows how to simplify floating point
instructions that have a NaN operand. It does not know how to handle the
matching constrained FP intrinsic.
This patch teaches it how to simplify so long as the exception handling
is not "fpexcept.strict".
Differential Revision: https://reviews.llvm.org/D103169
zhijian [Fri, 9 Jul 2021 15:06:46 +0000 (11:06 -0400)]
[AIX][XCOFF] Use bit order of has_vec and longtbtable bits as defined in AIX header debug.h
Summary:
The bit order of the has_vec and longtbtable bits in the traceback table generated by the XL compiler flipped at some point after v12.1. This is different from the definition is the AIX header debug.h. The change in the XL compiler that caused the deviation from the OS header definition was unintentional. Since both orderings are extant and the XL compiler runtime also expects the ordering defined by the OS, we will correct the output from LLVM to match the defined ordering given by the OS (which is also consistent with the Assembler Language Reference). Mitigation for traceback tables encoded with the wrong ordering is required for either ordering.
Reviewers: XingXue, HubertTong
Differential Revision: https://reviews.llvm.org/D105487
Jeremy Morse [Fri, 9 Jul 2021 14:32:30 +0000 (15:32 +0100)]
[Debug-info][InstrRef] Avoid an unnecessary map ordering
We keep a record of substitutions between debug value numbers post-isel,
however we never actually look them up until the end of compilation. As a
result, there's nothing gained by the collection being a std::map. This
patch downgrades it to being a vector, that's then sorted at the end of
compilation in LiveDebugValues.
Differential Revision: https://reviews.llvm.org/D105029
Louis Dionne [Thu, 8 Jul 2021 16:26:33 +0000 (12:26 -0400)]
[libc++][ci] Test Clang ToT by default, and add jobs on Clang 11 and 12
It makes the most sense to test with Clang ToT by default since that's
exactly what we're trying to QA: that libc++ works with whatever compiler
we're going to release next.
Roman Lebedev [Fri, 9 Jul 2021 13:25:08 +0000 (16:25 +0300)]
Revert "Transform memset + malloc --> calloc (PR25892)"
It broke `check-msan`, see e.g. https://lab.llvm.org/buildbot/#/builders/18/builds/1934
This reverts commit
375694a07bcba3be66864c42a5932be1a22831e2.
Alex Zinenko [Thu, 8 Jul 2021 16:35:18 +0000 (18:35 +0200)]
[mlir] factor memref-to-llvm lowering out of std-to-llvm
After the MemRef has been split out of the Standard dialect, the
conversion to the LLVM dialect remained as a huge monolithic pass.
This is undesirable for the same complexity management reasons as having
a huge Standard dialect itself, and is even more confusing given the
existence of a separate dialect. Extract the conversion of the MemRef
dialect operations to LLVM into a separate library and a separate
conversion pass.
Reviewed By: herhut, silvas
Differential Revision: https://reviews.llvm.org/D105625
Roman Lebedev [Fri, 9 Jul 2021 11:56:18 +0000 (14:56 +0300)]
[compiler-rt] fuzzer: adjust tests to not expect that store to null traps and is not erase
Instead, mostly just trap directly.
Roman Lebedev [Fri, 9 Jul 2021 11:39:29 +0000 (14:39 +0300)]
[compiler-rt] Conceal UB in sanitizer_common/TestCases/Linux/signal_line.cpp test
Store to null is deleted, so the test no longer did what it was expecting to do.
Conceal that by creating null pointer in a more elaborate way,
thus retaining original test coverage.
Martin Storsjö [Sat, 1 Aug 2020 06:44:24 +0000 (09:44 +0300)]
[llvm-rc] Make commas in user data structs optional
This matches what rc.exe tolerates in this type.
This fixes cases like this:
1 24
BEGIN
"<?xml version=""1.0""?>\n"
"<assembly>\n"
"</assembly>\n"
END
Differential Revision: https://reviews.llvm.org/D105621
Martin Storsjö [Fri, 9 Jul 2021 11:02:51 +0000 (14:02 +0300)]
Revert "[ScalarEvolution] Fix overflow in computeBECount."
This reverts commit
5b350183cdabd83573bc760ddf513f3e1d991bcb (and
also "[NFC][ScalarEvolution] Cleanup howManyLessThans.",
009436e9c1fee1290d62bc0faafe0c0295542f56, to make it apply).
See https://reviews.llvm.org/D105216 for discussion on various
miscompilations caused by that commit.
Roman Lebedev [Fri, 9 Jul 2021 10:36:21 +0000 (13:36 +0300)]
Revert "Temporarily do not drop volatile stores before unreachable"
This reverts commit
4e413e16216d0c94ada2171f3c59e0a85f4fa4b6,
which landed almost 10 months ago under premise that the original behavior
didn't match reality and was breaking users, even though it was correct as per
the LangRef. But the LangRef change still hasn't appeared, which might suggest
that the affected parties aren't really worried about this problem.
Please refer to discussion in:
* https://reviews.llvm.org/D87399 (`Revert "[InstCombine] erase instructions leading up to unreachable"`)
* https://reviews.llvm.org/D53184 (`[LangRef] Clarify semantics of volatile operations.`)
* https://reviews.llvm.org/D87149 (`[InstCombine] erase instructions leading up to unreachable`)
clang has `-Wnull-dereference` which will diagnose the obvious cases
of null dereference, it was adjusted in
f4877c78c0fc98be47b926439bbfe33d5e1d1b6d,
but it will only catch the cases where the pointer is a null literal,
it will not catch the cases where an arbitrary store is expected to trap.
Differential Revision: https://reviews.llvm.org/D105338
Roman Lebedev [Fri, 9 Jul 2021 11:13:34 +0000 (14:13 +0300)]
[NFC][Clang][CodegenOpenCL] Fix test not to rely on volatile store not being removed
Simon Pilgrim [Fri, 9 Jul 2021 11:04:09 +0000 (12:04 +0100)]
Fix MSVC "not all control paths return a value" warning. NFCI.
Simon Pilgrim [Fri, 9 Jul 2021 10:48:25 +0000 (11:48 +0100)]
[X86] ReplaceNodeResults - fp_to_sint/uint - manually widen v2i32 results to let us add AssertSext/AssertZext
Its proving tricky to move this to the generic legalizer code, so manually insert the v2i32 subvector into v4i32, insert the AssertSext/AssertZext node, then extract the subvector again.
This avoids masks in the truncation/pack code, which means we avoid a PSHUFB in the fp_to_sint/uint code for sub-128 bit types (specific targets can still combine the packs to a pshufb if they have fast variable per-lane shuffles).
This was noticed when I was trying to improve fp_to_sint/uint costs with D103695 (and some targets had very high fp_to_sint costs due to the PSHUFB), so we can then update the fp_to_uint codegen from D89697.
Max Kazantsev [Fri, 9 Jul 2021 10:40:42 +0000 (17:40 +0700)]
[LoopDeletion] Handle switch in proving that loop exits on first iteration
Added check for switch-terminated blocks in loops.
Now if a block is terminated with a switch, we try to find out which of the
cases is taken on 1st iteration and mark corresponding edge from the block
to the case successor as live.
Patch by Dmitry Makogon!
Differential Revision: https://reviews.llvm.org/D105688
Reviewed By: nikic, mkazantsev
David Green [Fri, 9 Jul 2021 10:51:16 +0000 (11:51 +0100)]
[TTI] Remove IsPairwiseForm from getArithmeticReductionCost
This patch removes the IsPairwiseForm flag from the Reduction Cost TTI
hooks, along with some accompanying code for pattern matching reductions
from trees starting at extract elements. IsPairWise is now assumed to be
false, which was the predominant way that the value was used from both
the Loop and SLP vectorizers. Since the adjustments such as D93860, the
SLP vectorizer has not relied upon this distinction between paiwise and
non-pairwise reductions.
This also removes some code that was detecting reductions trees starting
from extract elements inside the costmodel. This case was
double-counting costs though, adding the individual costs on the
individual instruction _and_ the total cost of the reduction. Removing
it changes the costs in llvm/test/Analysis/CostModel/X86/reduction.ll to
not double count. The cost of reduction intrinsics is still tested
through the various tests in
llvm/test/Analysis/CostModel/X86/reduce-xyz.ll.
Differential Revision: https://reviews.llvm.org/D105484
Roman Lebedev [Fri, 9 Jul 2021 10:30:17 +0000 (13:30 +0300)]
Speculatively adjust gtest's UnitTest::AddTestPartResult() to not rely on volatile store to null trapping
This fallback path is used at least on PPC.
If this doesn't work on some compilers that take this path,
then this will have to be changed to either abort,
or partitioned to do different things based on the compiler.
Please refer to https://reviews.llvm.org/D105338.
Roman Lebedev [Fri, 9 Jul 2021 10:14:15 +0000 (13:14 +0300)]
[NFC][Codegen] Harden a few tests to not rely that volatile store to null isn't erased
patacca [Fri, 9 Jul 2021 10:24:35 +0000 (12:24 +0200)]
[Polly][Isl] Update isl to isl-0.24-52-gd7be01f7
This is needed because the functions `isl_union_{set,map}_get_{set,map}_list` have been exposed to the C++ interface
Bjorn Pettersson [Fri, 9 Jul 2021 10:23:51 +0000 (12:23 +0200)]
[NewPM][FuzzMutate] Fix renaming 'unswitch' to 'simple-loop-unswitch'
This is a follow up to D105628 (commit
1db2551cc1a356a67c096). I had
missed to replace 'unswitch' by 'simple-loop-unswitch' in one place.
Roman Lebedev [Fri, 9 Jul 2021 10:11:16 +0000 (13:11 +0300)]
[compiler-rt][ASAN] Speculatively fix Windows/dll_control_c.cpp test - use trap
Please refer to https://reviews.llvm.org/D105338,
such store will not trap, it will be removed.
Haojian Wu [Wed, 7 Jul 2021 06:38:34 +0000 (08:38 +0200)]
[clang] Fix an infinite loop during typo-correction
See https://bugs.llvm.org/show_bug.cgi?id=50797#c6
Differential Revision: https://reviews.llvm.org/D105533
Roman Lebedev [Fri, 9 Jul 2021 09:01:08 +0000 (12:01 +0300)]
[clang] Improve `-Wnull-dereference` diag to be more in-line with reality
* Drop any mention of `volatile`.
Please refer to https://reviews.llvm.org/D105338
* Drop address space check - it really doesn't affect the behavior,
the store will still be dropped: https://godbolt.org/z/dP8fevxG4
Whisperity [Fri, 9 Jul 2021 09:37:38 +0000 (11:37 +0200)]
[NFC][llvm][docs] YamlIO: StringRef validate -> std::string validate
A change in the API happened as per http://reviews.llvm.org/D89463
(latest related commit
b9e2b59680ad1bbfd2b9110b3ebf3d2b22cad51b)
but the RST documentation was not updated to match this at that time.
Alex Richardson [Fri, 9 Jul 2021 09:15:16 +0000 (10:15 +0100)]
[ELF][AArch64] Write addends for TLSDESC relocations with -z rel
Since D100490 this case is diagnosed for -z rel. This commit implements
R_AARCH64_TLSDESC cases for AArch64::getImplicitAddend() and
AArch64::relocate(). However, there are probably further relocation types
that need to be handled for full support of -z rel.
Fixes https://bugs.llvm.org/show_bug.cgi?id=47009
Reviewed By: MaskRay
Differential Revision: https://reviews.llvm.org/D100544
Alex Richardson [Fri, 9 Jul 2021 09:12:43 +0000 (10:12 +0100)]
[ELF] Implement RISCV::getImplicitAddend()
This allows checking dynamic relocation addends for -z rel and
--apply-dynamic-relocs output.
Reviewed By: MaskRay
Differential Revision: https://reviews.llvm.org/D101455
Alex Richardson [Fri, 9 Jul 2021 09:12:21 +0000 (10:12 +0100)]
[ELF] Write R_RISCV_IRELATIVE addends with -z rel
I found this missing case with the new --check-dynamic-relocation flag
while running the lld tests with --apply-dynamic-relocs enabled by default.
This is the same as D101452 just for RISC-V
Reviewed By: MaskRay
Differential Revision: https://reviews.llvm.org/D101454
Alex Richardson [Fri, 9 Jul 2021 09:11:31 +0000 (10:11 +0100)]
[ELF] Write R_X86_64_IRELATIVE addends with -z rel
I found this missing case with the new --check-dynamic-relocation flag
while running the lld tests with --apply-dynamic-relocs enabled by default.
This also fixes a broken CHECK in lld/test/ELF/x86-64-gotpc-relax.s:
The test wasn't using CHECK-NEXT, so it was passing despite the output
actually containing relocations. I am not sure when this changed, but I
think this behaviour is correct.
Found with D101450 + enabling --apply-dynamic-relocs by default.
Reviewed By: MaskRay
Differential Revision: https://reviews.llvm.org/D101452
Alex Richardson [Fri, 9 Jul 2021 09:10:33 +0000 (10:10 +0100)]
[ELF] Implement X86_64::getImplicitAddend()
This allows checking dynamic relocation addends for -z rel and
--apply-dynamic-relocs output.
Reviewed By: MaskRay
Differential Revision: https://reviews.llvm.org/D101451
Alex Richardson [Fri, 9 Jul 2021 09:05:18 +0000 (10:05 +0100)]
[ELF] Check the Elf_Rel addends for dynamic relocations
There used to be many cases where addends for Elf_Rel were not emitted in
the final object file (mostly when building for MIPS64 since the input .o
files use RELA but the output uses REL). These cases have been fixed since,
but this patch adds a check to ensure that the written values are correct.
It is based on a previous patch that I added to the CHERI fork of LLD since
we were using MIPS64 as a baseline. The work has now almost entirely
shifted to RISC-V and Arm Morello (which use Elf_Rela), but I thought
it would be useful to upstream our local changes anyway.
This patch adds a (hidden) command line flag --check-dynamic-relocations
that can be used to enable these checks. It is also on by default in
assertions builds for targets that handle all dynamic relocations kinds
that LLD can emit in Target::getImplicitAddend(). Currently this is
enabled for ARM, MIPS, and I386.
Reviewed By: MaskRay
Differential Revision: https://reviews.llvm.org/D101450
Alex Richardson [Fri, 9 Jul 2021 09:04:35 +0000 (10:04 +0100)]
[ELF] Refactor DynamicReloc to fix incorrect relocation addends
This patch changes the DynamicReloc class to store an enum instead
of the overloaded useSymVA member to make it easier to understand
and fix incorrect addends being written in some corner cases. The
change is motivated by a follow-up review that checks the value of
implicit Elf_Rel addends written to the output file.
This patch fixes an incorrect output when using `-z rela` for i386 files
with R_386_GOT32 relocations (not that this really matters since it's an
unsupported configuration).
Storing the relocation expression kind also addresses an incorrect addend
FIXME in ppc64-abs64-dyn.s introduced in D63383.
DynamicReloc now also has a special case for the MIPS TLS relocations
(DynamicReloc::AgainstSymbolWithTargetVA) since the
R_MIPS_TLS_TPREL{32/64} the symbol VA to the GOT for preemptible
symbols. I'm not sure if the symbol value actually should be written
for R_MIPS_TLS_TPREL32, but this patch does not attempt to change
that behaviour.
Reviewed By: MaskRay
Differential Revision: https://reviews.llvm.org/D100490
Tim Northover [Fri, 9 Jul 2021 08:51:57 +0000 (09:51 +0100)]
[Support] reorder Threading includes to avoid conflict with FreeBSD headers
FreeBSD's condvar.h (included by user.h in Threading.inc) uses a "struct
thread" that conflicts with llvm::thread if both are visible when it's
included.
So this moves our #include after the FreeBSD code.
Dawid Jurczak [Mon, 5 Jul 2021 09:42:17 +0000 (11:42 +0200)]
Transform memset + malloc --> calloc (PR25892)
After this change DSE can eliminate malloc + memset and emit calloc.
It's https://reviews.llvm.org/D101440 follow-up.
Differential Revision: https://reviews.llvm.org/D103009
Bjorn Pettersson [Thu, 8 Jul 2021 12:12:19 +0000 (14:12 +0200)]
[NewPM] Rename 'unswitch' to 'simple-loop-unswitch' in PassRegistry
It is confusing to have two ways of specifying the same pass
('simple-loop-unswitch' and 'unswitch'). This patch replaces
'unswitch' by 'simple-loop-unswitch' to get a unique identifier.
Using 'simple-loop-unswitch' instead of 'unswitch' also has the
advantage of matching how the pass is named in DEBUG_TYPE etc. So
this makes it a bit more consistent how we refer to the pass in
options such as -passes, -print-after and -debug-only.
Reviewed By: aeubanks
Differential Revision: https://reviews.llvm.org/D105628
Bjorn Pettersson [Thu, 8 Jul 2021 12:24:03 +0000 (14:24 +0200)]
[NewPM] Consistently use 'simplifycfg' rather than 'simplify-cfg'
There was an alias between 'simplifycfg' and 'simplify-cfg' in the
PassRegistry. That was the original reason for this patch, which
effectively removes the alias.
This patch also replaces all occurrances of 'simplify-cfg'
by 'simplifycfg'. Reason for choosing that form for the name is
that it matches the DEBUG_TYPE for the pass, and the legacy PM name
and also how it is spelled out in other passes such as
'loop-simplifycfg', and in other options such as
'simplifycfg-merge-cond-stores'.
I for some reason the name should be changed to 'simplify-cfg' in
the future, then I think such a renaming should be more widely done
and not only impacting the PassRegistry.
Reviewed By: aeubanks
Differential Revision: https://reviews.llvm.org/D105627
Bjorn Pettersson [Sun, 27 Jun 2021 22:22:11 +0000 (00:22 +0200)]
[NewPM] Handle passes with params in -print-before/-print-after
To support options like -print-before=<pass> and -print-after=<pass>
the PassBuilder will register PassInstrumentation callbacks as well
as a mapping between internal pass class names and the pass names
used in those options (and other cmd line interfaces). But for
some reason all the passes that takes options where missing in those
maps, so for example "-print-after=loop-vectorize" didn't work.
This patch will add the missing entries by also taking care of
function and loop passes with params when setting up the class to
pass name maps.
One might notice that even with this patch it might be tricky to
know what pass name to use in options such as -print-after. This
because there only is a single mapping from class name to pass name,
while the PassRegistry currently is a bit messy as it sometimes
reuses the same class for different pass names (without using the
"pass with params" scheme, or the pass-name<variant> syntax).
It gets extra messy in some situations. For example the
MemorySanitizerPass can run like this (with debug and print-after)
opt -passes='kmsan' -print-after=msan-module -debug-only=msan
The 'kmsan' alias for 'msan<kernel>' is just confusing as one might
think that 'kmsan' is a separate pass (but the DEBUG_TYPE is still
just 'msan'). And since the module pass version of the pass adds
a mapping from 'MemorySanitizerPass' to 'msan-module' one need to
use 'msan-module' in the print-before and print-after options.
Reviewed By: ychen
Differential Revision: https://reviews.llvm.org/D105006
jacquesguan [Fri, 9 Jul 2021 05:15:45 +0000 (13:15 +0800)]
[RISCV][clang] Add macro __riscv_zvlsseg for RVV Zvlsseg builtins
Add extension macro __riscv_zvlsseg to enable Zvlsseg builtins only
with target feature Zvlsseg.
Reviewed By: HsiangKai
Differential Revision: https://reviews.llvm.org/D105626
Haruki Imai [Fri, 9 Jul 2021 05:09:21 +0000 (22:09 -0700)]
[CMake] Disable -fno-semantic-interposition for GCC<10.3 on SystemZ
`-fno-semantic-interposition` was added for GCC in D102453, but some MLIR tests
on SystemZ failed with GCC<10.3 due to a bug.
Reviewed By: MaskRay
Differential Revision: https://reviews.llvm.org/D105453
Kai Luo [Fri, 9 Jul 2021 04:42:27 +0000 (04:42 +0000)]
[PowerPC] Remove implicit use register after transformToImmFormFedByLI()
When the instruction has imm form and fed by LI, we can remove the redundat LI instruction.
Below is an example:
```
renamable $x5 = LI8 2
renamable $x4 = exact SRD killed renamable $x4, killed renamable $r5, implicit $x5
```
will be converted to:
```
renamable $x5 = LI8 2
renamable $x4 = exact RLDICL killed renamable $x4, 62, 2, implicit killed $x5
```
But when we do this optimization, we forget to remove implicit killed $x5
This bug has caused a lnt case error. This patch is to fix above bug.
Reviewed By: #powerpc, shchenz
Differential Revision: https://reviews.llvm.org/D85288
Eric Christopher [Fri, 9 Jul 2021 04:36:44 +0000 (21:36 -0700)]
Update Bazel overlay in GPUToGPURuntimeTransforms.
Muhammad Omair Javaid [Fri, 9 Jul 2021 03:11:08 +0000 (08:11 +0500)]
Revert "GlobalISel/AArch64: don't optimize away redundant branches at -O0"
This reverts commit
458c230b5ef893238d2471fcff27cd275e8026d5.
This broke LLDB buildbot testcase where breakpoint set at start of loop
failed to hit. https://lab.llvm.org/buildbot/#/builders/96/builds/9404
https://github.com/llvm/llvm-project/blob/main/lldb/test/API/commands/process/attach/main.cpp#L15
Differential Revision: https://reviews.llvm.org/D105238
Reshabh Sharma [Fri, 9 Jul 2021 02:18:03 +0000 (07:48 +0530)]
[ASan][AMDGPU] Make shadow offset match X86 on Linux
This patch explicitly sets the shadow offset for
AMDGPU to match that of X86 on Linux.
Reviewed By: vitalybuka
https://reviews.llvm.org/D105282
Ben Shi [Fri, 9 Jul 2021 01:48:23 +0000 (09:48 +0800)]
[RISCV][test] Add new tests for mul optimization in the zba extension with SH*ADD
This patch will show the following optimization by future patches.
(mul x imm) -> (SH1ADD x, (SLLI x, bits)) when imm = 2^n + 2.
(mul x imm) -> (SH2ADD x, (SLLI x, bits)) when imm = 2^n + 4.
(mul x imm) -> (SH3ADD x, (SLLI x, bits)) when imm = 2^n + 8.
Reviewed By: craig.topper
Differential Revision: https://reviews.llvm.org/D105614
Mehdi Amini [Fri, 9 Jul 2021 01:43:19 +0000 (01:43 +0000)]
Revert "[mlir][sparse] Add Merger unit tests"
This reverts commit
0d0cff3ace39378acfc66d6564dc99e19b8a561f.
The build is broken with GCC 5.4
Eli Friedman [Fri, 9 Jul 2021 00:49:02 +0000 (17:49 -0700)]
[NFC][ScalarEvolution] Cleanup howManyLessThans.
In preparation for D104075. Some NFC cleanup, and some test coverage for
planned changes.
Chia-hung Duan [Fri, 9 Jul 2021 00:00:36 +0000 (08:00 +0800)]
[mlir-reduce] Fix the grammer in the doc
Reviewed By: jpienaar
Differential Revision: https://reviews.llvm.org/D105623
Kevin Athey [Thu, 8 Jul 2021 23:39:58 +0000 (16:39 -0700)]
Add documentation for -fsanitize-address-use-after-return.
for issue: https://github.com/google/sanitizers/issues/1394
Reviewed By: vitalybuka
Differential Revision: https://reviews.llvm.org/D104155
Yuanfang Chen [Thu, 8 Jul 2021 19:20:57 +0000 (12:20 -0700)]
Add AddDiscriminatorsPass to NPM default O0 pipeline
AddDiscriminatorsPass is in Legacy PM's O0 pipeline. This patch did the same
for NPM O0 pipeline.
Reviewed By: aeubanks, MaskRay
Differential Revision: https://reviews.llvm.org/D105650
Gus Smith [Thu, 8 Jul 2021 22:43:59 +0000 (22:43 +0000)]
[mlir][sparse] Add Merger unit tests
We opt to use unit tests rather than check tests as the lattice/merger code is a small C++ component with a well-defined API. Testing this API via check tests would be far less direct and readable. In addition, as the check tests will only be able to test the API indirectly, the tests may break based on unrelated changes; e.g. changes in linalg.
Reviewed By: aartbik
Differential Revision: https://reviews.llvm.org/D104956
Stanislav Mekhanoshin [Thu, 8 Jul 2021 22:15:47 +0000 (15:15 -0700)]
[AMDGPU] Mark more SOP instructions as rematerializable
The rest of the SOP instructions implicitly set SCC and not
suitable for the rematerialization.
Differential Revision: https://reviews.llvm.org/D105670
Craig Topper [Thu, 8 Jul 2021 21:59:54 +0000 (14:59 -0700)]
[ARM] Pass 2 instead of 0 to PHINode::Create in MVEGatherScatterLowering. NFC
This parameter controls how much space is reserved for incoming
values. There are always going to be 2 incoming values in this case.
While there remove the unused std::vector right below.
Found while looking at porting this code to RISCV.