Aditya Kumar [Thu, 25 Aug 2016 11:52:38 +0000 (11:52 +0000)]
Remove trailing WS [NFC]
llvm-svn: 279731
Michael Kruse [Thu, 25 Aug 2016 11:28:52 +0000 (11:28 +0000)]
Add LLVM libdir to library search path in out-of-tree builds.
This previously was not required because in an out-of-tree build Polly would
only build libraries (LLVMPolly, libPolly, libPollyISL, libPollyPPCG), but no
executables where the libraries would be linked to. This will change when adding
unittests in a follow-up commit.
llvm-svn: 279730
George Rimar [Thu, 25 Aug 2016 10:39:04 +0000 (10:39 +0000)]
Removed trailing whitespace. NFC.
llvm-svn: 279729
Michael Kruse [Thu, 25 Aug 2016 10:35:22 +0000 (10:35 +0000)]
Also warn if llvm-lit is not available.
The program 'llvm-lit', like 'not' and 'FileCheck' are necessary for running
check-polly. Warn of any of the three is not in LLVM_INSTALL_ROOT/bin directory.
llvm-svn: 279728
Martin Probst [Thu, 25 Aug 2016 10:13:21 +0000 (10:13 +0000)]
clang-format: [JS] nested and tagged template strings.
JavaScript template strings can be nested arbitrarily:
foo = `text ${es.map(e => { return `<${e}>`; })} text`;
This change lexes nested template strings using a stack of lexer states to
correctly switch back to template string lexing on closing braces.
Also, reuse the same stack for the token-stashed logic.
Reviewers: djasper
Subscribers: cfe-commits, klimek
Differential Revision: https://reviews.llvm.org/D22431
llvm-svn: 279727
George Rimar [Thu, 25 Aug 2016 09:05:47 +0000 (09:05 +0000)]
[ELF] - Implemented --oformat binary option.
-oformat output-format
`-oformat' option can be used to specify the binary format for the output object file.
Patch implements binary format output type.
Differential revision: https://reviews.llvm.org/D23769
llvm-svn: 279726
Pavel Labath [Thu, 25 Aug 2016 08:34:57 +0000 (08:34 +0000)]
gdb-remote: Make the sequence mutex non-recursive
Summary:
This is a preparatory commit for D22914, where I'd like to replace this mutex by an R/W lock
(which is also not recursive). This required a couple of changes:
- The only caller of Read/WriteRegister, GDBRemoteRegisterContext class, was already acquiring
the mutex, so these functions do not need to. All functions which now do not take a lock, take
an lock argument instead, to remind the caller of this fact.
- GetThreadSuffixSupported() was being called from locked and unlocked contexts (including
contexts where the process was running, and the call would fail if it did not have the result
cached). I have split this into two functions, one which computes the thread suffix support and
caches it (this one always takes the lock), and another, which returns the cached value (and
never needs to take the lock). This feels quite natural as ProcessGdbRemote was already
pre-caching this value at the start.
Reviewers: clayborg
Subscribers: lldb-commits
Differential Revision: https://reviews.llvm.org/D23802
llvm-svn: 279725
Pavel Labath [Thu, 25 Aug 2016 08:22:14 +0000 (08:22 +0000)]
Fix warnings preventing copy elision.
Summary:
Moving a temporary object prevents copy elision, which is exactly
what clang points out by warning about this pattern.
The fix is simply removal of std::move applied to temporary objects.
Reviewers: clayborg
Subscribers: lldb-commits
Differential Revision: https://reviews.llvm.org/D23825
Author: Taras Tsugrii <ttsugrii@fb.com>
llvm-svn: 279724
Matt Arsenault [Thu, 25 Aug 2016 07:31:40 +0000 (07:31 +0000)]
amdgcn: Fix return type of get_num_groups
llvm-svn: 279723
Vitaly Buka [Thu, 25 Aug 2016 07:21:34 +0000 (07:21 +0000)]
Fix memory leaks in clang-offload-bundler
Summary:
1. Pair removed from StringMap was not destroyed
2. ObjectFile had no owner
Reviewers: sfantao
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D23865
llvm-svn: 279722
Craig Topper [Thu, 25 Aug 2016 04:16:10 +0000 (04:16 +0000)]
[X86] Simplify getOperandBias as a bit. NFC
There's no reason for it to return a signed type. Just return the operand bias in each if instead of starting from 0 and adding in the 'if'.
llvm-svn: 279720
Craig Topper [Thu, 25 Aug 2016 04:16:08 +0000 (04:16 +0000)]
[X86] Fix indentation per coding standards. NFC
llvm-svn: 279719
Vitaly Buka [Thu, 25 Aug 2016 03:44:36 +0000 (03:44 +0000)]
Fixed comment
llvm-svn: 279718
Vitaly Buka [Thu, 25 Aug 2016 03:32:49 +0000 (03:32 +0000)]
[asan] Disable CreateSigAltStack from Unix/Signals.inc for asan builds
Summary: Asan fails to UnsetAlternateSignalStack if it set by Unix/Signals.inc
Reviewers: kcc
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D23864
llvm-svn: 279717
Jason Molenda [Thu, 25 Aug 2016 02:33:09 +0000 (02:33 +0000)]
If the user has specified target.memory-module-load-level 'minimal'
and we couldn't find a dyld binary on the debug system, override
that setting and read dyld out of memory - we need to put an
internal breakpoint on dyld to register binaries being loaded or
unloaded; the debugger won't work right without dyld symbols.
<rdar://problem/
27857025>
llvm-svn: 279704
George Burgess IV [Thu, 25 Aug 2016 02:15:54 +0000 (02:15 +0000)]
Make buildbots happy.
"warning: extra ‘;’ [-Wpedantic]"
llvm-svn: 279703
George Burgess IV [Thu, 25 Aug 2016 01:54:37 +0000 (01:54 +0000)]
Remove a pointless LLVM_CONSTEXPR. NFC.
llvm-svn: 279702
Kyle Butt [Thu, 25 Aug 2016 01:37:07 +0000 (01:37 +0000)]
TailDuplication: Don't pass MMI separately from MF. NFC
MMI must match the function passed, and MF has a handle on MMI. Use that instead
of accepting it as separate argument. No Functional Change.
llvm-svn: 279701
Kyle Butt [Thu, 25 Aug 2016 01:37:03 +0000 (01:37 +0000)]
TailDuplication: Save MF and reduce number of parameters. NFC
Save the function in the class, and then don't pass it around. This reduces the
number of parameters and makes calls to member functions simpler.
No Functional Change.
llvm-svn: 279700
George Burgess IV [Thu, 25 Aug 2016 01:29:55 +0000 (01:29 +0000)]
Update a comment.
r279696, which changed `LLVM_CONSTEXPR AliasAttr` to `const AliasAttr`,
made this comment make less sense.
llvm-svn: 279699
Matthias Braun [Thu, 25 Aug 2016 01:27:13 +0000 (01:27 +0000)]
MachineFunctionProperties/MIRParser: Rename AllVRegsAllocated->NoVRegs, compute it
Rename AllVRegsAllocated to NoVRegs. This avoids the connotation of
running after register and simply describes that no vregs are used in
a machine function. With that we can simply compute the property and do
not need to dump/parse it in .mir files.
Differential Revision: http://reviews.llvm.org/D23850
llvm-svn: 279698
Kostya Serebryany [Thu, 25 Aug 2016 01:25:03 +0000 (01:25 +0000)]
[libFuzzer] simplify the code, NFC
llvm-svn: 279697
George Burgess IV [Thu, 25 Aug 2016 01:05:08 +0000 (01:05 +0000)]
Make some LLVM_CONSTEXPR variables const. NFC.
This patch changes LLVM_CONSTEXPR variable declarations to const
variable declarations, since LLVM_CONSTEXPR expands to nothing if the
current compiler doesn't support constexpr. In all of the changed
cases, it looks like the code intended the variable to be const instead
of sometimes-constexpr sometimes-not.
llvm-svn: 279696
Eugene Zelenko [Thu, 25 Aug 2016 00:45:04 +0000 (00:45 +0000)]
Fix some Clang-tidy modernize-use-using and Include What You Use warnings; other minor fixes.
Differential revision: https://reviews.llvm.org/D23861
llvm-svn: 279695
Richard Smith [Thu, 25 Aug 2016 00:34:00 +0000 (00:34 +0000)]
Lazily load the ContextDecl for a lambda's DefinitionData, to fix a
deserialization cycle caused by the ContextDecl recursively importing members
of the lambda's closure type.
llvm-svn: 279694
Xinliang David Li [Thu, 25 Aug 2016 00:26:32 +0000 (00:26 +0000)]
[Profile] Propagate branch metadata properly in instcombine
Differential Revision: http://reviews.llvm.org/D23590
llvm-svn: 279693
Matt Arsenault [Thu, 25 Aug 2016 00:25:10 +0000 (00:25 +0000)]
Strip opencl.ocl.version metadata
This should be uniqued when linking, but right now it creates
a lot of metadata spam listing the same version. This should also
probably be reporting the compiled version of the user program,
which may differ from the library. Currently the library IR files report
1.0 while 1.1/1.2 are the default for user programs.
llvm-svn: 279692
Bruno Cardoso Lopes [Thu, 25 Aug 2016 00:22:08 +0000 (00:22 +0000)]
[Sema][Comments] Factor out function type loc logic. NFCI
This is in prepatation for @param TypeAliasTemplate support.
llvm-svn: 279691
Kyle Butt [Thu, 25 Aug 2016 00:06:52 +0000 (00:06 +0000)]
Test: Add REQUIRES: asserts to test that now requires stats.
Test was modified in r279670
llvm-svn: 279690
Jason Molenda [Wed, 24 Aug 2016 23:46:48 +0000 (23:46 +0000)]
Rewrite the GetFileInSDK methods in PlatformRemoteiOS,
PlatformRemoteAppleWatch, PlatformRemoteAppleTV and remove the
GetFileInSDKRoot method from those classes.
The rewrite uses the more modern FileSpec etc API to simplify,
and handles the case where an SDK Root is given to lldb with
the "/Symbols" directory name already appended. The new version
will try appending "/Symbols" and "/Symbols.Internal" to the
sdk root directories, and will also try appending nothing to
the sdk root directory in case it's handed such an sdkroot.
<rdar://problem/
28000054>
llvm-svn: 279688
David Blaikie [Wed, 24 Aug 2016 23:22:36 +0000 (23:22 +0000)]
DebugInfo: Let -gsplit-dwarf and -gmlt compose if -fno-split-dwarf-inlining is used
If the inline info is not duplicated into the skeleton CU, then there's
value in using -gsplit-dwarf and -gmlt together (to keep all those extra
subprograms out of the skeleton CU, while also producing smaller .dwo
files)
llvm-svn: 279687
Kostya Serebryany [Wed, 24 Aug 2016 23:10:17 +0000 (23:10 +0000)]
[libFuzzer] make a test more deterministic
llvm-svn: 279686
Sanjay Patel [Wed, 24 Aug 2016 23:03:36 +0000 (23:03 +0000)]
[InstCombine] move foldICmpDivConstConst() contents to foldICmpDivConstant(); NFCI
There was no logic in foldICmpDivConstant, so no need for a separate function.
The code is directly copy/pasted, so further cleanups to follow.
llvm-svn: 279685
Evgeny Stupachenko [Wed, 24 Aug 2016 23:01:33 +0000 (23:01 +0000)]
The patch improves ValueTracking on left shift with nsw flag.
Summary:
The patch fixes PR28946.
Reviewers: majnemer, sanjoy
Differential Revision: http://reviews.llvm.org/D23296
From: Li Huang
llvm-svn: 279684
Heejin Ahn [Wed, 24 Aug 2016 22:53:00 +0000 (22:53 +0000)]
[WebAssembly] Change a comment line
Test for commit access.
llvm-svn: 279683
Matthias Braun [Wed, 24 Aug 2016 22:41:46 +0000 (22:41 +0000)]
MIRYamlMapping cleanup
Missed two lines got lost when cherry picking old commits to master.
llvm-svn: 279682
Krzysztof Parzyszek [Wed, 24 Aug 2016 22:36:35 +0000 (22:36 +0000)]
[Hexagon] Check for block end when skipping debug instructions
llvm-svn: 279681
Matthias Braun [Wed, 24 Aug 2016 22:34:06 +0000 (22:34 +0000)]
MIRParser/MIRPrinter: Compute HasInlineAsm instead of printing/parsing it
llvm-svn: 279680
Matthias Braun [Wed, 24 Aug 2016 22:32:11 +0000 (22:32 +0000)]
Missed a test in my last commit
llvm-svn: 279679
Krzysztof Parzyszek [Wed, 24 Aug 2016 22:27:36 +0000 (22:27 +0000)]
[Hexagon] Change insertion of expand-condsets pass to avoid memory leaks
llvm-svn: 279678
Sanjay Patel [Wed, 24 Aug 2016 22:22:06 +0000 (22:22 +0000)]
[InstCombine] use m_APInt to allow icmp eq/ne (shr X, C2), C folds for splat constant vectors
llvm-svn: 279677
Matthias Braun [Wed, 24 Aug 2016 22:17:45 +0000 (22:17 +0000)]
MachineRegisterInfo/MIR: Initialize tracksSubRegLiveness early, do not print/parser it
tracksSubRegLiveness only depends on the Subtarget and a cl::opt, there
is not need to change it or save/parse it in a .mir file.
Make the field const and move the initialization LiveIntervalAnalysis to the
MachineRegisterInfo constructor. Also cleanup some code and fix some
instances which better use MachineRegisterInfo::subRegLivenessEnabled() instead
of TargetSubtargetInfo::enableSubRegLiveness().
llvm-svn: 279676
Chris Bieneman [Wed, 24 Aug 2016 22:17:06 +0000 (22:17 +0000)]
[CMake] Be more consistent about naming targets and components
Summary:
The point of this patch is to have a consistent convention for naming build, check and install targets so that the targets can be constructed from the project name.
This change renames a bunch of CMake components and targets from libcxx to cxx. For each renamed target I've added a convenience target that matches the old target name and depends on the new target. This will preserve function of the old targets so that the change doesn't break the world. We can evaluate if it is worth removing the extra targets later.
Reviewers: EricWF
Subscribers: cfe-commits
Differential Revision: https://reviews.llvm.org/D23699
llvm-svn: 279675
Kostya Serebryany [Wed, 24 Aug 2016 22:10:35 +0000 (22:10 +0000)]
[lsan] give a test a bit more stack -- it started failing after r279664 on the debian bot, hopefully this is a fix.
llvm-svn: 279674
Chris Bieneman [Wed, 24 Aug 2016 22:09:46 +0000 (22:09 +0000)]
[Order Files] On Darwin use DTrace's oneshot probe
The oneshot probe only gets executed the first time the probe is hit in the process. For order file generation this is really all we care about.
llvm-svn: 279673
Todd Fiala [Wed, 24 Aug 2016 21:40:29 +0000 (21:40 +0000)]
fix darwin_log test errors on macOS < 10.12
The newer event-based tests I added neglected to do the
macOS 10.12 check in the setup. This caused earlier macOS
test suite runs to attempt to compile code that doesn't exist.
llvm-svn: 279672
Kyle Butt [Wed, 24 Aug 2016 21:34:27 +0000 (21:34 +0000)]
CodeGen: If Convert blocks that would form a diamond when tail-merged.
The following function currently relies on tail-merging for if
conversion to succeed. The common tail of cond_true and cond_false is
extracted, and this then forms a diamond pattern that can be
successfully if converted.
If this block does not get extracted, either because tail-merging is
disabled or the threshold is higher, we should still recognize this
pattern and if-convert it.
Fixed a regression in the original commit. Need to un-reverse branches after
reversing them, or other conversions go awry.
define i32 @t2(i32 %a, i32 %b) nounwind {
entry:
%tmp1434 = icmp eq i32 %a, %b ; <i1> [#uses=1]
br i1 %tmp1434, label %bb17, label %bb.outer
bb.outer: ; preds = %cond_false, %entry
%b_addr.021.0.ph = phi i32 [ %b, %entry ], [ %tmp10, %cond_false ]
%a_addr.026.0.ph = phi i32 [ %a, %entry ], [ %a_addr.026.0, %cond_false ]
br label %bb
bb: ; preds = %cond_true, %bb.outer
%indvar = phi i32 [ 0, %bb.outer ], [ %indvar.next, %cond_true ]
%tmp. = sub i32 0, %b_addr.021.0.ph
%tmp.40 = mul i32 %indvar, %tmp.
%a_addr.026.0 = add i32 %tmp.40, %a_addr.026.0.ph
%tmp3 = icmp sgt i32 %a_addr.026.0, %b_addr.021.0.ph
br i1 %tmp3, label %cond_true, label %cond_false
cond_true: ; preds = %bb
%tmp7 = sub i32 %a_addr.026.0, %b_addr.021.0.ph
%tmp1437 = icmp eq i32 %tmp7, %b_addr.021.0.ph
%indvar.next = add i32 %indvar, 1
br i1 %tmp1437, label %bb17, label %bb
cond_false: ; preds = %bb
%tmp10 = sub i32 %b_addr.021.0.ph, %a_addr.026.0
%tmp14 = icmp eq i32 %a_addr.026.0, %tmp10
br i1 %tmp14, label %bb17, label %bb.outer
bb17: ; preds = %cond_false, %cond_true, %entry
%a_addr.026.1 = phi i32 [ %a, %entry ], [ %tmp7, %cond_true ], [ %a_addr.026.0, %cond_false ]
ret i32 %a_addr.026.1
}
Without tail-merging or diamond-tail if conversion:
LBB1_1: @ %bb
@ =>This Inner Loop Header: Depth=1
cmp r0, r1
ble LBB1_3
@ BB#2: @ %cond_true
@ in Loop: Header=BB1_1 Depth=1
subs r0, r0, r1
cmp r1, r0
it ne
cmpne r0, r1
bgt LBB1_4
LBB1_3: @ %cond_false
@ in Loop: Header=BB1_1 Depth=1
subs r1, r1, r0
cmp r1, r0
bne LBB1_1
LBB1_4: @ %bb17
bx lr
With diamond-tail if conversion, but without tail-merging:
@ BB#0: @ %entry
cmp r0, r1
it eq
bxeq lr
LBB1_1: @ %bb
@ =>This Inner Loop Header: Depth=1
cmp r0, r1
ite le
suble r1, r1, r0
subgt r0, r0, r1
cmp r1, r0
bne LBB1_1
@ BB#2: @ %bb17
bx lr
llvm-svn: 279671
Kyle Butt [Wed, 24 Aug 2016 21:34:24 +0000 (21:34 +0000)]
IfConversion: Rescan diamonds.
The cost of predicating a diamond is only the instructions that are not shared
between the two branches. Additionally If a predicate clobbering instruction
occurs in the shared portion of the branches (e.g. a cond move), it may still
be possible to if convert the sub-cfg. This change handles these two facts by
rescanning the non-shared portion of a diamond sub-cfg to recalculate both the
predication cost and whether both blocks are pred-clobbering.
Fixed 2 bugs before recommitting. Branch instructions must be compared and found
identical before diamond conversion. Also, predicate-clobbering instructions in
the shared prefix disqualifies a potential diamond conversion. Includes tests
for both.
llvm-svn: 279670
Jason Henline [Wed, 24 Aug 2016 21:31:53 +0000 (21:31 +0000)]
[StreamExecutor] Rename Executor to Device
Summary: This more clearly describes what the class is.
Reviewers: jlebar
Subscribers: jprice, parallel_libs-commits
Differential Revision: https://reviews.llvm.org/D23851
llvm-svn: 279669
Richard Smith [Wed, 24 Aug 2016 21:30:00 +0000 (21:30 +0000)]
Disable test under asan: it uses a lot of stack, and asan increases the
per-frame stack usage enough to cause it to hit our stack limit. This is not
ideal; we should find a better way of dealing with this, such as increasing
our stack allocation when built with ASan.
llvm-svn: 279668
Richard Smith [Wed, 24 Aug 2016 21:25:37 +0000 (21:25 +0000)]
PR29097: add an update record when we instantiate the default member
initializer of an imported field.
llvm-svn: 279667
Alexander Kornienko [Wed, 24 Aug 2016 21:23:24 +0000 (21:23 +0000)]
[clang-tidy misc-move-const-arg] more specific messages + suggest alternative solution
llvm-svn: 279666
Tim Northover [Wed, 24 Aug 2016 21:21:29 +0000 (21:21 +0000)]
ARM: don't diagnose cbz/cbnz to Thumb functions.
A branch-distance to a Thumb function shouldn't be forced to be odd for
CBZ/CBNZ instructions because (assuming it's within range), it's going to be a
valid, even offset.
llvm-svn: 279665
Kostya Serebryany [Wed, 24 Aug 2016 21:20:10 +0000 (21:20 +0000)]
[sanitizer] re-apply r279572 and r279595 reverted in r279643: change the 64-bit allocator to use a single array for free-d chunks instead of a lock-free linked list of tranfer batches. This change simplifies the code, makes the allocator more 'hardened', and will allow simpler code to release RAM to OS. This may also slowdown malloc stress tests due to lock contension, but I did not observe noticeable slowdown on various real multi-threaded benchmarks.
llvm-svn: 279664
Bruno Cardoso Lopes [Wed, 24 Aug 2016 21:11:43 +0000 (21:11 +0000)]
[Sema][Comments] Support @param with c++ 'using' keyword
Give appropriate warnings with -Wdocumentation for @param comments
that refer to function aliases defined with 'using'. Very similar
to typedef's behavior. This does not add support for
TypeAliasTemplateDecl yet.
Differential Revision: https://reviews.llvm.org/D23783
rdar://problem/
27300695
llvm-svn: 279662
Kostya Serebryany [Wed, 24 Aug 2016 21:03:28 +0000 (21:03 +0000)]
[ubsan] fix the test to me more resistent against changes in the sanitizer allocator
llvm-svn: 279661
Changpeng Fang [Wed, 24 Aug 2016 20:35:23 +0000 (20:35 +0000)]
AMDGCN/SI: Implement readlane/readfirstlane intrinsics
Summary:
This patch implements readlane/readfirstlane intrinsics.
TODO: need to define a new register class to consider the case
that the source could be a vector register or M0.
Reviewed by:
arsenm and tstellarAMD
Differential Revision:
http://reviews.llvm.org/D22489
llvm-svn: 279660
Eugene Zelenko [Wed, 24 Aug 2016 20:05:36 +0000 (20:05 +0000)]
Clang-tidy documentation style. Two Google checks are aliases.
Differential revision: https://reviews.llvm.org/D23815
llvm-svn: 279659
Jason Henline [Wed, 24 Aug 2016 19:42:03 +0000 (19:42 +0000)]
[StreamExecutor] Fix allocateDeviceMemory
Summary:
The return value from PlatformExecutor::allocateDeviceMemory needs to be
converted from Expected<GlobalDeviceMemoryBase> to
Expected<GlobalDeviceMemory<T>> in Executor::allocateDeviceMemory.
A similar bug is also fixed for Executor::allocateHostMemory.
Thanks to jprice for identifying this bug.
Reviewers: jprice, jlebar
Subscribers: parallel_libs-commits
Differential Revision: https://reviews.llvm.org/D23849
llvm-svn: 279658
Michael Kruse [Wed, 24 Aug 2016 19:12:48 +0000 (19:12 +0000)]
Add %loadPolly to test command line.
Required for out-of-tree builds of Polly.
llvm-svn: 279657
Matt Arsenault [Wed, 24 Aug 2016 19:11:52 +0000 (19:11 +0000)]
amdgcn: Also correct get_local_size type for HSA
llvm-svn: 279656
Rafael Espindola [Wed, 24 Aug 2016 19:02:29 +0000 (19:02 +0000)]
Use isTargetMachO instead of isTargetDarwin.
llvm-svn: 279655
Jason Henline [Wed, 24 Aug 2016 18:56:26 +0000 (18:56 +0000)]
[StreamExecutor] Clean up device copy comments
Summary:
Consolidate Executor::synchronousCopy* and Stream::thenCopy* methods into
Doxygen method groups and combine all their comments into one section.
Also a "doc" target to the build files to use Doxygen to build the
documentation.
Reviewers: jlebar
Subscribers: jprice, parallel_libs-commits
Differential Revision: https://reviews.llvm.org/D23845
llvm-svn: 279654
Samuel Antao [Wed, 24 Aug 2016 18:52:18 +0000 (18:52 +0000)]
Fix offload bundler tests so that diagnostic can start with caps.
Windows require that.
llvm-svn: 279653
Simon Pilgrim [Wed, 24 Aug 2016 18:40:53 +0000 (18:40 +0000)]
[X86][SSE] Add MINSD/MAXSD/MINSS/MAXSS intrinsic scalar load folding support
These are no different in load behaviour to the existing ADD/SUB/MUL/DIV scalar ops but were missing from isNonFoldablePartialRegisterLoad
llvm-svn: 279652
David Blaikie [Wed, 24 Aug 2016 18:29:58 +0000 (18:29 +0000)]
DebugInfo: Add flag to CU to disable emission of inline debug info into the skeleton CU
In cases where .dwo/.dwp files are guaranteed to be available, skipping
the extra online (in the .o file) inline info can save a substantial
amount of space - see the original r221306 for more details there.
llvm-svn: 279651
David Blaikie [Wed, 24 Aug 2016 18:29:49 +0000 (18:29 +0000)]
DebugInfo: Add flag to CU to disable emission of inline debug info into the skeleton CU
In cases where .dwo/.dwp files are guaranteed to be available, skipping
the extra online (in the .o file) inline info can save a substantial
amount of space - see the original r221306 for more details there.
llvm-svn: 279650
Matthew Simpson [Wed, 24 Aug 2016 18:23:17 +0000 (18:23 +0000)]
[LV] Unify vector and scalar maps
This patch unifies the data structures we use for mapping instructions from the
original loop to their corresponding instructions in the new loop. Previously,
we maintained two distinct maps for this purpose: WidenMap and ScalarIVMap.
WidenMap maintained the vector values each instruction from the old loop was
represented with, and ScalarIVMap maintained the scalar values each scalarized
induction variable was represented with. With this patch, all values created
for the new loop are maintained in VectorLoopValueMap.
The change allows for several simplifications. Previously, when an instruction
was scalarized, we had to insert the scalar values into vectors in order to
maintain the mapping in WidenMap. Then, if a user of the scalarized value was
also scalar, we had to extract the scalar values from the temporary vector we
created. We now aovid these unnecessary scalar-to-vector-to-scalar conversions.
If a scalarized value is used by a scalar instruction, the scalar value is used
directly. However, if the scalarized value is needed by a vector instruction,
we generate the needed insertelement instructions on-demand.
A common idiom in several locations in the code (including the scalarization
code), is to first get the vector values an instruction from the original loop
maps to, and then extract a particular scalar value. This patch adds
getScalarValue for this purpose along side getVectorValue as an interface into
VectorLoopValueMap. These functions work together to return the requested
values if they're available or to produce them if they're not.
The mapping has also be made less permissive. Entries can be added to
VectorLoopValue map with the new initVector and initScalar functions.
getVectorValue has been modified to return a constant reference to the mapped
entries.
There's no real functional change with this patch; however, in some cases we
will generate slightly different code. For example, instead of an insertelement
sequence following the definition of an instruction, it will now precede the
first use of that instruction. This can be seen in the test case changes.
Differential Revision: https://reviews.llvm.org/D23169
llvm-svn: 279649
Evandro Menezes [Wed, 24 Aug 2016 18:17:30 +0000 (18:17 +0000)]
[AArch64] Adjust the feature set for Exynos M1.
Enable zero cycle zeroing.
llvm-svn: 279648
Sanjoy Das [Wed, 24 Aug 2016 18:10:21 +0000 (18:10 +0000)]
[SCCP] Don't delete side-effecting instructions
I'm not sure if the `!isa<CallInst>(Inst) &&
!isa<TerminatorInst>(Inst))` bit is correct either, but this fixes the
case we know is broken.
llvm-svn: 279647
Simon Pilgrim [Wed, 24 Aug 2016 18:07:53 +0000 (18:07 +0000)]
[X86][SSE] Add support for combining VZEXT_MOVL target shuffles
Includes adding more general support for the pattern: VZEXT_MOVL(VZEXT_LOAD(ptr)) -> VZEXT_LOAD(ptr)
This has unearthed a couple of latent poor codegen issues (MINSS/MAXSS scalar load folding and MOVDDUP/BROADCAST load folding patterns), which will be fixed shortly.
Its also reduced a couple of tests so that they no longer reach the instruction threshold necessary to be combined to PSHUFB (see PR26183).
llvm-svn: 279646
Matt Arsenault [Wed, 24 Aug 2016 17:52:04 +0000 (17:52 +0000)]
amdgcn: Fix return type for get_global_size
llvm-svn: 279644
Vitaly Buka [Wed, 24 Aug 2016 17:40:29 +0000 (17:40 +0000)]
Revert r279572 "[sanitizer] change the 64-bit..." because of failures on ubsan
This reverts commit r279572 and r279595.
llvm-svn: 279643
Krzysztof Parzyszek [Wed, 24 Aug 2016 17:17:39 +0000 (17:17 +0000)]
[Hexagon] Enable subregister liveness tracking
llvm-svn: 279642
NAKAMURA Takumi [Wed, 24 Aug 2016 17:05:48 +0000 (17:05 +0000)]
clang-offload-bundler: Update libdeps.
llvm-svn: 279641
Jason Henline [Wed, 24 Aug 2016 16:58:20 +0000 (16:58 +0000)]
[StreamExecutor] Executor add synchronous methods
Summary:
Add Executor methods that block the host until completion. Since these
methods are host-synchronous, they don't require Stream arguments.
Reviewers: jlebar
Subscribers: jprice, parallel_libs-commits
Differential Revision: https://reviews.llvm.org/D23577
llvm-svn: 279640
Nico Weber [Wed, 24 Aug 2016 16:37:21 +0000 (16:37 +0000)]
fix typo "varaible"
llvm-svn: 279639
Nico Weber [Wed, 24 Aug 2016 16:36:41 +0000 (16:36 +0000)]
fix typo "varaibles"
llvm-svn: 279638
Krzysztof Parzyszek [Wed, 24 Aug 2016 16:36:37 +0000 (16:36 +0000)]
[Hexagon] Remove the utilization of IMPLICIT_DEFs from expand-condsets
This is no longer necessary, because since r279625 the subregister
liveness properly accounts for read-undefs.
llvm-svn: 279637
Nico Weber [Wed, 24 Aug 2016 16:34:54 +0000 (16:34 +0000)]
fix typo 'varaible' in assert
llvm-svn: 279636
Samuel Antao [Wed, 24 Aug 2016 15:47:06 +0000 (15:47 +0000)]
Add target REQUIRES directives to offload bundler test.
llvm-svn: 279635
Samuel Antao [Wed, 24 Aug 2016 15:39:07 +0000 (15:39 +0000)]
[Driver][OpenMP][CUDA] Add capability to bundle object files in sections of the host binary format.
Summary:
This patch adds the capability to bundle object files in sections of the host binary using a designated naming convention for these sections. This patch uses the functionality of the object reader already in the LLVM library to read bundled files, and invokes clang with the incremental linking options to create bundle files.
Bundling files involves creating an IR file with the contents of the bundle assigned as initializers of globals binded to the designated sections. This way the bundling implementation is agnostic of the host object format.
The features added by this patch were requested in the RFC discussion in http://lists.llvm.org/pipermail/cfe-dev/2016-February/047547.html.
Reviewers: echristo, tra, jlebar, hfinkel, ABataev, Hahnfeld
Subscribers: mkuron, whchung, cfe-commits, andreybokhanko, Hahnfeld, arpith-jacob, carlo.bertolli, mehdi_amini, caomhin
Differential Revision: https://reviews.llvm.org/D21851
llvm-svn: 279634
Tim Northover [Wed, 24 Aug 2016 15:37:51 +0000 (15:37 +0000)]
GlobalISel: fix cmp test to be in SSA form
llvm-svn: 279633
Samuel Antao [Wed, 24 Aug 2016 15:21:05 +0000 (15:21 +0000)]
clang-offload-bundler - offload files bundling/unbundling tool
Summary:
One of the goals of programming models that support offloading (e.g. OpenMP) is to enable users to offload with little effort, by annotating the code with a few pragmas. I'd also like to save users the trouble of changing their existent applications' build system. So having the compiler always return a single file instead of one for the host and each target even if the user is doing separate compilation is desirable.
This diff proposes a tool named clang-offload-bundler (happy to change the name if required) that is used to bundle files associated with the same user source file but different targets, or to unbundle a file into separate files associated with different targets.
This tool supports the driver support for OpenMP under review in http://reviews.llvm.org/D9888. The tool is used there to enable separate compilation, so that the very first action on input files that are not source files is a "unbundling action" and the very last non-linking action is a "bundling action".
The format of the bundled files is currently very simple: text formats are concatenated with comments that have a magic string and target identifying triple in between, and binary formats have a header that contains the triple and the offset and size of the code for host and each target.
The goal is to improve this tool in the future to deal with archive files so that each individual file in the archive is properly dealt with. We see that archives are very commonly used in current applications to combine separate compilation results. So I'm convinced users would enjoy this feature.
This tool can be used like this:
`clang-offload-bundler -targets=triple1,triple2 -type=ii -inputs=a.triple1.ii,a.triple2.ii -outputs=a.ii`
or
`clang-offload-bundler -targets=triple1,triple2 -type=ii -outputs=a.triple1.ii,a.triple2.ii -inputs=a.ii -unbundle`
I implemented the tool under clang/tools. Please let me know if something like this should live somewhere else.
This patch is prerequisite for http://reviews.llvm.org/D9888.
Reviewers: hfinkel, rsmith, echristo, chandlerc, tra, jlebar, ABataev, Hahnfeld
Subscribers: whchung, caomhin, andreybokhanko, arpith-jacob, carlo.bertolli, mehdi_amini, guansong, Hahnfeld, cfe-commits
Differential Revision: https://reviews.llvm.org/D13909
llvm-svn: 279632
Teresa Johnson [Wed, 24 Aug 2016 15:11:47 +0000 (15:11 +0000)]
[ThinLTO/gold] Add caching support to gold-plugin
Summary:
With support now in the new LTO API for caching (r279576), add
optional ThinLTO caching in the gold-plugin.
Reviewers: mehdi_amini
Subscribers: mehdi_amini, llvm-commits
Differential Revision: https://reviews.llvm.org/D23836
llvm-svn: 279631
Simon Pilgrim [Wed, 24 Aug 2016 15:07:11 +0000 (15:07 +0000)]
[X86][SSE] Regenerate scalar math load folding tests for 32 and 64 bit targets
llvm-svn: 279630
Wei Ding [Wed, 24 Aug 2016 14:59:47 +0000 (14:59 +0000)]
AMDGPU : Add V_SAD_U32 instruction pattern.
Differential Revision: http://reviews.llvm.org/D23069
llvm-svn: 279629
Ying Yi [Wed, 24 Aug 2016 14:27:23 +0000 (14:27 +0000)]
[llvm-cov] Add the project summary to each source file coverage report.
This patch includes the following changes:
- Included header "Code coverage report" and include the date that the report was created.
- Included title (as specified in a command line option, (i.e llvm-cov -project-title="Simple Test")
- In the summary, list the elf files that the source code file has contributed to.
- Used column heading for "Line No.", "Count No.", Source".
Differential Revision: https://reviews.llvm.org/D23345
llvm-svn: 279628
Pavel Labath [Wed, 24 Aug 2016 14:03:10 +0000 (14:03 +0000)]
Fix mismatched new/free in Process:RunPrivateStateThread
NFC
llvm-svn: 279627
Sanjay Patel [Wed, 24 Aug 2016 13:55:55 +0000 (13:55 +0000)]
[InstCombine] add assert and explanatory comment for fold removed in r279568; NFC
I deleted a fold from InstCombine at:
https://reviews.llvm.org/rL279568
because it (like any InstCombine to a constant?) should always happen in InstSimplify,
however, it's not obvious what the assumptions are in the remaining code.
Add a comment and assert to make it clearer.
Differential Revision: https://reviews.llvm.org/D23819
llvm-svn: 279626
Krzysztof Parzyszek [Wed, 24 Aug 2016 13:37:55 +0000 (13:37 +0000)]
Create subranges for new intervals resulting from live interval splitting
The register allocator can split a live interval of a register into a set
of smaller intervals. After the allocation of registers is complete, the
rewriter will modify the IR to replace virtual registers with the corres-
ponding physical registers. At this stage, if a register corresponding
to a subregister of a virtual register is used, the rewriter will check
if that subregister is undefined, and if so, it will add the <undef> flag
to the machine operand. The function verifying liveness of the subregis-
ter would assume that it is undefined, unless any of the subranges of the
live interval proves otherwise.
The problem is that the live intervals created during splitting do not
have any subranges, even if the original parent interval did. This could
result in the <undef> flag placed on a register that is actually defined.
Differential Revision: http://reviews.llvm.org/D21189
llvm-svn: 279625
Simon Dardis [Wed, 24 Aug 2016 13:00:47 +0000 (13:00 +0000)]
[mips] Preparatory work for a generic scheduler
Extend instruction definitions from nearly all ISAs to include
appropriate instruction itineraries. Change MIPS16s gp prologue
generation to use real instructions instead of using a pseudo
instruction.
Reviewers: dsanders, vkalintiris
Differential Review: https://reviews.llvm.org/D23548
llvm-svn: 279623
Simon Pilgrim [Wed, 24 Aug 2016 12:42:31 +0000 (12:42 +0000)]
[X86][AVX2] Ensure on 32-bit targets that we broadcast f64 types not i64 (PR29101)
llvm-svn: 279622
Simon Pilgrim [Wed, 24 Aug 2016 11:56:15 +0000 (11:56 +0000)]
[X86][F16C] Regenerated f16c tests
llvm-svn: 279621
Gil Rapaport [Wed, 24 Aug 2016 11:37:57 +0000 (11:37 +0000)]
[Loop Vectorizer] Support predication of div/rem
div/rem instructions in basic blocks that require predication currently prevent
vectorization. This patch extends the existing mechanism for predicating stores
to handle other instructions and leverages it to predicate divs and rems.
Differential Revision: https://reviews.llvm.org/D22918
llvm-svn: 279620
Simon Pilgrim [Wed, 24 Aug 2016 10:46:40 +0000 (10:46 +0000)]
[X86][SSE] Add support for 32-bit element vectors to X86ISD::VZEXT_LOAD
Consecutive load matching (EltsFromConsecutiveLoads) currently uses VZEXT_LOAD (load scalar into lowest element and zero uppers) for vXi64 / vXf64 vectors only.
For vXi32 / vXf32 vectors it instead creates a scalar load, SCALAR_TO_VECTOR and finally VZEXT_MOVL (zero upper vector elements), relying on tablegen patterns to match this into an equivalent of VZEXT_LOAD.
This patch adds the VZEXT_LOAD patterns for vXi32 / vXf32 vectors directly and updates EltsFromConsecutiveLoads to use this.
This has proven necessary to allow us to easily make VZEXT_MOVL a full member of the target shuffle set - without this change the call to combineShuffle (which is the main caller of EltsFromConsecutiveLoads) tended to recursively recreate VZEXT_MOVL nodes......
Differential Revision: https://reviews.llvm.org/D23673
llvm-svn: 279619
Chandler Carruth [Wed, 24 Aug 2016 09:37:14 +0000 (09:37 +0000)]
[PM] Introduce basic update capabilities to the new PM's CGSCC pass
manager, including both plumbing and logic to handle function pass
updates.
There are three fundamentally tied changes here:
1) Plumbing *some* mechanism for updating the CGSCC pass manager as the
CG changes while passes are running.
2) Changing the CGSCC pass manager infrastructure to have support for
the underlying graph to mutate mid-pass run.
3) Actually updating the CG after function passes run.
I can separate them if necessary, but I think its really useful to have
them together as the needs of #3 drove #2, and that in turn drove #1.
The plumbing technique is to extend the "run" method signature with
extra arguments. We provide the call graph that intrinsically is
available as it is the basis of the pass manager's IR units, and an
output parameter that records the results of updating the call graph
during an SCC passes's run. Note that "...UpdateResult" isn't a *great*
name here... suggestions very welcome.
I tried a pretty frustrating number of different data structures and such
for the innards of the update result. Every other one failed for one
reason or another. Sometimes I just couldn't keep the layers of
complexity right in my head. The thing that really worked was to just
directly provide access to the underlying structures used to walk the
call graph so that their updates could be informed by the *particular*
nature of the change to the graph.
The technique for how to make the pass management infrastructure cope
with mutating graphs was also something that took a really, really large
number of iterations to get to a place where I was happy. Here are some
of the considerations that drove the design:
- We operate at three levels within the infrastructure: RefSCC, SCC, and
Node. In each case, we are working bottom up and so we want to
continue to iterate on the "lowest" node as the graph changes. Look at
how we iterate over nodes in an SCC running function passes as those
function passes mutate the CG. We continue to iterate on the "lowest"
SCC, which is the one that continues to contain the function just
processed.
- The call graph structure re-uses SCCs (and RefSCCs) during mutation
events for the *highest* entry in the resulting new subgraph, not the
lowest. This means that it is necessary to continually update the
current SCC or RefSCC as it shifts. This is really surprising and
subtle, and took a long time for me to work out. I actually tried
changing the call graph to provide the opposite behavior, and it
breaks *EVERYTHING*. The graph update algorithms are really deeply
tied to this particualr pattern.
- When SCCs or RefSCCs are split apart and refined and we continually
re-pin our processing to the bottom one in the subgraph, we need to
enqueue the newly formed SCCs and RefSCCs for subsequent processing.
Queuing them presents a few challenges:
1) SCCs and RefSCCs use wildly different iteration strategies at
a high level. We end up needing to converge them on worklist
approaches that can be extended in order to be able to handle the
mutations.
2) The order of the enqueuing need to remain bottom-up post-order so
that we don't get surprising order of visitation for things like
the inliner.
3) We need the worklists to have set semantics so we don't duplicate
things endlessly. We don't need a *persistent* set though because
we always keep processing the bottom node!!!! This is super, super
surprising to me and took a long time to convince myself this is
correct, but I'm pretty sure it is... Once we sink down to the
bottom node, we can't re-split out the same node in any way, and
the postorder of the current queue is fixed and unchanging.
4) We need to make sure that the "current" SCC or RefSCC actually gets
enqueued here such that we re-visit it because we continue
processing a *new*, *bottom* SCC/RefSCC.
- We also need the ability to *skip* SCCs and RefSCCs that get merged
into a larger component. We even need the ability to skip *nodes* from
an SCC that are no longer part of that SCC.
This led to the design you see in the patch which uses SetVector-based
worklists. The RefSCC worklist is always empty until an update occurs
and is just used to handle those RefSCCs created by updates as the
others don't even exist yet and are formed on-demand during the
bottom-up walk. The SCC worklist is pre-populated from the RefSCC, and
we push new SCCs onto it and blacklist existing SCCs on it to get the
desired processing.
We then *directly* update these when updating the call graph as I was
never able to find a satisfactory abstraction around the update
strategy.
Finally, we need to compute the updates for function passes. This is
mostly used as an initial customer of all the update mechanisms to drive
their design to at least cover some real set of use cases. There are
a bunch of interesting things that came out of doing this:
- It is really nice to do this a function at a time because that
function is likely hot in the cache. This means we want even the
function pass adaptor to support online updates to the call graph!
- To update the call graph after arbitrary function pass mutations is
quite hard. We have to build a fairly comprehensive set of
data structures and then process them. Fortunately, some of this code
is related to the code for building the cal graph in the first place.
Unfortunately, very little of it makes any sense to share because the
nature of what we're doing is so very different. I've factored out the
one part that made sense at least.
- We need to transfer these updates into the various structures for the
CGSCC pass manager. Once those were more sanely worked out, this
became relatively easier. But some of those needs necessitated changes
to the LazyCallGraph interface to make it significantly easier to
extract the changed SCCs from an update operation.
- We also need to update the CGSCC analysis manager as the shape of the
graph changes. When an SCC is merged away we need to clear analyses
associated with it from the analysis manager which we didn't have
support for in the analysis manager infrsatructure. New SCCs are easy!
But then we have the case that the original SCC has its shape changed
but remains in the call graph. There we need to *invalidate* the
analyses associated with it.
- We also need to invalidate analyses after we *finish* processing an
SCC. But the analyses we need to invalidate here are *only those for
the newly updated SCC*!!! Because we only continue processing the
bottom SCC, if we split SCCs apart the original one gets invalidated
once when its shape changes and is not processed farther so its
analyses will be correct. It is the bottom SCC which continues being
processed and needs to have the "normal" invalidation done based on
the preserved analyses set.
All of this is mostly background and context for the changes here.
Many thanks to all the reviewers who helped here. Especially Sanjoy who
caught several interesting bugs in the graph algorithms, David, Sean,
and others who all helped with feedback.
Differential Revision: http://reviews.llvm.org/D21464
llvm-svn: 279618
Peter Smith [Wed, 24 Aug 2016 09:08:54 +0000 (09:08 +0000)]
Canonicalize output section name for .ARM.exidx sections
The ARM Exception handling ABI requires that all ARM exception index
table sections have a prefix of .ARM.exidx and are combined into a
single contiguous block either in their own output section or as part
of another output section.
In general clang will output a single .ARM.exidx section per object,
but will use .ARM.exidx.<section name> when -ffunction-sections is used.
This change canonicalizes the names of sections with the .ARM.exidx
prefix to just .ARM.exidx, which ensures that there is only a single
output section.
Differential Revision: https://reviews.llvm.org/D23775
llvm-svn: 279617
Akira Hatanaka [Wed, 24 Aug 2016 06:49:28 +0000 (06:49 +0000)]
[asan] Mark asan-symbolize-sanity-test.cc as UNSUPPORTED on x86_64-apple
and x86_64h-apple.
Mark the test as UNSUPPORTED to fix a bot that is failing.
http://lab.llvm.org:8080/green/job/clang-stage2-configure-Rlto_check
The bot is failing because asan_symbolize.py cannot tell whether the
reported address is from an x86_64 slice or an x86_64h slice by the
length of the address alone, so it ends up passing the wrong arch to
atos.
rdar://problem/
27907889
llvm-svn: 279614
Vedant Kumar [Wed, 24 Aug 2016 06:44:57 +0000 (06:44 +0000)]
[AST] Make InitListExpr::isExplicit const (NFC)
Patch by Alexander Shaposhnikov!
Differential Revision: https://reviews.llvm.org/D23828
llvm-svn: 279613