Erik Faye-Lund [Thu, 21 Mar 2019 11:14:53 +0000 (12:14 +0100)]
zink/spirv: handle reading registers
Acked-by: Jordan Justen <jordan.l.justen@intel.com>
Erik Faye-Lund [Wed, 20 Mar 2019 15:16:45 +0000 (16:16 +0100)]
zink/spirv: implement some integer ops
Acked-by: Jordan Justen <jordan.l.justen@intel.com>
Dave Airlie [Fri, 19 Oct 2018 01:02:26 +0000 (11:02 +1000)]
zink/spirv: store all values as uint.
This adds bitcasting to uint everywhere for now,
and stores all spir-v ssa values as uints.
It also casts bool to 0/0xffffffff for now
(nir 1-bit bools may be coming in the future).
This fixes a lot of piglit tests to pass now
Acked-by: Jordan Justen <jordan.l.justen@intel.com>
Erik Faye-Lund [Thu, 1 Nov 2018 20:44:09 +0000 (21:44 +0100)]
zink: remove discard_if
Acked-by: Jordan Justen <jordan.l.justen@intel.com>
Dave Airlie [Tue, 2 Oct 2018 23:57:41 +0000 (00:57 +0100)]
zink: query support (v2)
This at least passes piglit occlusion_query test for me here now.
Acked-by: Jordan Justen <jordan.l.justen@intel.com>
Erik Faye-Lund [Thu, 27 Sep 2018 16:23:14 +0000 (18:23 +0200)]
zink: transform z-range
In vulkan, the Z-range of clip-space goes from 0..W instead of -W..+W
as is the case in OpenGL. So we need to transform the Z-range to
account for this.
Acked-by: Jordan Justen <jordan.l.justen@intel.com>
Dave Airlie [Tue, 2 Oct 2018 22:27:36 +0000 (23:27 +0100)]
zink: add dri loader
export MESA_LOADER_DRIVER_OVERRIDE=zink should now work without using
swrast paths
Acked-by: Jordan Justen <jordan.l.justen@intel.com>
Erik Faye-Lund [Mon, 12 Nov 2018 12:20:15 +0000 (13:20 +0100)]
zink/spirv: implement point-sprites
This passes glsl-fs-pointcoord_gles2 from piglit.
Acked-by: Jordan Justen <jordan.l.justen@intel.com>
Dave Airlie [Thu, 24 Jan 2019 03:13:26 +0000 (13:13 +1000)]
zink: ask for flatshade lowering
Acked-by: Jordan Justen <jordan.l.justen@intel.com>
Erik Faye-Lund [Wed, 24 Oct 2018 07:46:05 +0000 (09:46 +0200)]
zink: detect presence of VK_KHR_maintenance1
Acked-by: Jordan Justen <jordan.l.justen@intel.com>
Erik Faye-Lund [Fri, 31 Aug 2018 14:50:20 +0000 (16:50 +0200)]
zink: introduce opengl over vulkan
Here's zink, a so far pretty simple vulkan-gallium driver that is able
to translate some applications from OpenGL to Vulkan.
The compiler is quite limited for now, this will be improved on later.
Signed-off-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Acked-by: Jordan Justen <jordan.l.justen@intel.com>
Samuel Pitoiset [Thu, 24 Oct 2019 16:48:54 +0000 (18:48 +0200)]
radv: fix OpQuantizeToF16 for NaN on GFX6-7
Do not flush NaN to 0.
Fixes
dEQP-VK.spirv_assembly.instruction.compute.opquantize.propagated_nans
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Samuel Pitoiset [Thu, 24 Oct 2019 12:59:29 +0000 (14:59 +0200)]
radv: enable fast depth/stencil clears with separate aspects on GFX8
It's similar to GFX9+. Shadow of Mordor (Vulkan beta) hits that
path and it works fine.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Jordan Justen [Sat, 28 Apr 2018 08:56:59 +0000 (01:56 -0700)]
iris: Mark aux-map BO as used by all batches
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Jordan Justen [Fri, 27 Apr 2018 23:39:30 +0000 (16:39 -0700)]
iris/gen12: Write GFX_AUX_TABLE base address register
Rework:
* Move last_aux_map_state to iris_batch. (Nanley, Ken)
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Jordan Justen [Sat, 28 Apr 2018 08:58:54 +0000 (01:58 -0700)]
iris: Map each surf to it's aux-surf in the aux-map tables
Rework: Nanley Chery
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Jordan Justen [Fri, 16 Feb 2018 10:20:00 +0000 (02:20 -0800)]
isl/gen12: 64k surface alignment
Reworks:
* Update size for aux map change (Nanley)
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Jordan Justen [Fri, 27 Apr 2018 23:35:28 +0000 (16:35 -0700)]
iris/bufmgr: Initialize aux map context for gen12
Reworks:
* free gen_buffer in gen_aux_map_buffer_free. (Rafael)
* lock around aux_map_bos accesses. (Ken)
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Lionel Landwerlin [Mon, 21 Oct 2019 14:17:44 +0000 (17:17 +0300)]
anv: Add aux-map translation for gen12+
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Jordan Justen [Wed, 28 Mar 2018 08:50:17 +0000 (01:50 -0700)]
anv/gen12: Write GFX_AUX_TABLE base address register
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Jordan Justen [Wed, 28 Mar 2018 08:16:12 +0000 (01:16 -0700)]
genxml/gen12: Add AUX MAP register definitions
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Jordan Justen [Wed, 28 Mar 2018 08:42:50 +0000 (01:42 -0700)]
anv/gen12: Initialize aux map context
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Jordan Justen [Wed, 28 Mar 2018 08:10:06 +0000 (01:10 -0700)]
intel/common: Add surface to aux map translation table support
Reworks:
* Add ISL_FORMAT_B8G8R8X8_UNORM_SRGB to get_format_encoding (Nanley)
* ralloc_free aux_map_buffer entries in gen_aux_map_finish. (Rafael)
* verify_aligned_space => align_and_verify_space (Rafael)
* Add mutex to aux-map code. (Rafael, Nanley)
* Add gen_aux_map_fill_bos (Ken)
* Make gen_aux_map_get_state_num lockless
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Jordan Justen [Sun, 1 Apr 2018 20:57:13 +0000 (13:57 -0700)]
anv: Implement aux-map allocator interface
This interface allows the aux-map code in the intel/common library to
allocate and free buffers.
Reworks:
* free gen_buffer in gen_aux_map_buffer_free. (Rafael)
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Jordan Justen [Sun, 1 Apr 2018 20:37:55 +0000 (13:37 -0700)]
intel/common: Add interface to allocate device buffers
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Lionel Landwerlin [Mon, 21 Oct 2019 14:16:05 +0000 (17:16 +0300)]
intel/dev: store whether the device uses an aux map tables on devinfo
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Tapani Pälli [Fri, 11 Oct 2019 06:42:21 +0000 (09:42 +0300)]
i965: setup sized internalformat for MESA_FORMAT_R10G10B10A2_UNORM
Commit
d2b60e433e5 introduced restrictions (as per GLES spec) on the
internal format. We need to setup a sized format for the texture image
so framebuffers created with that are considered complete.
This change fixes following Android CTS test in AHardwareBufferNativeTests
category:
SingleLayer_ColorTest_GpuColorOutputAndSampledImage_R10G10B10A2_UNORM
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Fixes:
d2b60e433e5 ("mesa/main: R10G10B10_(A2) formats are not color renderable in ES")
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Eric Engestrom [Sun, 27 Oct 2019 00:04:31 +0000 (01:04 +0100)]
tu: fix empty-body instruction
Fixes:
8d43e2b2ded0fe3c82d4 ("meson: add -Werror=empty-body to disallow `if(x);`")
Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Eric Engestrom [Sun, 27 Oct 2019 00:04:30 +0000 (01:04 +0100)]
v3d: fix empty-body instruction
Fixes:
8d43e2b2ded0fe3c82d4 ("meson: add -Werror=empty-body to disallow `if(x);`")
Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Eric Engestrom [Sun, 27 Oct 2019 00:04:28 +0000 (01:04 +0100)]
radv: fix empty-body instruction
Fixes:
8d43e2b2ded0fe3c82d4 ("meson: add -Werror=empty-body to disallow `if(x);`")
Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Eric Engestrom [Sat, 26 Oct 2019 22:51:51 +0000 (23:51 +0100)]
anv: fix empty-body instruction
Fixes:
8d43e2b2ded0fe3c82d4 ("meson: add -Werror=empty-body to disallow `if(x);`")
Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Jonathan Marek [Sat, 5 Oct 2019 20:09:55 +0000 (16:09 -0400)]
freedreno/a2xx: use sysval for pointcoord
Fixes a problem with shaders using gl_PointCoord.
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reported-by: Fabio Estevam <festevam@gmail.com>
Tested-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Rob Clark <robdclark@gmail.com>
Alyssa Rosenzweig [Sat, 26 Oct 2019 13:02:34 +0000 (09:02 -0400)]
pan/midgard: Disable precise occlusion queries
I thought there was hardware support for this, but it seems to broken,
or at least more complex than I believed.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Urja Rannikko [Tue, 22 Oct 2019 12:05:07 +0000 (12:05 +0000)]
panfrost: allocate bo for occlusion query results
This memory needs to still be available after all the drawing is done
and forgotten about, so cannot be transient.
Also clear the result so that no rendering returns a zero.
Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Alyssa Rosenzweig [Sat, 19 Oct 2019 21:14:44 +0000 (17:14 -0400)]
panfrost: Expose serialized NIR support
Serialized NIR is required for clover with the SPIR-V pipeline. With
this change and PAN_MESA_DEBUG=deqp, clinfo is able to successfully
probe panfrost.
Code from Nouveau (commit
7955fabcf89c7265f7f4244e46c5bcb83b9687fa by
Karol Herbst).
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Alyssa Rosenzweig [Sat, 19 Oct 2019 20:46:54 +0000 (16:46 -0400)]
pipe-loader: Default to kmsro if probe fails
A device supported by kmsro will not automatically probe kmsro since the
driver name will be panfrost/lima/v3d/..., not "kmsro". Since kmsro is a
bit of a catch-all for generic (mostly embedded) GPUs, add a fallback on
kmsro for the dynamic loader.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Acked-by: Karol Herbst <kherbst@redhat.com>
Alyssa Rosenzweig [Sat, 19 Oct 2019 20:51:30 +0000 (16:51 -0400)]
pipe-loader: Add kmsro pipe_loader target
kmsro is used by numerous embedded GPUs for a common winsys abstraction.
Let's add support for it for the dynamic pipe loader, so clover can
probe on these drivers.
We build the target with Panfrost. When other drivers need kmsro+clover,
we can revisit the build system part; my mesonfu is wanting.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Acked-by: Karol Herbst <kherbst@redhat.com>
Jose Fonseca [Fri, 25 Oct 2019 21:09:34 +0000 (22:09 +0100)]
scons: Fix force_scons parsing.
- Use parsed options instead of using ARGUMENTS directly.
- Handle the case of mingw cross compilation.
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2003
Timothy Arceri [Wed, 31 Jul 2019 04:06:46 +0000 (14:06 +1000)]
radv: enable secure compile support
Can be enabled via the environment variable which tells the
driver how many compilation threads are expected to be called,
and therefore how many forked processes the driver should
create.
For example we would expect to call fossilize replay with
something like this:
RADV_SECURE_COMPILE_THREADS=8 ./fossilize-replay --num-threads 8 \
--shader-cache-size 0 --ignore-derived-pipelines pipeline_cache.foz
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Timothy Arceri [Wed, 31 Jul 2019 04:03:53 +0000 (14:03 +1000)]
radv: a support for a secure compile fork at device creation
This added support for the fork, the installation of the seccomp
filter, and the main loop for the actual compilation to be called
from i.e. run_secure_compile_device().
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Timothy Arceri [Wed, 31 Jul 2019 03:59:17 +0000 (13:59 +1000)]
radv: add radv_secure_compile()
This function will be called by the parent process when doing a
secure compile. It first selects a free process to work with then
passes it all the information it needs to compile the pipeline.
Once the pipeline information has been passed to the secure
process, it then waits around to read/write any disk cache entries
required before exiting.
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Timothy Arceri [Wed, 31 Jul 2019 03:57:16 +0000 (13:57 +1000)]
radv: for secure compile exit early from radv_shader_variant_create()
We don't have permission to be creating shared memory etc.
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Timothy Arceri [Wed, 31 Jul 2019 03:50:52 +0000 (13:50 +1000)]
radv: allow the secure process to read and write from disk cache
This allows the secure process to read and write to the disk cache
via the parent process. This commit just adds the functionality
needed for the secure process, the following commit will add the
functionality for the parent process.
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Timothy Arceri [Thu, 24 Oct 2019 03:17:15 +0000 (14:17 +1100)]
radv: add radv_device_use_secure_compile() helper
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Timothy Arceri [Wed, 31 Jul 2019 03:47:08 +0000 (13:47 +1000)]
radv: add some new members to radv device and instance for secure compile
These will be used by the following commits to hold information about
the forked secure compile processes.
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Timothy Arceri [Wed, 31 Jul 2019 03:44:44 +0000 (13:44 +1000)]
radv: add radv_secure_compile_type enum
This will be used to identify information being passed between the
parent and secure process during a secure compile.
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Timothy Arceri [Wed, 31 Jul 2019 03:39:52 +0000 (13:39 +1000)]
radv: add radv_create_shaders() to radv_shader.h
In a follwing commit we want to be able to call this for secure
compiles from radv_device.c
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Timothy Arceri [Fri, 12 Jul 2019 04:45:16 +0000 (14:45 +1000)]
radv: add debug option to turn off in memory cache
This can be usefull for debugging the on disk cache, but is also
useful in the following patch for secure compiles which will be
used to compile huge pipeline collections. These pipeline
collections can be multiple GBs and the in memory cache grows to
multiple GBs very quickly when they are compiled so we want to
be able to turn off the in memory cache.
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Timothy Arceri [Thu, 24 Oct 2019 02:03:20 +0000 (13:03 +1100)]
radv: get topology from pipeline key rather than VkGraphicsPipelineCreateInfo
This is cleaner and avoids having to read/write an additional copy of
topology for use with secure compile.
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Marek Olšák [Fri, 25 Oct 2019 20:59:07 +0000 (16:59 -0400)]
docs: document new feature EGL_EXT_image_flush_external
Marek Olšák [Fri, 18 Oct 2019 00:07:32 +0000 (20:07 -0400)]
egl: implement new functions from EGL_EXT_image_flush_external
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Reviewed-By: Tapani Pälli <tapani.palli@intel.com>
Marek Olšák [Thu, 17 Oct 2019 22:59:23 +0000 (18:59 -0400)]
egl: handle EGL_IMAGE_EXTERNAL_FLUSH_EXT
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Reviewed-By: Tapani Pälli <tapani.palli@intel.com>
Marek Olšák [Thu, 17 Oct 2019 21:47:14 +0000 (17:47 -0400)]
st/dri: add support for EGL_EXT_image_flush_external
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Reviewed-By: Tapani Pälli <tapani.palli@intel.com>
Marek Olšák [Thu, 17 Oct 2019 20:46:06 +0000 (16:46 -0400)]
st/dri: assume external consumers of back buffers can write to the buffers
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Reviewed-By: Tapani Pälli <tapani.palli@intel.com>
Marek Olšák [Thu, 17 Oct 2019 20:48:48 +0000 (16:48 -0400)]
dri_interface: add interface for EGL_EXT_image_flush_external
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Reviewed-By: Tapani Pälli <tapani.palli@intel.com>
Marek Olšák [Thu, 17 Oct 2019 22:58:42 +0000 (18:58 -0400)]
include: add the definition of EGL_EXT_image_flush_external
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Reviewed-By: Tapani Pälli <tapani.palli@intel.com>
Dylan Baker [Wed, 23 Oct 2019 21:36:19 +0000 (14:36 -0700)]
gitlab-ci: Add a job for meson on windows
This adds a new CI job that runs on windows with MSVC. It currently
builds softpipe and osmesa, and runs the related unit tests. It does
rely on meson's wraps for zlib, but I've set up caching of the wrap
dependencies so hopefully that wont be a problem.
I really wanted to user powershell for this, but there just isn't an
easy way to do that, it's much easier to use batch scripts, so thats
what I used.
The leading `/` for .gitlab-ci/lava... must be removed because windows
doesn't understand it, and when it reads the file the job ends in error.
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Dylan Baker [Wed, 23 Oct 2019 21:21:31 +0000 (14:21 -0700)]
gitlab-ci: refactor out some common stuff for Windows and Linux
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Dylan Baker [Fri, 25 Oct 2019 20:56:23 +0000 (13:56 -0700)]
nir: Fix invalid code for MSVC
Fixes:
ee2050b1111b65594f3470035f7b6f1330824684
("nir: Use BITSET for tracking varyings in lower_io_arrays")
Dylan Baker [Thu, 24 Oct 2019 20:21:45 +0000 (13:21 -0700)]
docs: update releasing process to use new scripts and gitlab
There were several out of date entries in this document, update them to
current practices.
Reviewed-by: Juan A. Suarez <jasuarez@igalia.com>
Dylan Baker [Thu, 24 Oct 2019 20:11:40 +0000 (13:11 -0700)]
bin/gen_release_notes.py: Add a warning if new features are introduced in a point release
Fixes:
86079447da1e00d49db0cbff9a102eb4e71e8702
("scripts: Add a gen_release_notes.py script")
Reviewed-by: Juan A. Suarez <jasuarez@igalia.com>
Dylan Baker [Wed, 23 Oct 2019 15:50:40 +0000 (08:50 -0700)]
bin/gen_release_notes.py: html escape all external data
All of these (bug titles, patch titles, features, and people's names)
can contain characters that are not valid html. Just escape everything
for safety.
Fixes:
86079447da1e00d49db0cbff9a102eb4e71e8702
("scripts: Add a gen_release_notes.py script")
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Juan A. Suarez <jasuarez@igalia.com>
Dylan Baker [Wed, 9 Oct 2019 17:33:14 +0000 (10:33 -0700)]
bin/post_release.py: Add .html to hrefs
oops.
Fixes:
3226b12a09bbcbd25526fd6da6257057d26ddb31
("release: Add an update_release_calendar.py script")
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Juan A. Suarez <jasuarez@igalia.com>
Dylan Baker [Wed, 9 Oct 2019 17:33:02 +0000 (10:33 -0700)]
bin/post_version.py: white space fixes
Fixes:
3226b12a09bbcbd25526fd6da6257057d26ddb31
("release: Add an update_release_calendar.py script")
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Juan A. Suarez <jasuarez@igalia.com>
Dylan Baker [Wed, 9 Oct 2019 17:31:16 +0000 (10:31 -0700)]
bin/post_version.py: Pass version as an argument
I made a bad assumption; I assumed this would be run in the release
branch. But we don't do that, we run in the master branch. As a result
we need to pass the version as an argument.
Fixes:
3226b12a09bbcbd25526fd6da6257057d26ddb31
("release: Add an update_release_calendar.py script")
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Juan A. Suarez <jasuarez@igalia.com>
Dylan Baker [Wed, 9 Oct 2019 17:30:17 +0000 (10:30 -0700)]
bin/gen_release_notes.py: Return "None" if there are no new features
Which is very likely .Z > 0 releases.
Fixes:
86079447da1e00d49db0cbff9a102eb4e71e8702
("scripts: Add a gen_release_notes.py script")
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Juan A. Suarez <jasuarez@igalia.com>
Dylan Baker [Wed, 9 Oct 2019 17:29:41 +0000 (10:29 -0700)]
bin/gen_release_notes.py: strip '#' from gitlab bugs
If they use the `Fixes: #1` form.
Fixes:
86079447da1e00d49db0cbff9a102eb4e71e8702
("scripts: Add a gen_release_notes.py script")
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Juan A. Suarez <jasuarez@igalia.com>
Dylan Baker [Wed, 9 Oct 2019 17:27:13 +0000 (10:27 -0700)]
bin/gen_release_notes.py: fix conditional of bugfix
Previously this would result in the .0 warning be generated for .z > 0
and the .z == 0 would get the other message.
Fixes:
86079447da1e00d49db0cbff9a102eb4e71e8702
("scripts: Add a gen_release_notes.py script")
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Juan A. Suarez <jasuarez@igalia.com>
Illia Iorin [Tue, 13 Aug 2019 08:57:37 +0000 (11:57 +0300)]
mesa/main: Ignore filter state for MS texture completeness
After the discussion in
https://github.com/KhronosGroup/OpenGL-API/issues/45
the section 8.17 (texture completeness) of the OpenGL 4.6 core profile
was changed to explicitly say that multisample texture completeness
ignores filter state of the texture.
"Using the preceding definitions, a texture is complete unless any of the
following conditions hold true:
...
- The minification filter requires a mipmap (is neither NEAREST nor LINEAR),
the texture is not multisample, and the texture is not mipmap complete.
- The texture is not multisample; either the magnification filter is not
NEAREST, or the minification filter is neither NEAREST nor NEAREST_-
MIPMAP_NEAREST; and any of
– The internal format of the texture is integer (see table 8.12).
– The internal format is STENCIL_INDEX.
– The internal format is DEPTH_STENCIL, and the value of DEPTH_-
STENCIL_TEXTURE_MODE for the texture is STENCIL_INDEX."
Signed-off-by: Danylo Piliaiev <danylo.piliaiev@globallogic.com>
Signed-off-by: Illia Iorin <illia.iorin@globallogic.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Illia Iorin [Mon, 22 Jul 2019 14:07:39 +0000 (17:07 +0300)]
Revert "mesa/main: Fix multisample texture initialize"
This reverts commit
a113a42e7369a4e43a1db1c9a7a35a3f7175615e.
Per https://github.com/KhronosGroup/OpenGL-API/issues/45 it
was a wrong way to fix the issue.
Signed-off-by: Illia Iorin <illia.iorin@globallogic.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Marek Olšák [Fri, 25 Oct 2019 03:26:57 +0000 (23:26 -0400)]
glsl/serialize: optimize for equal offsets in uniform remap tables
Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/1416
This decreases the shader cache size in the ticket from 1.6 MB to 40 KB.
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Marek Olšák [Fri, 25 Oct 2019 02:54:24 +0000 (22:54 -0400)]
glsl/serialize: restructure remap table code
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Kenneth Graunke [Fri, 25 Oct 2019 18:18:52 +0000 (11:18 -0700)]
nir: Use VARYING_SLOT_TESS_MAX to size indirect bitmasks
MAX_VARYINGS_INCL_PATCH subtracts VARYING_SLOT_VAR0 giving us a size
that's too small, so BITSET_SET writes words out of bounds, corrupting
the stack and causing all kinds of chaos. VARYING_SLOT_TESS_MAX is
the right value to use here, as it's the largest location.
Closes: 2002
Fixes:
ee2050b1111 ("nir: Use BITSET for tracking varyings in lower_io_arrays")
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Neil Armstrong [Fri, 25 Oct 2019 10:19:24 +0000 (12:19 +0200)]
Revert "ci: Disable lima until its farm can get fixed."
This reverts commit
fb9362c6fb9d5bd92073d31d3242614856b91f5d.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Acked-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com>
Jason Ekstrand [Fri, 25 Oct 2019 16:31:23 +0000 (11:31 -0500)]
Revert "mapi: Inline call x86_current_tls."
This reverts commit
e137b3a9b71a2711c1f68c8a8b9c0a7407fbcc4b. It
completely broke 32-bit EGL such that wflinfo can't even run without
crashing.
Jon Turney [Sat, 19 Oct 2019 13:43:49 +0000 (14:43 +0100)]
rbug: Fix use of alloca() without #include "c99_alloca.h"
[12/60] Compiling C object 'src/gallium/auxiliary/eb820e8@@gallium@sta/rbug_rbug_texture.c.o'.
FAILED: src/gallium/auxiliary/eb820e8@@gallium@sta/rbug_rbug_texture.c.o
[...]
../src/gallium/auxiliary/rbug/rbug_texture.c: In function 'rbug_send_texture_info_reply':
../src/gallium/auxiliary/rbug/rbug_texture.c:302:21: error: implicit declaration of function 'alloca'; did you mean 'malloc'? [-Werror=implicit-function-declaration]
uint32_t *height = alloca(sizeof(uint32_t) * height_len);
^~~~~~
malloc
../src/gallium/auxiliary/rbug/rbug_texture.c:302:21: warning: initialization makes pointer from integer without a cast [-Wint-conversion]
../src/gallium/auxiliary/rbug/rbug_texture.c:303:20: warning: initialization makes pointer from integer without a cast [-Wint-conversion]
uint32_t *depth = alloca(sizeof(uint32_t) * height_len);
^~~~~~
cc1: some warnings being treated as errors
Include c99_alloca.h to portably make the alloca() prototype available.
See also:
498d9d0f,
adfb9c5c,
fc8139b1
Fixes:
6174cba7 ("rbug: fix transmitted texture sizes")
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Alyssa Rosenzweig [Thu, 24 Oct 2019 00:19:22 +0000 (20:19 -0400)]
pan/midgard: Express allocated registers as offsets
Rather than supplying a mask/swizzle to compose with the original, just
supply the offset of the allocated register so we can directly offset
the mask/swizzle, without resorting to composition.
This is simpler, cleaner, and will generalize to non-32-bit.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Alyssa Rosenzweig [Thu, 24 Oct 2019 13:15:28 +0000 (09:15 -0400)]
pan/midgard: Expose more typesize manipulation routines
These internal mir.c routines will help the RA.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Alyssa Rosenzweig [Thu, 24 Oct 2019 00:19:11 +0000 (20:19 -0400)]
pan/midgard: Add mir_set_bytemask helper
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Timur Kristóf [Fri, 25 Oct 2019 08:46:43 +0000 (10:46 +0200)]
st/nine: Fix unused variable warnings in release build.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
Timur Kristóf [Fri, 25 Oct 2019 08:44:23 +0000 (10:44 +0200)]
st/nine: Fix build with -Werror=empty-body
Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/1995
Fixes:
8d43e2b2ded0fe3c82d4 ("meson: add -Werror=empty-body to disallow `if(x);`")
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
Timur Kristóf [Thu, 24 Oct 2019 10:26:12 +0000 (12:26 +0200)]
aco: Refactor hazard mitigations, separate pass for GFX10.
GFX10 hazards require a different approach compared to previous
generations, for example it doesn't need s_nop, and most hazards
can't be solved by adding NOPs at all. Also, they are not
resolved by branch instructions.
This commit reorganizes aco_insert_NOPs so that there is now a
separate pass for GFX10. The new GFX10 pass also respects the
control flow of the shader.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Timur Kristóf [Wed, 23 Oct 2019 19:51:14 +0000 (21:51 +0200)]
aco/gfx10: Fix mitigation of VMEMtoScalarWriteHazard.
This commit refines the VMEMtoScalarWriteHazard mitigation, based
upon a closer look at what LLVM does. Also changes the code to
match the structure of the other hazard mitigations.
* The hazard is not only triggered by VMEM, FLAT and GLOBAL
but also SCRATCH and DS instructions.
* The SMEM/SALU instructions only cause a hazard when they
write a register that the VMEM/etc. are reading.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Timur Kristóf [Thu, 24 Oct 2019 16:55:07 +0000 (18:55 +0200)]
aco/gfx10: Mitigate LdsBranchVmemWARHazard.
There is a hazard caused by there is a branch between a
VMEM/GLOBAL/SCRATCH instruction and a DS instruction.
This commit adds a workaround that avoids the problem.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Timur Kristóf [Thu, 24 Oct 2019 09:45:27 +0000 (11:45 +0200)]
aco/gfx10: Mitigate SMEMtoVectorWriteHazard.
There is a hazard that happens when an SMEM instruction
reads an SGPR and then a VALU instruction writes that same SGPR.
This commit adds a workaround that avoids the problem.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Timur Kristóf [Wed, 23 Oct 2019 19:43:50 +0000 (21:43 +0200)]
aco/gfx10: Mitigate VcmpxExecWARHazard.
There is a hazard when a non-VALU instruction reads the EXEC mask
and then a VALU instruction writes the EXEC mask.
This commit adds a workaround that avoids the problem.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Timur Kristóf [Wed, 23 Oct 2019 09:24:53 +0000 (11:24 +0200)]
aco/gfx10: Mitigate VcmpxPermlaneHazard.
Any permlane instruction that follows any VOPC instruction can cause a hazard,
this commit implements a workaround that avoids this causing a problem.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Timur Kristóf [Thu, 17 Oct 2019 15:14:37 +0000 (17:14 +0200)]
aco/gfx10: Add notes about some GFX10 hazards.
ACO currently mitigates VMEMtoScalarWriteHazard and Offset3fBug
(names from LLVM). There are some bugs that ACO needn't care about.
Just to be on the safe side, add an assertion that makes sure
that we aren't hit by FlatSegmentOffsetBug.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Samuel Pitoiset [Thu, 24 Oct 2019 13:16:07 +0000 (15:16 +0200)]
radv: fix VK_KHR_shader_float_controls dependency on GFX6-7
From the Vulkan spec 1.1.126 :
"VK_SHADER_FLOAT_CONTROLS_INDEPENDENCE_32_BIT_ONLY_KHR specifies
that shader float controls for 32-bit floating point can be set
independently; other bit widths must be set identically to each
other."
Forgot to update this when I enabled that extension recently.
Fixes dEQP-VK.spirv_assembly.instruction.compute.float_controls.independence_settings.independence_setting
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Lepton Wu [Tue, 22 Oct 2019 03:22:18 +0000 (20:22 -0700)]
mapi: Inline call x86_current_tls.
This saves one return and a simple benchmark which calls glGetString
repeatedly on my desktop shows it improves calls per second from 118M
to 128M.
Signed-off-by: Lepton Wu <lepton@chromium.org>
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Lepton Wu [Mon, 16 Sep 2019 03:05:44 +0000 (20:05 -0700)]
virgl: Remove formats with unusual sample count.
Most GPU require the sample count is power of 2. Just remove those
formats with unusual sample count. This decreases dEQP EGL tests run
time a lot.
Signed-off-by: Lepton Wu <lepton@chromium.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
Kristian H. Kristensen [Thu, 24 Oct 2019 04:41:45 +0000 (21:41 -0700)]
nir: Use BITSET for tracking varyings in lower_io_arrays
MAX_VARYINGS_INCL_PATCH is greater than 64, so we'll need more that 64
bits (per component) to track which vars have indirects. This pass was
trying to track patch varyings (which start at bit 63) in a separate
64 bit word, but failed to subtract VARYING_SLOT_PATCH0 and accessed
out of bounds.
Do away with the ad-hoc bit mask tracking and just use a BITSET.
Fixes: dEQP-GLES31.functional.tessellation.user_defined_io.per_patch_block.vertex_io_array_size_implicit.triangles
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Signed-off-by: Kristian H. Kristensen <hoegsberg@google.com>
Dylan Baker [Thu, 24 Oct 2019 21:11:31 +0000 (14:11 -0700)]
docs: update calendar, add news item and link release notes for 19.2.2
Dylan Baker [Thu, 24 Oct 2019 21:08:25 +0000 (14:08 -0700)]
docs: Add sha256 sum for 19.2.2
Dylan Baker [Wed, 23 Oct 2019 15:54:11 +0000 (08:54 -0700)]
docs: Add release notes for 19.2.2
Rob Clark [Fri, 18 Oct 2019 22:55:10 +0000 (15:55 -0700)]
freedreno/ir3: handle the progress case
In some cases, in particular when you have things that can be src
modifiers ((abs)/(neg)), once eliminating one mov, there is a
possibility to remove another. Handle this by re-visiting an
instruction after eliminating a copy on one of it's srcs.
Signed-off-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Rob Clark [Fri, 18 Oct 2019 22:53:07 +0000 (15:53 -0700)]
freedreno/ir3: remove restrictions on const + (abs)/(neg)
These date back to relatively early days of ir3, when a lot was still
not well understood. But according to CI (and what I've seen blob
driver do), these are not actually real restrictions.
Signed-off-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Rob Clark [Fri, 18 Oct 2019 22:46:59 +0000 (15:46 -0700)]
freedreno/ir3: allow copy-propagate out of fanout
Now that we fixed the sharp edges that this was papering over, we can
relax the restriction about eliminating a mov coming out of a fanout
(for example from result of texture fetch).
Signed-off-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Rob Clark [Tue, 15 Oct 2019 23:08:26 +0000 (16:08 -0700)]
freedreno/ir3: treat high vs low reg as conversion
This avoids copy-propagating a high register into an instruction which
cannot consume it.
Signed-off-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Rob Clark [Tue, 15 Oct 2019 22:46:42 +0000 (15:46 -0700)]
freedreno/ir3: propagate dest flags for collect/fanin
We did this properly already for split/fanout. But collect was missed.
Extract out a helper to share.
This way we avoid copy propagating a mov from high or half reg into an
instruction which cannot consume a high/half reg.
Signed-off-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>