Marek Olšák [Tue, 4 Oct 2016 17:53:53 +0000 (19:53 +0200)]
radeonsi: add assertions to validate interpolation flags
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Tue, 4 Oct 2016 19:08:17 +0000 (21:08 +0200)]
radeonsi: interpolate colors after interpolation weight shuffling
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Thu, 8 Sep 2016 17:12:00 +0000 (19:12 +0200)]
tgsi/scan: don't set interp flags for inputs only used by INTERP (v2)
(v1 pushed, then reverted)
This fixes 9 randomly failing tests on radeonsi:
GL45-CTS.shader_multisample_interpolation.render.interpolate_at_centroid.*
v2: use input_interpolate[input] (correct) instead of
input_interpolate[index] (incorrect)
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Tue, 4 Oct 2016 22:06:10 +0000 (00:06 +0200)]
ddebug: dump most driver information with GALLIUM_DDEBUG=always
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Karol Herbst [Mon, 3 Oct 2016 16:55:09 +0000 (18:55 +0200)]
nv50/ra: let simplify return an error and handle that
fixes a crash in the case simplify reports an error
Signed-off-by: Karol Herbst <karolherbst@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Nanley Chery [Wed, 5 Oct 2016 16:32:52 +0000 (09:32 -0700)]
intel/blorp: Use documented RECTLIST vertex positions
Use the vertex positions described in the PRMs. This has no effect on
rendering but quiets the simulator warnings seen when the vertices
appear out of order.
Signed-off-by: Nanley Chery <nanley.g.chery@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
Jason Ekstrand [Sun, 25 Sep 2016 16:41:27 +0000 (09:41 -0700)]
anv/meta: Roll clear_image into CmdClearDepthStencilImage
It is now the only caller so there's no sense in keeping things split out.
Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Jason Ekstrand [Sun, 25 Sep 2016 15:44:40 +0000 (08:44 -0700)]
anv: Use blorp for VkCmdFillBuffer
Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Kyle Brenneman [Mon, 12 Sep 2016 21:51:22 +0000 (17:51 -0400)]
egl: Implement EGL_KHR_debug (v2)
Wire up the debug entrypoints to EGL dispatch, and add the extension
string to the client extension list.
v2:
- Lots of style fixes
- Fix missing EGLAPIENTRYs
- Factor out valid attribute check
- Lock display in eglLabelObjectKHR as needed, and use RETURN_EGL_*
- Move "EGL_KHR_debug" into asciibetical order in client extension
string
Reviewed-by: Adam Jackson <ajax@redhat.com>
Reviewed-by: Emil Velikov <emil.veliko@collabora.com>
Kyle Brenneman [Mon, 12 Sep 2016 21:50:40 +0000 (17:50 -0400)]
egl: Track EGL_KHR_debug state when going through EGL API calls (v3)
This decorates every EGL entrypoint with _EGL_FUNC_START, which records
the function name and primary dispatch object label in the current
thread state. It also adds debug report functions and calls them when
appropriate.
This would be useful enough for debugging on its own, if the user set a
breakpoint when the report function was called. We will also need this
state tracked in order to expose EGL_KHR_debug.
v2:
- Clear the object label in more cases in _eglSetFuncName
- Pass draw surface (if any) to _EGL_FUNC_START in eglSwapInterval
v3:
- Set dummy thread's CurrentAPI to EGL_OPENGL_ES_API not zero
- Less ?: in _eglSetFuncName
Reviewed-by: Adam Jackson <ajax@redhat.com>
Reviewed-by: Emil Velikov <emil.veliko@collabora.com>
Lionel Landwerlin [Tue, 4 Oct 2016 15:17:56 +0000 (16:17 +0100)]
intel: aubinator: pack supported generations into an array
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Ben Widawsky [Wed, 5 Oct 2016 03:42:30 +0000 (20:42 -0700)]
i965/l3: Add explicit way size calculation for bxt
There should be no functional change here because Broxton and CHV are
both gt1. Without this code however, it might seem like broxton support
is missing.
While here, put the gt1 check in front to hopefully short-circuit the
condition for the mobile cases.
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Nicolai Hähnle [Wed, 5 Oct 2016 14:27:29 +0000 (16:27 +0200)]
virgl: Fix build regression of commit
8a943564
Nicolai Hähnle [Wed, 28 Sep 2016 08:54:34 +0000 (10:54 +0200)]
st/mesa: enable GL_KHR_robustness
The difference to the virtually identical ARB_robustness (which is already
enabled unconditionally) is miniscule and handled elsewhere, but this cap
seems like the right thing to require for this extension.
v2: drop the device reset cap requirement (Ilia)
Reviewed-by: Marek Olšák <marek.olsak@amd.com> (v1)
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Nicolai Hähnle [Fri, 30 Sep 2016 13:21:00 +0000 (15:21 +0200)]
gallium/radeon: implement set_device_reset_callback
Check for device reset on flush. It would be nicer if the kernel just
reported this as an error on the submit ioctl (and similarly for fences),
but this will do for now.
Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Nicolai Hähnle [Fri, 30 Sep 2016 12:06:04 +0000 (14:06 +0200)]
st/mesa: set a device reset callback when available
Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Nicolai Hähnle [Fri, 30 Sep 2016 11:02:00 +0000 (13:02 +0200)]
st/mesa: extract conversion from pipe_reset_status to GLenum
Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Nicolai Hähnle [Fri, 30 Sep 2016 10:53:00 +0000 (12:53 +0200)]
ddebug: add pass-through of set_device_reset_callback
Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Nicolai Hähnle [Fri, 30 Sep 2016 10:32:02 +0000 (12:32 +0200)]
gallium: add pipe_context::set_device_reset_callback
Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Nicolai Hähnle [Tue, 27 Sep 2016 17:12:24 +0000 (19:12 +0200)]
virgl: use the new parent/child pools for transfers
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Nicolai Hähnle [Tue, 27 Sep 2016 17:09:24 +0000 (19:09 +0200)]
vc4: use the new parent/child pools for transfers
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Nicolai Hähnle [Tue, 27 Sep 2016 17:06:13 +0000 (19:06 +0200)]
freedreno: use the new parent/child pools for transfers
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Nicolai Hähnle [Tue, 27 Sep 2016 16:59:56 +0000 (18:59 +0200)]
r300: use the new parent/child pools for transfers (v2)
v2: slab_alloc_st -> slab_alloc
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Nicolai Hähnle [Tue, 27 Sep 2016 16:53:45 +0000 (18:53 +0200)]
gallium/radeon: use the new parent/child pools for transfers
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=97894
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Nicolai Hähnle [Tue, 27 Sep 2016 16:30:18 +0000 (18:30 +0200)]
util/slab: re-design to allow migration between pools (v3)
This is basically a re-write of the slab allocator into a design where
multiple child pools are linked to a parent pool. The intention is that
every (GL, pipe) context has its own child pool, while the corresponding
parent pool is held by the winsys or screen, or possibly the GL share group.
The fast path is still used when objects are freed by the same child pool
that allocated them. However, it is now also possible to free an object in a
different pool, as long as they belong to the same parent. Objects also
survive the destruction of the (child) pool from which they were allocated.
The slow path will return freed objects to the child pool from which they
were originally allocated. If that child pool was destroyed, the corresponding
page is considered an orphan and will be freed once all objects in it have
been freed.
This allocation pattern is required for pipe_transfers that correspond to
(GL) buffer object mappings when the mapping is created in one context
which is later destroyed while other contexts of the same share group live
on -- see the bug report referenced below.
Note that individual drivers do need to migrate to the new interface in
order to benefit and fix the bug.
v2: use singly-linked lists everywhere
v3: use p_atomic_set for page->u.num_remaining
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=97894
Nicolai Hähnle [Tue, 4 Oct 2016 14:06:31 +0000 (16:06 +0200)]
util: use GCC atomic intrinsics with explicit memory model
This is motivated by the fact that p_atomic_read and p_atomic_set may
somewhat surprisingly not do the right thing in the old version: while
stores and loads are de facto atomic at least on x86, the compiler may
apply re-ordering and speculation quite liberally. Basically, the old
version uses the "relaxed" memory ordering.
The new ordering always uses acquire/release ordering. This is the
strongest possible memory ordering that doesn't require additional
fence instructions on x86. (And the only stronger ordering is
"sequentially consistent", which is usually more than you need anyway.)
I would feel more comfortable if p_atomic_set/read in the old
implementation were at least using volatile loads and stores, but I
don't see a way to get there without typeof (which we cannot use here
since the code is compiled with -std=c99).
Eventually, we should really just move to something that is based on
the atomics in C11 / C++11.
Acked-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Lionel Landwerlin [Mon, 26 Sep 2016 14:08:52 +0000 (15:08 +0100)]
i965: use L3 data cache for SSBOs
Anv programs the hardware to use L3 data cache if we use either SSBOs or
images in the shaders, we can program i965 the same way.
gl_shader_program has a bit of a confusing named field with
'NumAtomicBuffers'. It doesn't tell how many buffers are accessed by the
shader in an atomic way but instead the number of atomic counters
manipulated by the shader.
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Kenneth Graunke [Mon, 3 Oct 2016 23:37:26 +0000 (16:37 -0700)]
mesa: Raise INVALID_ENUM in FramebufferTexture*D for unknown textargets.
ES3-CTS.functional.negative_api.buffer.framebuffer_texture2d expects
glFramebufferTexture[123]D to raise GL_INVALID_ENUM when
supplied a completely bogus textarget parameter (i.e. 0xffffffff).
This is at odds with the spec. GLES 3.1 says:
"An INVALID_OPERATION error is generated if texture is not zero and
textarget is not one of TEXTURE_2D, TEXTURE_2D_MULTISAMPLE, or one
of the cube map face targets from table 8.21."
(and GLES 3.0 and GL 4.5 both have similar text). However, GL has a
general guideline that says:
"If a command that requires an enumerated value is passed a symbolic
constant that is not one of those specified as allowable for that
command, an INVALID_ENUM error is generated."
Apparently other vendors reconcile these two rules as follows: GL should
raise INVALID_OPERATION for actual texture target enumeration values
which are not allowed for this particular glFramebufferTexture*D call.
Any value that is not a texture target should result in GL_INVALID_ENUM.
For example, glFramebufferTexture2D with GL_TEXTURE_1D would result in
INVALID_OPERATION because it is a real texture target, but not allowed
for the 2D version of the function. But calling it with GL_FRONT would
result in INVALID_ENUM, as that isn't even a texture target.
Fixes:
- {ES3-CTS,dEQP-GLES3}.functional.negative_api.buffer.framebuffer_texture2d
- {ES31-CTS,ES32-CTS,dEQP-GLES31}.functional.debug.negative_coverage.get_error.buffer.framebuffer_texture2d
References: https://gitlab.khronos.org/opengl/cts/merge_requests/387
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Timothy Arceri <timothy.arceri@collabora.com>
Kenneth Graunke [Mon, 3 Oct 2016 23:37:25 +0000 (16:37 -0700)]
mesa: Reorganize check_textarget().
Having one top-level switch statement covering all known texture targets
will make the next change easier to implement.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Timothy Arceri <timothy.arceri@collabora.com>
Kenneth Graunke [Tue, 4 Oct 2016 17:01:54 +0000 (10:01 -0700)]
aubinator: use the correct format specifier for printing ptrdiff_t.
Fixes more warnings in 32-bit builds.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Timothy Arceri <timothy.arceri@collabora.com>
Kenneth Graunke [Fri, 30 Sep 2016 03:43:42 +0000 (20:43 -0700)]
aubinator: Use less -RS instead of -r for the implicit pager.
From the less man page:
"Warning: when the -r option is used, less cannot keep track of the
actual appearance of the screen (since this depends on how the
screen responds to each type of control character). Thus, various
display problems may result, such as long lines being split in the
wrong place."
Lines which are too long to fit in the terminal would be word wrapped,
but unfortunately less would get confused about which line it was on,
and text would be drawn on top of other text. The most noticable case
was shader assembly, which is frequently too wide for an 80 character
terminal, and thus would be drawn on top of the following state packets,
making them completely unreadable.
Using -R instead of -r fixes this problem by only allowing color escape
sequences. (Notably, Git's implicit pager invocation uses -R.)
Unfortunately, it means our "clear to the end of the line" hack for
extending the blue bar headers won't work anymore.
Word wrapping usually isn't terribly readable, anyway, so we also add
the -S option (chop long lines) to restrict it to the terminal width.
(You can hit the left and right arrow keys to scroll sideways.)
Then, for a new blue bar hack, we can use a printf specifier to pad
the command packet names to be 80 characters long (arbitrarily), which
extends them "far enough" to look good, and doesn't require us to use
ioctls to determine the terminal width.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Sirisha Gandikota <sirisha.gandikota@intel.com>
Kenneth Graunke [Tue, 4 Oct 2016 04:41:10 +0000 (21:41 -0700)]
i965: Drop _NEW_TRANSFORM from 3DSTATE_VS atom on Gen7.
The atom that uploads push constants listens to _NEW_TRANSFORM for
legacy clip plane handling. On Sandybridge, the gen6_vs_state atom
emits 3DSTATE_CONSTANT_VS as well as 3DSTATE_VS, so it needs to listen
to the same set of conditions.
However, it looks like Gen7 doesn't need this. The push constant atom
emits 3DSTATE_CONSTANT_VS directly, and the gen7_vs_state atom that
emits 3DSTATE_VS doesn't have a dependency on ctx->Transform.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Kenneth Graunke [Fri, 23 Sep 2016 04:04:21 +0000 (21:04 -0700)]
i965: Fix brw_clear_cache to clean up TCS/TES shaders.
We need to free prog_data for TCS/TES too.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Timothy Arceri <timothy.arcero@collabora.com>
Kenneth Graunke [Thu, 22 Sep 2016 04:43:35 +0000 (21:43 -0700)]
i965: Add missing BRW_CS_PROG_DATA to CS work group surface atom.
Cc: mesa-stable@lists.freedesktop.org
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Kenneth Graunke [Thu, 22 Sep 2016 04:31:25 +0000 (21:31 -0700)]
i965: Add missing BRW_NEW_CS_PROG_DATA to compute constant atom.
CACHE_NEW_CS_PROG hasn't existed in quite a long time...the old
comment was there, but not the actual bit.
Cc: mesa-stable@lists.freedesktop.org
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Kenneth Graunke [Thu, 22 Sep 2016 04:20:19 +0000 (21:20 -0700)]
i965: Add missing BRW_NEW_FS_PROG_DATA to render target reads.
Cc: mesa-stable@lists.freedesktop.org
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Kenneth Graunke [Fri, 9 Sep 2016 05:26:20 +0000 (22:26 -0700)]
i965: Move BRW_NEW_FRAGMENT_PROGRAM from 3DSTATE_PS to PS_EXTRA.
3DSTATE_PS doesn't need this. 3DSTATE_PS_EXTRA however does,
for brw_color_buffer_write_enabled().
Cc: mesa-stable@lists.freedesktop.org
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Kenneth Graunke [Mon, 12 Sep 2016 05:50:20 +0000 (22:50 -0700)]
i965: Add missing BRW_NEW_VS_PROG_DATA to 3DSTATE_CLIP.
Cc: mesa-stable@lists.freedesktop.org
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Kenneth Graunke [Fri, 9 Sep 2016 03:35:39 +0000 (20:35 -0700)]
i965: Fix missing _NEW_TRANSFORM in Gen8+ 3DSTATE_DS atom.
Needed for user clip plane enables. Broken since this code was
introduced.
Cc: mesa-stable@lists.freedesktop.org
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Ian Romanick [Thu, 30 Jun 2016 17:38:16 +0000 (10:38 -0700)]
i965: Enable ARB_shader_atomic_counter_ops
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Ian Romanick [Thu, 30 Jun 2016 16:14:37 +0000 (09:14 -0700)]
i965: Refactor emission of atomic counter operations
This will make it easier to add more operations.
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Ian Romanick [Thu, 30 Jun 2016 01:00:22 +0000 (18:00 -0700)]
nir/intrinsics: Add more atomic_counter ops
v2: Delete some stray debug code notice by Iago.
v3: Massive rebase on new ir_function_signature::intrinsic_id mechanism.
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com> [v1]
Acked-by: Ilia Mirkin <imirkin@alum.mit.edu>
Ian Romanick [Thu, 30 Jun 2016 00:46:17 +0000 (17:46 -0700)]
nir/intrinsics: Include atomic_counter_ in the names used in macro invocations
Otherwise grepping for where atomic_counter_inc and friends are defined
is a very frustrating experience.
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Acked-by: Ilia Mirkin <imirkin@alum.mit.edu>
Ian Romanick [Thu, 7 Jul 2016 20:57:11 +0000 (13:57 -0700)]
glsl: Kill __intrinsic_atomic_sub
Just generate an __intrinsic_atomic_add with a negated parameter.
Some background on the non-obvious reasons for the the big change to
builtin_builder::call()... this is cribbed from some discussion with
Ilia on mesa-dev.
Why change builtin_builder::call() to allow taking dereferences and
create them here rather than just feeding in the ir_variables directly?
The problem is the neg_data ir_variable node would have to be in two
lists at the same time: the instruction stream and parameters. The
ir_variable node is automatically added to the instruction stream by the
call to make_temp. Restructuring the code so that the ir_variables
could be in parameters then move them to the instruction stream would
have been pretty terrible.
ir_call in the instruction stream has an exec_list that contains
ir_dereference_variable nodes.
The builtin_builder::call method previously took an exec_list of
ir_variables and created a list of ir_dereference_variable. All of the
original users of that method wanted to make a function call using
exactly the set of parameters passed to the built-in function (i.e.,
call __intrinsic_atomic_add using the parameters to atomicAdd). For
these users, the list of ir_variables already existed: the list of
parameters in the built-in function signature.
This new caller doesn't do that. It wants to call a function with a
parameter from the function and a value calculated in the function. So,
I changed builtin_builder::call to take a list that could either be a
list of ir_variable or a list of ir_dereference_variable. In the former
case it behaves just as it previously did. In the latter case, it uses
(and removes from the input list) the ir_dereference_variable nodes
instead of creating new ones.
text data bss dec hex filename
6036395 283160 28608 6348163 60dd83 lib64/i965_dri.so before
6036923 283160 28608 6348691 60df93 lib64/i965_dri.so after
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Acked-by: Ilia Mirkin <imirkin@alum.mit.edu>
Ian Romanick [Thu, 1 Sep 2016 01:42:34 +0000 (18:42 -0700)]
glsl: Remove ir_function_signature::_is_intrinsic field
text data bss dec hex filename
6036491 283160 28608 6348259 60dde3 lib64/i965_dri.so before
6036395 283160 28608 6348163 60dd83 lib64/i965_dri.so after
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Acked-by: Ilia Mirkin <imirkin@alum.mit.edu>
Ian Romanick [Thu, 1 Sep 2016 01:38:57 +0000 (18:38 -0700)]
glsl: Add ir_function_signature::is_intrinsic() method
This necessetated renaming the is_intrinsic field to _is_intrinsic. The
next commit will remove the field.
text data bss dec hex filename
6036507 283160 28608 6348275 60ddf3 lib64/i965_dri.so before
6036491 283160 28608 6348259 60dde3 lib64/i965_dri.so after
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Acked-by: Ilia Mirkin <imirkin@alum.mit.edu>
Ian Romanick [Thu, 1 Sep 2016 01:09:27 +0000 (18:09 -0700)]
glsl: Use the ir_intrinsic_* enums instead of the __intrinsic_* name strings
text data bss dec hex filename
6038043 283160 28608 6349811 60e3f3 lib64/i965_dri.so before
6036507 283160 28608 6348275 60ddf3 lib64/i965_dri.so after
v2: s/ir_intrinsic_atomic_sub/ir_intrinsic_atomic_counter_sub/. Noticed
by Ilia.
v3: Silence unhandled enum in switch warnings in st_glsl_to_tgsi.
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Acked-by: Ilia Mirkin <imirkin@alum.mit.edu>
Ian Romanick [Wed, 31 Aug 2016 00:49:24 +0000 (17:49 -0700)]
glsl: Track a unique intrinsic ID with each intrinsic function
text data bss dec hex filename
6037483 283160 28608 6349251 60e1c3 lib64/i965_dri.so before
6038043 283160 28608 6349811 60e3f3 lib64/i965_dri.so after
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Acked-by: Ilia Mirkin <imirkin@alum.mit.edu>
Ian Romanick [Mon, 3 Oct 2016 22:47:29 +0000 (15:47 -0700)]
glsl: Don't emit ir_binop_carry during ir_binop_imul_high lowering
st_glsl_to_tgsi only calls lower_instructions once (instead of in a
loop), so the ir_binop_carry generated would not get lowered. Fixes
assertion failure
state_tracker/st_glsl_to_tgsi.cpp:2265: void glsl_to_tgsi_visitor::visit_expression(ir_expression*, st_src_reg*): Assertion `!"Invalid ir opcode in glsl_to_tgsi_visitor::visit()"' failed.
on softpipe in 16 piglit tests:
mesa_shader_integer_functions/execution/built-in-functions/fs-imulExtended-nonuniform.shader_test
mesa_shader_integer_functions/execution/built-in-functions/fs-imulExtended-only-msb-nonuniform.shader_test
mesa_shader_integer_functions/execution/built-in-functions/fs-imulExtended-only-msb.shader_test
mesa_shader_integer_functions/execution/built-in-functions/fs-imulExtended.shader_test
mesa_shader_integer_functions/execution/built-in-functions/fs-umulExtended-nonuniform.shader_test
mesa_shader_integer_functions/execution/built-in-functions/fs-umulExtended-only-msb-nonuniform.shader_test
mesa_shader_integer_functions/execution/built-in-functions/fs-umulExtended-only-msb.shader_test
mesa_shader_integer_functions/execution/built-in-functions/fs-umulExtended.shader_test
mesa_shader_integer_functions/execution/built-in-functions/vs-imulExtended-nonuniform.shader_test
mesa_shader_integer_functions/execution/built-in-functions/vs-imulExtended-only-msb-nonuniform.shader_test
mesa_shader_integer_functions/execution/built-in-functions/vs-imulExtended-only-msb.shader_test
mesa_shader_integer_functions/execution/built-in-functions/vs-imulExtended.shader_test
mesa_shader_integer_functions/execution/built-in-functions/vs-umulExtended-nonuniform.shader_test
mesa_shader_integer_functions/execution/built-in-functions/vs-umulExtended-only-msb-nonuniform.shader_test
mesa_shader_integer_functions/execution/built-in-functions/vs-umulExtended-only-msb.shader_test
mesa_shader_integer_functions/execution/built-in-functions/vs-umulExtended.shader_test
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Timothy Arceri [Tue, 4 Oct 2016 00:15:08 +0000 (11:15 +1100)]
i965: fix unused variable warning in brw_emit_gpgpu_walker()
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Timothy Arceri [Tue, 4 Oct 2016 00:15:07 +0000 (11:15 +1100)]
i965: add MAYBE_UNUSED to assert param
Fixes unused variable warning in release build.
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Timothy Arceri [Tue, 4 Oct 2016 00:15:06 +0000 (11:15 +1100)]
i965: wrap unused function in #ifndef NDEBUG
This function is only ever used by an assert() this fixes an
unused function warning in release builds.
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Timothy Arceri [Tue, 4 Oct 2016 00:15:05 +0000 (11:15 +1100)]
i965: fix unused variable warning in gen7_block_read_scratch()
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Timothy Arceri [Tue, 4 Oct 2016 00:15:04 +0000 (11:15 +1100)]
i965: add MAYBE_UNUSED to assert param
This fixes an unused variable warning on release builds.
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Jose Fonseca [Fri, 1 Apr 2016 23:20:00 +0000 (00:20 +0100)]
gallivm: Use AVX2 gather instrinsics.
v2: Use AVX2 gather for non aligned loads too.
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Roland Scheidegger [Thu, 21 Nov 2013 09:14:47 +0000 (09:14 +0000)]
gallivm: Use 8 wide AoS sampling on AVX2.
v2: Make sure that with num_lods > 1 and min_filter != mag_filter we
still enter the splitting path. So this case would still use 4-wide aos
path (as a side note, the 4-wide aos sampling path could actually be
improved quite a bit if we have avx2, by just doing the filtering with
256bit vectors).
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
José Fonseca [Wed, 20 Nov 2013 08:32:52 +0000 (08:32 +0000)]
gallivm: Basic AVX2 support.
v2: pblendb -> pblendvb
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Chad Versace [Tue, 27 Sep 2016 20:27:19 +0000 (13:27 -0700)]
egl: Drop duplicate check on EGLSync type
_eglInitSync checked that the display supported the sync type (such as
EGL_SYNC_FENCE), and did it wrong. When the check failed it emitted
EGL_BAD_ATTRIBUTE, but sometimes EGL_BAD_PARAMETER is needed.
_eglCreateSync already does the error checking, and it does it right.
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Chad Versace [Tue, 27 Sep 2016 20:27:18 +0000 (13:27 -0700)]
egl: Cleanup control flow in _eglParseSyncAttribList
When the function encountered an error, it effectively returned
immediately. However, it did so indirectly by breaking out of a loop.
Replace the loop breakout with a explicit 'return'.
Do the same for _eglParseSyncAttribList64 too.
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Chad Versace [Tue, 27 Sep 2016 20:27:17 +0000 (13:27 -0700)]
egl: Add _eglConvertIntsToAttribs()
This function converts an attribute list from EGLint[] to EGLAttrib[].
Will be used in following patches to cleanup EGLSync attribute parsing.
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Chad Versace [Tue, 27 Sep 2016 20:27:12 +0000 (13:27 -0700)]
egl: Fix an error path in eglCreateSync*
When the user called eglCreateSync64KHR on a display without
EGL_KHR_cl_event2 (the only extension that exposes it), we returned
EGL_NO_SYNC but did not update the error code.
We also did the same for eglCreateSync on a display without EGL 1.5.
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Chad Versace [Tue, 27 Sep 2016 20:27:09 +0000 (13:27 -0700)]
egl: Fix truncation error in _eglParseSyncAttribList64
The function stores EGLAttrib values in EGLint variables. On 64-bit
systems, this truncated the values.
Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Chad Versace [Wed, 28 Sep 2016 06:06:37 +0000 (23:06 -0700)]
egl: Fix missing unlock in eglGetSyncAttribKHR
On the error path, eglGetSyncAttribKHR neglected to unlock the
EGLDisplay before returning.
Fixes deadlock in dEQP-EGL.functional.fence_sync.invalid.get_invalid_value.
Cc: mesa-stable@lists.freedesktop.org
Cc: Mark Janes <mark.a.janes@intel.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Anuj Phogat [Mon, 3 Oct 2016 17:40:34 +0000 (10:40 -0700)]
anv/gen7_pipeline: Fix typo in semicolon
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Anuj Phogat [Mon, 26 Sep 2016 18:40:00 +0000 (11:40 -0700)]
anv/gen7_pipeline: Set sample mask field in 3DSTATE_PS
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Anuj Phogat [Mon, 26 Sep 2016 18:32:55 +0000 (11:32 -0700)]
anv/gen7_pipeline: Move ksp{1,2} state setting next to ksp0
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Anuj Phogat [Mon, 26 Sep 2016 18:10:56 +0000 (11:10 -0700)]
anv/gen7: Make use of local variable prog_data
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Anuj Phogat [Mon, 26 Sep 2016 18:08:33 +0000 (11:08 -0700)]
anv/gen8_pipeline: Add an assert to ensure use_alt_mode is not set in prog_data
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Anuj Phogat [Mon, 26 Sep 2016 18:07:38 +0000 (11:07 -0700)]
anv/gen8_pipeline: Fix typo in semicolon
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Anuj Phogat [Mon, 26 Sep 2016 18:04:50 +0000 (11:04 -0700)]
intel/genxml: Keep the value name 'Alternate' uniform across gen75.xml
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Anuj Phogat [Mon, 26 Sep 2016 18:01:40 +0000 (11:01 -0700)]
intel/genxml: Fix typo in gen75.xml
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Anuj Phogat [Tue, 27 Sep 2016 19:28:39 +0000 (12:28 -0700)]
i965/gen8+: Enable GL_OES_viewport_array
This patch causes 2 regressions in khronos' gles cts tests
on various intel platforms.
Failing tests:
ES3-CTS.functional.state_query.integers.viewport_getinteger
ES3-CTS.functional.state_query.integers.viewport_getfloat
Here is an explanation of what's causing the failures:
CTS tests are not clamping the x, y location of the viewport's
bottom-left corner as recommended by ARB_viewport_array and
OES_viewport_array:
"The location of the viewport's bottom-left corner, given by (x,y), are
clamped to be within the implementation-dependent viewport bounds range.
The viewport bounds range [min, max] tuple may be determined by
calling GetFloatv with the symbolic constant VIEWPORT_BOUNDS_RANGE_OES"
Khronos CTS merge request to fix the test case:
https://gitlab.khronos.org/opengl/cts/merge_requests/399
V2: Initialize the relevant variables for GL_OES_viewport_array on gen8+
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Anuj Phogat [Wed, 28 Sep 2016 18:40:37 +0000 (11:40 -0700)]
mesa: Add a check for OES_viewport_array
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Anuj Phogat [Wed, 28 Sep 2016 18:39:39 +0000 (11:39 -0700)]
mesa: Enable enums for OES_viewport_array
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Anuj Phogat [Tue, 27 Sep 2016 19:24:56 +0000 (12:24 -0700)]
anv/gen7_pipeline: Use MSDISPMODE_PERSAMPLE for non-multisampled fbo
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Anuj Phogat [Mon, 26 Sep 2016 17:17:49 +0000 (10:17 -0700)]
anv/blorp: Handle zero width/height blits in blorp_copy()
V2: Move the check from copy_buffer_to_image() to blorp_copy(). (Nanley)
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Anuj Phogat [Tue, 20 Sep 2016 18:59:01 +0000 (11:59 -0700)]
intel/isl: Add an assert to check zero width/height surface
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Leo Liu [Thu, 29 Sep 2016 20:55:59 +0000 (16:55 -0400)]
st/omx/dec/h265: add scaling list data
Specified by subclause 7.3.4
v2: get the loop optimized
Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Leo Liu [Fri, 23 Sep 2016 16:05:16 +0000 (12:05 -0400)]
st/omx/dec/h265: fix the skip for before and after list
For reference picture sets, there are cases that rps will not always
be used. Once detect the unused flag from encoded bitstream, we should
not add this rps to any list, otherwise pass the incorrect reference
and skip the correct rps.
Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Leo Liu [Fri, 23 Sep 2016 15:42:16 +0000 (11:42 -0400)]
st/omx/dec/h265: set the default reference picture set for reference
It will fix the corruption for frame, that only has one stort term ref
picture set, we set NULL rps for this case previously, causing taking
incorrect reference. Instead we should take that only short term set
as reference
Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Leo Liu [Fri, 23 Sep 2016 15:33:31 +0000 (11:33 -0400)]
st/omx/dec/h265: decoder size should follow from sps
The video size from format container is not always compatible with
the size from codec bitstream, the HW decoder should take the size
information from bitstream, otherwise the corruption appears with clip
that has different size info between bitstream and format container
So we are passing width(height)_in_samples from sequence parameter
set to video decoder.
Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Leo Liu [Fri, 23 Sep 2016 15:11:53 +0000 (11:11 -0400)]
st/omx/dec/h265: increase dpb max size to 32
For clip with frame delta poc over 16
Signed-off-by: Leo Liu <leo.liu@amd.com>
Eric Engestrom [Sun, 2 Oct 2016 11:15:53 +0000 (12:15 +0100)]
nir/spirv: Remove a duplicate spirv2nir from .gitignore
This reverts commit
fc03ecfeaf5a10a8b84d366f24f02e74ab03b145.
Chad had already pushed the same change between me posting the patch and Jason
pushing it:
44bcf1ffcced04fd7f2b (".gitignore: Ignore src/compiler/spirv2nir")
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Nicolai Hähnle [Wed, 28 Sep 2016 19:44:55 +0000 (21:44 +0200)]
radeonsi: optionally run the LLVM IR verifier pass
This is enabled automatically if shader printing is enabled, or separately
by R600_DEBUG=checkir. Catch mal-formed IR before it crashes in a later
pass.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Nicolai Hähnle [Thu, 29 Sep 2016 12:55:51 +0000 (14:55 +0200)]
gallium/radeon: fix argument type of llvm.{cttz,ctlz}.i32 intrinsics
Caught by R600_DEBUG=checkir (next commit).
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Nicolai Hähnle [Wed, 28 Sep 2016 19:27:16 +0000 (21:27 +0200)]
gallium/radeon: unify the creation of basic blocks
This changes the order of basic blocks to be equal to the order of code in the
original TGSI, which is nice for making sense of shader dumps.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Nicolai Hähnle [Wed, 28 Sep 2016 19:17:56 +0000 (21:17 +0200)]
gallium/radeon: merge branch and loop flow control stacks
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Nicolai Hähnle [Wed, 28 Sep 2016 16:59:42 +0000 (18:59 +0200)]
gallium/radeon: simplify if/else/endif blocks
In particular, we no longer emit an else block when there is no ELSE
instruction.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Nicolai Hähnle [Wed, 28 Sep 2016 16:30:09 +0000 (18:30 +0200)]
gallium/radeon: label basic blocks by the corresponding TGSI pc
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Nicolai Hähnle [Wed, 28 Sep 2016 16:20:32 +0000 (18:20 +0200)]
gallium/radeon: cleanup and fix branch emits
Some of the existing code is needlessly complicated. The basic principle
should be: control-flow opcodes emit branches to properly terminate the
current block, _unless_ the current block already has a terminator (which
happens if and only if there was a BRK or CONT).
This also fixes a bug where multiple terminators were created in a block.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=97887
Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Nicolai Hähnle [Tue, 4 Oct 2016 08:50:55 +0000 (10:50 +0200)]
winsys/radeon: add buffer_get_reloc_offset
Really fix the bug that was supposed to be fixed by commits
3e7cced4b and
a48bf02d: even when virtual addresses are used, the legacy relocation-based
method with offsets relative to the kernel's buffer object are used for
video submissions.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=97969
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Marek Olšák [Sun, 2 Oct 2016 20:01:38 +0000 (22:01 +0200)]
radeonsi: don't declare LDS in PS when ds_bpermute is used
I guess this is not needed because dead code elimination removes
the declaration.
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Marek Olšák [Sun, 2 Oct 2016 19:56:00 +0000 (21:56 +0200)]
radeonsi: use DDX/DDY directly in si_llvm_emit_ddxy_interp
We can finally do this, because the opcodes are scalar now.
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Marek Olšák [Sun, 2 Oct 2016 19:37:13 +0000 (21:37 +0200)]
radeonsi: simplify si_llvm_emit_ddxy
si_llvm_emit_ddxy is called once per element, so we don't have to generate
code for 4 elements at once.
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Marek Olšák [Sun, 2 Oct 2016 19:23:26 +0000 (21:23 +0200)]
radeonsi: don't call build_gep0 in si_llvm_emit_ddxy on VI
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Marek Olšák [Sun, 2 Oct 2016 18:54:30 +0000 (20:54 +0200)]
radeonsi: use a helper function for BuildGEP(0, x)
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Marek Olšák [Sun, 2 Oct 2016 18:21:19 +0000 (20:21 +0200)]
radeonsi: remove obsolete shader definitions
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Marek Olšák [Sun, 2 Oct 2016 15:52:46 +0000 (17:52 +0200)]
radeonsi: remove unnecessary #includes
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Marek Olšák [Sun, 2 Oct 2016 15:40:49 +0000 (17:40 +0200)]
radeonsi: clean up lucky #include dependencies
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Marek Olšák [Sat, 11 Jun 2016 19:07:14 +0000 (21:07 +0200)]
radeonsi: don't re-create shader PM4 states after scratch buffer update
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>