Petr Hosek [Mon, 23 Oct 2017 00:51:08 +0000 (00:51 +0000)]
[ELF] When placing orphans, handle case when last section is dead
r315292 introduced a change that's supposed to consistently ignore
"dead" output sections when placing orphans. Unfortunately, that
change doesn't handle the special case when the orphan section is
second to last section and the last section is dead (e.g. because
it's being discarded) introducing a regression in some cases.
This change handles this case by using the same predicate when
checking the last section.
Differential Revision: https://reviews.llvm.org/D39172
llvm-svn: 316307
Rui Ueyama [Sun, 22 Oct 2017 23:33:49 +0000 (23:33 +0000)]
Add R_PPC_ADDR16_HI relocation support
The support of R_PPC_ADDR16_HI improves ld compatibility and makes
things on par with RuntimeDyldELF that already implements this
relocation.
Patch by vit9696.
llvm-svn: 316306
Rui Ueyama [Sun, 22 Oct 2017 23:02:07 +0000 (23:02 +0000)]
Remove a fast lookup table from MergeInputSection.
We used to have a map from section piece offsets to section pieces
as a cache for binary search. But I found that the map took quite a
large amount of memory and didn't make linking faster. So, in this
patch, I removed the map.
This patch saves 566 MiB of RAM (2.019 GiB -> 1.453 GiB) when linking
clang with debug info, and the link time is 4% faster in that test case.
Thanks for Sean Silva for pointing this out.
llvm-svn: 316305
Faisal Vali [Sun, 22 Oct 2017 22:29:52 +0000 (22:29 +0000)]
[c++2a] Update cxx_status w __VA_OPT__ marked as completed in SVN.
llvm-svn: 316304
Saleem Abdulrasool [Sun, 22 Oct 2017 20:51:25 +0000 (20:51 +0000)]
ExecutionEngine: make COFF Thumb2 assertions non-tautological
The overflow detection assertions were tautological due to truncation.
Adjust them to no longer be tautological.
Patch by Alex Langford!
llvm-svn: 316303
Yichao Yu [Sun, 22 Oct 2017 20:28:17 +0000 (20:28 +0000)]
Fix invalid ptrtoint in InstCombine
Summary:
It's unclear if this is the only thing we can do but at least this is consistent with the check
of address space agreement in `isBitCastable`.
The code is used at least in both instcombine and jumpthreading though
I could only find a way to trigger the invalid cast in instcombine.
Reviewers: loladiro, sanjoy, majnemer
Reviewed By: sanjoy
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D34335
llvm-svn: 316302
Benjamin Kramer [Sun, 22 Oct 2017 20:16:28 +0000 (20:16 +0000)]
Create fewer copies of StringMaps. No functionality change intended.
llvm-svn: 316301
Martin Storsjo [Sun, 22 Oct 2017 19:39:26 +0000 (19:39 +0000)]
Make HIDDEN_DIRECTIVE a function-like macro. NFCI.
This avoids a hack for making it a no-op for windows.
Also explicitly check for _WIN32 instead of assuming it.
Differential Revision: https://reviews.llvm.org/D39156
llvm-svn: 316300
Benjamin Kramer [Sun, 22 Oct 2017 19:16:31 +0000 (19:16 +0000)]
[X86] Add missing override. NFC.
llvm-svn: 316299
Sanjay Patel [Sun, 22 Oct 2017 19:10:07 +0000 (19:10 +0000)]
[SimplifyCFG] delay switch condition forwarding to -latesimplifycfg
As discussed in D39011:
https://reviews.llvm.org/D39011
...replacing constants with a variable is inverting the transform done
by other IR passes, so we definitely don't want to do this early.
In fact, it's questionable whether this transform belongs in SimplifyCFG
at all. I'll look at moving this to codegen as a follow-up step.
llvm-svn: 316298
Fangrui Song [Sun, 22 Oct 2017 18:43:23 +0000 (18:43 +0000)]
[utils] Support -mtriple=powerpc64
Summary: test/CodeGen/PowerPC/pr33093.ll uses both powerpc64 (big-endian) and powerpc64le while the former was unsupported.
Subscribers: nemanjai
Differential Revision: https://reviews.llvm.org/D39164
llvm-svn: 316297
Simon Pilgrim [Sun, 22 Oct 2017 18:38:57 +0000 (18:38 +0000)]
Strip trailing whitespace. NFCI.
llvm-svn: 316296
Marina Yatsina [Sun, 22 Oct 2017 17:59:38 +0000 (17:59 +0000)]
Add logic to greedy reg alloc to avoid bad eviction chains
This fixes bugzilla 26810
https://bugs.llvm.org/show_bug.cgi?id=26810
This is intended to prevent sequences like:
movl %ebp, 8(%esp) # 4-byte Spill
movl %ecx, %ebp
movl %ebx, %ecx
movl %edi, %ebx
movl %edx, %edi
cltd
idivl %esi
movl %edi, %edx
movl %ebx, %edi
movl %ecx, %ebx
movl %ebp, %ecx
movl 16(%esp), %ebp # 4 - byte Reload
Such sequences are created in 2 scenarios:
Scenario #1:
vreg0 is evicted from physreg0 by vreg1
Evictee vreg0 is intended for region splitting with split candidate physreg0 (the reg vreg0 was evicted from)
Region splitting creates a local interval because of interference with the evictor vreg1 (normally region spliiting creates 2 interval, the "by reg" and "by stack" intervals. Local interval created when interference occurs.)
one of the split intervals ends up evicting vreg2 from physreg1
Evictee vreg2 is intended for region splitting with split candidate physreg1
one of the split intervals ends up evicting vreg3 from physreg2 etc.. until someone spills
Scenario #2
vreg0 is evicted from physreg0 by vreg1
vreg2 is evicted from physreg2 by vreg3 etc
Evictee vreg0 is intended for region splitting with split candidate physreg1
Region splitting creates a local interval because of interference with the evictor vreg1
one of the split intervals ends up evicting back original evictor vreg1 from physreg0 (the reg vreg0 was evicted from)
Another evictee vreg2 is intended for region splitting with split candidate physreg1
one of the split intervals ends up evicting vreg3 from physreg2 etc.. until someone spills
As compile time was a concern, I've added a flag to control weather we do cost calculations for local intervals we expect to be created (it's on by default for X86 target, off for the rest).
Differential Revision: https://reviews.llvm.org/D35816
Change-Id: Id9411ff7bbb845463d289ba2ae97737a1ee7cc39
llvm-svn: 316295
Craig Topper [Sun, 22 Oct 2017 17:22:29 +0000 (17:22 +0000)]
[X86] More correctly support LIG and WIG for EVEX instructions in the disassembler tables.
This is similar to how we generate the VEX tables.
More fixes are still needed for the instructions that use EVEX.b (broadcast and embedded rounding).
llvm-svn: 316294
Sanjay Patel [Sun, 22 Oct 2017 16:51:03 +0000 (16:51 +0000)]
[SimplifyCFG] try harder to forward switch condition to phi (PR34471)
The missed canonicalization/optimization in the motivating test from PR34471 leads to very different codegen:
int switcher(int x) {
switch(x) {
case 17: return 17;
case 19: return 19;
case 42: return 42;
default: break;
}
return 0;
}
int comparator(int x) {
if (x == 17) return 17;
if (x == 19) return 19;
if (x == 42) return 42;
return 0;
}
For the first example, we use a bit-test optimization to avoid a series of compare-and-branch:
https://godbolt.org/g/BivDsw
Differential Revision: https://reviews.llvm.org/D39011
llvm-svn: 316293
Faisal Vali [Sun, 22 Oct 2017 14:45:08 +0000 (14:45 +0000)]
[C++17] Fix PR34970 - tweak overload resolution for class template deduction-guides in line with WG21's p0620r0.
In order to identify the copy deduction candidate, I considered two approaches:
- attempt to determine whether an implicit guide is a copy deduction candidate by checking certain properties of its subsituted parameter during overload-resolution.
- using one of the many bits (WillHaveBody) from FunctionDecl (that CXXDeductionGuideDecl inherits from) that are otherwise irrelevant for deduction guides
After some brittle gymnastics w the first strategy, I settled on the second, although to avoid confusion and to give that bit a better name, i turned it into a member of an anonymous union.
Given this identification 'bit', the tweak to overload resolution was a simple reordering of the deduction guide checks (in SemaOverload.cpp::isBetterOverloadCandidate), in-line with Jason Merrill's p0620r0 drafting which made it into the working paper. Concordant with that, I made sure the copy deduction candidate is always added.
References:
See https://bugs.llvm.org/show_bug.cgi?id=34970
See http://wg21.link/p0620r0
llvm-svn: 316292
Jan Vesely [Sun, 22 Oct 2017 14:21:59 +0000 (14:21 +0000)]
shared: Implement aligned vector stores (vstorea_half)
Float version passes newly posted piglit tests on turks, float and double pass on carrizo.
v2: scalar vstorea_half
v3: fix typo
Reviewer: Aaron Watry
Signed-off-by: Jan Vesely <jan.vesely@rutgers.edu>
llvm-svn: 316291
Jan Vesely [Sun, 22 Oct 2017 14:21:56 +0000 (14:21 +0000)]
shared: Implement aligned vector loads (vloada_half)
Passes newly posted piglits on turks and carrizo
v2: add scalar vloada_half
v3: fix typo
Reviewer: Aaron Watry
Signed-off-by: Jan Vesely <jan.vesely@rutgers.edu>
llvm-svn: 316290
Momchil Velikov [Sun, 22 Oct 2017 11:56:35 +0000 (11:56 +0000)]
[ARM] Dynamic stack alignment for 16-bit Thumb
This patch implements dynamic stack (re-)alignment for 16-bit Thumb. When
targeting processors, which support only the 16-bit Thumb instruction set
the compiler ignores the alignment attributes of automatic variables and may
silently generate incorrect code.
Differential revision: https://reviews.llvm.org/D38143
llvm-svn: 316289
Guy Blank [Sun, 22 Oct 2017 11:43:08 +0000 (11:43 +0000)]
[X86] Add a pass to convert instruction chains between domains.
The pass scans the function to find instruction chains that define
registers in the same domain (closures).
It then calculates the cost of converting the closure to another domain.
If found profitable, the instructions are converted to instructions in
the other domain and the register classes are changed accordingly.
This commit adds the pass infrastructure and a simple conversion from
the GPR domain to the Mask domain.
Differential Revision:
https://reviews.llvm.org/D37251
Change-Id: Ic2cf1d76598110401168326d411128ae2580a604
llvm-svn: 316288
Nitesh Jain [Sun, 22 Oct 2017 09:47:41 +0000 (09:47 +0000)]
[mips] Adds support for R_MIPS_26, HIGHER, HIGHEST relocations in RuntimeDyld.
Reviewers: sdardis
Subscribers: jaydeep, bhushan, llvm-commits
Differential Revision: https://reviews.llvm.org/D38314
llvm-svn: 316287
Nitesh Jain [Sun, 22 Oct 2017 09:37:50 +0000 (09:37 +0000)]
[Compiler-rt][MIPS] Fix cross build for XRAY.
Reviewers: dberris, sdardis
Subscribers: jaydeep, bhushan, llvm-commits
Differential Revision: https://reviews.llvm.org/D38021
llvm-svn: 316286
Craig Topper [Sun, 22 Oct 2017 06:18:26 +0000 (06:18 +0000)]
[X86] Teach the disassembler that some instructions use VEX.W==0 without a corresponding VEX.W==1 instruction and we shouldn't treat them as if VEX.W is ignored.
Fixes PR11304.
llvm-svn: 316285
Craig Topper [Sun, 22 Oct 2017 06:18:23 +0000 (06:18 +0000)]
[X86] Add VEX_WIG to applicable AVX512 instructions.
This should be NFC. Will be used in future patches to fix disassembler bugs.
llvm-svn: 316284
Craig Topper [Sun, 22 Oct 2017 06:18:20 +0000 (06:18 +0000)]
[X86] Add VEX_WIG to VROUNDSSrr/VROUNDSSrm/VROUNDSDrr/VROUNDSDrm
llvm-svn: 316283
Craig Topper [Sun, 22 Oct 2017 04:32:30 +0000 (04:32 +0000)]
[X86] Don't allow gather/scatter to disassembler if memory operand does not use a SIB byte.
Fixes PR34998.
llvm-svn: 316282
Rui Ueyama [Sun, 22 Oct 2017 01:58:30 +0000 (01:58 +0000)]
Simplify.
llvm-svn: 316281
Rui Ueyama [Sat, 21 Oct 2017 23:20:13 +0000 (23:20 +0000)]
Assume that mergeable input sections are smaller than 4 GiB.
By assuming that mergeable input sections are smaller than 4 GiB,
lld's memory usage when linking clang with debug info drops from
2.788 GiB to 2.019 GiB (measured by valgrind, and that does not include
memory space for mmap'ed files). I think that's a reasonable assumption
given such a large RAM savings, so this patch.
According to valgrind, gold needs 3.54 GiB of RAM to do the same thing.
NB: This patch does not introduce a limitation on the size of
output sections. You can still create sections larger than 4 GiB.
llvm-svn: 316280
Aaron Ballman [Sat, 21 Oct 2017 21:52:48 +0000 (21:52 +0000)]
Reverting r316278 due to failing build bots.
http://lab.llvm.org:8011/builders/clang-ppc64be-linux/builds/11896
http://lab.llvm.org:8011/builders/clang-s390x-linux/builds/12380
llvm-svn: 316279
Masud Rahman [Sat, 21 Oct 2017 20:53:49 +0000 (20:53 +0000)]
[libclang, bindings]: add spelling location
o) Add a 'Location' class that represents the four properties of a
physical location
o) Enhance 'SourceLocation' to provide 'expansion' and 'spelling'
locations, maintaining backwards compatibility with existing code by
forwarding the four properties to 'expansion'.
o) Update the implementation to use 'clang_getExpansionLocation'
instead of the deprecated 'clang_getInstantiationLocation', which
has been present since 2011.
o) Update the implementation of 'clang_getSpellingLocation' to actually
obtain spelling location instead of file location.
llvm-svn: 316278
Simon Pilgrim [Sat, 21 Oct 2017 20:40:49 +0000 (20:40 +0000)]
Strip trailing whitespace. NFCI.
llvm-svn: 316277
Aaron Ballman [Sat, 21 Oct 2017 20:38:15 +0000 (20:38 +0000)]
Reverting r316270 due to failing build bots.
http://lab.llvm.org:8011/builders/clang-x86_64-linux-selfhost-modules-2/builds/12899
http://lab.llvm.org:8011/builders/clang-x86-windows-msvc2015/builds/7951
llvm-svn: 316276
Aaron Ballman [Sat, 21 Oct 2017 20:28:58 +0000 (20:28 +0000)]
Fix a typo with -fno-double-square-bracket-attributes and add a test to demonstrate that it works as expected in C++11 mode. Additionally corrected the handling of -fdouble-square-bracket-attributes to be properly passed down to the cc1 option.
llvm-svn: 316275
Simon Pilgrim [Sat, 21 Oct 2017 20:19:48 +0000 (20:19 +0000)]
[X86][SSE] Add extractps/pextrd equivalence to domain tables
Differential Revision: https://reviews.llvm.org/D39135
llvm-svn: 316274
Craig Topper [Sat, 21 Oct 2017 20:03:20 +0000 (20:03 +0000)]
[X86] Fix disassembling of EVEX instructions to stop accidentally decoding the SIB index register as an XMM/YMM/ZMM register.
This introduces a new operand type to encode the whether the index register should be XMM/YMM/ZMM. And new code to fixup the results created by readSIB.
This has the nice effect of removing a bunch of code that hard coded the name of every GATHER and SCATTER instruction to map the index type.
This fixes PR32807.
llvm-svn: 316273
Simon Pilgrim [Sat, 21 Oct 2017 17:23:04 +0000 (17:23 +0000)]
Fix MSVC 'result of 32-bit shift implicitly converted to 64 bits' warning. NFCI.
llvm-svn: 316271
Fangrui Song [Sat, 21 Oct 2017 16:59:40 +0000 (16:59 +0000)]
[PPC CodeGen] Fix the bitreverse.i64 intrinsic.
Summary: The two 32-bit words were swapped.
Subscribers: nemanjai, kbarton
Differential Revision: https://reviews.llvm.org/D38705
llvm-svn: 316270
Aaron Ballman [Sat, 21 Oct 2017 16:45:08 +0000 (16:45 +0000)]
Add release notes for the recent -fdouble-square-bracket-attributes and -fno-double-square-bracket-attributes compiler flags.
llvm-svn: 316269
Roman Lebedev [Sat, 21 Oct 2017 16:44:03 +0000 (16:44 +0000)]
[Sema] Fixes for enum handling for tautological comparison diagnostics
Summary:
As Mattias Eriksson has reported in PR35009, in C, for enums, the underlying type should
be used when checking for the tautological comparison, unlike C++, where the enumerator
values define the value range. So if not in CPlusPlus mode, use the enum underlying type.
Also, i have discovered a problem (a crash) when evaluating tautological-ness of the following comparison:
```
enum A { A_a = 0 };
if (a < 0) // expected-warning {{comparison of unsigned enum expression < 0 is always false}}
return 0;
```
This affects both the C and C++, but after the first fix, only C++ code was affected.
That was also fixed, while preserving (i think?) the proper diagnostic output.
And while there, attempt to enhance the test coverage.
Yes, some tests got moved around, sorry about that :)
Fixes PR35009
Reviewers: aaron.ballman, rsmith, rjmccall
Reviewed By: aaron.ballman
Subscribers: Rakete1111, efriedma, materi, cfe-commits
Tags: #clang
Differential Revision: https://reviews.llvm.org/D39122
llvm-svn: 316268
Aaron Ballman [Sat, 21 Oct 2017 16:43:01 +0000 (16:43 +0000)]
Fixing broken attribute documentation for __attribute__((noescape)); a code block was missing and the existing code block was missing a mandatory newline.
llvm-svn: 316267
Craig Topper [Sat, 21 Oct 2017 16:35:41 +0000 (16:35 +0000)]
[ValueTracking] Remove unnecessary temporary APInt from computeNumSignBitsVectorConstant.
We can just use getNumSignBits instead of inverting negative numbers.
llvm-svn: 316266
Craig Topper [Sat, 21 Oct 2017 16:35:39 +0000 (16:35 +0000)]
[ValueTracking] Simplify the known bits code for constant vectors a little.
Neither of these cases really require a temporary APInt outside the loop. For the ConstantDataSequential case the APInt will never be larger than 64-bits so its fine to just call getElementAsAPInt. For ConstantVector we can get the APInt by reference and only make a copy where the inversion is needed.
llvm-svn: 316265
Masud Rahman [Sat, 21 Oct 2017 16:13:41 +0000 (16:13 +0000)]
[bindings] allow null strings in Python 3
Some API calls accept 'NULL' instead of a char array (e.g. the second
argument to 'clang_ParseTranslationUnit'). For Python 3 compatibility,
all strings are passed through 'c_interop_string' which expects to
receive only 'bytes' or 'str' objects. This change extends this
behavior to additionally allow 'None' to be supplied.
A test case was added which breaks in Python 3, and is fixed by this
change. All the test cases pass in both, Python 2 and Python 3.
llvm-svn: 316264
Masud Rahman [Sat, 21 Oct 2017 16:03:17 +0000 (16:03 +0000)]
Test commit
llvm-svn: 316263
Simon Pilgrim [Sat, 21 Oct 2017 14:35:09 +0000 (14:35 +0000)]
[X86][SSE] Add missing extractps scheduling test
llvm-svn: 316262
David Green [Sat, 21 Oct 2017 13:58:37 +0000 (13:58 +0000)]
[LoopInterchange] Fix phi node ordering miscompile.
The way that splitInnerLoopHeader splits blocks requires that
the induction PHI will be the first PHI in the inner loop
header. This makes sure that is actually the case when there
are both IV and reduction phis.
Differential Revision: https://reviews.llvm.org/D38682
llvm-svn: 316261
NAKAMURA Takumi [Sat, 21 Oct 2017 11:02:30 +0000 (11:02 +0000)]
clang-tidy: Fix deps.
llvm-svn: 316260
Florian Hahn [Sat, 21 Oct 2017 05:37:10 +0000 (05:37 +0000)]
[SelectionDAG] Use dyn_cast without cast.
llvm-svn: 316258
Florian Hahn [Sat, 21 Oct 2017 04:57:03 +0000 (04:57 +0000)]
[SelectionDAG] Use isa to silence unused variable warning (NFC).
llvm-svn: 316257
Craig Topper [Sat, 21 Oct 2017 03:22:13 +0000 (03:22 +0000)]
[SelectionDAG] Don't subject ConstantSDNodes to the depth limit in computeKnownBits and ComputeNumSignBits.
We don't need to do any additional recursion, we just need to analyze the APInt stored in the node. This matches what the ValueTracking versions do for IR.
llvm-svn: 316256
Craig Topper [Sat, 21 Oct 2017 02:27:19 +0000 (02:27 +0000)]
[SelectionDAG] Don't subject ISD:Constant to the depth limit in TargetLowering::SimplifyDemandedBits.
Summary:
We shouldn't recurse any further but it doesn't mean we shouldn't be able to give the known bits for a constant. The caller would probably like that we always return the right answer for a constant RHS. This matches what InstCombine does in this case.
I don't have a test case because this showed up while trying to revive D31724.
Reviewers: RKSimon, spatel
Reviewed By: RKSimon
Subscribers: arsenm, llvm-commits
Differential Revision: https://reviews.llvm.org/D38967
llvm-svn: 316255
Craig Topper [Sat, 21 Oct 2017 02:26:00 +0000 (02:26 +0000)]
[X86] Do not generate __multi3 for mul i128 on X86
Summary: __multi3 is not available on x86 (32-bit). Setting lib call name for MULI_128 to nullptr forces DAGTypeLegalizer::ExpandIntRes_MUL to generate instructions for 128-bit multiply instead of a call to an undefined function. This fixes PR20871 though it may be worth looking at why licm and indvars combine to generate 65-bit multiplies in that test.
Patch by Riyaz V Puthiyapurayil
Reviewers: craig.topper, schweitz
Reviewed By: craig.topper, schweitz
Subscribers: RKSimon, llvm-commits
Differential Revision: https://reviews.llvm.org/D38668
llvm-svn: 316254
Eugene Zelenko [Sat, 21 Oct 2017 00:57:46 +0000 (00:57 +0000)]
[Transforms] Fix some Clang-tidy modernize and Include What You Use warnings; other minor fixes (NFC).
llvm-svn: 316253
Rafael Espindola [Sat, 21 Oct 2017 00:05:01 +0000 (00:05 +0000)]
Don't call buildSectionOrder multiple times.
This takes linking the linux kernel from 1.52s to 0.58s.
llvm-svn: 316251
Sanjay Patel [Fri, 20 Oct 2017 23:32:41 +0000 (23:32 +0000)]
[CodeGen] add tests for __builtin_sqrt*; NFC
I don't know if this is correct, but this is what we currently do.
More discussion in PR27108 and PR27435 and D27618.
llvm-svn: 316250
George Karpenkov [Fri, 20 Oct 2017 23:29:59 +0000 (23:29 +0000)]
[Analyzer] Correctly handle parameters passed by reference when bodyfarming std::call_once
Explicitly not supporting functor objects.
Differential Revision: https://reviews.llvm.org/D39031
llvm-svn: 316249
Rafael Espindola [Fri, 20 Oct 2017 23:28:19 +0000 (23:28 +0000)]
Remove unused argument.
llvm-svn: 316248
Zachary Turner [Fri, 20 Oct 2017 23:09:20 +0000 (23:09 +0000)]
[clang-tidy] Remove MSVC inline assembly test from cross-plat test.
This originally started out here in dev, but I moved it to another
file when it became clear this wouldn't work on non-Windows.
Unfortunately I forgot to remove it from this file. Test is still
live, just in another source file.
llvm-svn: 316247
Zachary Turner [Fri, 20 Oct 2017 23:00:51 +0000 (23:00 +0000)]
[clang-tidy] Don't error on MS-style inline assembly.
To get MS-style inline assembly, we need to link in the various
backends. Some other clang tools already do this, and this issue
has been raised with clang-tidy several times, indicating there
is sufficient desire to make this work.
Differential Revision: https://reviews.llvm.org/D38549
llvm-svn: 316246
Richard Smith [Fri, 20 Oct 2017 22:56:25 +0000 (22:56 +0000)]
Implement current CWG direction for support of arrays of unknown bounds in
constant expressions.
We permit array-to-pointer decay on such arrays, but disallow pointer
arithmetic (since we do not know whether it will have defined behavior).
This is based on r311970 and r301822 (the former by me and the latter by Robert
Haberlach). Between then and now, two things have changed: we have committee
feedback indicating that this is indeed the right direction, and the code
broken by this change has been fixed.
This is necessary in C++17 to continue accepting certain forms of non-type
template argument involving arrays of unknown bound.
llvm-svn: 316245
Pavel Labath [Fri, 20 Oct 2017 22:39:18 +0000 (22:39 +0000)]
lldb-server tests: Propagate environment variables (pr34192)
Summary:
Without this, the launching of the test inferior may fail if it depends
on some component of the environment (most likely LD_LIBRARY_PATH). This
makes sure we propagate the environment variable to the inferior
process.
Reviewers: eugene
Subscribers: lldb-commits
Differential Revision: https://reviews.llvm.org/D39010
llvm-svn: 316244
Krzysztof Parzyszek [Fri, 20 Oct 2017 22:08:40 +0000 (22:08 +0000)]
[Packetizer] Add function to check for aliasing between instructions
llvm-svn: 316243
Sanjay Patel [Fri, 20 Oct 2017 21:55:23 +0000 (21:55 +0000)]
[utils, x86] add regex for retl/retq to reduce duplicated FileChecking (PR35003)
llvm-svn: 316242
Eugene Zelenko [Fri, 20 Oct 2017 21:47:29 +0000 (21:47 +0000)]
[Transforms] Fix some Clang-tidy modernize and Include What You Use warnings; other minor fixes (NFC).
llvm-svn: 316241
Sam Clegg [Fri, 20 Oct 2017 21:28:38 +0000 (21:28 +0000)]
[WebAssembly] MC: Fix crash when -g specified.
At this point we don't output any debug sections or thier
relocations.
Differential Revision: https://reviews.llvm.org/D39076
llvm-svn: 316240
Jan Vesely [Fri, 20 Oct 2017 21:10:18 +0000 (21:10 +0000)]
amdgcn: Add missing datalayout info to .ll files
Signed-off-by: Jan Vesely <jan.vesely@rutgers.edu>
Acked-by: Aaron Watry <awatry@gmail.com>
llvm-svn: 316239
Jan Vesely [Fri, 20 Oct 2017 21:00:31 +0000 (21:00 +0000)]
r600: Add missing datalayout to .ll files
Signed-off-by: Jan Vesely <jan.vesely@rutgers.edu>
Acked-by: Aaron Watry <awatry@gmail.com>
llvm-svn: 316238
Daniel Sanders [Fri, 20 Oct 2017 20:55:29 +0000 (20:55 +0000)]
[globalisel][tablegen] Fix small spelling nits. NFC
ComplexRendererFn -> ComplexRendererFns
Corrected a couple lingering references to tied operands that were missed.
llvm-svn: 316237
Krzysztof Parzyszek [Fri, 20 Oct 2017 20:24:44 +0000 (20:24 +0000)]
[Hexagon] Report error instead of crashing on wrong inline-asm constraints
llvm-svn: 316236
Jonas Hahnfeld [Fri, 20 Oct 2017 20:16:17 +0000 (20:16 +0000)]
Revert "[OpenMP] Avoid VLAs for some reductions on array sections"
This breaks at least two buildbots:
http://lab.llvm.org:8011/builders/clang-cmake-x86_64-avx2-linux/builds/1175
http://lab.llvm.org:8011/builders/clang-atom-d525-fedora-rel/builds/10478
This reverts commit r316229 during local investigation.
llvm-svn: 316235
Jonathan Peyton [Fri, 20 Oct 2017 20:14:46 +0000 (20:14 +0000)]
Restrict OMPT to OpenMP version 5.0 and remove old header files
Patch by Simon Convent
Differential Revision: https://reviews.llvm.org/D38876
llvm-svn: 316234
Peter Collingbourne [Fri, 20 Oct 2017 19:48:26 +0000 (19:48 +0000)]
COFF: Add type server pdb files to linkrepro tar file.
Differential Revision: https://reviews.llvm.org/D38977
llvm-svn: 316233
Jonathan Peyton [Fri, 20 Oct 2017 19:45:43 +0000 (19:45 +0000)]
Add license envirable for testing Intel compilers
Patch by Simon Convent
Differential Revision: https://reviews.llvm.org/D38881
llvm-svn: 316232
Pavel Labath [Fri, 20 Oct 2017 19:44:53 +0000 (19:44 +0000)]
Revert "Logging: Make sure logging machinery is in a consistent state after forking"
The pthread_atfork trick breaks on android, because
pthread_rwlock_unlock detects that it is not the same thread which
locked the lock. This means that the subsequent lock attempt will still
deadlock (only this time it happens deterministically instead of at
random). Reverting to find a better solution.
This reverts commit r316173.
llvm-svn: 316231
Jonathan Peyton [Fri, 20 Oct 2017 19:42:32 +0000 (19:42 +0000)]
Add C++ support for testcases
Patch by Simon Convent
Differential Revision: https://reviews.llvm.org/D38878
llvm-svn: 316230
Jonas Hahnfeld [Fri, 20 Oct 2017 19:40:40 +0000 (19:40 +0000)]
[OpenMP] Avoid VLAs for some reductions on array sections
In some cases the compiler can deduce the length of an array section
as constants. With this information, VLAs can be avoided in place of
a constant sized array or even a scalar value if the length is 1.
Example:
int a[4], b[2];
pragma omp parallel reduction(+: a[1:2], b[1:1])
{ }
For chained array sections, this optimization is restricted to cases
where all array sections except the last have a constant length 1.
This trivially guarantees that there are no holes in the memory region
that needs to be privatized.
Example:
int c[3][4];
pragma omp parallel reduction(+: c[1:1][1:2])
{ }
Differential Revision: https://reviews.llvm.org/D39136
llvm-svn: 316229
Krzysztof Parzyszek [Fri, 20 Oct 2017 19:33:12 +0000 (19:33 +0000)]
[Hexagon] Reorganize and update instruction patterns
llvm-svn: 316228
Jonathan Peyton [Fri, 20 Oct 2017 19:30:57 +0000 (19:30 +0000)]
Apply formatting changes
.clang-format's comments are removed and a (hopefully) final
set of formatting changes are applied.
Differential Revision: https://reviews.llvm.org/D38837
Differential Revision: https://reviews.llvm.org/D38920
llvm-svn: 316227
Simon Pilgrim [Fri, 20 Oct 2017 19:29:01 +0000 (19:29 +0000)]
[X86][SSE] Add missing _mm_extract_ps fast-isel test
llvm-svn: 316226
Erich Keane [Fri, 20 Oct 2017 19:18:30 +0000 (19:18 +0000)]
Allow /showIncludes with /P
r213589 was checked in as a solution to
https://bugs.llvm.org/show_bug.cgi?id=20336.
However, it is possible to use /EP with /P
to suppress #line directives AND output to
a file. There is no reason in that case to
suppress /showIncludes.
This was reported here:
https://bugs.llvm.org/show_bug.cgi?id=34997
Differential Revision: https://reviews.llvm.org/D39104
llvm-svn: 316225
Saleem Abdulrasool [Fri, 20 Oct 2017 18:47:35 +0000 (18:47 +0000)]
GNU: do not read the FDE count if omitted
If there is no binary search table computed, the FDECount encoding is
DW_EH_PE_omit. Do not attempt to read the FDECount in such a situation
as we will read an incorrect value. binutils only writes out the
FDECount if the encoding is not DW_EH_PE_omit.
llvm-svn: 316224
Sanjay Patel [Fri, 20 Oct 2017 18:35:32 +0000 (18:35 +0000)]
[x86] avoid FileCheck assert duplication with retl/retq regex; NFC
This was suggested in PR35003:
https://bugs.llvm.org/show_bug.cgi?id=35003
32-bit checks may be identical to 64-bit (if we avoid those pesky scalar params!).
I'll check in the script change shortly assuming this doesn't anger any bots.
llvm-svn: 316223
Simon Pilgrim [Fri, 20 Oct 2017 18:07:50 +0000 (18:07 +0000)]
[X86][SSE] getTargetShuffleMask - check shuffle input value types. NFCI.
To help identify shuffle combine issues
llvm-svn: 316222
Haojian Wu [Fri, 20 Oct 2017 17:54:53 +0000 (17:54 +0000)]
[clang-tidy] Add missing test files in r316090.
llvm-svn: 316221
Sam Clegg [Fri, 20 Oct 2017 17:41:12 +0000 (17:41 +0000)]
[WebAssembly] MC: Handle (ignore) MCSA_Protected symbol attribute
llvm-svn: 316220
Dave Lee [Fri, 20 Oct 2017 17:04:43 +0000 (17:04 +0000)]
Make x86 __ehhandler comdat if parent function is
Summary:
This change comes from using lld for i686-windows-msvc. Before this change, lld
emits an error of:
error: relocation against symbol in discarded section: .xdata
It's possible that this could be addressed in lld, but I think this change is
reasonable on its own.
At a high level, this is being generated:
A (.text comdat) -> B (.text) -> C (.xdata comdat)
Where A is a C++ inline function, which references B, an exception handler
thunk, which references C, the exception handling info.
With this structure, lld will error when applying relocations to B if the C it
references has been discarded (some other C has been selected).
This change checks if A is comdat, and if so places the exception registration
thunk (B) in the comdata group of A (and B).
It appears that MSVC makes the __ehhandler function comdat.
Is it possible that duplicate thunks are being emitted into the final binary
with other linkers, or are they stripping the unused thunks?
Reviewers: rnk, majnemer, compnerd, smeenai
Reviewed By: rnk, compnerd
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D38940
llvm-svn: 316219
Krzysztof Parzyszek [Fri, 20 Oct 2017 16:56:33 +0000 (16:56 +0000)]
[Hexagon] Allow redefinition with immediates for hw loop conversion
Normally, if the registers holding the induction variable's bounds
are redefined inside of the loop's body, the loop cannot be converted
to a hardware loop. However, if the redefining instruction is actually
loading an immediate value into the register, this conversion is both
possible and legal (since the immediate itself will be used in the
loop setup in the preheader).
llvm-svn: 316218
Simon Pilgrim [Fri, 20 Oct 2017 16:55:51 +0000 (16:55 +0000)]
[X86] Check all CPU target names.
We ignore the 32-bit/64-bit triple but I've tried to use i686 triples for CPUs that don't support x86_64
llvm-svn: 316217
Zvi Rackover [Fri, 20 Oct 2017 15:32:14 +0000 (15:32 +0000)]
X86 Tests: Add tests for vector permutes with variable indices. NFC.
Basic tests which are the equivalent of single-source shufflevector with variable mask.
llvm-svn: 316216
Aleksandar Beserminji [Fri, 20 Oct 2017 14:35:41 +0000 (14:35 +0000)]
Revert "[mips] Reordering callseq* nodes to be linear"
This reverts commit r314507, because the original patch is causing test
failures.
llvm-svn: 316215
Eugene Leviant [Fri, 20 Oct 2017 14:29:17 +0000 (14:29 +0000)]
[ARM] Use post-RA MI scheduler when +use-misched is set
Differential revision: https://reviews.llvm.org/D39100
llvm-svn: 316214
Simon Pilgrim [Fri, 20 Oct 2017 14:13:02 +0000 (14:13 +0000)]
[X86][AVX512] Regenerate regcall tests.
As part of tracking down machine verifier issues (PR27481)
llvm-svn: 316213
Haojian Wu [Fri, 20 Oct 2017 12:37:16 +0000 (12:37 +0000)]
[clang-refactor] Add "-Inplace" option to the commandline tool.
Summary:
Change clang-refactor default behavior to print the new code after refactoring
(instead of editing the source files), which would make it easier to use
and debug the refactoring action.
Reviewers: arphaman, ioeric
Reviewed By: arphaman
Subscribers: cfe-commits
Differential Revision: https://reviews.llvm.org/D39092
llvm-svn: 316212
Ivan A. Kosarev [Fri, 20 Oct 2017 12:35:17 +0000 (12:35 +0000)]
[CodeGen] Fix generation of TBAA info for array-to-pointer conversions
Resolves:
Fatal error: Offset not zero at the point of scalar access.
http://llvm.org/PR34992
Differential Revision: https://reviews.llvm.org/D39083
llvm-svn: 316211
Dmitry Vyukov [Fri, 20 Oct 2017 12:10:21 +0000 (12:10 +0000)]
tsan: add tests missed in r316209
llvm-svn: 316210
Dmitry Vyukov [Fri, 20 Oct 2017 12:08:53 +0000 (12:08 +0000)]
[tsan] Add Mutex annotation flag for constant-initialized __tsan_mutex_linker_init behavior
Add a new flag, __tsan_mutex_not_static, which has the opposite sense
of __tsan_mutex_linker_init. When the new __tsan_mutex_not_static flag
is passed to __tsan_mutex_destroy, tsan ignores the destruction unless
the mutex was also created with the __tsan_mutex_not_static flag.
This is useful for constructors that otherwise woud set
__tsan_mutex_linker_init but cannot, because they are declared constexpr.
Google has a custom mutex with two constructors, a "linker initialized"
constructor that relies on zero-initialization and sets
__tsan_mutex_linker_init, and a normal one which sets no tsan flags.
The "linker initialized" constructor is morally constexpr, but we can't
declare it constexpr because of the need to call into tsan as a side effect.
With this new flag, the normal c'tor can set __tsan_mutex_not_static,
the "linker initialized" constructor can rely on tsan's lazy initialization,
and __tsan_mutex_destroy can still handle both cases correctly.
Author: Greg Falcon (gfalcon)
Reviewed in: https://reviews.llvm.org/D39095
llvm-svn: 316209
Nikolai Bozhenov [Fri, 20 Oct 2017 10:08:47 +0000 (10:08 +0000)]
[ValueTracking] Enabling ValueTracking patch by default
(recommit #2 after checking for timeout issue).
The original patch was an improvement to IR ValueTracking on
non-negative integers. It has been checked in to trunk (D18777,
r284022). But was disabled by default due to performance regressions.
Perf impact has improved. The patch would be enabled by default.
Reviewers: reames, hfinkel
Differential Revision: https://reviews.llvm.org/D34101
Patch by: Olga Chupina <olga.chupina@intel.com>
llvm-svn: 316208
Max Kazantsev [Fri, 20 Oct 2017 06:40:48 +0000 (06:40 +0000)]
Add test case for LoopSink pass
This test checks that load from constant memory will be sunk regardless of
aliasing stores in the loop.
Patch by Daniil Suchkov!
Differential Revision: https://reviews.llvm.org/D39113
llvm-svn: 316207
Dylan McKay [Fri, 20 Oct 2017 04:17:14 +0000 (04:17 +0000)]
[AVR] Fix the select-mbb-placement-bug.ll
llvm-svn: 316205
Saleem Abdulrasool [Fri, 20 Oct 2017 04:11:28 +0000 (04:11 +0000)]
Basic: restore {,u}intptr_t on NetBSD/ARM
NetBSD uses `long int` for `intptr_t` on ARM. This was changed in SVN
r316046, referenced against other compilers. However, NetBSD's
reference was incorrect as the current clang behaviour is more
up-to-date. Restore the original behaviour for that target.
llvm-svn: 316204