Soeren Moch [Thu, 10 Oct 2019 22:59:49 +0000 (00:59 +0200)]
board: tbs2910: Convert pci to driver model
So we can get rid of legacy pci config code.
PCI_PNP is not required for this board, remove it to reduce the size of the
u-boot binary.
DM_PCI does not start the host controller automatically anymore. Do so
in preboot instead.
Signed-off-by: Soeren Moch <smoch@web.de>
Soeren Moch [Thu, 10 Oct 2019 22:59:48 +0000 (00:59 +0200)]
ARM: dts: imx6q-tbs2910: Sync devicetree with kernel 5.3
Signed-off-by: Soeren Moch <smoch@web.de>
Sjoerd Simons [Thu, 20 Jun 2019 20:34:35 +0000 (22:34 +0200)]
mx6: mx6sabre common: Use more conventional spelling of fdtfile
Both the distro boot configuration as well as the general pxe support
standardized on fdtfile as the variable to hold the dtb filename.
Adjust to follow that such that e.g. "pxe boot" will just work.
Signed-off-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk>
Shawn Guo [Sun, 7 Jul 2019 12:59:55 +0000 (20:59 +0800)]
Add i.MX7D based Meerkat96 board support
The Meerkat96 board, based on the NXP i.MX7D SoC, is a member of
96Boards community and complies with all Consumer Edition board
specifications.
https://www.novtech.com/products/meerkat96.html
https://www.96boards.org/product/imx7-96/
The initial supported/tested devices include:
- Debug serial
- SD
- USB Host (with Ethernet)
With these support, it's good enough for loading Linux Kernel from SD or
Ethernet over USB.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Tested-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Shawn Guo [Sun, 7 Jul 2019 12:59:54 +0000 (20:59 +0800)]
ARM: dts: import meerkat96 board support
It imports device tree source of meerkat96 board from Linux Kernel.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Tom Rini [Sun, 13 Oct 2019 15:21:56 +0000 (11:21 -0400)]
travis: Exclude MIPS from the bcm job
We don't need to pull in anything from the MIPS job so exclude that from
the new bcm job and make it clear it's building only ARM.
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Sat, 12 Oct 2019 14:52:48 +0000 (10:52 -0400)]
Merge https://gitlab.denx.de/u-boot/custodians/u-boot-x86
- Remember the device being emulated for Sandbox PCI
- Update Kconfig options for FSP 1.0
- Drop RESET_BASE and RESET_SEG_SIZE that are no longer used
Tom Rini [Sat, 12 Oct 2019 14:10:59 +0000 (10:10 -0400)]
Merge branch '2019-10-11-master-imports'
- Assorted cleanups
- FAT bugfixes
- mediatek platform updates
Tom Rini [Sat, 12 Oct 2019 14:09:13 +0000 (10:09 -0400)]
Merge branch '2019-10-11-ti-imports'
- Various improvements to dra7xx, keystone 3, am65x SoCs
- Platform updates
- remoteproc improvements
Marek Szyprowski [Wed, 2 Oct 2019 10:24:46 +0000 (12:24 +0200)]
cmd: itest: add support for .q size specifier
Add support for quad (64bits) memory access specifier.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Acked-by: Lukasz Majewski <lukma@denx.de>
Heinrich Schuchardt [Thu, 12 Sep 2019 17:19:30 +0000 (19:19 +0200)]
fs: fat: get_contents() always returns -1 for errors
If out of memory, return -1 and not -ENOMEM from get_contents().
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Heinrich Schuchardt [Thu, 12 Sep 2019 17:19:29 +0000 (19:19 +0200)]
fs: fat: treat invalid FAT clusters as errors
When hitting an invalid FAT cluster while reading a file always print an
error message and return an error code.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Tom Rini [Fri, 11 Oct 2019 20:28:47 +0000 (16:28 -0400)]
sandbox: Remove sandbox_noblk build
At this point, all drivers that do not use CONFIG_BLK are past their
migration deadlines, so remove this config as it's no longer helpful and
hinders enhancing block drivers.
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
Lukasz Majewski [Mon, 9 Sep 2019 10:06:46 +0000 (12:06 +0200)]
spl: Introduce SPL_DM_SPI Kconfig define
This define indicates if DM_SPI shall be supported in SPL. This allows
proper operation of DM converted SPI drivers in SPL, which use
#if !CONFIG_IS_ENABLED(DM_SPI) to also support not yet DM/DTS converted
boards.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
Heinrich Schuchardt [Thu, 12 Sep 2019 17:09:26 +0000 (19:09 +0200)]
arm64: print instructions leading to exception
If an exception occurs in a loaded image and the relocation offset is
unknown, it is helpful to know the instructions pointed to by the
program counter. This patch adds the missing output.
A possible output is:
Code:
910c4021 aa1303e0 f9400662 d63f0040 (
e7f7defb)
The parentheses indicate the instruction causing the exception.
The output can be disassembled using scripts/decodecode:
echo 'Code:
90000360 9100b800 94002782 17ffff8f (
e7f7defb)' | \
ARCH=arm64 scripts/decodecode
Code:
90000360 9100b800 94002782 17ffff8f (
e7f7defb)
All code
========
0:
90000360 adrp x0, 0x6c000
4:
9100b800 add x0, x0, #0x2e
8:
94002782 bl 0x9e10
c:
17ffff8f b 0xfffffffffffffe48
10:*
e7f7defb .inst 0xe7f7defb ; undefined <-- trapping instruction
Code starting with the faulting instruction
===========================================
0:
e7f7defb .inst 0xe7f7defb ; undefined
We already have implemented the same for armv7.
For testing command 'exception undefined' can be used.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
T Karthik Reddy [Wed, 11 Sep 2019 13:39:53 +0000 (15:39 +0200)]
cmd: avoid decimal conversion
This patch uses auto instead of decimal in simple_strtoul().
Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Rasmus Villemoes [Tue, 10 Sep 2019 08:51:54 +0000 (08:51 +0000)]
ARM: asm/io.h: remove redundant #if !defined(readb) block
readb is unconditionally defined earlier in io.h, so there's no point
checking whether it's undefined.
Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Rasmus Villemoes [Tue, 10 Sep 2019 08:51:53 +0000 (08:51 +0000)]
ARM: asm/io.h: kill off confusing #ifdef __mem_pci block
No ARM board seems to define __mem_pci - and if it did, one would get tons of
./arch/arm/include/asm/io.h:307:0: warning: "readl" redefined
warnings, because readl and friends are unconditionally defined
earlier in io.h. Moreover, the redefinitions lack the memory barriers
that the first definitions have. So I'm guessing this is practically
dead code.
Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Mans Rullgard [Tue, 3 Sep 2019 14:16:50 +0000 (16:16 +0200)]
spl: mmc: Add option to set eMMC HW boot partition
This change allows setting pre-defined eMMC boot partition for SPL eMMC
booting. It is necessary in the case when one wants to boot (through falcon
boot) from eMMC after loading SPL from other memory (like SPI-NOR).
Signed-off-by: Mans Rullgard <mans@mansr.com>
[lukma: Edit the commit message]
Signed-off-by: Lukasz Majewski <lukma@denx.de>
Acked-by: Andreas Dannenberg <dannenberg@ti.com>
Mans Rullgard [Tue, 3 Sep 2019 14:17:17 +0000 (16:17 +0200)]
spl: mmc: Fix indentation in spl_mmc.c file
This fixes a wrongly indented block of code.
Signed-off-by: Mans Rullgard <mans@mansr.com>
[lukma: Make the commit message more verbose]
Signed-off-by: Lukasz Majewski <lukma@denx.de>
Lokesh Vutla [Tue, 1 Oct 2019 05:11:01 +0000 (10:41 +0530)]
arm: dra7xx: Hang on any failure during IOdelay recalibration
If there is any failure during IOdelay recalibration sequence, IOs are
not guaranteed to behave as expected. So hang on any failure during the
sequence.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Lokesh Vutla [Tue, 1 Oct 2019 05:11:00 +0000 (10:41 +0530)]
arm: dra7xx: Fix error path in iodelay recalibration
When an error is reported in __recalibrate_iodelay_start(), de-isolation
of IO doesn't happen. Because of this, undefined behaviour is observed
on many peripherals without any error. So make sure io is out of isolation
at the end of iodelay recalibration.
Reported-by: Richard Woodruff <r-woodruff2@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Jarkko Nikula [Mon, 30 Sep 2019 17:42:21 +0000 (20:42 +0300)]
tao3530: Fix usage of mmc rescan
Currently "bootcmd" does not work as intended but instead prints MMC usage
information and goes directly to "nandboot".
Follow what the commit
669681104daa ("configs: Fix usage of mmc rescan")
does for other boards prior to support for TechNexion TAO3530 SoM was
added.
Signed-off-by: Jarkko Nikula <jarkko.nikula@bitmer.com>
Lokesh Vutla [Mon, 30 Sep 2019 12:54:06 +0000 (18:24 +0530)]
configs: am43xx_evm: Enable USB support
spl_dm_init is failing as usb to be probed with the following error:
"omap_dwc3@
483c0000: ret=-2"
Enable usb to make spl boot on am43xx devices
Reported-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Lokesh Vutla [Sun, 29 Sep 2019 12:07:58 +0000 (17:37 +0530)]
arm: dts: k3-j721e-common-proc-board: Mark main_uart0 as shared device
Main uart0 is used as debug console by both R5SPL and A72 bootloader and
Linux. So mark it as shared device so that power-domain request is
successful by both cores.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Tero Kristo [Fri, 27 Sep 2019 16:14:29 +0000 (19:14 +0300)]
board: ti: am335x-ice: Configure the CDCE913 clock synthesizer
AM335x-ICE boards contain the CDCE913 clock synthesizer, and their
reset crystal capacitance load value of 10pF is wrong leading into
lost packets in certain networking tests. Add DT data for this
device, and probe it from the board file to program the crystal
capacitance load value to 0pF to avoid any problems.
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Tero Kristo [Fri, 27 Sep 2019 16:14:28 +0000 (19:14 +0300)]
board: ti: am43xx-idk: Configure the CDCE913 clock synthesizer
AM43xx-IDK boards contain the CDCE913 clock synthesizer, and their
reset crystal capacitance load value of 10pF is wrong leading into
lost packets in certain networking tests. Add DT data for this
device, and probe it from the board file to program the crystal
capacitance load value to 0pF to avoid any problems.
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Tero Kristo [Fri, 27 Sep 2019 16:14:27 +0000 (19:14 +0300)]
board: ti: am57xx-idk: Configure the CDCE913 clock synthesizer
AM57xx-IDK boards contain the CDCE913 clock synthesizer, and their
reset crystal capacitance load value of 10pF is wrong leading into
lost packets in certain networking tests. Add DT data for this
device, and probe it from the board file to program the crystal
capacitance load value to 0pF to avoid any problems.
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Tero Kristo [Fri, 27 Sep 2019 16:14:26 +0000 (19:14 +0300)]
clk: cdce9xx: add support for cdce9xx clock synthesizer
Add support for CDCE913/925/937/949 family of devices. These are modular
PLL-based low cost, high performance, programmable clock synthesizers,
multipliers and dividers. They generate up to 9 output clocks from a
single input frequency. The initial version of the driver does not
support programming of the PLLs, and thus they run in the bypass mode
only. The code is loosely based on the linux kernel cdce9xx driver.
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Lokesh Vutla [Fri, 27 Sep 2019 08:02:15 +0000 (13:32 +0530)]
arm: k3: Use driver_name to get ti_sci handle
Use the driver name to get ti_sci handle rather than relying
on just the FIRMWARE uclass.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Lokesh Vutla [Fri, 27 Sep 2019 08:02:14 +0000 (13:32 +0530)]
configs: am65x_evm_a53: Enable DISPLAY_CPUINFO
Enable CONFIG_DISPLAY_CPUINFO so that cpuinfo is printed during boot.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Lokesh Vutla [Fri, 27 Sep 2019 08:02:13 +0000 (13:32 +0530)]
configs: j721e_evm_a72: Enable DISPLAY_CPUINFO
Enable CONFIG_DISPLAY_CPUINFO so that cpuinfo is printed during boot.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Lokesh Vutla [Fri, 27 Sep 2019 08:02:12 +0000 (13:32 +0530)]
board: am65x: Print board name and version during boot
Print the board name and ver along with the DT Model.
While at it print the ver for all the detected daughter cards.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Lokesh Vutla [Fri, 27 Sep 2019 08:02:11 +0000 (13:32 +0530)]
arm: k3: Add support for printing CPUINFO
Add support for printing CPU info for all K3 devices.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Lokesh Vutla [Wed, 25 Sep 2019 09:08:13 +0000 (14:38 +0530)]
configs: j721e_evm_a72: Disable PSCI_RESET
J721E uses TISCI protocol to reset the device and does not
support PSCI reset. So disable PSCI reset.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Lokesh Vutla [Wed, 25 Sep 2019 09:08:05 +0000 (14:38 +0530)]
configs: am65x_evm_a53: Disable PSCI_RESET
AM65x uses TISCI protocol to reset the device and does not
support PSCI reset. So disable PSCI reset.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Lokesh Vutla [Tue, 24 Sep 2019 07:47:16 +0000 (13:17 +0530)]
mmc: am654_sdhci: Drop a redundant power_domain_on in probe
Power-domain is enabled by default in device_probe. am654 mmc driver
is enabling power-domain again in probe. As the second call is
redundant, drop power_domain_on from probe.
Tested-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Andrew F. Davis [Tue, 17 Sep 2019 19:40:25 +0000 (15:40 -0400)]
configs: ti: Use addr_fit for run_fit environment variable
When running 'run_fit' the FIT file should have been loaded at
'addr_fit', although at this point they should be the same
use this variable instead of 'loadaddr'.
Signed-off-by: Andrew F. Davis <afd@ti.com>
Moses Christopher [Tue, 17 Sep 2019 14:25:38 +0000 (14:25 +0000)]
am335x, guardian: adapt guardian board to DM
- update partition table - remove env partitions
- dts: add new interfaces (uart2, extra gpio-key)
remove unneeded entries
update nand timings for performance improvement
- defconfig: adapt configurations to suit DM
remove unneeded configs
- am335x_guardian.h: remove mmc boot
Signed-off-by: Moses Christopher <BollavarapuMoses.Christopher@in.bosch.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Moses Christopher [Tue, 17 Sep 2019 14:25:37 +0000 (14:25 +0000)]
am335x, guardian: update guardian board
- add BOARD_LATE_INIT function calls in board.c
- add swi_status detection in board.c
- mux: add guardian interfaces to single pinmux structure
- am33xx, kconfig: add BOARD_LATE_INIT for GUARDIAN board
Signed-off-by: Moses Christopher <BollavarapuMoses.Christopher@in.bosch.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Krunal Bhargav [Mon, 16 Sep 2019 08:17:19 +0000 (13:47 +0530)]
cmd: ti: ddr3: Move the print statement after test
If the ECC is enabled over the entire memory region, we need to ensure
the printf/put calls do not modify the stack after ECC is disabled.
Moved the printf/put statements after ECC is enabled.
Signed-off-by: Krunal Bhargav <k-bhargav@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Krunal Bhargav [Mon, 16 Sep 2019 08:17:18 +0000 (13:47 +0530)]
arm: omap: emif-common: Fix memory priming for ECC
Before the priming begins, we need to disable RMW (Read Modify Write)
and disable ECC verification for read accesses. By default, the EMIF
tool enables RMW and read accesses in the EMIF_ECC_CTRL_REG.
Signed-off-by: Krunal Bhargav <k-bhargav@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Krunal Bhargav [Mon, 16 Sep 2019 08:17:17 +0000 (13:47 +0530)]
arm: omap: emif-common: Disable interleaving
If ECC is enabled, we need to ensure interleaving is disabled for higher
address space.
Signed-off-by: Krunal Bhargav <k-bhargav@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Lokesh Vutla [Mon, 16 Sep 2019 08:17:16 +0000 (13:47 +0530)]
cmd: ti: ddr3: Fix ecc address calculation
ecc_address_range registers contains the start address and end address
of the DDR address space. But the ddr cmd driver is assuming the register
contains the start address and size of the DDR address space. Because
of this some valid ecc addresses are errored out as invalid address.
Fix this calculation.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Lokesh Vutla [Mon, 16 Sep 2019 08:17:15 +0000 (13:47 +0530)]
arm: omap: emif-common: Fix ecc address calculation
ecc_address_range registers contains the start address and end address
of the DDR address space. But the ddr driver is assuming the register
contains the start address and size of the DDR address space. Because
of this the ecc enabling is failing for the 2nd range of ecc addresses.
Fix this calculation.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Patrice Chotard [Mon, 26 Aug 2019 11:50:31 +0000 (13:50 +0200)]
regulator: fixed: Modify enable-active-high behavior
Regulator should not be enabled at probe time if regulator-boot-on
property is not in the dt node.
"enable-active-high" property is only used to indicate the GPIO
polarity.
See kernel documentation :
- Documentation/devicetree/bindings/regulator/fixed-regulator.yaml
- Documentation/devicetree/bindings/regulator/gpio-regulator.yaml
Signed-off-by: Christophe Kerello <christophe.kerello@st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Oleksandr Rybalko [Thu, 22 Aug 2019 10:26:56 +0000 (12:26 +0200)]
ata: ahci: Don't forget to clear upper address regs.
In 32bits mode upper bits need to be set to 0, otherwise controller will
try to DMA into not existing memory and stops with error.
Tested-by: Frank Wunderlich <frank-w@public-files.de>
Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
Signed-off-by: Oleksandr Rybalko <ray@ddteam.net>
Oleksandr Rybalko [Thu, 22 Aug 2019 10:26:55 +0000 (12:26 +0200)]
ahci-pci: ASM1061 report wrong class, but support AHCI.
Tested-by: Frank Wunderlich <frank-w@public-files.de>
Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
Signed-off-by: Oleksandr Rybalko <ray@ddteam.net>
Ryder Lee [Thu, 22 Aug 2019 10:26:54 +0000 (12:26 +0200)]
dt-bindings: phy: add a document for MediaTek tphy
This adds a document for tphy which supports physical layer
functionality for a number of controllers on MediaTek SoCs,
such as, USB2.0, USB3.0, PCIe, and SATA.
Signed-off-by: Ryder Lee <ryder.lee@mediatek.com>
Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
Ryder Lee [Thu, 22 Aug 2019 10:26:53 +0000 (12:26 +0200)]
dt-bindings: pcie: add a document for MT7623 PCIe controller
This adds a document for MT7623 PCIe controller.
Signed-off-by: Ryder Lee <ryder.lee@mediatek.com>
Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
Ryder Lee [Thu, 22 Aug 2019 10:26:52 +0000 (12:26 +0200)]
arm: dts: split mtk-reset.h into per-chip header
This follows the linux header rules to avoid conflict bitfields.
Tested-by: Frank Wunderlich <frank-w@public-files.de>
Signed-off-by: Ryder Lee <ryder.lee@mediatek.com>
Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
Ryder Lee [Thu, 22 Aug 2019 10:26:51 +0000 (12:26 +0200)]
arm: dts: add PCIe controller for MT7623 SoC
This adds PCIe and its PHY nodes for MT7623.
Tested-by: Frank Wunderlich <frank-w@public-files.de>
Signed-off-by: Ryder Lee <ryder.lee@mediatek.com>
Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
Ryder Lee [Thu, 22 Aug 2019 10:26:50 +0000 (12:26 +0200)]
phy: mediatek: add MediaTek T-PHY support for PCIe
The driver provides PHY for USB2, USB3.0, PCIe and SATA, and now
we just enable PCIe. As for the other functionalities will be
added gradually in upcoming days.
This is adapted from the Linux version.
Tested-by: Frank Wunderlich <frank-w@public-files.de>
Signed-off-by: Ryder Lee <ryder.lee@mediatek.com>
Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
Ryder Lee [Thu, 22 Aug 2019 10:26:49 +0000 (12:26 +0200)]
pci: mediatek: add PCIe controller support for MT7623
This adds PCIe controller support for MT7623.
This is adapted from the Linux version.
Tested-by: Frank Wunderlich <frank-w@public-files.de>
Signed-off-by: Ryder Lee <ryder.lee@mediatek.com>
Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
Philippe Reynes [Thu, 19 Sep 2019 14:18:39 +0000 (16:18 +0200)]
spl: add a generic function board_init_f
This commit add a generic function board_init_f that
only initialize some device (for example serial). It
avoid to define a board function only to launch the
serial configuration.
Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
Philippe Reynes [Wed, 14 Aug 2019 13:18:41 +0000 (15:18 +0200)]
bcm968580xref: enable spi-nor support
This commit enable the support of the spi-nor for the
broadcom reference board bcm968580xref.
Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
Reviewed-by: Kursad Oney <kursad.oney@broadcom.com>
Philippe Reynes [Wed, 14 Aug 2019 13:18:40 +0000 (15:18 +0200)]
dt: bcm968580xref: add a spi-nor device
This commit add a spi-nor device in the bcm96850xref device tree.
Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
Reviewed-by: Kursad Oney <kursad.oney@broadcom.com>
Philippe Reynes [Wed, 14 Aug 2019 13:18:39 +0000 (15:18 +0200)]
dt: bcm6858: add hsspi controller
This commit add a hsspi controller in the bcm6858 device tree.
Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
Reviewed-by: Kursad Oney <kursad.oney@broadcom.com>
Kursad Oney [Wed, 14 Aug 2019 13:18:38 +0000 (15:18 +0200)]
configs: Add hsspi/spi support to bcm963158.
This commit enable the support of the spi-nor for the
broadcom reference board bcm963158.
Signed-off-by: Kursad Oney <kursad.oney@broadcom.com>
Reviewed-by: Philippe Reynes <philippe.reynes@softathome.com>
Kursad Oney [Wed, 14 Aug 2019 13:18:37 +0000 (15:18 +0200)]
dt: bcm963158: add a spi-nor device
This change adds a spi nor flash device to the bcm963158 board.
Signed-off-by: Kursad Oney <kursad.oney@broadcom.com>
Reviewed-by: Philippe Reynes <philippe.reynes@softathome.com>
Kursad Oney [Wed, 14 Aug 2019 13:18:36 +0000 (15:18 +0200)]
dt: bcm63158: Add hsspi controller
This change adds the hsspi controller to the 63158 dtsi.
Signed-off-by: Kursad Oney <kursad.oney@broadcom.com>
Reviewed-by: Philippe Reynes <philippe.reynes@softathome.com>
Kursad Oney [Wed, 14 Aug 2019 13:18:35 +0000 (15:18 +0200)]
spi: bcm63xx_hsspi: Continue init when using no reset and fixed-clock.
The Broadcom ARM implementations do not yet have a clock framework so
one can use a fixed clock as the root clock of the hsspi block. The
fixed clock does not have an "enable" routine, since it's always
enabled. So when we hit this issue, getting an ENOSYS return, do not
bail but continue initialization.
Similarly the block might already have been out of reset, say, when
we are booting from a SPI device. So if the reset signal is not configured
in the device tree, do not bail out and instead skip deasserting the reset.
Signed-off-by: Kursad Oney <kursad.oney@broadcom.com>
Reviewed-by: Philippe Reynes <philippe.reynes@softathome.com>
Kursad Oney [Wed, 14 Aug 2019 13:18:34 +0000 (15:18 +0200)]
spi: bcm63xx_hsspi: switch to raw I/O functions.
Make the driver compatible with both big and little endian SOCs.
Replace big-endian calls with their raw equivalents, expect for
writing the command to FIFO. That still has to be in big-endian
format.
Signed-off-by: Kursad Oney <kursad.oney@broadcom.com>
Reviewed-by: Philippe Reynes <philippe.reynes@softathome.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Kursad Oney [Wed, 14 Aug 2019 13:18:33 +0000 (15:18 +0200)]
waitbit: Add the generic wait_for_bit macros for 16 and 32 bits.
wait_for_bit_le32 and wait_for_bit_le16 use the raw I/O functions
which would default to big-endian on BE systems. Create the generic
equivalents to use the native endianness.
Signed-off-by: Kursad Oney <kursad.oney@broadcom.com>
Reviewed-by: Philippe Reynes <philippe.reynes@softathome.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Kursad Oney [Wed, 14 Aug 2019 13:18:32 +0000 (15:18 +0200)]
spi: hsspi: allow to be used on bcm6858 and bcm63158
This IP exists in both MIPS and ARM cores, so we also
allow to use this driver on bcm6858 and bcm63158.
Signed-off-by: Kursad Oney <kursad.oney@broadcom.com>
Reviewed-by: Philippe Reynes <philippe.reynes@softathome.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Lokesh Vutla [Wed, 4 Sep 2019 10:31:51 +0000 (16:01 +0530)]
board: j721e: Add README
Add README file explaining the build and boot procedure for J721E evm.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Kedar Chitnis [Wed, 4 Sep 2019 10:31:50 +0000 (16:01 +0530)]
armv8: K3: j721e: Updated ddr address regions in MMU table
The A72 U-Boot code loads and boots a number of remote processors
including the C71x DSP, both the C66_0 and C66_1 DSPs, and the various
Main R5FSS Cores. In order to view the code loaded by the U-Boot by
remote cores, U-Boot should configure the memory region with right
memory attributes. Right now U-Boot carves out a memory region which
is not sufficient for all the images to be loaded. So, increase this
carve out region by 256MB.
Signed-off-by: Kedar Chitnis <kedarc@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Suman Anna [Wed, 4 Sep 2019 10:31:49 +0000 (16:01 +0530)]
armv8: K3: am65x: Update DDR address regions in MMU table
The A53 U-Boot code can load and boot the MCU domain R5F cores (either a
single core in LockStep mode or 2 cores in Split mode) to achieve various
early system functionalities. Change the memory attributes for the DDR
regions used by the remote processors so that the cores can see and
execute the proper code loaded by U-Boot.
These regions are currently limited to 0xa0000000 to 0xa2100000 as per
the DDR carveouts assigned for these R5F cores in the overall DDR memory
map.
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Suman Anna [Wed, 4 Sep 2019 10:31:48 +0000 (16:01 +0530)]
configs: am65x_evm_a53: Enhance bootcmd to start remoteprocs
The A53 U-boot can support early booting of the MCU R5F remote processor(s)
from U-boot prompt to achieve various system usecases before booting the
Linux kernel. Update the default BOOTCOMMAND to provide an automatic and
easier way to start the MCU R5F cores through added environment variables.
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Suman Anna [Wed, 4 Sep 2019 10:31:47 +0000 (16:01 +0530)]
configs: am65x_evm_a53: Enable R5F remoteproc driver
Enable the R5F remoteproc driver for the AM65x GP EVM so that the
MCU domain R5F cores can be booted from A53 U-boot.
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Suman Anna [Wed, 4 Sep 2019 10:31:46 +0000 (16:01 +0530)]
configs: j721e_evm_a72: Enhance bootcmd to start remoteprocs
The A72 U-boot can support early booting of any of the R5F or C66x
or C71x remote processors from U-boot prompt to achieve various system
usecases before booting the Linux kernel. Update the default BOOTCOMMAND
to provide an automatic and easier way to start various remote processors
through added environment variables.
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Signed-off-by: Suman Anna <s-anna@ti.com>
Lokesh Vutla [Wed, 4 Sep 2019 10:31:45 +0000 (16:01 +0530)]
configs: j721e_evm_a72: Enable R5F and DSP remoteproc driver
Enable R5F and DSP remoteproc drivers for j721e running on a72.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Suman Anna [Wed, 4 Sep 2019 10:31:44 +0000 (16:01 +0530)]
env: ti: am65x_evm: Add env support to boot the MCU R5F rprocs
Add support to boot the MCU domain R5F Core0 remoteproc at U-boot prompt
on the AM65x EVM boards by using the 'boot_rprocs' and other env variables
defined in the common environment file k3_rproc.h, and updating the
'DEFAULT_RPROCS' macro.
The default configuration is to use the MCU R5F in Split mode, so both
the R5F Core0 and Core1 are started before loading and booting the Linux
kernel using the following firmware:
MCU R5FSS0 Core0 (Split) : 0 /lib/firmware/am65x-mcu-r5f0_0-fw
MCU R5FSS0 Core1 (Split) : 1 /lib/firmware/am65x-mcu-r5f0_1-fw
The MCU R5FSS was initially running the R5 SPL in LockStep mode with ATCM
disabled, and is actually shutdown to enable it to be reconfigured and
booted by either A53 U-Boot or Linux kernel in remoteproc mode and using
ATCM.
The MCU R5FSS would need to be reconfigured for Lockstep mode through
DT if a fault-tolerant/safety application were to be run on the cluster
with the DEFAULT_RPROCS macro updated to remove the Core1 firmware.
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Suman Anna [Wed, 4 Sep 2019 10:31:43 +0000 (16:01 +0530)]
env: ti: j721e-evm: Add support to boot rprocs including R5Fs and DSPs
Add support to boot some remoteprocs at U-boot prompt on the J721E EVM
boards by using the 'boot_rprocs' and other env variables defined in the
common environment file k3_rproc.h, and updating the 'DEFAULT_RPROCS'
macro.
The list of R5F cores to be started before loading and booting the Linux
kernel are as follows, and in this order:
Main R5FSS0 (Split) Core1 : 3 /lib/firmware/j7-main-r5f0_1-fw
Main R5FSS1 (LockStep) : 4 /lib/firmware/j7-main-r5f1_0-fw
The MCU R5FSS0 and Main R5FSS1 are currently in LockStep mode, so the
equivalent Core1 rprocs (rproc #1 and #5) are not included. The Main
R5FSS0 Core0 (rproc #2) is already started by R5 SPL, so is not included
in the list either.
The DSP cores are started in the following order before loading and
booting the Linux kernel:
C66_0: 6 /lib/firmware/j7-c66_0-fw
C66_1: 7 /lib/firmware/j7-c66_1-fw
C71_0: 8 /lib/firmware/j7-c71_0-fw
The order of the rprocs to boot can be changed at runtime if desired by
overwriting the 'rproc_fw_binaries' environment variable at U-boot prompt.
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Suman Anna [Wed, 4 Sep 2019 10:31:42 +0000 (16:01 +0530)]
env: ti: k3_rproc: Add common rproc environment variables
Add a new file include/environment/ti/k3_rproc.h that defines
common environment variables useful for booting various remote
processors from U-Boot. This file is expected to be included in
the board config files with the EXTRA_ENV_RPROC_SETTINGS added
to CONFIG_EXTRA_ENV_SETTINGS and DEFAULT_RPROCS macro overwritten
to include the actual list of processors to be booted.
The 'boot_rprocs' variable just needs to be added to the board's
bootcmd to automatically boot the processors, and runtime control
can be achieved through the 'dorprocboot' variable.
The variables are currently defined to use MMC as the boot media,
and can be expanded in the future to include other boot media.
The immediate usage is intended for K3 J721E SoCs.
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Signed-off-by: Suman Anna <s-anna@ti.com>
Suman Anna [Wed, 4 Sep 2019 10:31:41 +0000 (16:01 +0530)]
arm: dts: k3-am65-mcu: Add MCU domain R5F DT nodes
The AM65x SoCs has a single dual-core Arm Cortex-R5F processor
subsystem/cluster (MCU_R5FSS0) within the MCU domain. This cluster
can be configured at boot time to be either run in a LockStep mode
or in an Asymmetric Multi Processing (AMP) fashion in Split-mode.
This subsystem has 64 KB each Tightly-Coupled Memory (TCM) internal
memories for each core split between two banks - ATCM and BTCM
(further interleaved into two banks). There are some IP integration
differences from standard Arm R5 clusters such as the absence of
an ACP port, presence of an additional TI-specific Region Address
Translater (RAT) module for translating 32-bit CPU addresses into
larger system bus addresses etc.
Add the DT node for the MCU domain R5F cluster/subsystem, the two
R5 cores are added as child nodes to the main cluster/subsystem node.
The cluster is configured to run in Split-mode by default, with the
ATCMs enabled to allow the R5 cores to execute code from DDR with
boot-strapping code from ATCM. The inter-processor communication
between the main A72 cores and these processors is achieved through
shared memory and Mailboxes.
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Lokesh Vutla [Wed, 4 Sep 2019 10:31:40 +0000 (16:01 +0530)]
arm: dts: k3-j721e-main: Add C71x DSP node
The J721E SoCs have a single TMS320C71x DSP Subsystem in the MAIN
voltage domain containing the next-generation C711 CPU core. The
subsystem has 32 KB of L1D configurable SRAM/Cache and 512 KB of
L2 configurable SRAM/Cache. This subsystem has a CMMU but is not
used currently. The inter-processor communication between the main
A72 cores and the C711 processor is achieved through shared memory
and a Mailbox. Add the DT node for this DSP processor sub-system
in the common k3-j721e-main.dtsi file.
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Lokesh Vutla [Wed, 4 Sep 2019 10:31:39 +0000 (16:01 +0530)]
arm: dts: k3-j721e-main: Add C66x DSP nodes
The J721E SoCs have two TMS320C66x DSP Core Subsystems (C66x CorePacs)
in the MAIN voltage domain, each with a C66x Fixed/Floating-Point DSP
Core, and 32 KB of L1P & L1D configurable SRAMs/Cache and an additional
288 KB of L2 configurable SRAM/Cache. These subsystems do not have
an MMU but contain a Region Address Translator (RAT) sub-module for
translating 32-bit processor addresses into larger bus addresses.
The inter-processor communication between the main A72 cores and
these processors is achieved through shared memory and Mailboxes.
Add the DT nodes for these DSP processor sub-systems in the common
k3-j721e-main.dtsi file.
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Lokesh Vutla [Wed, 4 Sep 2019 10:31:38 +0000 (16:01 +0530)]
arm: dts: k3-j721e-main: Add MAIN domain R5F cluster nodes
The J721E SoCs have 3 dual-core Arm Cortex-R5F processor (R5FSS)
subsystems/clusters. One R5F cluster (MCU_R5FSS0) is present within
the MCU domain, and the remaining two clusters are present in the
MAIN domain (MAIN_R5FSS0 & MAIN_R5FSS1). Each of these can be
configured at boot time to be either run in a LockStep mode or in
an Asymmetric Multi Processing (AMP) fashion in Split-mode. These
subsystems have 64 KB each Tightly-Coupled Memory (TCM) internal
memories for each core split between two banks - ATCM and BTCM
(further interleaved into two banks). There are some IP integration
differences from standard Arm R5 clusters such as the absence of
an ACP port, presence of an additional TI-specific Region Address
Translater (RAT) module for translating 32-bit CPU addresses into
larger system bus addresses etc.
Add the DT nodes for these two MAIN domain R5F cluster/subsystems,
the two R5 cores are each added as child nodes to the corresponding
main cluster node. Configure SS0 in split mode an SS1 in lockstep mode,
with the ATCMs enabled to allow the R5 cores to execute code from DDR
with boot-strapping code from ATCM.
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Lokesh Vutla [Wed, 4 Sep 2019 10:31:37 +0000 (16:01 +0530)]
arm: dts: k3-j721e-mcu: Add MCU domain R5F cluster node
The J721E SoCs have 3 dual-core Arm Cortex-R5F processor (R5FSS)
subsystems/clusters. One R5F cluster (MCU_R5FSS0) is present within
the MCU domain, and the remaining two clusters are present in the
MAIN domain (MAIN_R5FSS0 & MAIN_R5FSS1). Each of these can be
configured at boot time to be either run in a LockStep mode or in
an Asymmetric Multi Processing (AMP) fashion in Split-mode. These
subsystems have 64 KB each Tightly-Coupled Memory (TCM) internal
memories for each core split between two banks - ATCM and BTCM
(further interleaved into two banks). There are some IP integration
differences from standard Arm R5 clusters such as the absence of
an ACP port, presence of an additional TI-specific Region Address
Translater (RAT) module for translating 32-bit CPU addresses into
larger system bus addresses etc.
Add the DT node for the MCU domain R5F cluster/subsystem, the two
R5 cores are added as child nodes to the main cluster/subsystem node.
The cluster is configured to run in LockStep mode by default, with the
ATCMs enabled to allow the R5 cores to execute code from DDR with
boot-strapping code from ATCM. The inter-processor communication
between the main A72 cores and these processors is achieved through
shared memory and Mailboxes.
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Lokesh Vutla [Wed, 4 Sep 2019 10:31:36 +0000 (16:01 +0530)]
remoteproc: Introduce K3 C66 and C71 remoteproc driver
Certain SoCs with K3 architecture have integrated a C66 Corepac DSP
subsystem and an advanced C71 DSPs. Introduce a remoteproc driver
that that does take care of loading an elf to any of the specified
DSPs and start it.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Suman Anna <s-anna@ti.com>
Suman Anna [Wed, 4 Sep 2019 10:31:35 +0000 (16:01 +0530)]
dt-bindings: remoteproc: Add bindings for DSP C66x clusters on TI K3 SoCs
Some Texas Instruments K3 family of SoCs have one of more Digital Signal
Processor (DSP) subsystems that are comprised of either a TMS320C66x
CorePac and/or a next-generation TMS320C71x CorePac processor subsystem.
Add the device tree bindings document for the C66x DSP devices on these
SoCs. The added example illustrates the DT nodes for the first C66x DSP
device present on the K3 J721E family of SoCs.
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Lokesh Vutla [Wed, 4 Sep 2019 10:31:34 +0000 (16:01 +0530)]
remoteproc: Introduce K3 remoteproc driver for R5F subsystem
SoCs with K3 architecture have an integrated Arm Cortex-R5F subsystem
that is comprised of dual-core Arm Cortex-R5F processor cores. This R5
subsytem can be configured at boot time to be either run in a LockStep
mode or in an Asymmetric Multi Processing (AMP) fashion in Split-mode.
This subsystem has each Tightly-Coupled Memory (TCM) internal memories
for each core split between two banks - TCMA and TCMB.
Add a remoteproc driver to support this subsystem to be able to load
and boot the R5 cores primarily in LockStep mode or split mode.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Suman Anna <s-anna@ti.com>
Suman Anna [Wed, 4 Sep 2019 10:31:33 +0000 (16:01 +0530)]
dt-bindings: remoteproc: Add bindings for R5F subsystem on TI K3 SoCs
The Texas Instruments K3 family of SoCs have one of more dual-core
Arm Cortex R5F processor subsystems/clusters (R5FSS). Add the device
tree bindings document for these R5F subsystem devices. These R5F
processors do not have an MMU, and so require fixed memory carveout
regions matching the firmware image addresses. The nodes require more
than one memory region, with the first memory region used for DMA
allocations at runtime. The remaining memory regions are reserved
and are used for the loading and running of the R5F remote processors.
The added example illustrates the DT nodes for the single R5FSS device
present on K3 AM65x family of SoCs.
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Lokesh Vutla [Wed, 4 Sep 2019 10:31:32 +0000 (16:01 +0530)]
remoteproc: tisci_proc: Add helper api for controlling core power domain
Power domain for the remote cores needs to be handled in a right
sequence as mandated by the spec. Introduce tisci helper apis
that can control power-domains of remote cores. TISCI clients
can use this api and control the remote cores power domain instead
of hooking it to power-domain layer.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Lokesh Vutla [Wed, 4 Sep 2019 10:31:31 +0000 (16:01 +0530)]
remoteproc: elf_loader: Introduce rproc_elf_get_boot_addr() api
Introduce rproc_elf_get_boot_addr() that returns the entry point of
the elf file. This api auto detects the 64/32 bit elf file and returns
the boot addr accordingly.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Lokesh Vutla [Wed, 4 Sep 2019 10:31:30 +0000 (16:01 +0530)]
remoteproc: elf_loader: Introduce a common elf loader and checker functions
Introduce a common remoteproc elf loader and checker functions that
automatically detects the 64 bit elf file or 32 bit elf file and
loads/checks the sections accordingly.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Fabien Dessenne <fabien.dessenne@st.com>
Lokesh Vutla [Wed, 4 Sep 2019 10:31:29 +0000 (16:01 +0530)]
remoteproc: elf-loader: Add 64 bit elf loading support
The current rproc-elf-loader supports loading of only 32 bit elf files.
Introduce support for loading of 64 bit elf files in rproc-elf-loader.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Fabien Dessenne <fabien.dessenne@st.com>
Lokesh Vutla [Wed, 4 Sep 2019 10:31:28 +0000 (16:01 +0530)]
remoteproc: elf_loader: Always check the validity of the image before loading
rproc_elf32_load_image() rely on user to send a valid address for elf loading.
Instead do a sanity check on the address passed by user. This will help
all rproc elf users to not call sanity_check explicitly before calling
elf_loading.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Fabien Dessenne <fabien.dessenne@st.com>
Lokesh Vutla [Wed, 4 Sep 2019 10:31:27 +0000 (16:01 +0530)]
remoteproc: ops: Add elf section size as input parameter to device_to_virt api
Introduce a new parameter "size" that accepts size of the region to
remoteproc ops callback device_to_virt(). This can enforce more checks
on the region that device_to_virt() is dealing with.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Tested-by: Fabien Dessenne <fabien.dessenne@st.com>
Reviewed-by: Fabien Dessenne <fabien.dessenne@st.com>
Lokesh Vutla [Wed, 4 Sep 2019 10:31:26 +0000 (16:01 +0530)]
dm: core: Add a function to count the children of a device
Add a function to count the available children of a device.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Andreas Dannenberg [Thu, 15 Aug 2019 20:55:32 +0000 (15:55 -0500)]
board: ti: am65x: Add UART boot procedure in README
am65x ROM support booting over UART. And U-Boot built for am65x EVM
supports UART boot as well. Add the UART boot procedure into the README
also providing a corresponding example command sequence for execution
on a host PC.
Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
Andreas Dannenberg [Thu, 15 Aug 2019 20:55:31 +0000 (15:55 -0500)]
configs: am65x_evm_r5: Activate early console functionality
Activate early console functionality on AM654x devices to allow for an
alternate serial port to be used to support UART-based boot. This is so
that System Firmware (SYSFW) can get loaded over the serial port prior
to the main console being brought up and made available.
Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
Andreas Dannenberg [Thu, 15 Aug 2019 20:55:30 +0000 (15:55 -0500)]
armv7R: dts: k3: am654: Add MCU_UART0 related definitions
Although we currently use the MAIN_UART0 for R5 SPL console output there
are cases where we require access to the MCU_UART0 as well for example in
case of UART-based Y-Modem boot. To support these scenarios add related
DTS definitions to be able to use that UART early on.
Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
Andreas Dannenberg [Thu, 15 Aug 2019 20:55:29 +0000 (15:55 -0500)]
arm: K3: sysfw-loader: Allow loading SYSFW via Y-Modem
In order to allow booting TI K3 family SoCs via Y-Modem add support for
loading System Firmware by tapping into the associated SPL core loader
function.
In this context also make sure a console is available and if not go
ahead and activate the early console feature which allows bringing up
an alternate full console before the main console is activated. Such
an alternate console is typically setup in a way that the associated
UART can be fully initialized prior to SYSFW services being available.
Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
Andreas Dannenberg [Thu, 15 Aug 2019 20:55:28 +0000 (15:55 -0500)]
arm: K3: common: Allow for early console functionality
Implement an early console functionality in SPL that can be used before
the main console is being brought up. This helps in situations where the
main console is dependent on System Firmware (SYSFW) being up and running,
which is usually not the case during the very early stages of boot. Using
this early console functionality will allow for an alternate serial port
to be used to support things like UART-based boot and early diagnostic
messages until the main console is ready to get activated.
Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
Andreas Dannenberg [Thu, 15 Aug 2019 20:55:27 +0000 (15:55 -0500)]
spl: ymodem: Make SPL Y-Modem loader framework accessible
Expose SPL's Y-Modem core loader function via the common SPL header
file so it can be re-used for purposes other than loading U-Boot itself.
Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
Andreas Dannenberg [Thu, 15 Aug 2019 20:55:26 +0000 (15:55 -0500)]
spl: ymodem: Fix FIT loading termination handling
During FIT reading through ymodem_read_fit() the function
xyzModem_stream_read() is being used which returns zero once the end
of a stream has been reached. This could lead to an premature exit from
ymodem_read_fit() with certain-sized FIT images reporting that zero
bytes overall were read. Such a premature exit would then result in an
-EIO failure being triggered within the spl_load_simple_fit() caller
function and ultimately lead to a boot failure.
Fix this logic by simply aborting the stream read loops and continuing
with the regular code flow which ultimately would lead to returning
the number of bytes to be read ('size') as expected by the callers of
ymodem_read_fit().
Fixes:
fa715193c083 ("spl: Add an option to load a FIT containing U-Boot from UART")
Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
Bin Meng [Thu, 3 Oct 2019 02:07:29 +0000 (19:07 -0700)]
binman: Use qemu-x86_defconfig in the example
The doc currently uses sandbox_defconfig as examples of enabling
debug/verbose output of binman. However during a sandbox build it
does not call binman at all. Change it to qemu-x86_defconfig.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Simon Glass [Wed, 25 Sep 2019 15:00:31 +0000 (09:00 -0600)]
x86: Reduce resetvec size
At present this produces a 16-byte file. It is intended to start 16 bytes
before the end of ROM and pads with zeroes to readh the end.
But binman sometimes wants to add an image-header at the very end of ROM.
Furthermore binman automatically pads the data if it is finishes early.
Drop the padding in resetvec and let binman handle it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>