Sander de Smalen [Fri, 22 Jan 2021 17:34:10 +0000 (17:34 +0000)]
NFC: Change getTypeBasedIntrinsicCost to return InstructionCost
This patch migrates the TTI cost interfaces to return an InstructionCost.
See this patch for the introduction of the type: https://reviews.llvm.org/D91174
See this thread for context: http://lists.llvm.org/pipermail/llvm-dev/2020-November/146408.html
Depends on D97466
Reviewed By: dmgreen
Differential Revision: https://reviews.llvm.org/D97468
Max Kazantsev [Wed, 31 Mar 2021 11:20:19 +0000 (18:20 +0700)]
[Test] Auto-update test checks
Muhammad Omair Javaid [Wed, 31 Mar 2021 12:10:03 +0000 (17:10 +0500)]
Revert "[LLDB] Arm64/Linux Add MTE and Pointer Authentication registers"
This reverts commit
1164b4e2957290e814c3dd781a68e504dd39148e.
Reason: LLDB AArch64 Linux buildbot failure
Muhammad Omair Javaid [Wed, 31 Mar 2021 12:08:07 +0000 (17:08 +0500)]
Revert "[LLDB] Arm64/Linux test case for MTE and Pointer Authentication regset"
This reverts commit
9ab677180091a690cd99d4ac55d5fb9e1149b1ec.
Reason: LLDB AArch64/Linux buildbot failure.
Liqiang Tao [Wed, 31 Mar 2021 11:52:58 +0000 (19:52 +0800)]
[InlineCost] Remove TODO comment that consider other forms of savings in the cost-benefit analysis
Attempts to compute savings more accurately cannot impact the set of critically important call sites.
Reviewed By: kazu
Differential Revision: https://reviews.llvm.org/D98577
Roman Lebedev [Wed, 31 Mar 2021 11:14:13 +0000 (14:14 +0300)]
[X86] AMD Zen 3 has macro fusion
This is an improvement over Zen 2, where only branch fusion is supported,
as per Agner, 21.4 Instruction fusion.
AMD SOG 17h has no mention of fusion.
AMD SOG 19h, 2.9.3 Branch Fusion
The following flag writing instructions support branch fusion
with their reg/reg, reg/imm and reg/mem forms
* CMP
* TEST
* SUB
* ADD
* INC (no fusion with branches dependent on CF)
* DEC (no fusion with branches dependent on CF)
* OR
* AND
* XOR
Agner, 22.4 Instruction fusion
<...> This applies to CMP, TEST, ADD, SUB, AND, OR, XOR, INC, DEC and
all conditional jumps, except if the arithmetic or logic instruction has a rip-relative address or
both an address displacement and an immediate operand.
Balazs Benics [Wed, 31 Mar 2021 10:47:37 +0000 (12:47 +0200)]
[ASTImporter][NFC] Fix duplicated symbols in "Improve test coverage"
D99576 introduced a duplicate symbol, now im removing it.
Differential Revision: https://reviews.llvm.org/D99576
Fraser Cormack [Tue, 30 Mar 2021 13:49:25 +0000 (14:49 +0100)]
[RISCV] Add support for the stepvector intrinsic
This adds almost everything required for supporting the new stepvector
intrinsic on RVV. It is lowered to the existing VID_VL SDNode.
The only exception is a limitation that RV32 cannot yet lower the
intrinsic on i64 vectors. This is because the step operand is
(currently) required to be at least as large as the vector element type.
I will look into patching that out and loosening the requirement to only
an integer pointer type.
Reviewed By: craig.topper
Differential Revision: https://reviews.llvm.org/D99594
Muhammad Omair Javaid [Wed, 31 Mar 2021 09:36:38 +0000 (14:36 +0500)]
Revert "[LLDB] Skip TestVSCode_disconnect.test_launch arm/linux"
This reverts commit
73cf85e527f69c495daece7c74743b9073d4717c.
Jay Foad [Mon, 1 Mar 2021 17:24:57 +0000 (17:24 +0000)]
[AMDGPU][GlobalISel] Add support for global atomicrmw fadd
This includes gfx908 which only has a no-return version of the
global_atomic_add_f32 instruction, using the same hack that was
previously implemented for selecting from the
llvm.amdgcn.global.atomic.fadd intrinsic.
Differential Revision: https://reviews.llvm.org/D97767
Balazs Benics [Wed, 31 Mar 2021 10:10:23 +0000 (12:10 +0200)]
[ASTImporter][NFC] Improve test coverage
All three cases were imported correctly.
For BlockDecls, correctly means that we don't support importing them, thus an
error is the expected behaviour.
- BlockDecls were not yet covered. I know that they are not imported but the
test at least documents it.
- Default values for ParmVarDecls were also uncovered.
- Importing bitfield FieldDecls were imported correctly.
Reviewed By: martong, shafik
Differential Revision: https://reviews.llvm.org/D99576
Florian Hahn [Wed, 31 Mar 2021 08:38:12 +0000 (09:38 +0100)]
[AArch64] Avoid SCALAR_TO_VECTOR for single FP constant vector.
Currently the code only checks for integer constants (ConstantSDNode)
and triggers an infinite cycle for single-element floating point
vector constants. We need to check for both FP and integer constants.
Reviewed By: t.p.northover
Differential Revision: https://reviews.llvm.org/D99384
Sander de Smalen [Wed, 20 Jan 2021 17:17:23 +0000 (17:17 +0000)]
NFC: Change getUserCost to return InstructionCost
This patch migrates the TTI cost interfaces to return an InstructionCost.
See this patch for the introduction of the type: https://reviews.llvm.org/D91174
See this thread for context: http://lists.llvm.org/pipermail/llvm-dev/2020-November/146408.html
Depends on D97382
Reviewed By: ctetreau, paulwalker-arm
Differential Revision: https://reviews.llvm.org/D97466
Balázs Kéri [Wed, 31 Mar 2021 08:36:06 +0000 (10:36 +0200)]
[clang][Checkers] Extend PthreadLockChecker state dump (NFC).
Add printing of map 'DestroyRetVal'.
Reviewed By: steakhal
Differential Revision: https://reviews.llvm.org/D98502
Matthias Springer [Wed, 31 Mar 2021 05:59:30 +0000 (14:59 +0900)]
[mlir] Change vector.transfer_read/write "masked" attribute to "in_bounds".
This is in preparation for adding a new "mask" operand. The existing "masked" attribute was used to specify dimensions that may be out-of-bounds. Such transfers can be lowered to masked load/stores. The new "in_bounds" attribute is used to specify dimensions that are guaranteed to be within bounds. (Semantics is inverted.)
Differential Revision: https://reviews.llvm.org/D99639
Sven van Haastregt [Wed, 31 Mar 2021 08:54:18 +0000 (09:54 +0100)]
[OpenCL] Limit popcount to OpenCL 1.2 and above
s6.15.3 of the OpenCL C Specification v3.0.6 states that OpenCL 1.2 or
newer is required.
Alex Richardson [Wed, 31 Mar 2021 08:24:03 +0000 (09:24 +0100)]
[TableGen] Emit more helpful error messages on empty type set
I have seen this error quite frequently in our out-of-tree CHERI backends
and the lack of location information sometimes makes it quite difficult
to track down the actual source of the error.
This patch changes the llvm_unreachable() to a PrintFatalError() so that
tablegen prints a stack of source locations.
Reviewed By: craig.topper
Differential Revision: https://reviews.llvm.org/D99468
Alex Richardson [Wed, 31 Mar 2021 08:17:39 +0000 (09:17 +0100)]
[asan] Remove FreeBSD XFAIL from asan-sigbus.cpp test
This test passes for me on FreeBSD 12.2 and was probably fixed by
https://svnweb.freebsd.org/base?view=revision&revision=352807.
Reviewed By: emaste
Differential Revision: https://reviews.llvm.org/D98281
Alex Richardson [Wed, 31 Mar 2021 08:15:22 +0000 (09:15 +0100)]
[WebAssembly] Fix incorrect DW_TAG_pointer_type size in test
It should be 64 bits not 32 for wasm64-unknown-unknown. I noticed this
because this test was failing in our CHERI fork of LLVM due to a larger
.debug_abbrev section size. It turns out this happens because we add
DW_AT_byte_size for non-default pointer sizes to allow debugging our
hybrid compilation mode where we can have two different kinds of pointers.
Reviewed By: aardappel
Differential Revision: https://reviews.llvm.org/D99410
Nicolas Vasilache [Tue, 30 Mar 2021 11:41:41 +0000 (11:41 +0000)]
[mlir][Linalg][Python] Create the body of builtin named Linalg ops
This revision adds support to properly add the body of registered
builtin named linalg ops.
At this time, indexing_map and iterator_type support is still
missing so the op is not executable yet.
Differential Revision: https://reviews.llvm.org/D99578
Alexander Belyaev [Wed, 31 Mar 2021 07:34:03 +0000 (09:34 +0200)]
Revert "Revert "[mlir] Introduce CloneOp and adapt test cases in BufferDeallocation.""
This reverts commit
883912abe669ef246ada0adc9cf1c9748b742400.
Craig Topper [Wed, 31 Mar 2021 05:47:25 +0000 (22:47 -0700)]
[X86] Add test cases for PR48768 and D94856. NFC
This covers the BMI and TBM instructions. More tests will be
needed for other instructions.
Craig Topper [Wed, 31 Mar 2021 05:45:58 +0000 (22:45 -0700)]
[X86] Regenerate test to add missing @PLT
Martin Storsjö [Wed, 24 Mar 2021 07:31:54 +0000 (09:31 +0200)]
[libcxx] [test] Don't add dirs from the LIB env var to PATH
The directories in LIB normally only contain import libraries or
static libraries, no runtime DLLs that would need to be found
while running tests.
This code stems from
1cd196e7b46e49d170a4b4013879a577dee59cb2,
which (among other things) tried to do this:
> * [Test] Fix handling of library runtime search paths by correctly adding them
> to the PATH variable when running the tests.
It's unclear to me exactly what this fixed (or tried to) at the time,
as the LIB var doesn't normally point to runtime libs.
Differential Revision: https://reviews.llvm.org/D99241
Martin Storsjö [Sat, 20 Mar 2021 22:25:57 +0000 (00:25 +0200)]
[libcxx] [test] Fix tests of <cuchar> that unexpectedly succeed on windows
The tests expect that the <cuchar> include should fail. When libc++
is built on top of the MSVC runtime, the header does exist provided
by MSVC. Therefore, just mark the test as unsupported on windows,
to avoid tests that unexpectedly succeed.
Differential Revision: https://reviews.llvm.org/D99096
Jim Lin [Wed, 31 Mar 2021 05:11:41 +0000 (13:11 +0800)]
[RISCV] Refine pre-define macro tests
1. Undefined macro test for rv32i and rv64i.
a. Reorder it with canonical order.
b. Add missing undefined macro check.
c. Append defined value to `__riscv_a`, `__riscv_f` and `__riscv_c` to distinguish with
`__riscv_arch_test`, `__riscv_cmodel_medlow` and `__riscv_float_abi_soft`. They have the same prefix.
2. Move abi macro test below f and d.
3. Unify coding style for newline.
Reviewed By: HsiangKai
Differential Revision: https://reviews.llvm.org/D99631
Lang Hames [Wed, 31 Mar 2021 05:56:41 +0000 (22:56 -0700)]
[JITLink] Delete copy and move constructors for jitlink::Section.
Sections are not movable or copyable.
Stella Laurenzo [Wed, 31 Mar 2021 05:19:10 +0000 (22:19 -0700)]
[mlir] Add C and python API for is_registered_operation.
* Suggested to be broken out of D99578
Differential Revision: https://reviews.llvm.org/D99638
Nathan Chancellor [Wed, 31 Mar 2021 04:08:18 +0000 (21:08 -0700)]
libc: Default LIBC_INSTALL_PREFIX to ${CMAKE_INSTALL_PREFIX}
b22f448c21e718a3b6 added a rule to install libllvmlibc.a to
${LIBC_INSTALL_PREFIX}/${LIBC_INSTALL_LIBRARY_DIR}, which will be /lib
by default, which is disruptive to builds that stay within a user's
/home holder:
$ ninja install
...
-- Installing: /lib/libllvmlibc.a
CMake Error at projects/libc/lib/cmake_install.cmake:54 (file):
file INSTALL cannot copy file
"/home/nathan/cbl/github/tc-build/build/llvm/stage1/projects/libc/lib/libllvmlibc.a"
to "/lib/libllvmlibc.a": Permission denied.
Call Stack (most recent call first):
projects/libc/cmake_install.cmake:51 (include)
projects/cmake_install.cmake:47 (include)
cmake_install.cmake:76 (include)
...
Change LIBC_INSTALL_PREFIX's default value to ${CMAKE_INSTALL_PREFIX} so
that 'ninja install' does not attempt to install anything outside of the
user's requested installation location.
Differential Revision: https://reviews.llvm.org/D99636
Reviewed By: sivachandra
Signed-off-by: Nathan Chancellor <nathan@kernel.org>
Lang Hames [Wed, 31 Mar 2021 03:56:03 +0000 (20:56 -0700)]
[JITLink] Switch from StringRef to ArrayRef<char>, add some generic x86-64 utils
Adds utilities for creating anonymous pointers and jump stubs to x86_64.h. These
are used by the GOT and Stubs builder, but may also be used by pass writers who
want to create pointer stubs for indirection.
This patch also switches the underlying type for LinkGraph content from
StringRef to ArrayRef<char>. This avoids any confusion when working with buffers
that contain null bytes in the middle like, for example, a newly added null
pointer content array. ;)
Chuanqi Xu [Wed, 31 Mar 2021 02:34:55 +0000 (10:34 +0800)]
[Coroutine] [Debug] Insert dbg.declare to entry.resume to print alloca in the coroutine frame under O2
Summary: Try to insert dbg.declare to entry.resume basic block in resume
function. In this way, we could print alloca such as __promise in
gdb/lldb under O2, which would be beneficial to debug coroutine program.
Test Plan: check-llvm
Reviewed by: aprantl
Differential Revision: https://reviews.llvm.org/D96938
Zhiwei Chen [Wed, 31 Mar 2021 02:32:29 +0000 (19:32 -0700)]
[Utils][Emacs] Improve syntax highlight
Reviewed By: MaskRay
Differential Revision: https://reviews.llvm.org/D99404
Fangrui Song [Wed, 31 Mar 2021 02:27:10 +0000 (19:27 -0700)]
[SimpleLoopUnswitch] Fix -Wunused-variable in -DLLVM_ENABLE_ASSERTIONS=off builds after
431a40e1e28f181e87dd247b91a5e6872dd64ab4
Craig Topper [Wed, 31 Mar 2021 02:00:28 +0000 (19:00 -0700)]
[RISCV] simm12_plus1 should not inherit from Operand. NFC
We only use this in Pat patterns, so it just needs to be an
ImmLeaf. If we did need it as an instruction operand, the
ParserMatchClass, EncoderMethod, and DecoderMethod were probably wrong.
Yang Fan [Wed, 31 Mar 2021 01:56:31 +0000 (09:56 +0800)]
[GlobalISel] Fix Wint-in-bool-context warning (NFC)
GCC warning:
```
/llvm-project/llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp: In member function ‘bool llvm::CombinerHelper::matchFunnelShiftToRotate(llvm::MachineInstr&)’:
/llvm-project/llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp:3882:35: warning: ?: using integer constants in boolean context, the expression will always evaluate to ‘true’ [-Wint-in-bool-context]
3882 | Opc == TargetOpcode::G_FSHL ? TargetOpcode::G_ROTL : TargetOpcode::G_ROTR;
| ~~~~~~~~~~~~~~~~~~~~~~~~~~~~^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
```
Craig Topper [Wed, 31 Mar 2021 01:54:07 +0000 (18:54 -0700)]
[RISCV] Remove some unused ImmLeafs. NFC
These got left behind when we switched RV32 to use selectImm to
match RV64.
Juneyoung Lee [Wed, 31 Mar 2021 01:34:46 +0000 (10:34 +0900)]
[LoopUnswitch] Assert that branch condition is either and/or but not both
as suggested at https://reviews.llvm.org/rG5bb38e84d3d0#986321
Ta-Wei Tu [Wed, 31 Mar 2021 01:05:24 +0000 (09:05 +0800)]
[clang][Sema] Don't try to initialize implicit variable of invalid anonymous union/struct
This fixes https://bugs.llvm.org/show_bug.cgi?id=49534, where the call to the constructor
of the anonymous union is checked and triggers assertion failure when trying to retrieve
the alignment of the `this` argument (which is a union with virtual function).
The extra check for alignment was introduced in D97187.
Reviewed By: tmatheson
Differential Revision: https://reviews.llvm.org/D98548
Walter Erquinigo [Wed, 31 Mar 2021 00:53:57 +0000 (17:53 -0700)]
Fix errors in
0b69756110db444282c40ea16929186b2910c3b1
Errors found in
https://lab.llvm.org/buildbot/#/builders/68/builds/9681/steps/6/logs/stdio
Lang Hames [Wed, 31 Mar 2021 00:53:59 +0000 (17:53 -0700)]
[JITLink] Add a setProtectionFlags method to jitlink::Section.
This allows clients to modify the memory protection settings on sections via
jitlink passes. This can be used to, for example, override the default settings
on text pages and make them Read/Write/Executable under the JIT.
Richard Smith [Wed, 31 Mar 2021 00:47:47 +0000 (17:47 -0700)]
Fix test expectations for %diff documentation.
Craig Topper [Tue, 30 Mar 2021 23:43:12 +0000 (16:43 -0700)]
[StructLayout] Use TrailingObjects to allocate space for MemberOffsets.
MemberOffsets are stored at the end of StructLayout. The class
contains a single entry array to mark the start of the member
offsets. getStructLayout calculates the additional space needed
for additional elements before allocating memory.
This patch converts this to use TrailingObjects. This simplifies
the size computation in getStructLayout and gets rid of the
single entry array.
This is prep work, but to use TypeSize instead of uint64_t for
D98169. The single entry array doesn't work with TypeSize because
TypeSize doesn't have a default constructor. We thought this
change was an improvement by itself so we've separated it out.
Reviewed By: mehdi_amini
Differential Revision: https://reviews.llvm.org/D99608
Nico Weber [Wed, 31 Mar 2021 00:30:36 +0000 (20:30 -0400)]
Reland "[gn build] port 48e4b0f (__config_site)"
This reverts commit
13aff21f0da7007c42d407b4ec5c1f6b24cb6831,
since the CMake part relanded in
c06a8f9caa51c7ea7.
The GN part is a bit simpler than last time due to the
prior simplifications in
acea470c167fc40.
Walter Erquinigo [Mon, 9 Nov 2020 21:36:26 +0000 (13:36 -0800)]
[trace][intel-pt] Implement trace start and trace stop
This implements the interactive trace start and stop methods.
This diff ended up being much larger than I anticipated because, by doing it, I found that I had implemented in the beginning many things in a non optimal way. In any case, the code is much better now.
There's a lot of boilerplate code due to the gdb-remote protocol, but the main changes are:
- New tracing packets: jLLDBTraceStop, jLLDBTraceStart, jLLDBTraceGetBinaryData. The gdb-remote packet definitions are quite comprehensive.
- Implementation of the "process trace start|stop" and "thread trace start|stop" commands.
- Implementaiton of an API in Trace.h to interact with live traces.
- Created an IntelPTDecoder for live threads, that use the debugger's stop id as checkpoint for its internal cache.
- Added a functionality to stop the process in case "process tracing" is enabled and a new thread can't traced.
- Added tests
I have some ideas to unify the code paths for post mortem and live threads, but I'll do that in another diff.
Differential Revision: https://reviews.llvm.org/D91679
Richard Smith [Wed, 31 Mar 2021 00:21:31 +0000 (17:21 -0700)]
[www] List both the regular and expanded form of %diff in the
diagnostics reference.
In passing, properly validate and diagnose errors in %diff format
specifiers.
Muhammad Omair Javaid [Tue, 30 Mar 2021 10:39:38 +0000 (15:39 +0500)]
[LLDB] Arm64/Linux test case for MTE and Pointer Authentication regset
This patch adds a test case to test AArch64 dynamic register sets.
This tests for the availability of certain register sets and query
their registers accordingly.
Reviewed By: labath, DavidSpickett
Differential Revision: https://reviews.llvm.org/D96463
Muhammad Omair Javaid [Tue, 30 Mar 2021 10:39:38 +0000 (15:39 +0500)]
[LLDB] Arm64/Linux Add MTE and Pointer Authentication registers
This patch adds two new dynamic register sets for AArch64 MTE and
Pointer Authentication features. These register sets are dynamic and
will only be available if underlying hardware support either of these
features. LLDB will pull in Aux vector information and create register
infos based on that information.
A follow up patch will add a test case to test these feature registers.
Reviewed By: labath, DavidSpickett
Differential Revision: https://reviews.llvm.org/D96460
Muhammad Omair Javaid [Tue, 30 Mar 2021 10:39:32 +0000 (15:39 +0500)]
[LLDB] Add support for Arm64/Linux dynamic register sets
This is patch adds support for adding dynamic register sets for
AArch64 dynamic features in LLDB. AArch64 has optional features like
SVE, Pointer Authentication and MTE which means LLDB needs to decide
at run time which registers it needs to pull in for the current
executable based on underlying support for a certain feature.
This patch makes necessary adjustments to make way for dynamic
register infos and dynamic register sets.
Reviewed By: labath
Differential Revision: https://reviews.llvm.org/D96458
Heejin Ahn [Tue, 30 Mar 2021 19:57:20 +0000 (12:57 -0700)]
[WebAssembly] Encode numbers in ULEB128 in event section
The number of events and the type index should be encoded in ULEB128,
but they were incorrctly encoded in LEB128. The smallest number with
which its LEB128 and ULEB128 encodings are different is 64.
There's no way we can generate 64 events in the C++ toolchain
implementation so we can't test that, but the attached test tests when
the type index is 64.
Reviewed By: dschuff
Differential Revision: https://reviews.llvm.org/D99627
Richard Smith [Tue, 30 Mar 2021 23:17:32 +0000 (16:17 -0700)]
Delete checked-in generated copy of diagnostic reference.
The documentation build rule will generate an up-to-date version of this
if it's not checked in.
Richard Smith [Tue, 30 Mar 2021 23:17:09 +0000 (16:17 -0700)]
[www] Fix build of attribute documentation.
Richard Smith [Tue, 30 Mar 2021 23:10:32 +0000 (16:10 -0700)]
Fix pluralization error in diagnostic, and move C++ testcase to proper
directory.
Zequan Wu [Tue, 30 Mar 2021 18:02:27 +0000 (11:02 -0700)]
[lld-link] Enable addrsig table in COFF lto
This allow safe-icf mode to work when linking with LTO.
Differential Revision: https://reviews.llvm.org/D99613
Richard Smith [Tue, 30 Mar 2021 22:20:33 +0000 (15:20 -0700)]
[www] Color Clang 11 and Clang 12 features as green and not yellow, and
Clang 13 features as yellow not green.
Mehdi Amini [Tue, 30 Mar 2021 21:11:02 +0000 (21:11 +0000)]
Fix deletion of operations through the rewriter in a pattern matching a consumer operation
This allows for the conversion to match `A(B()) -> C()` with a pattern matching
`A` and marking `B` for deletion.
Also add better assertions when an operation is erased while still having uses.
Differential Revision: https://reviews.llvm.org/D99442
Greg McGary [Tue, 30 Mar 2021 00:19:29 +0000 (17:19 -0700)]
[lld-macho][NFC] Drop unnecessary macho:: namespace prefix on unambiguous references to Symbol
Within `lld/macho/`, only `InputFiles.cpp` and `Symbols.h` require the `macho::` namespace qualifier to disambiguate references to `class Symbol`.
Add braces to outer `for` of a 5-level single-line `if`/`for` nest.
Differential Revision: https://reviews.llvm.org/D99555
Wei Mi [Mon, 29 Mar 2021 22:04:28 +0000 (15:04 -0700)]
[ThinLTO] During module importing, close one source module before open
another one for distributed mode.
Currently during module importing, ThinLTO opens all the source modules,
collect functions to be imported and append them to the destination module,
then leave all the modules open through out the lto backend pipeline. This
patch refactors it in the way that one source module will be closed before
another source module is opened. All the source modules will be closed after
importing phase is done. It will save some amount of memory when there are
many source modules to be imported.
Note that this patch only changes the distributed thinlto mode. For in
process thinlto mode, one source module is shared acorss different thinlto
backend threads so it is not changed in this patch.
Differential Revision: https://reviews.llvm.org/D99554
Jon Roelofs [Tue, 30 Mar 2021 21:29:35 +0000 (14:29 -0700)]
[docs] Fix up dead clang-format links after monorepo move. NFC
Mike Rice [Tue, 23 Mar 2021 01:13:29 +0000 (18:13 -0700)]
[OPENMP51]Initial support for the dispatch directive.
Added basic parsing/sema/serialization support for dispatch directive.
Differential Revision: https://reviews.llvm.org/D99537
Louis Dionne [Fri, 26 Jun 2020 16:08:59 +0000 (12:08 -0400)]
[libc++] Include <__config_site> from <__config>
Prior to this patch, we would generate a fancy <__config> header by
concatenating <__config_site> and <__config>. This complexifies the
build system and also increases the difference between what's tested
and what's actually installed.
This patch removes that complexity and instead simply installs <__config_site>
alongside the libc++ headers. <__config_site> is then included by <__config>,
which is much simpler. Doing this also opens the door to having different
<__config_site> headers depending on the target, which was impossible before.
It does change the workflow for testing header-only changes to libc++.
Previously, we would run `lit` against the headers in libcxx/include.
After this patch, we run it against a fake installation root of the
headers (containing a proper <__config_site> header). This makes use
closer to testing what we actually install, which is good, however it
does mean that we have to update that root before testing header changes.
Thus, we now need to run `ninja check-cxx-deps` before running `lit` by
hand.
Differential Revision: https://reviews.llvm.org/D97572
David Green [Tue, 30 Mar 2021 20:45:26 +0000 (21:45 +0100)]
[ARM] Add FeatureHasNoBranchPredictor for Thumb1 cores
Mark v6m/v8m-baseline cores as having no branch predictors. This should
not alter very much on its own, but is more correct as the cores do not
have branch predictors and can help in the future.
Alexey Bataev [Tue, 30 Mar 2021 19:53:25 +0000 (12:53 -0700)]
[OPENMP]Fix PR48607: Crash during clang openmp codegen for firstprivate() of `float _Complex`.
Need to cast the argument for the debug wrapper function call to the
corresponding parameter type to avoid crash.
Differential Revision: https://reviews.llvm.org/D99617
Luís Marques [Tue, 30 Mar 2021 20:19:05 +0000 (21:19 +0100)]
[Sanitizer][RISCV][AArch64][Android] Adjust allocator tests
On 64-bit systems with small VMAs (e.g. 39-bit) we can't use
SizeClassAllocator64 parameterized with size class maps containing a large
number of classes, as that will make the allocator region size too small
(< 2^32). Several tests were already disabled for Android because of this.
This patch provides the correct allocator configuration for RISC-V
(riscv64), generalizes the gating condition for tests that can't be enabled
for small VMA systems, and tweaks the tests that can be made compatible with
those systems to enable them.
I think the previous gating on Android should instead be AArch64+Android, so
the patch reflects that.
Differential Revision: https://reviews.llvm.org/D97234
David Blaikie [Tue, 30 Mar 2021 01:04:02 +0000 (18:04 -0700)]
Conditionalize the JIT test dependency
Matheus Izvekov [Mon, 8 Mar 2021 00:09:13 +0000 (01:09 +0100)]
[clang] Use decltype((E)) for compound requirement type constraint
See PR45088.
Compound requirement type constraints were using decltype(E) instead of
decltype((E)), as per `[expr.prim.req]p1.3.3`.
Since neither instantiation nor type dependence should matter for
the constraints, this uses an approach where a `decltype` type is not built,
and just the canonical type of the expression after template instantiation
is used on the requirement.
Signed-off-by: Matheus Izvekov <mizvekov@gmail.com>
Reviewed By: rsmith
Differential Revision: https://reviews.llvm.org/D98160
Fangrui Song [Tue, 30 Mar 2021 19:52:56 +0000 (12:52 -0700)]
[GlobalISel] Fix -Wunused-variable in -DLLVM_ENABLE_ASSERTIONS=off builds after D99463
Sanjay Patel [Tue, 30 Mar 2021 18:33:30 +0000 (14:33 -0400)]
[InstCombine] add fold for demand of low bit of abs()
This is one problem shown in https://llvm.org/PR49763
https://alive2.llvm.org/ce/z/cV6-4K
https://alive2.llvm.org/ce/z/9_3g-L
Sanjay Patel [Tue, 30 Mar 2021 18:29:19 +0000 (14:29 -0400)]
[InstCombine] add test for abs() demanded bits; NFC
Huihui Zhang [Tue, 30 Mar 2021 19:10:44 +0000 (12:10 -0700)]
[VPlan] Use SetVector for VPExternalDefs to prevent non-determinism.
Use SetVector instead of SmallPtrSet for external definitions created for VPlan.
Doing this can help avoid non-determinism caused by iterating over unordered containers.
This bug was found with reverse iteration turning on,
--extra-llvm-cmake-variables="-DLLVM_REVERSE_ITERATION=ON".
Failing LLVM-Unit test VPRecipeTest.dump.
Reviewed By: MaskRay
Differential Revision: https://reviews.llvm.org/D99544
Amara Emerson [Sun, 21 Feb 2021 22:17:03 +0000 (14:17 -0800)]
[GlobalISel] Implement fewerElements legalization for vector reductions.
This patch adds 3 methods, one for power-of-2 vectors which use tree
reductions using vector ops, before a final reduction op. For non-pow-2
types it generates multiple narrow reductions and combines the values with
scalar ops.
Differential Revision: https://reviews.llvm.org/D97163
Amara Emerson [Sun, 28 Mar 2021 07:38:39 +0000 (00:38 -0700)]
[AArch64][GlobalISel] Define some legalization rules for G_ROTR and G_ROTL.
For imported pattern purposes, we have a custom rule that promotes the rotate
amount to 64b as well.
Differential Revision: https://reviews.llvm.org/D99463
Amara Emerson [Wed, 24 Mar 2021 06:54:18 +0000 (23:54 -0700)]
[AArch64][GlobalISel] Combine funnel shifts to rotates.
Differential Revision: https://reviews.llvm.org/D99388
Sourabh Singh Tomar [Wed, 24 Mar 2021 12:24:05 +0000 (17:54 +0530)]
[DebugInfo] Support for signed constants inside DIExpression
Negative numbers are represented using DW_OP_consts along with signed representation
of the number as the argument.
Test case IR is generated using Fortran front-end.
Reviewed By: aprantl
Differential Revision: https://reviews.llvm.org/D99273
Eugene Zhulenev [Fri, 26 Mar 2021 02:49:27 +0000 (19:49 -0700)]
[mlir] Linalg: add tile interchange flag to test-linalg-codegen-strategy pass
Interchange options was missing in the pass flags.
Reviewed By: nicolasvasilache
Differential Revision: https://reviews.llvm.org/D99397
spupyrev [Tue, 30 Mar 2021 17:38:58 +0000 (10:38 -0700)]
[SamplePGO] Keeping prof metadata for IndirectBrInst
Currently prof metadata with branch counts is added only for BranchInst and SwitchInst, but not for IndirectBrInst. As a result, BPI/BFI make incorrect inferences for indirect branches, which can be very hot.
This diff adds metadata for IndirectBrInst, in addition to BranchInst and SwitchInst.
Reviewed By: wmi, wenlei
Differential Revision: https://reviews.llvm.org/D99550
Hongtao Yu [Mon, 29 Mar 2021 17:21:31 +0000 (10:21 -0700)]
[CSSPGO] Top-down processing order based on full profile.
Use profiled call edges to augment the top-down order. There are cases that the top-down order computed based on the static call graph doesn't reflect real execution order. For example:
1. Incomplete static call graph due to unknown indirect call targets. Adjusting the order by considering indirect call edges from the profile can enable the inlining of indirect call targets by allowing the caller processed before them.
2. Mutual call edges in an SCC. The static processing order computed for an SCC may not reflect the call contexts in the context-sensitive profile, thus may cause potential inlining to be overlooked. The function order in one SCC is being adjusted to a top-down order based on the profile to favor more inlining.
3. Transitive indirect call edges due to inlining. When a callee function is inlined into into a caller function in LTO prelink, every call edge originated from the callee will be transferred to the caller. If any of the transferred edges is indirect, the original profiled indirect edge, even if considered, would not enforce a top-down order from the caller to the potential indirect call target in LTO postlink since the inlined callee is gone from the static call graph.
4. #3 can happen even for direct call targets, due to functions defined in header files. Header functions, when included into source files, are defined multiple times but only one definition survives due to ODR. Therefore, the LTO prelink inlining done on those dropped definitions can be useless based on a local file scope. More importantly, the inlinee, once fully inlined to a to-be-dropped inliner, will have no profile to consume when its outlined version is compiled. This can lead to a profile-less prelink compilation for the outlined version of the inlinee function which may be called from external modules. while this isn't easy to fix, we rely on the postlink AutoFDO pipeline to optimize the inlinee. Since the survived copy of the inliner (defined in headers) can be inlined in its local scope in prelink, it may not exist in the merged IR in postlink, and we'll need the profiled call edges to enforce a top-down order for the rest of the functions.
Considering those cases, a profiled call graph completely independent of the static call graph is constructed based on profile data, where function objects are not even needed to handle case #3 and case 4.
I'm seeing an average 0.4% perf win out of SPEC2017. For certain benchmark such as Xalanbmk and GCC, the win is bigger, above 2%.
The change is an enhancement to https://reviews.llvm.org/D95988.
Reviewed By: wmi, wenlei
Differential Revision: https://reviews.llvm.org/D99351
John Brawn [Tue, 30 Mar 2021 17:33:10 +0000 (18:33 +0100)]
[clang][cli] Fix round-trip of OPT_plugin_arg
The test Frontend/plugin-delayed-template.cpp is failing when asserts
are enabled because it hits an assertion in denormalizeStringImpl when
trying to round-trip OPT_plugin_arg. Fix this by adjusting how the
option is handled, as the first part is joined to -plugin-arg and the
second is separate.
Differential Revision: https://reviews.llvm.org/D99606
Jessica Paquette [Tue, 23 Mar 2021 22:33:10 +0000 (15:33 -0700)]
[GlobalISel][AArch64] Combine G_SEXT_INREG + right shift -> G_SBFX
Basically a port of isBitfieldExtractOpFromSExtInReg in AArch64ISelDAGToDAG.
This is only done post-legalization for now. Once the legalizer knows how to
decompose these back into shifts, this requirement can probably be removed.
Differential Revision: https://reviews.llvm.org/D99230
Jonas Devlieghere [Tue, 30 Mar 2021 17:09:55 +0000 (10:09 -0700)]
[lldb] Remove reproducer from previous test run
Mehdi Amini [Tue, 30 Mar 2021 04:35:36 +0000 (04:35 +0000)]
Add a "register_runtime" method to the mlir.execution_engine and show calling back from MLIR into Python
This exposes the ability to register Python functions with the JIT and
exposes them to the MLIR jitted code. The provided test case illustrates
the mechanism.
Differential Revision: https://reviews.llvm.org/D99562
Nick Lewycky [Thu, 25 Mar 2021 21:40:17 +0000 (14:40 -0700)]
Add -disable-verify flag to llvm-link.
This flag allows the developer to see the result of linking even if it fails the verifier, as a step in debugging cases where the linked module fails the verifier.
Differential Revision: https://reviews.llvm.org/D99382
Michał Górny [Tue, 30 Mar 2021 16:48:49 +0000 (18:48 +0200)]
[lldb] [test] Mark more lldb-server tests xfail on Windows
Craig Topper [Tue, 30 Mar 2021 16:34:56 +0000 (09:34 -0700)]
[RISCV] Pass 'half' in the lower 16 bits of an f32 value when F extension is enabled, but Zfh is not.
Without Zfh the half type isn't legal, but it could still be
used as an argument/return in IR. Clang will not generate this today.
Previously we promoted the half value to float for arguments and
returns if the F extension is enabled but Zfh isn't. Then depending on
which ABI is enabled we would pass it in either an FPR or a GPR in
float format.
If the F extension isn't enabled, it would get passed in the lower
16 bits of a GPR in half format.
With this patch the value will always in half format and will be
in the lower bits of a GPR or FPR. This should be consistent
with where the bits are located when Zfh is enabled.
I've based this implementation off of how this is done on ARM.
I've manually nan-boxed the value to 32 bits using integer ops.
It looks like flw, fsw, fmv.s, fmv.w.x, fmf.x.w won't
canonicalize nans so should leave the value alone. I think those
are the instructions that could get used on this value.
Reviewed By: kito-cheng
Differential Revision: https://reviews.llvm.org/D98670
Amara Emerson [Fri, 26 Mar 2021 22:27:15 +0000 (15:27 -0700)]
[GlobalISel] Implement lowering for G_ROTR and G_ROTL.
This is a straightforward port.
Differential Revision: https://reviews.llvm.org/D99449
Tomas Matheson [Mon, 15 Mar 2021 13:01:34 +0000 (13:01 +0000)]
[NFC][CodeGen] Tidy up TargetRegisterInfo stack realignment functions
Currently needsStackRealignment returns false if canRealignStack returns false.
This means that the behavior of needsStackRealignment does not correspond to
it's name and description; a function might need stack realignment, but if it
is not possible then this function returns false. Furthermore,
needsStackRealignment is not virtual and therefore some backends have made use
of canRealignStack to indicate whether a function needs stack realignment.
This patch attempts to clarify the situation by separating them and introducing
new names:
- shouldRealignStack - true if there is any reason the stack should be
realigned
- canRealignStack - true if we are still able to realign the stack (e.g. we
can still reserve/have reserved a frame pointer)
- hasStackRealignment = shouldRealignStack && canRealignStack (not target
customisable)
Targets can now override shouldRealignStack to indicate that stack realignment
is required.
This change will make it easier in a future change to handle the case where we
need to realign the stack but can't do so (for example when the register
allocator creates an aligned spill after the frame pointer has been
eliminated).
Differential Revision: https://reviews.llvm.org/D98716
Change-Id: Ib9a4d21728bf9d08a545b4365418d3ffe1af4d87
Nick Lewycky [Tue, 30 Mar 2021 16:30:40 +0000 (09:30 -0700)]
Remove dead CHECK-ERR line.
Craig Topper [Tue, 30 Mar 2021 16:23:34 +0000 (09:23 -0700)]
[RISCV] Don't set the SplatOperand flag on intrinsics that take a shift amount.
The shift amount should always be a vector or an XLen scalar.
The SplatOperand flag is used to indicate we need to legalize
non-XLen scalars including special handling for i64 on RV32.
This will prevent us from silently adjusting these operands if
the intrinsics are misused.
I'll probably adjust the name of the SplatOperand flag slightly
in a follow up patch.
Reviewed By: khchen, frasercrmck
Differential Revision: https://reviews.llvm.org/D99545
Craig Topper [Tue, 30 Mar 2021 16:11:54 +0000 (09:11 -0700)]
[RISCV] Remove floating point condition code legalization from lowerFixedLengthVectorSetccToRVV.
After D98939, this is done by LegalizeVectorOps making this code dead.
Reviewed By: frasercrmck
Differential Revision: https://reviews.llvm.org/D99519
Pavel Labath [Tue, 30 Mar 2021 16:05:31 +0000 (18:05 +0200)]
[lldb] More missing includes in TestGdbRemote_vContThreads
Pavel Labath [Tue, 30 Mar 2021 15:36:43 +0000 (17:36 +0200)]
[lldb] Add missing include in TestGdbRemote_vContThreads test
should fix the arm builtbots.
Pavel Labath [Tue, 30 Mar 2021 15:34:53 +0000 (17:34 +0200)]
[lldb] Fix TestStopOnSharedlibraryEvents.py on linux
and hopefully other ELF OSes. The problem was a missing "extra_images"
startup argument (which ensures LD_LIBRARY_PATH is set properly).
Guillaume Chatelet [Tue, 30 Mar 2021 15:27:46 +0000 (15:27 +0000)]
[libc] Fix msan/asan memcpy reentrancy
This is needed to prevent asan/msan instrumentation to redirect CopyBlock to `__asan_memcpy` (resp. `__msan_memcpy`).
These functions would then differ operation to `memcpy` which leads to reentrancy issues.
With this patch, `memcpy` is fully instrumented and covered by asan/msan.
If this turns out to be too expensive, instrumentation can be selectively or fully disabled through the use of the `__attribute__((no_sanitize(address, memory)))` annotation.
Differential Revision: https://reviews.llvm.org/D99598
Thomas Preud'homme [Sun, 28 Mar 2021 00:03:37 +0000 (00:03 +0000)]
[test, ARM] Fix use of var defined in CHECK-NOT
tries to check for the
absence of a sequence of instructions with several CHECK-NOT with
one of
those directives using a variable defined in another.
LLVM test CodeGenPrepare/ARM/sink-add-mul-shufflevector.ll tries to
check for the absence of a sequence of instructions with several
CHECK-NOT with one of those directives using a variable defined in
another. However, CHECK-NOT are checked independently so that is using
a variable defined in a pattern that should not occur in the input. The
bug was then copied over in
Transforms/CodeGenPrepare/ARM/sink-add-mul-shufflevector-inseltpoison.ll
This commit removes the definition and uses of variable to check each
line independently, making the check stronger than the current one.
Reviewed By: dmgreen
Differential Revision: https://reviews.llvm.org/D99597
oToToT [Tue, 30 Mar 2021 03:51:46 +0000 (11:51 +0800)]
[Docs] Update googletest docs link.
The documentation link of Google Test on GitHub have been moved to the
top-level docs directory.
Thus, the original link is invalid now.
Reviewed By: Pavel Labath
Differential Revision: https://reviews.llvm.org/D99559
Nico Rieck [Tue, 30 Mar 2021 15:11:07 +0000 (17:11 +0200)]
[clang-format] Fix east const pointer alignment of operators
This patch fixes left pointer alignment after pointer qualifiers of
operators. Currently "operator void const*()" is formatted with a space between
const and pointer despite setting PointerAlignment to Left.
AFAICS this has been broken since clang-format 10.
Reviewed By: MyDeveloperDay, curdeius
Differential Revision: https://reviews.llvm.org/D99458
Kevin Petit [Fri, 26 Mar 2021 17:19:07 +0000 (17:19 +0000)]
[OpenCL] Fix parsing of opencl-c.h in CL 3.0
Ensure that the cl_khr_3d_image_writes pragma is enabled by making
cl_khr_3d_image_writes an optional core feature in CL 3.0 in addition
to being an available extension in 1.0 onwards and a core feature in
CL 2.0.
https://reviews.llvm.org/D99425
Signed-off-by: Kevin Petit <kevin.petit@arm.com>
Pavel Labath [Tue, 30 Mar 2021 14:50:04 +0000 (16:50 +0200)]
[lldb/test] Deflake TestGdbRemote_vContThreads even more
This patch fixes an issue, where if the thread has a signal blocked when
we try to inject it into the process (via vCont), then instead of
executing straight away, the injected signal will trigger another stop
when the thread unblocks the signal.
As (linux) threads start their life with SIGUSR1 (among others)
disabled, and only enable it during initialization, injecting the signal
during this window did not behave as expected. The fix is to change the
test to ensure the signal gets injected with the signal unblocked.
The simplest way to do this was to write a dedicated inferior for this
test. I also created a new header to factor out the function retrieving
the (os-specific) thread id.
Alexey Bataev [Tue, 30 Mar 2021 14:45:12 +0000 (07:45 -0700)]
[OPENMP]Fix test checks for 32bit targets, NFC.
Thomas Preud'homme [Sun, 28 Mar 2021 00:03:37 +0000 (00:03 +0000)]
[test, LoopVectorize] Fix use of var defined in CHECK-NOT
LLVM test Transforms/LoopVectorize/X86/x86-pr39099.ll tries to check for
the absence of a sequence of instructions with several CHECK-NOT with
one of those directives using a variable defined in another. However
CHECK-NOT are checked independently so that is using a variable defined
in a pattern that should not occur in the input.
This commit only checks for the absence of a widened load which rules
out the presence of the whole sequence and does not involve an undefined
variable.
Reviewed By: fhahn
Differential Revision: https://reviews.llvm.org/D99583
Inho Seo [Tue, 30 Mar 2021 14:07:12 +0000 (07:07 -0700)]
Added static verification for Linalg Ops.
This verification is to check if the indices for static shaped operands
on linalgOps access out of bound memory or not. For dynamic shaped
operands, we would be able to check it on runtime stage.
Found several invalid Linalg ops testcases, and fixed them.
Reviewed By: hanchung
Differential Revision: https://reviews.llvm.org/D98390