platform/upstream/llvm.git
2 years ago[mlir][NVVM] Add ldmatrix op to NVVM dialect
Thomas Raoux [Thu, 10 Mar 2022 01:21:07 +0000 (01:21 +0000)]
[mlir][NVVM] Add ldmatrix op to NVVM dialect

Differential Revision: https://reviews.llvm.org/D121347

2 years ago[AMDGPU] Updated some tests to run on gfx940. NFC.
Stanislav Mekhanoshin [Thu, 10 Mar 2022 20:32:38 +0000 (12:32 -0800)]
[AMDGPU] Updated some tests to run on gfx940. NFC.

2 years ago[cmake] Remove unused OUTPUT_MAPPING param to configure_lit_site_cfg(). NFC
Sam McCall [Thu, 10 Mar 2022 20:18:37 +0000 (21:18 +0100)]
[cmake] Remove unused OUTPUT_MAPPING param to configure_lit_site_cfg(). NFC

Looks like it never did anything.
Added in 71deeee593c40ff01e529a6a4b30fa5b55494b82

2 years ago[lld-macho] Align cstrings less conservatively
Jez Ng [Thu, 10 Mar 2022 20:04:31 +0000 (15:04 -0500)]
[lld-macho] Align cstrings less conservatively

Previously, we aligned every cstring to 16 bytes as a temporary hack to
deal with https://github.com/llvm/llvm-project/issues/50135. However, it
was highly wasteful in terms of binary size.

To recap, in contrast to ELF, which puts strings that need different
alignments into different sections, `clang`'s Mach-O backend puts them
all in one section.  Strings that need to be aligned have the .p2align
directive emitted before them, which simply translates into zero padding
in the object file. In other words, we have to infer the alignment of
the cstrings from their addresses.

We differ slightly from ld64 in how we've chosen to align these
cstrings. Both LLD and ld64 preserve the number of trailing zeros in
each cstring's address in the input object files. When deduplicating
identical cstrings, both linkers pick the cstring whose address has more
trailing zeros, and preserve the alignment of that address in the final
binary. However, ld64 goes a step further and also preserves the offset
of the cstring from the last section-aligned address.  I.e. if a cstring
is at offset 18 in the input, with a section alignment of 16, then both
LLD and ld64 will ensure the final address is 2-byte aligned (since
`18 == 16 + 2`). But ld64 will also ensure that the final address is of
the form 16 * k + 2 for some k (which implies 2-byte alignment).

Note that ld64's heuristic means that a dedup'ed cstring's final address is
dependent on the order of the input object files. E.g. if in addition to the
cstring at offset 18 above, we have a duplicate one in another file with a
`.cstring` section alignment of 2 and an offset of zero, then ld64 will pick
the cstring from the object file earlier on the command line (since both have
the same number of trailing zeros in their address). So the final cstring may
either be at some address `16 * k + 2` or at some address `2 * k`.

I've opted not to follow this behavior primarily for implementation
simplicity, and secondarily to save a few more bytes. It's not clear to me
that preserving the section alignment + offset is ever necessary, and there
are many cases that are clearly redundant. In particular, if an x86_64 object
file contains some strings that are accessed via SIMD instructions, then the
.cstring section in the object file will be 16-byte-aligned (since SIMD
requires its operand addresses to be 16-byte aligned). However, there will
typically also be other cstrings in the same file that aren't used via SIMD
and don't need this alignment. They will be emitted at some arbitrary address
`A`, but ld64 will treat them as being 16-byte aligned with an offset of
`16 % A`.

I have verified that the two repros in https://github.com/llvm/llvm-project/issues/50135
work well with the new alignment behavior.

Fixes https://github.com/llvm/llvm-project/issues/54036.

Reviewed By: #lld-macho, oontvoo

Differential Revision: https://reviews.llvm.org/D121342

2 years ago[BOLT] Divide RegularPageSize for X86 and AArch64 cases
Elvina Yakubova [Thu, 10 Mar 2022 20:04:03 +0000 (23:04 +0300)]
[BOLT] Divide RegularPageSize for X86 and AArch64 cases

For AArch64 in some cases/some distributions ld uses 64K alignment of LOAD segments by default.

Reviewed By: yota9, maksfb

Differential Revision: https://reviews.llvm.org/D119267

2 years ago[lldb] Remove extra space in step logging message
Dave Lee [Thu, 10 Mar 2022 20:01:15 +0000 (12:01 -0800)]
[lldb] Remove extra space in step logging message

When seeing the extra space in the log, it wasn't clear if there was a missing
printf argument. Removing the extra space removes the potential confusion.

2 years ago[mlir][sparse] Improving error messages for openSparseTensorCOO
wren romano [Wed, 9 Mar 2022 23:53:04 +0000 (15:53 -0800)]
[mlir][sparse] Improving error messages for openSparseTensorCOO

Reviewed By: aartbik

Differential Revision: https://reviews.llvm.org/D121333

2 years ago[RISCV] Remove performANY_EXTENDCombine.
Craig Topper [Thu, 10 Mar 2022 19:26:05 +0000 (11:26 -0800)]
[RISCV] Remove performANY_EXTENDCombine.

This doesn't appear to be needed any more. I did some inspecting
of the gcc torture suite and SPEC2006 with this removed and didn't
find any meaningful changes.

I think we're more aggressive about forming ADDIW now using
sign_extend_inreg during type legalization and hasAllWUsers in isel.
This probably helps catch the cases this helped with before.

2 years ago[lldb/gdb-remote] Remove ancient debugserver workaround
Pavel Labath [Wed, 9 Mar 2022 17:19:58 +0000 (18:19 +0100)]
[lldb/gdb-remote] Remove ancient debugserver workaround

This workaround is the source of an awkwared Process->Platform
dependency. While this could be solved in various ways (the only thing
we really use is the plugin name), it may be better to just remove it --
the workaround was added 10 years ago (43c555dfc), and the affected
debugservers were "old" even then, so hopefully they are not in use
anymore.

Differential Revision: https://reviews.llvm.org/D121305

2 years ago[flang] Lower pointer component in derived type
Valentin Clement [Thu, 10 Mar 2022 19:19:57 +0000 (20:19 +0100)]
[flang] Lower pointer component in derived type

This patch lowers pointer component part of derived types to
FIR.

This patch is part of the upstreaming effort from fir-dev branch.

Depends on D121383

Reviewed By: PeteSteinfeld, schweitz

Differential Revision: https://reviews.llvm.org/D121384

Co-authored-by: V Donaldson <vdonaldson@nvidia.com>
Co-authored-by: Jean Perier <jperier@nvidia.com>
Co-authored-by: Eric Schweitz <eschweitz@nvidia.com>
2 years ago[lldb/crashlog] Reformat module loading logs (NFC)
Med Ismail Bennani [Thu, 10 Mar 2022 19:06:42 +0000 (11:06 -0800)]
[lldb/crashlog] Reformat module loading logs (NFC)

Signed-off-by: Med Ismail Bennani <medismail.bennani@gmail.com>
2 years ago[lldb/Plugin] Test that a scripted process blueprint can be loaded for the dSYM
Med Ismail Bennani [Wed, 9 Mar 2022 19:11:49 +0000 (11:11 -0800)]
[lldb/Plugin] Test that a scripted process blueprint can be loaded for the dSYM

This patch ensures that lldb can automatically load a scripted process
blueprint from a dSYM bundle and launch a scripted process with it.

rdar://74502750

Differential Revision: https://reviews.llvm.org/D121316

Signed-off-by: Med Ismail Bennani <medismail.bennani@gmail.com>
2 years ago[lldb/crashlog] Make interactive mode display more user-friendly
Med Ismail Bennani [Wed, 9 Mar 2022 00:34:31 +0000 (16:34 -0800)]
[lldb/crashlog] Make interactive mode display more user-friendly

This patch makes the crashlog interactive mode show the scripted process
status with the crashed scripted thread backtrace after launching it.

rdar://89634338

Differential Revision: https://reviews.llvm.org/D121038

Signed-off-by: Med Ismail Bennani <medismail.bennani@gmail.com>
2 years ago[JMCInstrument] infer proper path style based on debug info
Yuanfang Chen [Thu, 10 Mar 2022 18:50:30 +0000 (10:50 -0800)]
[JMCInstrument] infer proper path style based on debug info

By default, the path style is decided by the host. This patch makes JMC
uses the path style used by the SP directory. This makes JMC output
host-independent.

Fixes: https://github.com/llvm/llvm-project/issues/54219

Reviewed By: rnk

Differential Revision: https://reviews.llvm.org/D121236

2 years ago[flang] Lower general forall statement
Valentin Clement [Thu, 10 Mar 2022 18:43:11 +0000 (19:43 +0100)]
[flang] Lower general forall statement

This patch lowers general forall statements. The forall
are lowered to nested loops.

This patch is part of the upstreaming effort from fir-dev branch.

Depends on D121385

Reviewed By: PeteSteinfeld, schweitz

Differential Revision: https://reviews.llvm.org/D121386

Co-authored-by: V Donaldson <vdonaldson@nvidia.com>
Co-authored-by: Jean Perier <jperier@nvidia.com>
Co-authored-by: Eric Schweitz <eschweitz@nvidia.com>
2 years ago[CMake] Include runtimes test suites in check-all
Petr Hosek [Wed, 9 Mar 2022 08:48:49 +0000 (00:48 -0800)]
[CMake] Include runtimes test suites in check-all

Prior to this change, we would make check-all depend on check-runtimes
which is a target that runs tests in the runtimes build. This means that
the runtimes tests are going to run prior to other test suites in
check-all, and if one of them fails, we won't run the other test suites
at all.

To address this issue, we instead collect the list of test suites and
their dependencies from the runtimes subbuild, and include them in
check-all, so a failure of runtimes test suite doesn't prevent other
test suites from being executed.

This addresses https://github.com/llvm/llvm-project/issues/54154.

Differential Revision: https://reviews.llvm.org/D121276

2 years ago[AMDGPU] Use subreg encoding instead of reassign
Joe Nash [Thu, 10 Mar 2022 17:25:11 +0000 (12:25 -0500)]
[AMDGPU] Use subreg encoding instead of reassign

The HWEncoding for these 64 bit registers should be the same as as the
encoding for the previously defined low halves of the registers. So
reuse that value instead of repeating the assignment. NFC.

Reviewed By: foad

Differential Revision: https://reviews.llvm.org/D121391

2 years agoFix the dates for the C and C++ language working group
Aaron Ballman [Thu, 10 Mar 2022 18:08:08 +0000 (13:08 -0500)]
Fix the dates for the C and C++ language working group

It's 1st and 3rd Wed of the month instead of every other.

2 years ago[RISCV] Add isel patterns for masked RISCVISD::FMA_VL with RISCVISD::FNEG_VL.
Craig Topper [Thu, 10 Mar 2022 17:37:03 +0000 (09:37 -0800)]
[RISCV] Add isel patterns for masked RISCVISD::FMA_VL with RISCVISD::FNEG_VL.

This helps us form vfnmsub, vfnmadd, and vfmusb from masked VP
intrinsics.

I've used "srcvalue" for the mask parameter in the fneg nodes. We
can't match "V0" because that doesn't ensure the mask the is the same.
Instead it matches two different nodes and generates two copies to
V0 of those separate values.

Reviewed By: rogfer01

Differential Revision: https://reviews.llvm.org/D120287

2 years ago[InstCombine] replace negated operand in fcmp with 0.0
Sanjay Patel [Thu, 10 Mar 2022 17:37:36 +0000 (12:37 -0500)]
[InstCombine] replace negated operand in fcmp with 0.0

X (any pred) -X --> X (any pred) 0.0

This works with all FP values and preserves FMF.
Alive2 examples:
https://alive2.llvm.org/ce/z/dj6jhp

This can also create one of the patterns that we match as "fabs"
as shown in one of the test diffs.

2 years ago[InstCombine] add tests for fcmp with fneg common operand; NFC
Sanjay Patel [Thu, 10 Mar 2022 16:35:23 +0000 (11:35 -0500)]
[InstCombine] add tests for fcmp with fneg common operand; NFC

2 years ago[VP] Strided loads/stores
Lorenzo Albano [Thu, 10 Mar 2022 15:39:12 +0000 (16:39 +0100)]
[VP] Strided loads/stores

This patch introduces two new experimental IR intrinsics and SDAG nodes
to represent vector strided loads and stores.

Reviewed By: simoll

Differential Revision: https://reviews.llvm.org/D114884

2 years ago[flang] Lower where statement
Valentin Clement [Thu, 10 Mar 2022 17:43:40 +0000 (18:43 +0100)]
[flang] Lower where statement

This patch lowers where statement to FIR.
The where statement is lowered to a conbination of
loops and if conditions.

This patch is part of the upstreaming effort from fir-dev branch.

Reviewed By: PeteSteinfeld

Differential Revision: https://reviews.llvm.org/D121385

Co-authored-by: Jean Perier <jperier@nvidia.com>
Co-authored-by: Eric Schweitz <eschweitz@nvidia.com>
2 years ago[mlir][linalg] Add a few unary operations.
Bixia Zheng [Thu, 10 Mar 2022 17:08:41 +0000 (09:08 -0800)]
[mlir][linalg] Add a few unary operations.

Add operations abs, ceil, floor, and neg to the C++ API and Python API.

Add test cases.

Reviewed By: gysit

Differential Revision: https://reviews.llvm.org/D121339

2 years ago[flang] Added basic connect to lower OpenMP constructs
Shraiysh Vaishay [Thu, 10 Mar 2022 17:10:23 +0000 (22:40 +0530)]
[flang] Added basic connect to lower OpenMP constructs

Reviewed By: clementval

Differential Revision: https://reviews.llvm.org/D121382

2 years ago[flang] Lower basic derived types
Valentin Clement [Thu, 10 Mar 2022 17:06:20 +0000 (18:06 +0100)]
[flang] Lower basic derived types

This patch lowers basic derived type to FIR.

This patch is part of the upstreaming effort from fir-dev branch.

Reviewed By: PeteSteinfeld

Differential Revision: https://reviews.llvm.org/D121383

Co-authored-by: V Donaldson <vdonaldson@nvidia.com>
Co-authored-by: Jean Perier <jperier@nvidia.com>
Co-authored-by: Eric Schweitz <eschweitz@nvidia.com>
2 years ago[MLIR][Presburger] Remove `spaceKind` from PresburgerSpace
Groverkss [Thu, 10 Mar 2022 16:48:44 +0000 (22:18 +0530)]
[MLIR][Presburger] Remove `spaceKind` from PresburgerSpace

This patch remove `spaceKind` from PresburgerSpace, making PresburgerSpace only
a space supporting relations.

Sets are still implemented in the same way, i.e. with a zero domain but instead
the asserts to check if the space is still set are added to users of
PresburgerSpace which treat it as a Set space.

Reviewed By: arjunp

Differential Revision: https://reviews.llvm.org/D121357

2 years ago[BOLT] LongJmp: Use per-function alignment values
Vladislav Khmelevsky [Wed, 9 Mar 2022 16:28:06 +0000 (19:28 +0300)]
[BOLT] LongJmp: Use per-function alignment values

The per-function alignment values must be used in order to create
tentative layout.

Differential Revision: https://reviews.llvm.org/D121298

2 years ago[mlir] ExecutionEngine: default enableObjectCache to false
Emilio Cota [Wed, 9 Mar 2022 15:08:17 +0000 (10:08 -0500)]
[mlir] ExecutionEngine: default enableObjectCache to false

The enableObjectCache option was added in
https://reviews.llvm.org/rG06e8101034e, defaulting to false. However,
the init code added there got its logic reversed
(cache(enableObjectCache ? nullptr : new SimpleObjectCache()), which was
fixed in https://reviews.llvm.org/rGd1186fcb04 by setting the default to
true, thereby preserving the existing behavior even if it was
unintentional.

Default now the object cache to false as it was originally intended.
While at it, mention in enableObjectCache's documentation how the
cache can be dumped.

Reviewed-by: mehdi_amini
Differential Revision: https://reviews.llvm.org/D121291

2 years agoCleanup includes: WindowsDriver & WindowsManifest
serge-sans-paille [Wed, 9 Mar 2022 21:27:35 +0000 (22:27 +0100)]
Cleanup includes: WindowsDriver & WindowsManifest

Discourse thread: https://discourse.llvm.org/t/include-what-you-use-include-cleanup
Differential Revision: https://reviews.llvm.org/D121330

2 years agotsan: fix another false positive related to open/close
Dmitry Vyukov [Thu, 10 Mar 2022 09:35:32 +0000 (10:35 +0100)]
tsan: fix another false positive related to open/close

The false positive fixed by commit f831d6fc80
("tsan: fix false positive during fd close") still happens episodically
on the added more stressful test which does just open/close.

I don't have a coherent explanation as to what exactly happens
but the fix fixes the false positive on this test as well.
The issue may be related to lost writes during asynchronous MADV_DONTNEED.
I've debugged similar unexplainable false positive related to freed and
reused memory and at the time the only possible explanation I found is that
an asynchronous MADV_DONTNEED may lead to lost writes. That's why commit
302ec7b9bc ("tsan: add memory_limit_mb flag") added StopTheWorld around
the memory flush, but unfortunately the commit does not capture these findings.

Reviewed By: melver

Differential Revision: https://reviews.llvm.org/D121363

2 years ago[MLIR][OpenMP][NFC] Move the modifier testcases to correct directory
Shraiysh Vaishay [Thu, 10 Mar 2022 15:55:05 +0000 (21:25 +0530)]
[MLIR][OpenMP][NFC] Move the modifier testcases to correct directory

This patch moves the testcases from
`mlir/test/Target/LLVMIR/openmp-llvm-bad-schedule-modifier.mlir` to
`mlir/test/Dialect/OpenMP/invalid.mlir` as they test the verifier
(not the translation to LLVM IR).

Reviewed By: NimishMishra

Differential Revision: https://reviews.llvm.org/D120877

2 years ago[MLIR] [CMake/Python] Fix ignored Python3_EXECUTABLE
John Demme [Thu, 10 Mar 2022 15:43:43 +0000 (07:43 -0800)]
[MLIR] [CMake/Python] Fix ignored Python3_EXECUTABLE

On Windows (at least), cmake ignores Python3_EXECUTABLE unless the
'Interpreter' component is being found. If the user is specifying a
different version than the latest installed (say, 3.8 vs 3.9) with the
Python3_EXECUTABLE, cmake was using a combination of the newest version
and the desired version. Mitigated by adding 'Interpreter' in the first
invocation like the second one.

2 years agoRevert "[InstCombine] fold fcmp with lossy casted constant"
Sanjay Patel [Thu, 10 Mar 2022 15:22:22 +0000 (10:22 -0500)]
Revert "[InstCombine] fold fcmp with lossy casted constant"

This reverts commit 9397bdc67eb2b9eedc247a89bef01c2484b48b89.

This optimization is likely to surprise programmers as seen
in post-commit comments, so we should add a clang warning
first (that is proposed in D121306).

2 years ago[AArch64] Fix type in comment. NFC
David Green [Thu, 10 Mar 2022 15:03:27 +0000 (15:03 +0000)]
[AArch64] Fix type in comment. NFC

2 years ago[GlobalOpt] Handle undef global_ctors gracefully
Nikita Popov [Thu, 10 Mar 2022 15:01:09 +0000 (16:01 +0100)]
[GlobalOpt] Handle undef global_ctors gracefully

If there are no ctors, then this can have an arbirary zero-sized
value. The current code checks for null, but it could also be
undef or poison.

Replacing the specific null check with a check for
non-ConstantArray.

2 years ago[BitcodeReader] Support GEP without indices
Nikita Popov [Thu, 10 Mar 2022 14:47:58 +0000 (15:47 +0100)]
[BitcodeReader] Support GEP without indices

LLVM considers these to be legal, so make sure the bitcode reader
can read them. I broke this when implementing opaque pointer
auto upgrade support.

2 years ago[AArch64] TBL uses zero for out of range elements.
David Green [Thu, 10 Mar 2022 14:45:13 +0000 (14:45 +0000)]
[AArch64] TBL uses zero for out of range elements.

A TBL instruction will use zero for any out of range values. We can use
this in GenerateTBL to help turn a TBL2 into a TBL1, avoiding the need
to materialise the zero.

Differential Revision: https://reviews.llvm.org/D121139

2 years ago[libc] Initial support for darwin-aarch64.
Tue Ly [Thu, 10 Mar 2022 14:25:54 +0000 (09:25 -0500)]
[libc] Initial support for darwin-aarch64.

Add initial support for darwin-aarch64 (macOS M1).

Some differences compared to linux-aarch64:
- `math.h` defined `math_errhandling` by the compiler builtin `__math_errhandling()` but Apple Clang 13.0.0 on M1 does not support `__math_errhandling()` builtin as a macro function or a constexpr function.
- `math.h` defines `UNDERFLOW` and `OVERFLOW` macros.
- Besides 5 usual floating point exceptions: `FE_INEXACT`, `FE_UNDERFLOW`, `FE_OVERFLOW`, `FE_DIVBYZERO`, and `FE_INVALID`, `fenv.h` also has another floating point exception: `FE_FLUSHTOZERO`.  The corresponding trap for `FE_FLUSHTOZERO` in the control register is at the different location compared to the status register.
- `FE_FLUSHTOZERO` exception flag cannot be raised with the default CPU floating point operation mode.

Reviewed By: sivachandra

Differential Revision: https://reviews.llvm.org/D120914

2 years ago[libc++] Bump minimum compiler requirements
Louis Dionne [Wed, 2 Feb 2022 18:08:52 +0000 (13:08 -0500)]
[libc++] Bump minimum compiler requirements

Now that we've branched for the LLVM 14 release, our support window
moves to clang-13 and clang-14. Similarly, AppleClang 13 has been
released for some time now, so that should be the oldest compiler
we support, per our policy.

A possible follow-up would be to remove _LIBCPP_HAS_NO_CONCEPTS, since
I don't think we support any compiler that doesn't support concepts
anymore.

Differential Revision: https://reviews.llvm.org/D118831

2 years ago[AArch64] Extra tests for tbl with zero elements. NFC
David Green [Thu, 10 Mar 2022 13:51:04 +0000 (13:51 +0000)]
[AArch64] Extra tests for tbl with zero elements. NFC

2 years ago[libc++] Add test coverage for std::shared_ptr<const T>
Louis Dionne [Wed, 9 Mar 2022 22:06:16 +0000 (17:06 -0500)]
[libc++] Add test coverage for std::shared_ptr<const T>

Those tests were extracted from D120996.

Differential Revision: https://reviews.llvm.org/D121340

2 years agoCleanup includes: MCDisassembler
serge-sans-paille [Wed, 9 Mar 2022 21:26:23 +0000 (22:26 +0100)]
Cleanup includes: MCDisassembler

Some extra minor cleanup.

Discourse thread: https://discourse.llvm.org/t/include-what-you-use-include-cleanup
Differential Revision: https://reviews.llvm.org/D121329

2 years ago[FuzzMutate] Support opaque pointers
Nikita Popov [Thu, 10 Mar 2022 13:18:37 +0000 (14:18 +0100)]
[FuzzMutate] Support opaque pointers

Avoid checks that are irrelevant for opaque pointers, and pick
load/GEP types independently of the pointer type.

The GEP case at least could be done more efficiently by directly
generating a type, but this would require some significant API
changes.

2 years ago[InstCombine] Add vector support to icmp(add(X,C1),add(Y,C2)) -> icmp(add(X,C1-C2...
Simon Pilgrim [Thu, 10 Mar 2022 13:30:42 +0000 (13:30 +0000)]
[InstCombine] Add vector support to icmp(add(X,C1),add(Y,C2)) -> icmp(add(X,C1-C2),Y) fold

As discussed on Issue #32161 this fold can be generalized a lot more than it currently is, but this patch at least adds vector support.

Differential Revision: https://reviews.llvm.org/D121358

2 years ago[X86] Add GFNI shift/rotate/funnel-shift vXi8 by constant splat tests
Simon Pilgrim [Thu, 10 Mar 2022 13:25:06 +0000 (13:25 +0000)]
[X86] Add GFNI shift/rotate/funnel-shift vXi8 by constant splat tests

GFNI can efficiently perform vXi8 shift/rotates by constant splats using X86ISD::GF2P8AFFINEQB

2 years agoFix M68k missing header errors.
Simon Pilgrim [Thu, 10 Mar 2022 13:18:10 +0000 (13:18 +0000)]
Fix M68k missing header errors.

2 years ago[PhaseOrdering][x86] add TODO comments to test files; NFC
Sanjay Patel [Thu, 10 Mar 2022 13:08:33 +0000 (08:08 -0500)]
[PhaseOrdering][x86] add TODO comments to test files; NFC

The intended folds were removed because an underlying
analysis was not correct ( b48fe158e0a8 ).

2 years agoRevert "Cleanup codegen includes"
Nico Weber [Thu, 10 Mar 2022 12:54:41 +0000 (07:54 -0500)]
Revert "Cleanup codegen includes"

This reverts commit 7f230feeeac8a67b335f52bd2e900a05c6098f20.
Breaks CodeGenCUDA/link-device-bitcode.cu in check-clang,
and many LLVM tests, see comments on https://reviews.llvm.org/D121169

2 years ago[OpenMP][mlir] Lowering for omp.atomic.update
Shraiysh Vaishay [Thu, 10 Mar 2022 12:58:08 +0000 (18:28 +0530)]
[OpenMP][mlir] Lowering for omp.atomic.update

This patch adds lowering from omp.atomic.update to LLVM IR. Whenever a
special LLVM IR instruction is available for the operation, `atomicrmw`
instruction is emitted, otherwise a compare-exchange loop based update
is emitted.

Depends on D119522

Reviewed By: ftynse, peixin

Differential Revision: https://reviews.llvm.org/D119657

2 years ago[AArch64] Move fp16 cast tests.
Florian Hahn [Thu, 10 Mar 2022 12:22:05 +0000 (12:22 +0000)]
[AArch64] Move fp16 cast tests.

Move FP16 tests to fp16cast function, as suggested in D113700.

2 years ago[gn build] (manually) port af98b0af6705
Nico Weber [Thu, 10 Mar 2022 12:14:07 +0000 (07:14 -0500)]
[gn build] (manually) port af98b0af6705

2 years ago[AMDGPU] Enable divergence predicates for negative inline constant subtraction
alex-t [Thu, 10 Mar 2022 09:57:15 +0000 (12:57 +0300)]
[AMDGPU] Enable divergence predicates for negative inline constant subtraction

We have a pattern that undo sub x, c -> add x, -c canonicalization since c is more likely
 an inline immediate than -c. This patch enables it to select scalar or vector subtracion by the input node divergence.

Reviewed By: foad

Differential Revision: https://reviews.llvm.org/D121360

2 years ago[clang][dataflow] Add analysis that detects unsafe accesses to optionals
Stanislav Gatev [Thu, 10 Mar 2022 08:57:32 +0000 (08:57 +0000)]
[clang][dataflow] Add analysis that detects unsafe accesses to optionals

This commit reverts e0cc28dfdc67105974924cce42bb8c85bd44925a and moves
UncheckedOptionalAccessModelTest.cpp into clang/unittests/Analysis/FlowSensitive,
to avoid build failures. The test will be moved back into a Models subdir
in a follow up patch that will address the build configuration issues.

Original description:

Adds a dataflow analysis that detects unsafe accesses to values of type
`std::optional`, `absl::optional`, or `base::Optional`.

Reviewed-by: ymandel, xazax.hun
Differential Revision: https://reviews.llvm.org/D121197

2 years ago[AMDGPU] Fix regenerated test checks (NFC)
Nikita Popov [Thu, 10 Mar 2022 10:55:58 +0000 (11:55 +0100)]
[AMDGPU] Fix regenerated test checks (NFC)

I used the wrong build to generate the checks, sorry :(

2 years ago[AMDGPU] Regenerate test checks (NFC)
Nikita Popov [Thu, 10 Mar 2022 10:53:45 +0000 (11:53 +0100)]
[AMDGPU] Regenerate test checks (NFC)

2 years ago[AMDGPU] Regenerate test checks (NFC)
Nikita Popov [Thu, 10 Mar 2022 10:14:45 +0000 (11:14 +0100)]
[AMDGPU] Regenerate test checks (NFC)

Also rename variables to avoid file check clash.

2 years ago[MLIR][Presburger] fix vector update in coalesce
Michel Weber [Thu, 10 Mar 2022 10:12:06 +0000 (15:42 +0530)]
[MLIR][Presburger] fix vector update in coalesce

When `addCoalescedPolyhedron` was called with `j == n - 1`,
the `polyhedrons`-vector was not properly updated (the
`IntegerPolyhedron` at position `n - 2` was "lost"). This patch adds
special handling to that case and a regression testcase.

Reviewed By: Groverkss

Differential Revision: https://reviews.llvm.org/D121356

2 years ago[MLIR][Presburger] Use IdKind for removeIdRange in PresburgerSpace
Groverkss [Thu, 10 Mar 2022 10:09:32 +0000 (15:39 +0530)]
[MLIR][Presburger] Use IdKind for removeIdRange in PresburgerSpace

This patch moves PresburgerSpace::removeIdRange(idStart, idLimit) to
PresburgerSpace::removeIdRange(kind, idStart, idLimit), i.e. identifiers
can only be removed at once for a single kind.

This makes users of PresburgerSpace to not assume any inside ordering of
identifier kinds.

Reviewed By: arjunp

Differential Revision: https://reviews.llvm.org/D121079

2 years ago[LoongArch] Add basic support to Disassembler
Weining Lu [Thu, 10 Mar 2022 08:35:38 +0000 (16:35 +0800)]
[LoongArch] Add basic support to Disassembler

With the addition of disassembler now we can do instructions 'round-trip' test
that assembles `.s` to obj with `llvm-mc` and disassembles it with `llvm-objdump`
to check instruction mnemonics.

Reviewed By: xen0n, MaskRay

Differential Revision: https://reviews.llvm.org/D120477

2 years agoAdd missing include in llvm/CodeGen/CodeGenPassBuilder.h
serge-sans-paille [Thu, 10 Mar 2022 09:05:14 +0000 (10:05 +0100)]
Add missing include in llvm/CodeGen/CodeGenPassBuilder.h

As a follow-up to 7f230feeeac8

2 years ago[InstCombine] Add vector tests for icmp_eq(add(X,C1),add(Y,C2)) -> icmp_eq(add(X...
Simon Pilgrim [Thu, 10 Mar 2022 09:00:40 +0000 (09:00 +0000)]
[InstCombine] Add vector tests for icmp_eq(add(X,C1),add(Y,C2)) -> icmp_eq(add(X,C1-C2),Y)

As mentioned on Issue #32161 we don't even have uniform vector support for this fold

2 years agoCleanup codegen includes
serge-sans-paille [Mon, 7 Mar 2022 23:25:52 +0000 (00:25 +0100)]
Cleanup codegen includes

after:  1061034926
before: 1063332844

Differential Revision: https://reviews.llvm.org/D121169

2 years agoCleanup includes: LLVMTarget
serge-sans-paille [Mon, 7 Mar 2022 23:25:11 +0000 (00:25 +0100)]
Cleanup includes: LLVMTarget

Most notably, Pass.h is no longer included by TargetMachine.h
before: 1063570306
after:  1063332844

Differential Revision: https://reviews.llvm.org/D121168

2 years ago[Coroutines] Support opaque pointers in solveTypeName()
Nikita Popov [Fri, 4 Mar 2022 12:25:05 +0000 (13:25 +0100)]
[Coroutines] Support opaque pointers in solveTypeName()

As far as I can tell, these names are only intended to be
informative, so just use a generic "PointerType" for opaque pointers.

The code in solveDIType() also treats pointers as basic types (and
does not try to encode the pointed-to type further), so I believe
this should be fine.

Differential Revision: https://reviews.llvm.org/D121280

2 years ago[RISCV] Add fixed-length vector instrinsics for segment load
Luke [Sun, 13 Feb 2022 14:22:34 +0000 (22:22 +0800)]
[RISCV] Add fixed-length vector instrinsics for segment load

Inspired by reviews.llvm.org/D107790.

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D119834

2 years ago[RISCV] Remove RISCVISD::VLE_VL/VSE_VL. Use intrinsics instead.
Craig Topper [Thu, 10 Mar 2022 06:44:27 +0000 (22:44 -0800)]
[RISCV] Remove RISCVISD::VLE_VL/VSE_VL. Use intrinsics instead.

Similar to what we do for other loads/stores, use the intrinsic
version that we already have custom isel for.

Reviewed By: rogfer01

Differential Revision: https://reviews.llvm.org/D121166

2 years ago[RISCV] Add tests showing the optimization pipeline for O0 and O3.
Craig Topper [Thu, 10 Mar 2022 04:39:14 +0000 (20:39 -0800)]
[RISCV] Add tests showing the optimization pipeline for O0 and O3.

Other targets like ARM, AArch64, and X86 have similar tests.

Reviewed By: asb

Differential Revision: https://reviews.llvm.org/D120840

2 years ago[BOLT][NFC] Fix print-cfg data race
Amir Ayupov [Thu, 10 Mar 2022 04:27:15 +0000 (20:27 -0800)]
[BOLT][NFC] Fix print-cfg data race

Addresses ThreadSanitizer warning

Reviewed By: rafauler

Differential Revision: https://reviews.llvm.org/D121337

2 years ago[BOLT][NFC] Check errors from Obj.dynamicEntries
Amir Ayupov [Thu, 10 Mar 2022 04:24:20 +0000 (20:24 -0800)]
[BOLT][NFC] Check errors from Obj.dynamicEntries

Addresses fuzzer crash

Reviewed By: rafauler

Differential Revision: https://reviews.llvm.org/D121336

2 years ago[libc] Use the constexpr constructor to initialize exit handlers mutex.
Siva Chandra Reddy [Wed, 9 Mar 2022 21:30:22 +0000 (21:30 +0000)]
[libc] Use the constexpr constructor to initialize exit handlers mutex.

Reviewed By: abrachet

Differential Revision: https://reviews.llvm.org/D121334

2 years ago[MachineSink] Pre-commit test for D121277. NFC.
Carl Ritson [Thu, 10 Mar 2022 02:11:20 +0000 (11:11 +0900)]
[MachineSink] Pre-commit test for D121277. NFC.

2 years ago[clang][Driver] Get darwin -Xarch_ working for subtypes, again.
Ahmed Bougacha [Wed, 9 Mar 2022 23:52:21 +0000 (15:52 -0800)]
[clang][Driver] Get darwin -Xarch_ working for subtypes, again.

35ca7d9ddf4 broke 471c4f829934 for -arch flags that don't map 1:1
to the triple arch.  This has been broken for the many years since.
It hasn't mattered much since then, mostly because few people use it,
but also because it works for x86_64/i386, armv7/armv7s
don't differ much, arm64 is its own arch, and arm64/arm64_32 have
different arches (and it's a rare combination anyway).

But arm64/arm64e exposes this issue again.

Patch by: Justin Bogner <mail@justinbogner.com>
with some added tests.

2 years ago[HIP] Fix -fno-gpu-sanitize
Yaxun (Sam) Liu [Wed, 9 Mar 2022 16:52:48 +0000 (11:52 -0500)]
[HIP] Fix -fno-gpu-sanitize

Fix a typo about -fno-gpu-sanitize handling and disable warnings when
-fno-gpu-sanitize is specified.

Reviewed by: Artem Belevich

Differential Revision: https://reviews.llvm.org/D121302

2 years ago[HIP] Fix HIP include path
Yaxun (Sam) Liu [Wed, 9 Mar 2022 14:10:17 +0000 (09:10 -0500)]
[HIP] Fix HIP include path

The clang compiler prepends the HIP header include paths to the search
list using -internal-isystem when building for the HIP language. This
prevents warnings related to things like reserved identifiers when
including the HIP headers even when ROCm is installed in a non-system
directory, such as /opt/rocm.

However, when HIP is installed in /usr, then the prepended include
path would be /usr/include. That is a problem, because the C standard
library headers are stored in /usr/include and the C++ standard
library headers must come before the C library headers in the search
path list (because the C++ standard library headers use #include_next
to include the C standard library headers).

While the HIP wrapper headers _do_ need to be earlier in the search
than the C++ headers, those headers get their own subdirectory and
their own explicit -internal-isystem argument. This include path is for
<hip/hip_runtime_api.h> and <hip/hip_runtime.h>, which do not require a
particular search ordering with respect to the C or C++ headers. Thus,
HIP include path is added after other system include paths.

With contribution from Cordell Bloor.

Reviewed by: Artem Belevich

Differential Revision: https://reviews.llvm.org/D120132

2 years ago[gn build] Port c31014322c0b
LLVM GN Syncbot [Thu, 10 Mar 2022 01:35:38 +0000 (01:35 +0000)]
[gn build] Port c31014322c0b

2 years ago[Driver][OpenBSD] Disable unwind tables on Arm
Brad Smith [Thu, 10 Mar 2022 01:29:49 +0000 (20:29 -0500)]
[Driver][OpenBSD] Disable unwind tables on Arm

Arm is not quite ready for unwinding yet.

2 years agoTLS loads opimization (hoist)
Xiang1 Zhang [Wed, 2 Mar 2022 06:47:54 +0000 (14:47 +0800)]
TLS loads opimization (hoist)

Reviewed By: craig.topper
Differential Revision: https://reviews.llvm.org/D120000

2 years ago[Support] Try 2: Reset option to its default if its Default field is undefined
Yevgeny Rouban [Wed, 9 Mar 2022 11:10:21 +0000 (18:10 +0700)]
[Support] Try 2: Reset option to its default if its Default field is undefined

opt::setDefaultImpl() is changed to set the option value to the option
type's default if the Default field is not set. This results in option
value reset by Option::reset() or ResetAllOptionOccurrences() even if
the cl::init() is not specified.

Example:
  StackOption<std::string> Str("str"); // No cl::init().
  Str = "some value";
  cl::ResetAllOptionOccurrences();
  EXPECT_EQ("", Str); // The Str is reset.

Reviewed By: lattner
Differential Revision: https://reviews.llvm.org/D115433

2 years ago[msan] Fix unittest for 9397bdc6
Vitaly Buka [Thu, 10 Mar 2022 01:20:49 +0000 (01:20 +0000)]
[msan] Fix unittest for 9397bdc6

"1.1" is double which can't be represented precicely as a float.

2 years ago[RISCV] Support 'generic' as a valid CPU name.
Craig Topper [Thu, 10 Mar 2022 00:43:17 +0000 (16:43 -0800)]
[RISCV] Support 'generic' as a valid CPU name.

Most other targets support 'generic', but RISCV issues an error.
This can require a special case in tools that use LLVM that aren't
clang.

This patch treats "generic" the same as an empty string and remaps
it to generic-rv/rv64 based on the triple. Unfortunately, it has to
be added to RISCV.td because MCSubtargetInfo is constructed and
parses the CPU before RISCVSubtarget's constructor gets a chance
to remap it. The CPU will then reparsed and the state in the
MCSubtargetInfo subclass will be updated again.

Fixes PR54146.

Reviewed By: khchen

Differential Revision: https://reviews.llvm.org/D121149

2 years ago[NFC] [HWASan] document why we tag Size but untag AlignedSize.
Florian Mayer [Thu, 10 Mar 2022 00:16:24 +0000 (16:16 -0800)]
[NFC] [HWASan] document why we tag Size but untag AlignedSize.

2 years ago[mlir][sparse] add end2end test for linalg.dot sparsification
Aart Bik [Wed, 9 Mar 2022 23:11:31 +0000 (15:11 -0800)]
[mlir][sparse] add end2end test for linalg.dot sparsification

Reviewed By: bixia

Differential Revision: https://reviews.llvm.org/D121344

2 years ago[OpenMP][CUDA] Fix the check of `setContext`
Shilei Tian [Wed, 9 Mar 2022 23:48:44 +0000 (18:48 -0500)]
[OpenMP][CUDA] Fix the check of `setContext`

2 years ago[mlir][sparse] added linalg.dot to sparse kernel collection
Aart Bik [Wed, 9 Mar 2022 19:04:00 +0000 (11:04 -0800)]
[mlir][sparse] added linalg.dot to sparse kernel collection

Reviewed By: bixia

Differential Revision: https://reviews.llvm.org/D121315

2 years agoRevert "[MSAN] add interceptor for timer_create, timer_settime, timer_gettime"
Kevin Athey [Wed, 9 Mar 2022 22:57:05 +0000 (14:57 -0800)]
Revert "[MSAN] add interceptor for timer_create, timer_settime, timer_gettime"

This reverts commit 0a4dec6cc2bf17acacc883cd897481028f1cf425.

breaks buildbots

2 years agoRevert "[MSAN] adjust Posix/timer.cpp"
Kevin Athey [Wed, 9 Mar 2022 22:55:12 +0000 (14:55 -0800)]
Revert "[MSAN] adjust Posix/timer.cpp"

This reverts commit f2a97536809588f1748d32d2e79c9a2a6b4ec335.

breaks buildbot

2 years ago[Analysis] remove bogus smin/smax pattern detection
Sanjay Patel [Wed, 9 Mar 2022 22:36:37 +0000 (17:36 -0500)]
[Analysis] remove bogus smin/smax pattern detection

This is a revert of cfcc42bdc. The analysis is wrong as shown by
the minimal tests for instcombine:
https://alive2.llvm.org/ce/z/y9Dp8A

There may be a way to salvage some of the other tests,
but that can be done as follow-ups. This avoids a miscompile
and fixes #54311.

2 years ago[InstCombine] add tests to show miscompiled smin/smax; NFC
Sanjay Patel [Wed, 9 Mar 2022 22:18:35 +0000 (17:18 -0500)]
[InstCombine] add tests to show miscompiled smin/smax; NFC

2 years ago[SDAG] Use MMO flags in MemSDNode folding
Stanislav Mekhanoshin [Wed, 9 Mar 2022 20:55:11 +0000 (12:55 -0800)]
[SDAG] Use MMO flags in MemSDNode folding

SDNodes with different target flags may now be folded together
rightfully resulting in the assertion in the refineAlignment.
Folding nodes with different target flags may result in the
wrong load instructions produced at least on the AMDGPU.

Fixes: SWDEV-326805

Differential Revision: https://reviews.llvm.org/D121335

2 years agoRevert "[libc++] Remove extension to support allocator<const T>"
Louis Dionne [Wed, 9 Mar 2022 21:59:59 +0000 (16:59 -0500)]
Revert "[libc++] Remove extension to support allocator<const T>"

This reverts commit 276ca873. That commit has quite a history at this
point. It was first landed in dbc647643577, which broke std::shared_ptr<T const>
and was reverted in 9138666f5. It was then re-applied in 276ca873, with
the std::shared_ptr issue fixed, but it caused widespread breakage at
Google (which suggests it would cause similar breakage in the wild too),
so now I'm reverting again.

Instead, I will add a escape hatch that vendors can turn on to enable
the extension and perform a phased transition over one or two releases
like we sometimes do when things become non-trivial.

2 years ago[debug-info] Debug salvage llvm.dbg.addr in original function that point into the...
Michael Gottesman [Wed, 9 Mar 2022 19:33:49 +0000 (11:33 -0800)]
[debug-info] Debug salvage llvm.dbg.addr in original function that point into the coroutine frame when splitting coros.

We are already doing this in the split functions while we clone. This just
handles the original function.

I also updated the coroutine split test to validate that we are always referring
to the msg in the context object instead of in a shadow copy.

rdar://83957028

Reviewed By: aprantl

Differential Revision: https://reviews.llvm.org/D121324

2 years ago[AArch64][SLP] Add a test with mutual reductions. NFC
David Green [Wed, 9 Mar 2022 21:46:57 +0000 (21:46 +0000)]
[AArch64][SLP] Add a test with mutual reductions. NFC

2 years ago[CompilerRT] Fix build of compiler-rt with musl
Colin Cross [Wed, 9 Mar 2022 20:45:45 +0000 (12:45 -0800)]
[CompilerRT] Fix build of compiler-rt with musl

Use the correct types for OFF_T, __sanitizer_time_t and
__sanitizer_dirent and forward time_t related functions
 to fix using compiler-rt with 32-bit musl libc.

Also redirect the time_t functions that are affected by
https://musl.libc.org/time64.html to use their 64-bit
ABI names.

Reviewed By: MaskRay

Differential Revision: https://reviews.llvm.org/D119358

2 years ago[RISCV] Switch undef -> poison in fixed-vector RVV tests
Craig Topper [Wed, 9 Mar 2022 21:38:32 +0000 (13:38 -0800)]
[RISCV] Switch undef -> poison in fixed-vector RVV tests

2 years ago[OpenMP][CUDA] Avoid calling `cuCtxSetCurrent` redundantly
Shilei Tian [Wed, 9 Mar 2022 21:32:40 +0000 (16:32 -0500)]
[OpenMP][CUDA] Avoid calling `cuCtxSetCurrent` redundantly

Currently we set ccontext everywhere accordingly, but that causes many
unnecessary function calls. For example, in the resource pool, if we need to
resize the pool, we need to get from allocator. Each call to allocate sets the
current context once, which is unnecessary. In this patch, we set the context
only in the entry interface functions, if needed. Actually in the best way this
should be implemented via RAII, but since `cuCtxSetCurrent` could return error,
and we don't use exception, we can't stop the execution if RAII fails.

Reviewed By: jdoerfert

Differential Revision: https://reviews.llvm.org/D121322

2 years ago[NFC][llvm-nm] create a new helper function exportSymbolNamesFromFiles for --export...
zhijian [Wed, 9 Mar 2022 21:28:55 +0000 (16:28 -0500)]
[NFC][llvm-nm] create a new helper function exportSymbolNamesFromFiles for --export-symbols
Summary:

create a new helper function exportSymbolNamesFromFiles for --export-symbols

Reviewer : James Henderson,Fangrui Song
Differential Revision: https://reviews.llvm.org/D120913

2 years agoRevert "Disable -Wmissing-prototypes for internal linkage functions that aren't expli...
David Blaikie [Wed, 9 Mar 2022 21:05:03 +0000 (21:05 +0000)]
Revert "Disable -Wmissing-prototypes for internal linkage functions that aren't explicitly marked "static""

Regresses:
typedef struct {
  static void  f() {
  }
} a_t;

Causing this to error instead of warn, because the linkage is computed
earlier/too early perhaps. I'll send out a review to see if there's some
other path forward or if this is an acceptable regression, etc.

This reverts commit 275c56226d7fbd6a4d554807374f78d323aa0c1c.

2 years ago[MSAN] adjust Posix/timer.cpp
Kevin Athey [Wed, 9 Mar 2022 20:57:06 +0000 (12:57 -0800)]
[MSAN] adjust Posix/timer.cpp

follow up to 0a4dec6cc2bf.
add unsupported for s390 (SEGV)
restore line that s390 complains, so following asserts work.

Differential Revision: https://reviews.llvm.org/D121326

2 years ago[LoopInterchange] Detect output dependency of a store instruction with itself
Congzhe Cao [Wed, 9 Mar 2022 20:49:05 +0000 (15:49 -0500)]
[LoopInterchange] Detect output dependency of a store instruction with itself

This patch is motivated by pr48057 where an output dependency is not detected
since loop interchange did not check a store instruction with itself.
Fixed that deficiency.

Reviewed By: bmahjour, Meinersbur, #loopoptwg

Differential Revision: https://reviews.llvm.org/D118102