Samin Guo [Tue, 1 Nov 2022 12:09:36 +0000 (20:09 +0800)]
dts:satrfive:jh7110: default support jh7110A gmac0
default support jh7110A gmac0
Signed-off-by: Samin Guo <samin.guo@starfivetech.com>
Samin Guo [Tue, 1 Nov 2022 12:04:52 +0000 (20:04 +0800)]
net:phy:motorcomm: support yt8521 inverted
jh7110B need yt8521 inverted.
Signed-off-by: Samin Guo <samin.guo@starfivetech.com>
Samin Guo [Tue, 1 Nov 2022 11:03:46 +0000 (19:03 +0800)]
net:phy:motorcomm: support modifying RGMII_TX_CLK delay train from dts
support use original or inverted RGMII_TX_CLK delay train.
10M/100M/1000M can be configured independently.
tx_inverted_xx = val;
for example:
&gmac0 {
#address-cells = <1>;
#size-cells = <0>;
phy0: ethernet-phy@0 {
tx_inverted_10 = <0>;
tx_inverted_100 = <1>;
tx_inverted_1000 = <1>;
};
};
0: original (default)
1: inverted
Signed-off-by: Samin Guo <samin.guo@starfivetech.com>
andy.hu [Fri, 28 Oct 2022 03:39:02 +0000 (03:39 +0000)]
Merge branch 'CR_2412_515_Clocktree_PLL1_Xingyu.Wu' into 'jh7110-5.15.y-devel'
CR_2412_515_Clocktree_PLL1_Xingyu.Wu
See merge request sdk/linux!553
andy.hu [Fri, 28 Oct 2022 03:38:26 +0000 (03:38 +0000)]
Merge branch 'CR_2440_515_Clocktree_1.5G_Xingyu.Wu' into 'jh7110-5.15.y-devel'
CR_2440_515_Clocktree_1.5G_Xingyu.Wu
See merge request sdk/linux!564
andy.hu [Fri, 28 Oct 2022 03:36:22 +0000 (03:36 +0000)]
Merge branch 'CR_2439_CPUFREQ_515_mason.huo' into 'jh7110-5.15.y-devel'
Cr 2439 cpufreq 515 mason.huo
See merge request sdk/linux!562
andy.hu [Fri, 28 Oct 2022 03:35:46 +0000 (03:35 +0000)]
Merge branch 'CR_2417_CPUIdle_515_mason.huo' into 'jh7110-5.15.y-devel'
Cr 2417 cpu idle 515 mason.huo
See merge request sdk/linux!559
andy.hu [Fri, 28 Oct 2022 03:27:46 +0000 (03:27 +0000)]
Merge branch 'CR_2462_DEV_PM_mason.huo' into 'jh7110-5.15.y-devel'
CR_2462 Port runtime PM from hibernation to devel
See merge request sdk/linux!574
mason.huo [Fri, 29 Jul 2022 07:17:55 +0000 (15:17 +0800)]
regulator: axp15060: Change the cpu_vdd_0p9 to cpu_vdd
Rename the cpu_vdd_0p9 regulator to cpu_vdd,
since the regulator may changed per cpu frequency.
Signed-off-by: mason.huo <mason.huo@starfivetech.com>
Kevin.xie [Tue, 12 Jul 2022 01:57:05 +0000 (09:57 +0800)]
driver: regulator: Add axp15060 pmic regulator driver
Add support for the axp15060 pmic.
Signed-off-by: Kevin.xie <kevin.xie@starfivetech.com>
mason.huo [Wed, 26 Oct 2022 03:47:45 +0000 (11:47 +0800)]
cpufreq: starfive: Remove unuse clocks
The jh7110 pll0 is fixed for cpufreq,
so we should change the cpu_core clock directly.
Remove the pll0 & osc clock.
Signed-off-by: mason.huo <mason.huo@starfivetech.com>
mason.huo [Wed, 26 Oct 2022 03:43:20 +0000 (11:43 +0800)]
riscv: defconfigs: Enable cpufreq for jh7110
Set the default cpufreq govenor to ondemand.
Signed-off-by: mason.huo <mason.huo@starfivetech.com>
mason.huo [Mon, 24 Oct 2022 08:51:24 +0000 (16:51 +0800)]
riscv: dts: starfive: Remove unsupported cpu frequencies
As the pll0 is fixed, there are only four cpu frequencies
that can be divided from the pll0, so remove the other
cpu frequencies.
Signed-off-by: mason.huo <mason.huo@starfivetech.com>
Xingyu Wu [Thu, 27 Oct 2022 09:39:22 +0000 (17:39 +0800)]
sound:dwc:i2s:Add hibernation about i2srx-3ch
Add runtime pm and system pm in i2srx-3ch driver.
Signed-off-by: Xingyu Wu <xingyu.wu@starfivetech.com>
Xingyu Wu [Thu, 27 Oct 2022 08:06:02 +0000 (16:06 +0800)]
sound:dwc:i2s:Add hibernation about i2stx-4ch1
Add runtime pm and system pm in i2stx-4ch1 driver.
Signed-off-by: Xingyu Wu <xingyu.wu@starfivetech.com>
mason.huo [Thu, 27 Oct 2022 07:25:21 +0000 (15:25 +0800)]
riscv: deconfig: Enable pm advanced debug
Enable pm advanced debug, so that we can
check runtime PM status.
Signed-off-by: mason.huo <mason.huo@starfivetech.com>
Xingyu Wu [Fri, 21 Oct 2022 01:56:24 +0000 (09:56 +0800)]
sound:starfive:pwmdac:Add runtime pm operation
Add runtime pm operation in PWMDAC driver.
Signed-off-by: Xingyu Wu <xingyu.wu@starfivetech.com>
ziv.xu [Thu, 27 Oct 2022 02:55:00 +0000 (10:55 +0800)]
rtc:starfive: add pm ops for rtc
add pm ops for rtc
Signed-off-by: ziv.xu <ziv.xu@starfive.com>
Hal Feng [Wed, 26 Oct 2022 13:13:09 +0000 (21:13 +0800)]
i2c: designware: Descend startup priority
So i2c will be initialized after uart.
Signed-off-by: Hal Feng <hal.feng@starfivetech.com>
Hal Feng [Tue, 25 Oct 2022 12:18:39 +0000 (20:18 +0800)]
i2c: designware: Uncomment and recover the pm functions
Uncomment the system pm and runtime pm ops functions. Restore
the Synopsys DesignWare i2c driver to the original version.
Signed-off-by: Hal Feng <hal.feng@starfivetech.com>
Walker Chen [Thu, 27 Oct 2022 03:50:06 +0000 (11:50 +0800)]
CR_2345_Audio_DevicePM_walker.chen
Fix the bug that pdm function name spell error.
Signed-off-by: Walker Chen <walker.chen@starfivetech.com>
Walker Chen [Wed, 26 Oct 2022 11:19:12 +0000 (19:19 +0800)]
CR_2345_Audio_DevicePM_walker.chen
Disable clock when audio driver is loaded.
Signed-off-by: Walker Chen <walker.chen@starfivetech.com>
shanlong.li [Wed, 26 Oct 2022 09:44:58 +0000 (02:44 -0700)]
driver:gpu: add gpu runtime pm
fix up system pm error and add runtime pm
Signed-off-by: shanlong.li <shanlong.li@starfivetech.com>
Xingyu Wu [Wed, 26 Oct 2022 09:38:41 +0000 (17:38 +0800)]
sound:starfive:Add hibernation in I2S
Add hibernation in starfive I2S driver.
Signed-off-by: Xingyu Wu <xingyu.wu@starfivetech.com>
ziv.xu [Wed, 26 Oct 2022 06:14:04 +0000 (14:14 +0800)]
rtc-starfive.c:add system pm for rtc
add system pm for rtc
Signed-off-by: ziv.xu <ziv.xu@starfive.com>
ys [Wed, 26 Oct 2022 06:18:49 +0000 (23:18 -0700)]
drive:mailbox:add pm ops
add runtime pm and system pm ops
Signed-off-by: ys <eason.xiong@starfivetech.com>
William Qiu [Tue, 25 Oct 2022 07:00:23 +0000 (15:00 +0800)]
sec:starfive:add sec runtime PM ops
add sec runtime PM ops.
Signed-off-by: William Qiu <william.qiu@starfivetech.com>
William Qiu [Tue, 25 Oct 2022 02:39:46 +0000 (10:39 +0800)]
SDIO:starfive:modify SDIO/EMMC runtime PM callback function
modify SDIO/EMMC runtime PM callback function.
Signed-off-by: William Qiu <william.qiu@starfivetech.com>
William Qiu [Tue, 25 Oct 2022 02:36:38 +0000 (10:36 +0800)]
canfd:ipms:modify runtime PM callback funciton
modify runtime PM callback function.
Signed-off-by: William Qiu <william.qiu@starfivetech.com>
Xingyu Wu [Fri, 30 Sep 2022 07:26:59 +0000 (15:26 +0800)]
clk:starfive:isp:Add runtime and system pm control
Add runtime and system pm in isp clock tree driver.
Signed-off-by: Xingyu Wu <xingyu.wu@starfivetech.com>
Hal Feng [Fri, 21 Oct 2022 06:38:17 +0000 (14:38 +0800)]
pwm: starfive: Remove macro UNIVERSAL_DEV_PM_OPS
Because it causes error when system pm.
Signed-off-by: Hal Feng <hal.feng@starfivetech.com>
ziv.xu [Fri, 21 Oct 2022 06:36:51 +0000 (14:36 +0800)]
drivers: temp sensor: reset execute permissions
reset execute permissions for FILE: drivers/hwmon/sfctemp.c
Signed-off-by: ziv.xu <ziv.xu@starfive.com>
ziv.xu [Fri, 21 Oct 2022 03:43:22 +0000 (11:43 +0800)]
add devcie pm for temp sensor
add device pm for temp sensor
Signed-off-by: ziv.xu <ziv.xu@starfive.com>
Ziv.Xu [Sat, 8 Oct 2022 07:17:46 +0000 (15:17 +0800)]
add device pm for trng
add device pm for trng
Signed-off-by: Ziv.Xu <Ziv.Xu@starfivetech.com>
Ziv.Xu [Mon, 10 Oct 2022 06:58:15 +0000 (14:58 +0800)]
add device pm for spi
add device pm for spi
Signed-off-by: Ziv.Xu <Ziv.Xu@starfivetech.com>
William Qiu [Fri, 21 Oct 2022 03:46:05 +0000 (11:46 +0800)]
SDIO:starfive:add SDIO/EMMC runtime pm ops
add SDIO/EMMC runtime pm ops.
Signed-off-by: William Qiu <william.qiu@starfivetech.com>
William Qiu [Fri, 21 Oct 2022 02:13:13 +0000 (10:13 +0800)]
canfd:ipms:add canfd runtime PM ops
add canfd runtime PM ops.
Signed-off-by: William Qiu <william.qiu@starfivetech.com>
Xingyu Wu [Thu, 20 Oct 2022 07:44:59 +0000 (15:44 +0800)]
sound:starfive:spdif:Add hibernation operation
Add runtime pm and system pm in spdif driver.
Signed-off-by: Xingyu Wu <xingyu.wu@starfivetech.com>
Hal Feng [Wed, 19 Oct 2022 12:10:56 +0000 (20:10 +0800)]
pwm: starfive: Add pm handling (system/runtime pm ops)
Add system/runtime pm ops functions and enable runtime pm.
Signed-off-by: Hal Feng <hal.feng@starfivetech.com>
Jianlong Huang [Wed, 19 Oct 2022 10:00:02 +0000 (18:00 +0800)]
pinctrl:starfive: Add system pm interface
Support system pm fuction when suspend and resume.
Signed-off-by: Jianlong Huang <jianlong.huang@starfivetech.com>
Walker Chen [Fri, 14 Oct 2022 07:43:20 +0000 (15:43 +0800)]
CR_2345_Audio_DevicePM_walker.chen
Implement Runtime PM and System PM for PDM and TDM module.
Signed-off-by: Walker Chen <walker.chen@linux.starfivetech.com>
Ziv.Xu [Thu, 13 Oct 2022 09:09:05 +0000 (17:09 +0800)]
add system pm for watchdog
add system pm for watchdog
Signed-off-by: Ziv.Xu <Ziv.Xu@starfivetech.com>
Ziv.Xu [Sat, 8 Oct 2022 07:02:15 +0000 (15:02 +0800)]
add runtime pm for watchdog
add runtime pm for watchdog
Signed-off-by: Ziv.Xu <Ziv.Xu@starfivetech.com>
minda.chen [Sat, 8 Oct 2022 11:07:06 +0000 (19:07 +0800)]
usb: cdns: add pm and runtume pm ops
add starfive pm supend/resume and runtime pm runtime
suspend and resume ops
Signed-off-by: minda.chen <minda.chen@starfivetech.com>
Kevin.xie [Thu, 13 Oct 2022 03:29:30 +0000 (11:29 +0800)]
drivers: pci: Support system pm no irq ops.
Because of the limitation of hardware design, only enable/disable clk here.
Signed-off-by: Kevin.xie <kevin.xie@starfivetech.com>
Kevin.xie [Thu, 13 Oct 2022 02:53:59 +0000 (10:53 +0800)]
drivers: pci: Support runtime pm & release when found empty slot in probe.
Used PLDA link up/down status in probe to indicate the slot situations.
Signed-off-by: Kevin.xie <kevin.xie@starfivetech.com>
changhuang.liang [Wed, 19 Oct 2022 06:14:37 +0000 (14:14 +0800)]
media: starfive: Remove hardware operations in vin init
Remove hardware operations in vin init, hardware operation need turn on
power domain.
Signed-off-by: changhuang.liang <changhuang.liang@starfivetech.com>
changhuang.liang [Wed, 19 Oct 2022 03:08:00 +0000 (11:08 +0800)]
dts: starfive: VIN delete noc bus clock
VIN delete noc bus clock.
Signed-off-by: changhuang.liang <changhuang.liang@starfivetech.com>
changhuang.liang [Wed, 19 Oct 2022 03:03:54 +0000 (11:03 +0800)]
media: starfive: Delete isp noc bus clock
Delete operate isp noc bus clock in vin module.
Signed-off-by: changhuang.liang <changhuang.liang@starfivetech.com>
changhuang.liang [Wed, 19 Oct 2022 02:03:38 +0000 (10:03 +0800)]
media: starfive: Vin module get reset use share
Vin module get reset use share due to the same reset single with isp
clock module.
Signed-off-by: changhuang.liang <changhuang.liang@starfivetech.com>
changhuang.liang [Mon, 10 Oct 2022 12:18:20 +0000 (20:18 +0800)]
v4l2: Fixed vin line stream_out not change except WR.
Fixed vin line stream_out not change except WR.
Signed-off-by: changhuang.liang <changhuang.liang@starfivetech.com>
changhuang.liang [Mon, 26 Sep 2022 09:12:04 +0000 (17:12 +0800)]
v4l2: VIN driver use pm
VIN driver use pm save power, delete turn on pmu multiple times
and modify isp clk and reset after turn on pmu.
Signed-off-by: changhuang.liang <changhuang.liang@starfivetech.com>
changhuang.liang [Fri, 30 Sep 2022 08:56:24 +0000 (16:56 +0800)]
ov4689: Correct some code
Correct some code.
Signed-off-by: changhuang.liang <changhuang.liang@starfivetech.com>
changhuang.liang [Fri, 30 Sep 2022 08:13:57 +0000 (16:13 +0800)]
sc2235: Delete the control direct control register
Delete the control direct control register and correct some code.
Signed-off-by: changhuang.liang <changhuang.liang@starfivetech.com>
changhuang.liang [Fri, 30 Sep 2022 07:19:26 +0000 (15:19 +0800)]
sc2235: Use runtime/system pm
Use runtime/system pm save power.
Signed-off-by: changhuang.liang <changhuang.liang@starfivetech.com>
changhuang.liang [Thu, 29 Sep 2022 07:14:05 +0000 (15:14 +0800)]
imx219: Separate set stream and runtime PM
Separate set stream and runtime PM, use runtime PM.
Signed-off-by: changhuang.liang <changhuang.liang@starfivetech.com>
changhuang.liang [Wed, 28 Sep 2022 02:36:12 +0000 (10:36 +0800)]
ov4689: Use runtime PM
Switch to using runtime PM for power management.
Signed-off-by: changhuang.liang <changhuang.liang@starfivetech.com>
changhuang.liang [Tue, 27 Sep 2022 07:42:44 +0000 (15:42 +0800)]
ov4689: delete read chip id in set power
delete read chip id in set power on.
Signed-off-by: changhuang.liang <changhuang.liang@starfivetech.com>
Ulf Hansson [Sat, 14 May 2022 15:20:44 +0000 (17:20 +0200)]
cpuidle: riscv-sbi: Fix code to allow a genpd governor to be used
The intent is to use a genpd governor when there are some states that needs
to be managed. Although, the current code ends up to never assign a
governor, let's fix this.
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Reviewed-by: Anup Patel <anup@brainfault.org>
Tested-by: Anup Patel <anup@brainfault.org>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Signed-off-by: minda.chen <minda.chen@starfivetech.com>
Atish Patra [Mon, 30 May 2022 04:33:31 +0000 (12:33 +0800)]
RISC-V: Avoid using per cpu array for ordered booting
Currently both order booting and spinwait approach uses a per cpu
array to update stack & task pointer. This approach will not work for the
following cases.
1. If NR_CPUs are configured to be less than highest hart id.
2. A platform has sparse hartid.
This issue can be fixed for ordered booting as the booting cpu brings up
one cpu at a time using SBI HSM extension which has opaque parameter
that is unused until now.
Introduce a common secondary boot data structure that can store the stack
and task pointer. Secondary harts will use this data while booting up
to setup the sp & tp.
Reviewed-by: Anup Patel <anup@brainfault.org>
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
From
9a2451f1866344d38b4a1dc20396e3a03954fcd7
Resolved merge conflict.
Signed-off-by: <jeeheng.sia@starfivetech.com>
Signed-off-by: minda.chen <minda.chen@starfivetech.com>
Anup Patel [Wed, 9 Jun 2021 12:13:22 +0000 (17:43 +0530)]
RISC-V: Use SBI SRST extension when available
The SBI SRST extension provides a standard way to poweroff and
reboot the system irrespective to whether Linux RISC-V S-mode
is running natively (HS-mode) or inside Guest/VM (VS-mode).
The SBI SRST extension is available in the SBI v0.3 specification.
(Refer, https://github.com/riscv/riscv-sbi-doc/releases/tag/v0.3.0-rc1)
This patch extends Linux RISC-V SBI implementation to detect
and use SBI SRST extension.
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
Signed-off-by: minda.chen <minda.chen@starfivetech.com>
mason.huo [Thu, 27 Oct 2022 01:18:47 +0000 (09:18 +0800)]
cpuidle: riscv-sbi: Correct the compatible string
The riscv-sbi driver compatible string should not
changed to starfive since it's a common driver
for riscv.
Signed-off-by: mason.huo <mason.huo@starfivetech.com>
mason.huo [Thu, 27 Oct 2022 00:54:39 +0000 (08:54 +0800)]
riscv: dts: Remove unsupport idle states
The JH7110 soc only support WFI cpu idle state,
remove the unsupport states.
Add a long WFI for entering the cpu_suspend().
Signed-off-by: mason.huo <mason.huo@starfivetech.com>
Xingyu Wu [Mon, 24 Oct 2022 10:20:54 +0000 (18:20 +0800)]
clk:starfive:Count PLL1 rate
Count PLL1 rate through reading syscon registers.
Signed-off-by: Xingyu Wu <xingyu.wu@starfivetech.com>
Xingyu Wu [Wed, 26 Oct 2022 06:56:09 +0000 (14:56 +0800)]
clk:starfive:Change PLL0 rate to 1.5GHz
Change PLL0 rate to 1.5GHz and change cpu_core divider.
Signed-off-by: Xingyu Wu <xingyu.wu@starfivetech.com>
andy.hu [Fri, 14 Oct 2022 07:34:12 +0000 (07:34 +0000)]
Merge branch 'CR_2285_SEC_jiajie.ho' into 'jh7110-5.15.y-devel'
Cr 2285 sec jiajie.ho
See merge request sdk/linux!533
andy.hu [Fri, 14 Oct 2022 06:37:19 +0000 (06:37 +0000)]
Merge branch 'CR_2261_CAN_515_william.qiu' into 'jh7110-5.15.y-devel'
Cr 2261 can 515 william.qiu
See merge request sdk/linux!521
andy.hu [Fri, 14 Oct 2022 06:34:10 +0000 (06:34 +0000)]
Merge branch 'CR_2141_SEC_jiajie.ho' into 'jh7110-5.15.y-devel'
CR_2141:crypto:starfive: Enhanced AES driver to handle negative cases
See merge request sdk/linux!517
andy.hu [Fri, 14 Oct 2022 06:22:39 +0000 (06:22 +0000)]
Merge branch 'CR_2307_PWMDAC_515_walker.chen' into 'jh7110-5.15.y-devel'
CR_2307_PWMDAC_515: fix playback repeatly issue
See merge request sdk/linux!524
andy.hu [Fri, 14 Oct 2022 06:12:02 +0000 (06:12 +0000)]
Merge branch 'CR_1861_515_HDMI_AUDIO_Xingyu.Wu' into 'jh7110-5.15.y-devel'
CR_1861_515_HDMI_AUDIO_Xingyu.Wu
See merge request sdk/linux!526
jiajie.ho [Fri, 14 Oct 2022 02:07:35 +0000 (10:07 +0800)]
CR_2285:SEC:Crypto:Starfive: Update hardware engine DMA driver
Updating Starfive Jh7110 Crypto hardware engine
to use orginal ARM PL08X driver.
Signed-off-by: jiajie.ho <jiajie.ho@starfivetech.com>
jiajie.ho [Fri, 14 Oct 2022 01:57:06 +0000 (09:57 +0800)]
dt-bindings:SEC: Remove bindings for SEC_DMA
Removing dt-bindings for Starfive JH7110 SEC_DMA as
the hardware engine will use original ARM PL08X
driver.
Signed-off-by: jiajie.ho <jiajie.ho@starfivetech.com>
Xingyu Wu [Tue, 11 Oct 2022 13:16:56 +0000 (21:16 +0800)]
sound:starfive:Remove i2srx-master and merge into starfive_i2s
Remove i2srx-master.c and i2srx-master.h files,
and merge into starfive_i2s.c and starfive_i2s.h files.
Signed-off-by: Xingyu Wu <xingyu.wu@starfivetech.com>
Xingyu Wu [Tue, 11 Oct 2022 13:11:39 +0000 (21:11 +0800)]
sound:starfive:Change the order about mclk_ext's operation
Change the order about setting parent to mclk_ext after resets
when PDM registering.
Signed-off-by: Xingyu Wu <xingyu.wu@starfivetech.com>
Xingyu Wu [Tue, 11 Oct 2022 02:51:48 +0000 (10:51 +0800)]
arch:dts:starfive:Add 'sound-dai' function in hdmi node
Add new audio device in audio card about hdmi and i2s.
Signed-off-by: Xingyu Wu <xingyu.wu@starfivetech.com>
Xingyu Wu [Tue, 11 Oct 2022 02:46:07 +0000 (10:46 +0800)]
gpu:drm:Add audio function in inno hdmi
Could playback audio through HDMI.
Signed-off-by: Xingyu Wu <xingyu.wu@starfivetech.com>
Xingyu Wu [Tue, 11 Oct 2022 02:32:46 +0000 (10:32 +0800)]
arch:dts:starfive:Change mclk_ext pin
Change mclk_ext pin from GPIO61 to GPIO4.
Signed-off-by: Xingyu Wu <xingyu.wu@starfivetech.com>
Xingyu Wu [Tue, 11 Oct 2022 02:29:59 +0000 (10:29 +0800)]
arch:dts:starfive:Modify i2stx_4ch0 node
Add mclk_ext clock and enable i2stx_4ch0 status.
Signed-off-by: Xingyu Wu <xingyu.wu@starfivetech.com>
Xingyu Wu [Tue, 11 Oct 2022 02:19:27 +0000 (10:19 +0800)]
sound:starfive:Add I2S driver
Add I2S driver for starfive.
Signed-off-by: Xingyu Wu <xingyu.wu@starfivetech.com>
William Qiu [Tue, 11 Oct 2022 02:11:18 +0000 (10:11 +0800)]
can:starfive:modify some data field and clock frequency
modify some data field and clock frequency
Signed-off-by: William Qiu <william.qiu@starfivetech.com>
Walker Chen [Mon, 10 Oct 2022 13:36:03 +0000 (21:36 +0800)]
CR_2307_PWMDAC_515: fix playback repeatly issue
fix the bug that error occurs when playback repleatly.
Signed-off-by: Walker Chen <walker.chen@linux.starfivetech.com>
William Qiu [Sun, 9 Oct 2022 03:43:49 +0000 (11:43 +0800)]
dts:starfive:modify can dts config and improve CAN IO driving force
modify can dts config and improve CAN IO driving force
Signed-off-by: William Qiu <william.qiu@starfivetech.com>
jiajie.ho [Tue, 4 Oct 2022 17:12:05 +0000 (01:12 +0800)]
CR_2141:crypto:starfive: Enhanced AES driver to handle negative cases
1. Added input text length check for ECB and CBC mode.
2. Added input IV check for CCM mode.
3. Removed unnecessary zero data check.
4. Updated functions to return proper error codes.
Signed-off-by: jiajie.ho <jiajie.ho@starfivetech.com>
andy.hu [Fri, 30 Sep 2022 03:44:05 +0000 (03:44 +0000)]
Merge branch 'CR_2248_PMU_walker.chen' into 'jh7110-5.15.y-devel'
CR_2248_PMU_515: Fix some power domain can not be disabled
See merge request sdk/linux!515
andy.hu [Fri, 30 Sep 2022 03:21:39 +0000 (03:21 +0000)]
Merge branch 'CR_2233_CMA_515_samin.guo' into 'jh7110-5.15.y-devel'
CR_2233_CMA_515_samin.guo：riscv:dts:jh7110: Modify CMA reserved space to better support 2G DRAM
See merge request sdk/linux!509
Walker Chen [Wed, 28 Sep 2022 08:08:44 +0000 (16:08 +0800)]
pmu: starfive: Fix some power domain can not be disabled
Vout and isp domain can not be disabled during clock tree
is running probe function. This bug has been fixed.
Signed-off-by: Walker Chen <walker.chen@linux.starfivetech.com>
samin [Mon, 26 Sep 2022 04:33:27 +0000 (12:33 +0800)]
riscv:dts:jh7110: Modify CMA reserved space to better support 2G DRAM
When the DDR is 2G (0x40000000-0xc0000000), it may cause address usage
problems.
Signed-off-by: samin <samin.guo@starfivetech.com>
andy.hu [Fri, 23 Sep 2022 08:28:22 +0000 (08:28 +0000)]
Merge branch 'CR_1849_DMA_walker.chen' into 'jh7110-5.15.y-devel'
CR_1849_DMA_walker.chen
See merge request sdk/linux!483
andy.hu [Fri, 23 Sep 2022 07:03:25 +0000 (07:03 +0000)]
Merge branch 'CR_2180_evb_515_DRM_WESTON_keith.zhao' into 'jh7110-5.15.y-devel'
CR_2180:riscv:driver:drm: Weston-GPU
See merge request sdk/linux!501
andy.hu [Fri, 23 Sep 2022 06:59:39 +0000 (06:59 +0000)]
Merge branch 'CR_2162_GPU_shanlong.li' into 'jh7110-5.15.y-devel'
Cr 2162 gpu shanlong.li
See merge request sdk/linux!499
andy.hu [Fri, 23 Sep 2022 06:57:42 +0000 (06:57 +0000)]
Merge branch 'CR_2156_v4l2_515_changhuang.liang' into 'jh7110-5.15.y-devel'
CR_2156_v4l2_515_changhuang.liang v4l2: modify vin clk base on pll2 change
See merge request sdk/linux!491
andy.hu [Fri, 23 Sep 2022 06:46:17 +0000 (06:46 +0000)]
Merge branch 'CR_2127_PCIe_515_Kevin.xie' into 'jh7110-5.15.y-devel'
CR 2127 drivers: pci: Support 64bit prefetchable MMIO range.
See merge request sdk/linux!503
andy.hu [Fri, 23 Sep 2022 06:44:23 +0000 (06:44 +0000)]
Merge branch 'CR_2123_515_SPDIF_mclkext_Xingyu.Wu' into 'jh7110-5.15.y-devel'
CR_2123_515_spdif_mclkext_xingyu.wu
See merge request sdk/linux!489
shanlong.li [Fri, 23 Sep 2022 06:37:27 +0000 (23:37 -0700)]
driver:gpu: gpu driver change to release
gpu driver change to release
Signed-off-by: shanlong.li <shanlong.li@starfivetech.com>
andy.hu [Fri, 23 Sep 2022 06:35:35 +0000 (06:35 +0000)]
Merge branch 'CR_1737_SEC_jiajie.ho' into 'jh7110-5.15.y-devel'
CR_1737:crypto:starfive: Fixed AEAD tag generation and verification
See merge request sdk/linux!505
shanlong.li [Thu, 15 Sep 2022 03:01:51 +0000 (20:01 -0700)]
driver:GPU:set the gpu frequency to 594Mhz
set the gpu frequency to 594Mhz
Signed-off-by: shanlong.li <shanlong.li@starfivetech.com>
shanlong.li [Thu, 15 Sep 2022 02:59:44 +0000 (19:59 -0700)]
dts:GPU: add core clk
add core clk
Signed-off-by: shanlong.li <shanlong.li@starfivetech.com>
jiajie.ho [Thu, 22 Sep 2022 04:31:49 +0000 (12:31 +0800)]
CR_1737:crypto:starfive: Fixed AEAD tag generation and verification
Added support in AES GCM and CCM mode for various tag length and
tag verification for non-AES blocksize aligned text.
Signed-off-by: jiajie.ho <jiajie.ho@starfivetech.com>
keith.zhao [Wed, 21 Sep 2022 01:56:46 +0000 (09:56 +0800)]
riscv:driver:drm: Weston-GPU
add format_mod_supported interface for userspace
Signed-off-by: keith <keith.zhao@starfivetech.com>
Kevin.xie [Tue, 20 Sep 2022 09:11:49 +0000 (17:11 +0800)]
drivers: pci: Support 64bit prefetchable MMIO range.
Verification has been completed on NVIDIA GT710 with modetest.
Signed-off-by: Kevin.xie <kevin.xie@starfivetech.com>
projects / platform / kernel / linux-starfive.git / log