Louis Dionne [Sat, 25 Mar 2023 17:55:04 +0000 (13:55 -0400)]
[libc++][NFC] Improve documentation for running BuildKite agent locally
Aiden Grossman [Sat, 25 Mar 2023 17:15:01 +0000 (17:15 +0000)]
[Docs][llvm-mc] Add documentation on --filetype flag
Currently the filetype flag is not documented, and knowing the behavior
of this flag is fairly important for doing anything other than
disassembling to text assembly.
Reviewed By: lattner
Differential Revision: https://reviews.llvm.org/D146878
Benjamin Kramer [Sat, 25 Mar 2023 12:33:17 +0000 (13:33 +0100)]
[lldb] Move #include out of namespace lldb. NFC.
Including system headers in a namespace is not safe.
Corentin Jabot [Sat, 25 Mar 2023 12:15:08 +0000 (13:15 +0100)]
[Clang] Update DR status page to reflect Core Issues List 111.
4vtomat [Wed, 26 Oct 2022 02:09:21 +0000 (19:09 -0700)]
[RISCV] Support vector crypto extension ISA string and assembly
LLVM implements the 0.3 draft specification:
https://github.com/riscv/riscv-crypto/releases/download/v20230206/riscv-crypto-spec-vector.pdf
, and current vector crypto extension version can be found in:
https://github.com/riscv/riscv-crypto.
Differential Revision: https://reviews.llvm.org/D141672
Matthias Springer [Sat, 25 Mar 2023 11:17:45 +0000 (12:17 +0100)]
[mlir][Analysis] Fix assertion in FlatLinearConstraints
Differential Revision: https://reviews.llvm.org/D146869
Nitin John Raj [Thu, 23 Mar 2023 19:55:58 +0000 (12:55 -0700)]
[RISCV][RISCVISelLowering] Add tail agnostic policy operand to VECREDUCE instructions
Differential Revision: https://reviews.llvm.org/D146752
Nicolas Vasilache [Sat, 25 Mar 2023 07:25:28 +0000 (00:25 -0700)]
[mlir][Vector] Use a RewriterBase for IR rewrites in VectorTransferOpTransforms
Luo, Yuanke [Sat, 25 Mar 2023 01:59:31 +0000 (09:59 +0800)]
[X86] Fix the incorrect displacement for prolog/epilog
The bug is introduced in rGe4ceb5a7bb9b which set the wrong offset from
the stack base. This patch is to fix the bug.
Differential Revision: https://reviews.llvm.org/D146862
Roland McGrath [Sat, 25 Mar 2023 03:59:17 +0000 (20:59 -0700)]
[libc] Remove unused aarch64 sqrt and sqrtf implementations
These files are not used because the generic sqrt and sqrtf
functions already go through internal layers that reach the
machine-specific internal implemenations.
Reviewed By: sivachandra
Differential Revision: https://reviews.llvm.org/D146865
Craig Topper [Sat, 25 Mar 2023 02:59:12 +0000 (19:59 -0700)]
[RISCV] Make RISCVMergeBaseOffsetOpt a class instead of a struct. NFC
This lets us remove 'private:' from the top of the class.
While there collect the other private member variable at the top
of the class.
Sam McCall [Sat, 25 Mar 2023 03:32:52 +0000 (04:32 +0100)]
[Analysis] Fix use-after-scope in CFGElement dump
Sam McCall [Wed, 22 Mar 2023 12:16:17 +0000 (13:16 +0100)]
[dataflow] handle missing case in value debug strings
Differential Revision: https://reviews.llvm.org/D146625
Ye Luo [Sat, 25 Mar 2023 02:10:03 +0000 (21:10 -0500)]
Revert "[OpenMP] Ensure memory fences are created with barriers for AMDGPUs"
This reverts commit
36d6217c4eb02c15168bf74c9f7ef44ea4fb7e41.
Ye Luo [Sat, 25 Mar 2023 01:36:51 +0000 (20:36 -0500)]
[OpenMP] Ensure memory fences are created with barriers for AMDGPUs
It turns out that the `__builtin_amdgcn_s_barrier()` alone does not emit
a fence. We somehow got away with this and assumed it would work as it
(hopefully) is correct on the NVIDIA path where we just emit a
`__syncthreads`. After talking to @arsenm we now (mostly) align with the
OpenCL barrier implementation [1] and emit explicit fences for AMDGPUs.
It seems this was the underlying cause for #59759, but I am not 100%
certain. There is a chance this simply hides the problem.
Fixes: https://github.com/llvm/llvm-project/issues/59759
[1] https://github.com/RadeonOpenCompute/ROCm-Device-Libs/blob/
07b347366eb2c6ebc3414af323c623cbbbafc854/opencl/src/workgroup/wgbarrier.cl#L21
Reviewed By: ye-luo
Differential Revision: https://reviews.llvm.org/D145290
Joseph Huber [Fri, 24 Mar 2023 20:53:05 +0000 (15:53 -0500)]
[libc] Implement the RPC client / server for NVPTX
This patch adds the necessary code to impelement the existing RPC client
/ server interface when targeting NVPTX GPUs. This follows closely to
the implementation in the AMDGPU version. This does not yet enable unit
testing as the `nvlink` linker does not support static libraries. So
that will need to be worked around.
I am ignoring the RPC duplication between the AMDGPU and NVPTX loaders. This
will be changed completely later so there's no point unifying the code at this
stage. The implementation was tested manually with the following file and
compilation flags.
```
namespace __llvm_libc {
void write_to_stderr(const char *msg);
void quick_exit(int);
} // namespace __llvm_libc
using namespace __llvm_libc;
int main(int argc, char **argv, char **envp) {
for (int i = 0; i < argc; ++i) {
write_to_stderr(argv[i]);
write_to_stderr("\n");
}
quick_exit(255);
}
```
```
$ clang++ crt1.o rpc_client.o quick_exit.o io.o main.cpp --target=nvptx64-nvidia-cuda -march=sm_70 -o image
$ ./nvptx_loader image 1 2 3
image
1
2
3
$ echo $?
255
```
Depends on D146681
Reviewed By: jdoerfert
Differential Revision: https://reviews.llvm.org/D146846
Joseph Huber [Thu, 23 Mar 2023 01:00:13 +0000 (20:00 -0500)]
[libc] Add a loader utility for NVPTX architectures for testing
This patch adds a loader utility targeting the CUDA driver API to launch
NVPTX images called `nvptx_loader`. This takes a GPU image on the
command line and launches the `_start` kernel with the appropriate
arguments. The `_start` kernel is provided by the already implemented
`nvptx/start.cpp`. So, an application with a `main` function can be
compiled and run as follows.
```
clang++ --target=nvptx64-nvidia-cuda main.cpp crt1.o -march=sm_70 -o image
./nvptx_loader image args to kernel
```
This implementation is not tested and does not yet support RPC. This
requires further development to work around NVIDIA specific limitations
in atomics and linking.
Reviewed By: jdoerfert
Differential Revision: https://reviews.llvm.org/D146681
Alex Langford [Sat, 25 Mar 2023 00:53:52 +0000 (17:53 -0700)]
[lldb][NFC] Remove outdated TODO in Log.h
The code this TODO was referring to was removed in
c34698a811b137b705738b7f8d193bc896027fb8.
Alex Langford [Sat, 25 Mar 2023 00:28:13 +0000 (17:28 -0700)]
[lldb][NFC] Update and re-organize lldb-types.h
- Address the TODO by identifying and documenting all types needed by a
host system in order for lldb to work correctly
- Reformatted the comments to be easier to read
- Put everything inside of one namespace declaration instead of having
multiple of the same
- Move the macros up to be right under the accompanying definitions
Jonas Devlieghere [Sat, 25 Mar 2023 00:31:39 +0000 (17:31 -0700)]
[lldb] Remove errant call to SBReproducer.SetWorkingDirectory
The old reproducer functionality has been removed. Remove this call as
it's now just a NO-OP.
Nitin John Raj [Fri, 24 Feb 2023 21:45:31 +0000 (13:45 -0800)]
[RISCV] Made fsqrtv pseudoinstruction SEW-aware
Nitin John Raj [Fri, 24 Feb 2023 21:26:00 +0000 (13:26 -0800)]
[RISCV] Made division pseudoinstructions SEW-aware
Nitin John Raj [Fri, 24 Feb 2023 21:31:15 +0000 (13:31 -0800)]
[RISCV] Made vrgather.vv and vrgatherei16 pseudoinstructions SEW-aware
Nitin John Raj [Fri, 24 Feb 2023 19:40:38 +0000 (11:40 -0800)]
[RISCV] Made vcompress pseudoinstruction SEW-aware
Nitin John Raj [Fri, 24 Feb 2023 19:18:55 +0000 (11:18 -0800)]
[RISCV][NFC] Remove SEW suffix from pseudoinstructions
Nitin John Raj [Fri, 24 Feb 2023 19:17:29 +0000 (11:17 -0800)]
[RISCV][NFC] Added possible SEWs associated with a given LMUL
Nitin John Raj [Mon, 6 Mar 2023 19:09:02 +0000 (11:09 -0800)]
[RISCV][NFC] Broke ReadVRGatherVV into ReadVRGatherVV_data and ReadVRGatherVV_index to separate the reads for VRGatherVV
Differential Revision: https://reviews.llvm.org/D145406
Nitin John Raj [Mon, 6 Mar 2023 18:37:11 +0000 (10:37 -0800)]
[RISCV][NFC] Renamed [Read/Write]VGather* -> [Read/Write]VRGatherV*
Differential Revision: https://reviews.llvm.org/D145402
Lang Hames [Fri, 24 Mar 2023 23:14:58 +0000 (16:14 -0700)]
[llvm-jitlink] Remove unnecessary header include left in
01bdd8cffca.
Lang Hames [Fri, 24 Mar 2023 21:43:32 +0000 (14:43 -0700)]
[llvm-jitlink] Rename -show-graph option to -show-graphs, make it a regex.
The original -show-graph option dumped the LinkGraph for all graphs loaded into
the session, but can make it difficult to see small graphs (e.g. reduced test
cases) among the surrounding larger files (especially the ORC runtime).
The new -show-graphs option takes a regex and dumps only those graphs matching
the regex. This allows testcases to specify exactly which graphs to dump.
Daniel Thornburgh [Wed, 22 Mar 2023 18:02:41 +0000 (11:02 -0700)]
[Fuchsia] Add FUCHSIA_USE_MULTIPLE_DISTRIBUTIONS.
This flag causes the toolchain distribution to be built using LLVM
CMake's multiple distribution feature. The distribution* family of CMake
targets would be replaced with the toolchain-distribution* family.
This shouldn't otherwise affect the semantics of the build, but it sets
up the ability to split out the LLDB build from the main distribution
used by Fuchsia.
Reviewed By: phosek
Differential Revision: https://reviews.llvm.org/D146665
wren romano [Fri, 24 Mar 2023 22:24:02 +0000 (15:24 -0700)]
[mlir][sparse] Factoring out LoopEmitter::isValidLevel
Depends On D146674
Reviewed By: aartbik
Differential Revision: https://reviews.llvm.org/D146676
Alex Langford [Fri, 24 Mar 2023 22:47:27 +0000 (15:47 -0700)]
[lldb][NFC] Remove outdated TODOs from API headers
There were added when I removed the swig interface files in
662548c82683bd8657a3179afee693c4965a3dfd. However, they mostly meant for
me to better track the differences between the existing API headers and
bindings interfaces. There's nothing actionable about these so I remove
them.
Quinn Dawkins [Sun, 19 Mar 2023 00:14:57 +0000 (20:14 -0400)]
[mlir][linalg] Convert input type to accumulator type in im2col patterns
When the input types don't match the accumulator type in named
convolution ops there is supposed to be a conversion to the accumulator
type before the multiply and accumulate.
Differential Revision: https://reviews.llvm.org/D146824
harsh-nod [Fri, 24 Mar 2023 17:34:17 +0000 (10:34 -0700)]
[mlir][vector] Hoist redundant singleton vector transfer reads
For singleton transfer reads, we allow hoisting them out
of the enclosing loop if its users are either transfer reads
or memory effect free.
Differential Revision: https://reviews.llvm.org/D146828
wren romano [Fri, 24 Mar 2023 21:46:07 +0000 (14:46 -0700)]
[mlir][sparse] moving kInvalidId into "detail" namespace
In the next few commits I will be converting the various Merger identifier typedefs into newtypes; and once that's done, the `kInvalidId` constant will only be used internally and therefore does not need to be part of the public `mlir::sparse_tensor` namespace.
Depends On D146673
Reviewed By: aartbik
Differential Revision: https://reviews.llvm.org/D146674
wren romano [Fri, 24 Mar 2023 21:34:20 +0000 (14:34 -0700)]
[mlir][sparse] Updating TensorExp ctor to catch unknown TensorExp::Kind
Depends On D146562
Reviewed By: aartbik
Differential Revision: https://reviews.llvm.org/D146673
wren romano [Fri, 24 Mar 2023 21:24:27 +0000 (14:24 -0700)]
[mlir][sparse] Misc cleanup in Merger.h
* Moving the `Children` class to be nested under `TensorExp`.
* Marking `TensorExp`, `TensorExp::Children`, and `LatPoint` as final.
Depends On D146083
Reviewed By: aartbik
Differential Revision: https://reviews.llvm.org/D146562
wren romano [Fri, 24 Mar 2023 21:17:11 +0000 (14:17 -0700)]
[mlir][sparse] Updating the `Merger::{exp,lat,set}` methods to return const
This helps the `Merger` maintain invariants, as well as clarifying the immutability of the underlying objects (with the one exception of `TensorExp::val`).
Depends On: D146559
Reviewed By: aartbik
Differential Revision: https://reviews.llvm.org/D146083
Dave Lee [Fri, 24 Mar 2023 04:43:32 +0000 (21:43 -0700)]
[lldb] Add ability to hide the root name of a value
When printing a value, allow the root value's name to be elided, without omiting the
names of child values.
At the API level, this adds `SetHideRootName()`, which joins the existing
`SetHideName()` function.
This functionality is used by `dwim-print` and `expression`.
Fixes an issue identified by @jgorbe in https://reviews.llvm.org/D145609.
Differential Revision: https://reviews.llvm.org/D146783
Siva Chandra Reddy [Fri, 24 Mar 2023 20:24:57 +0000 (20:24 +0000)]
[libc][Obvious] Remove a compile opt to x86_64 longjmp in a previous commit.
The option -fno-omit-frame-pointer was accidentally added to the x86_64
longjmp target. This change not only removes it, but makes it
-fomit-frame-pointer.
David Majnemer [Fri, 24 Mar 2023 20:42:47 +0000 (20:42 +0000)]
Fix mlir/lib/Bindings/Python/IRTypes.cpp for Float8E4M3B11FNUZType
David Majnemer [Thu, 9 Mar 2023 23:10:57 +0000 (23:10 +0000)]
[APFloat] Add E4M3B11FNUZ
X. Sun et al. (https://dl.acm.org/doi/10.5555/3454287.3454728) published
a paper showing that an FP format with 4 bits of exponent, 3 bits of
significand and an exponent bias of 11 would work quite well for ML
applications.
Google hardware supports a variant of this format where 0x80 is used to
represent NaN, as in the Float8E4M3FNUZ format. Just like the
Float8E4M3FNUZ format, this format does not support -0 and values which
would map to it will become +0.
This format is proposed for inclusion in OpenXLA's StableHLO dialect: https://github.com/openxla/stablehlo/pull/1308
As part of inclusion in that dialect, APFloat needs to know how to
handle this format.
Differential Revision: https://reviews.llvm.org/D146441
Kazu Hirata [Fri, 24 Mar 2023 20:01:52 +0000 (13:01 -0700)]
[Support] Fix warnings
This patch fixes:
llvm/unittests/Support/ScopedPrinterTest.cpp:519:20: error: unused
variable 'InfDouble' [-Werror,-Wunused-variable]
llvm/unittests/Support/ScopedPrinterTest.cpp:520:16: error: unused
variable 'NaNDouble' [-Werror,-Wunused-variable]
llvm/unittests/Support/ScopedPrinterTest.cpp:516:15: error: unused
variable 'NaNFloat' [-Werror,-Wunused-variable]
llvm/unittests/Support/ScopedPrinterTest.cpp:515:19: error: unused
variable 'InfFloat' [-Werror,-Wunused-variable]
Since commit
fa56e362af475e0758cfb41c42f78db50da7235c has temporarily
disabled tests involving these constants, this patch simply comments
them out instead of removing them.
Stefan Gränitz [Fri, 24 Mar 2023 19:49:54 +0000 (20:49 +0100)]
[JITLink] Fix MSVC build error: formatv can't handle support::ulittle16_t values
The issue was reported with compiler output here: https://reviews.llvm.org/D144083#4219383
Spenser Bauman [Fri, 24 Mar 2023 19:42:12 +0000 (19:42 +0000)]
[mlir][tosa] Improve performance of tosa.transpose constant folding
Folding of the tosa.transpose operation is both time and memory
intensive as the underlying ElementsAttr is processed as a sequence of
Attributes. This change attempts operate on the underlying raw data of
the ElementsAttr.
In an example resnet50 network, this change reduces the time spent in
folding transpose ops from 35s to 1.5s.
Reviewed By: GeorgeARM, rsuderman, stellaraccident
Differential Revision: https://reviews.llvm.org/D146526
Joseph Huber [Fri, 24 Mar 2023 19:45:14 +0000 (14:45 -0500)]
[libc] Use `nvptx_kernel` attribute in NVPTX startup code
Summary:
A recent patch allowed us to emit a callable kernel from freestanding
NVPTX code. This allows us to move away from using the CUDA language.
This has several advantages in that it works around an entire assortment
of errors I was seeing while implementing RPC for Nvidia.
wlei [Fri, 24 Mar 2023 17:21:38 +0000 (10:21 -0700)]
[Pseudo Probe] Add the test for probe desc
Added a test to https://reviews.llvm.org/D146657, make sure the guid and name are computed using the debug info name.
Reviewed By: hoy, wenlei
Differential Revision: https://reviews.llvm.org/D146826
Alex Langford [Fri, 24 Mar 2023 19:38:50 +0000 (12:38 -0700)]
[lldb] Add header REPL.h to lldb_Expression
As of
c5bfa3dafb3e7ccc871734a96b7a9188868d925a, REPL.h no longer has a
private implementation header in it. This TODO and the thing it marks
cdan be removed.
Joseph Huber [Fri, 24 Mar 2023 18:10:22 +0000 (13:10 -0500)]
[NVPTX] Introduce attribute to mark kernels without a language mode
We may want to be able to mark certain regions as kernels even without
being in an accepted CUDA or OpenCL language mode. This patch introduces
a new attribute limited to `nvptx` targets called `nvptx_kernel` which
will perform the same metadata action as the existing CUDA ones. This
closely mimics the behaviour of the `amdgpu_kernel` attribute. This
allows for making executable NVPTX device images without using an
existing offloading language model.
I was unsure how to do this, I could potentially re-use all the CUDA
attributes and just replace the `CUDA` language requirement with an
`NVPTX` architecture requirement. Also I don't know if I should add more
than just this attribute.
Reviewed By: tra
Differential Revision: https://reviews.llvm.org/D140226
SJW [Fri, 24 Mar 2023 19:22:43 +0000 (19:22 +0000)]
[linalg] Fixed tosa-to-linalg-named for tosa.conv2d i8 with i8 bias
Missing sign extension.
Reviewed By: rsuderman
Differential Revision: https://reviews.llvm.org/D145744
Jim Ingham [Fri, 24 Mar 2023 19:27:33 +0000 (12:27 -0700)]
Don't expect what newlines look like - never works on Windows.
Joseph Huber [Fri, 24 Mar 2023 19:25:38 +0000 (14:25 -0500)]
[Libomptarget] Update CMake messages if the tests aren't build
Summary:
These messages have been wrong for quite some time. Update them to be
more descriptive of why the tests weren't built.
Michał Górny [Mon, 20 Mar 2023 15:00:10 +0000 (16:00 +0100)]
[clang-tools-extra] Fix linking ClangdTests when using libclang-cpp
Fix linking ClangdTests to specify the dependency on the private
clangTesting library via target_link_libraries() rather than
clang_target_link_libraries(). The latter uses libclang-cpp when
CLANG_LINK_CLANG_DYLIB is used, and clangTesting is not included
in this library.
This fixes
d60d3455eb2b375d026a4aa74c4ba0c38f5d323c.
Differential Revision: https://reviews.llvm.org/D146427
Mikhail R. Gadelha [Fri, 24 Mar 2023 19:13:19 +0000 (16:13 -0300)]
[libc] Add support for setjmp and longjmp in riscv
This patch implements setjmp and longjmp in riscv using inline asm. The
following changes were required:
* Omit frame pointer: otherwise gcc won't allow us to use s0
* Use __attribute__((naked)): otherwise both gcc and clang will generate
function prologue and epilogue in both functions. This doesn't happen
in x86_64, so we guard it to only riscv
Furthermore, using __attribute__((naked)) causes two problems: we
can't use `return 0` (both gcc and clang) and the function arguments in
the function body (clang only), so we had to use a0 and a1 directly.
Reviewed By: sivachandra
Differential Revision: https://reviews.llvm.org/D145584
Florian Hahn [Fri, 24 Mar 2023 19:14:34 +0000 (19:14 +0000)]
[ConstraintElim] Use GEPOperator instead of GetElementPtrInst.
The logic in ConstraintElimination should trivially apply to GEP
constant expressions as well, so update code to deal with GEPOperator
instead.
Denis Revunov [Fri, 24 Mar 2023 18:50:07 +0000 (21:50 +0300)]
[BOLT] Don't use section relocations when computing hash for data from other section
When computing symbol hashes in BinarySection::hash, we try to find relocations
in the section which reference the passed BinaryData. We do so by doing
lower_bound on data begin offset and upper_bound on data end offset. Since
offsets are relative to the current section, if it is a data from the previous
section, we get underflow when computing offset and lower_bound returns
Relocations.end(). If this data also ends where current section begins,
upper_bound on zero offset will return some valid iterator if we have any
relocations after the first byte. Then we'll try to iterate from lower_bound to
upper_bound, since they're not equal, which in that case means we'll dereference
Relocations.end(), increment it, and try to do so until we reach the second
valid iterator. Of course we reach segfault earlier. In this patch we stop BOLT
from searching relocations for symbols outside of the current section.
Reviewed By: rafauler
Differential Revision: https://reviews.llvm.org/D146620
Jonas Paulsson [Tue, 14 Mar 2023 15:40:10 +0000 (16:40 +0100)]
[SystemZ] Allow fp/int casting with inline assembly operands.
Support bitcasting between int/fp/vector values and 'r'/'f'/'v' inline
assembly operands. This is intended to match GCCs beahvior.
Reviewed By: Ulrich Weigand
Differential Revision: https://reviews.llvm.org/D146059
Felipe de Azevedo Piovezan [Fri, 24 Mar 2023 18:49:47 +0000 (14:49 -0400)]
Revert "[Serialization] Place command line defines in the correct file"
This reverts commit
72073fc95cd4793a853925ddc8cc3fb2118808a5.
Paul Kirth [Fri, 24 Mar 2023 17:41:10 +0000 (17:41 +0000)]
[support] Temporarily disable Inf/NaN testing in PrintNumber
This is still breaking on some platforms. The underlying implementation
doesn't seem to be the cause, rather the test is not robust across
platforms. So, we'll just disable this for the time being, to unblock
builds until we have a proper fix.
Reviewed By: abhina.sreeskantharajan
Differential Revision: https://reviews.llvm.org/D146834
Doru Bercea [Fri, 10 Mar 2023 23:03:51 +0000 (18:03 -0500)]
Add support for critical regions in device code.
Review: https://reviews.llvm.org/D145831
Julian Lettner [Wed, 22 Mar 2023 22:07:37 +0000 (15:07 -0700)]
[TSan] Refactor ExternalAccess() to avoid unnecessary pop/push tag [NFC]
* Avoid unnecessary frame & tag push/pops if memory access is ignored
* Rename function and add comment to make it clearer what the code does
* Make helper functions static and move inside `#if !SANITIZER_GO`
Differential Revision: https://reviews.llvm.org/D146670
David Green [Fri, 24 Mar 2023 18:11:54 +0000 (18:11 +0000)]
[ARM] Add Thumb Attributes for thumb thunks created in SLSHarding
Without this the function will be use an Arm subtarget, meaning the
instructions in it will be invalid for the current subtarget.
Differential Revision: https://reviews.llvm.org/D144733
Min-Yih Hsu [Fri, 24 Mar 2023 17:59:46 +0000 (10:59 -0700)]
[M68k] Fix CConvs for pointer type return values
Put the value into A0 instead of data registers. And remove the
redundant `RetCC_M68kCommon` as there aren't many rules shared between
existing CCs other than the pointer one.
This change is tested by existing tests.
Alex Langford [Fri, 24 Mar 2023 17:55:33 +0000 (10:55 -0700)]
[lldb] Explicitly mark PlatformFreeBSD's dependency on PlatformPOSIX
I accidentally broke the FreeBSD lldb-server build in 0c5cee7 because it
now depends on PlatformFreeBSD. PlatformFreeBSD depends on PlatformPOSIX
but this dependency was not explicitly tracked in CMake. As a result,
the FreeBSD lldb-server build broke.
Credit to John F. Carr <jfc@mit.edu> for pointing out the issue and
providing a fix.
Jim Ingham [Fri, 24 Mar 2023 17:38:56 +0000 (10:38 -0700)]
Fix backtick handling in parsed commands.
https://reviews.llvm.org/D146779
Artem Belevich [Thu, 23 Mar 2023 22:27:02 +0000 (15:27 -0700)]
[NVPTX] Fix integer overflow affecting array size calculation.
It turns out, 4GB+ large arrays are a thing and a 32-bit integer is just not
enough to handle them.
Differential Revision: https://reviews.llvm.org/D146767
Luke Lau [Thu, 23 Mar 2023 17:45:30 +0000 (17:45 +0000)]
[RISCV] Model select and insertsubvector shuffle kinds
Selects get lowered to a vmerge with a mask, and insertsubvectors get
lowered to a vslideup.
Differential Revision: https://reviews.llvm.org/D146747
Luke Lau [Fri, 24 Mar 2023 13:46:03 +0000 (13:46 +0000)]
[RISCV] Add test case for two equivalent reductions
They are functionally equivalent but currently one fails to vectorize
because the cost of an insert subvector shuffle is too expensive.
D146747 will update the cost of these types of shuffles, so add a test
case for it.
Luke Lau [Fri, 24 Mar 2023 13:43:32 +0000 (13:43 +0000)]
[RISCV] Enable SLP in RISC-V SLP reduction tests
Horizontal reduction can still kick in even when the max VF is set to 0,
but strange stuff can happen as it affects the cost model.
Enable it for these tests as eventually the goal will be to have SLP
enabled.
Luke Lau [Fri, 24 Mar 2023 13:39:51 +0000 (13:39 +0000)]
[RISCV] Add test cases for modeling more shuffle kinds
These map to SK_InsertSubvector and SK_Select shuffle kinds
Luke Lau [Fri, 24 Mar 2023 15:52:02 +0000 (15:52 +0000)]
[RISCV][NFC] Rename some test cases
Since they no longer involve a merge
Luke Lau [Fri, 24 Mar 2023 12:03:41 +0000 (12:03 +0000)]
[RISCV] Lower insert subvector shuffles as vslideups
A shuffle with an insert subvector mask is functionally equivalent to:
(insert_subvector v0, (extract_subvector v1, len), index)
We can emulate by doing a vslideup on v1 into the right index, and
carefully selecting VL so that we don't overwrite any more destination
elements than what we have to.
This avoids the need for a select with a mask.
Sergio Afonso [Tue, 14 Mar 2023 17:40:04 +0000 (17:40 +0000)]
[flang][driver][openmp] Write MLIR for -save-temps
This patch adds support for producing MLIR files when using -save-temps on
flang. One MLIR file will be produced before lowering and optimization passes,
containing the operations produced by the PFT-to-MLIR lowering bridge, and
another at the end of the process, just before LLVM IR generation.
This is accomplished by forwarding the -save-temps flag from the driver to the
frontend, and modifying it to output MLIR files accordingly.
Differential Revision: https://reviews.llvm.org/D146075
Chia-hung Duan [Fri, 24 Mar 2023 17:06:29 +0000 (17:06 +0000)]
[scudo] Use bytes-in-freelist as a hint of page release
Tracking the pushed bytes between to releaseToOSMaybe calls may lead to
a overestimated case that if we do malloc 2KB -> free 2KB -> malloc 2KB
-> free 2KB, we may think we have released 4KB but it only releases 2KB
actually. Switch to use bytes-in-freelist excludes more cases that can't
release the pages
Reviewed By: cferris
Differential Revision: https://reviews.llvm.org/D146400
yijia1212 [Fri, 24 Mar 2023 17:05:07 +0000 (10:05 -0700)]
Remove unused header file in VectorTransformOps.h
Remove unused header file in VectorTransformOps.h
Differential Revision: https://reviews.llvm.org/D146825
Kazu Hirata [Fri, 24 Mar 2023 16:52:17 +0000 (09:52 -0700)]
Fix warnings
This patch fixes:
clang/lib/Driver/ToolChains/OHOS.cpp:410:18: warning: unused
variable ‘A’ [-Wunused-variable]
clang-tools-extra/clangd/refactor/tweaks/AddUsing.cpp:293:15:
warning: unused variable ‘II’ [-Wunused-variable]
llvm/lib/ProfileData/RawMemProfReader.cpp:364:68: warning: suggest
parentheses around ‘&&’ within ‘||’ [-Wparentheses]
Doru Bercea [Fri, 24 Mar 2023 14:18:27 +0000 (10:18 -0400)]
Make test more explicit on failure.
Patch: https://reviews.llvm.org/D146812
Paul Kirth [Fri, 24 Mar 2023 16:02:49 +0000 (16:02 +0000)]
[support] Attempt to fix PrintNumber test for Solaris
NaN and Inf are still causing some problems in a formatting test.
This patch makes the checked format string exactly match the internal
JSON format string. If there are still problems, we should disable
testing Inf and NaN values until we can come to a portable solution.
Reviewed By: abhina.sreeskantharajan
Differential Revision: https://reviews.llvm.org/D146818
Tomas Matheson [Thu, 23 Mar 2023 15:18:34 +0000 (15:18 +0000)]
[extract_symbols.py] Export unique symbols
As described in a comment on D140637, PluginInlineOrderTest.NoInlineFoo
will fail with:
InlineOrderPlugin.so: undefined symbol: _ZN4llvm13AllAnalysesOnINS_6ModuleEE6SetKeyE
The symbol is unique in libLLVMCore and ends up local in AnalysisTests.
Fix this by exporting all unique symbols found in libraries.
AnalysisTests.symbols change in line count: 12464 -> 12499
Differential Revision: https://reviews.llvm.org/D146731
Quinn Dawkins [Fri, 24 Mar 2023 15:44:51 +0000 (11:44 -0400)]
[mlir][linalg] Use affine apply in im2col gather index calculations
Differential Revision: https://reviews.llvm.org/D146816
Augie Fackler [Fri, 24 Mar 2023 15:34:58 +0000 (11:34 -0400)]
Mariusz Sikora [Fri, 10 Mar 2023 07:50:16 +0000 (08:50 +0100)]
[AMDGPU] Add clang builtin for __builtin_amdgcn_ds_atomic_fadd_v2f16
Differential Revision: https://reviews.llvm.org/D146808
Nikita Popov [Fri, 24 Mar 2023 15:08:37 +0000 (16:08 +0100)]
[LICM] Require MSSA in SinkAndHoistLICMFlags (NFC)
Nowadays MSSA is required for LICM/LoopSink, so drop the checks
for whether its available or not.
Alvin Wong [Wed, 22 Mar 2023 10:14:40 +0000 (18:14 +0800)]
[sanitizer][win] Change cmdline check to allow double backslashs
When `llvm-symbolizer.exe` is on the PATH in an entry containing two
consecutive backslashes, sanitizers will try to launch llvm-symbolizer
with its absolute path containing these consecutive backslashes. This
fails a sanity check in `sanitizer_symbolizer_win.cpp`.
According to the documentation of `CommandLineToArgvW` [1] and a MS blog
post [2], backslashes in general, regardless of how many of them in a
row, do not have any special effect, unless when immediately followed by
a double quote.
There already exists a check that fails when the command line arguments
contains double quote, therefore the check for double backslashes can
simply be removed.
[1]: https://learn.microsoft.com/en-us/windows/win32/api/shellapi/nf-shellapi-commandlinetoargvw
[2]: https://learn.microsoft.com/en-us/archive/blogs/twistylittlepassagesallalike/everyone-quotes-command-line-arguments-the-wrong-way
Differential Revision: https://reviews.llvm.org/D146621
Xiaodong Liu [Fri, 24 Mar 2023 14:57:22 +0000 (09:57 -0500)]
[LoongArch] Add Scalar link component
Fix the lld link error on ppc64le builders:
```
ld.lld: error: undefined symbol: llvm::createLoopDataPrefetchPass()
>>> referenced by LoongArchTargetMachine.cpp
>>> lib/Target/LoongArch/CMakeFiles/LLVMLoongArchCodeGen.dir/LoongArchTargetMachine.cpp.o:((anonymous namespace)::LoongArchPassConfig::addIRPasses())
collect2: error: ld returned 1 exit status`
```
Reviewed By: sdesmalen
Differential Revision: https://reviews.llvm.org/D146806
Nemanja Ivanovic [Fri, 24 Mar 2023 14:34:25 +0000 (10:34 -0400)]
[SelectionDAG] Correctly reduce BV to shuffle with zero on big endian
This DAG combine is correct on little endian targets but
is incorrect on big endian targets.
Add big endian code to correct it.
Differential revision: https://reviews.llvm.org/D146460
Joseph Huber [Fri, 24 Mar 2023 14:37:28 +0000 (09:37 -0500)]
[libc] Change RPC outbox stores to be relaxed
Summary:
These stored previously used `RELEASE`. This was done originally to
ensure that the stores to the shared memory buffer were flushed prior to
signaling that the other side can begin accessing it. However, this
should be accomplished by the memory fence above the store. This change
is required because NVPTX does not support non-relaxed atomics used on
unified shared memory.
Sander de Smalen [Wed, 22 Mar 2023 16:54:00 +0000 (16:54 +0000)]
[AArch64][SME] SelectSMETileSlice should also match to 'reg+0' when slice is ADD with non-constant RHS.
It would decompose an address into a `reg + 0` when the slice was not an ADD,
but when the RHS of the ADD was not a constant, it would simply not match.
This patch fixes that, by always resolving to a `reg + 0` slice.
Vlad Serebrennikov [Fri, 24 Mar 2023 14:14:11 +0000 (17:14 +0300)]
[clang] Extend pragma dump to support expressions
Extend `#pragma clang __debug dump` to support not only single identifier, but an expression as well. This makes it possible to test ADL and overload resolution directly, without being creative to make them observable via diagnostics (e.g. when [[ http://eel.is/c++draft/over.match.best | over.match.best ]] is involved). This implementation has a known limitation of not supporting dependent expressions properly, but it's quite useful even without such support.
Differential Revision: https://reviews.llvm.org/D144115
Nikita Popov [Fri, 24 Mar 2023 14:24:21 +0000 (15:24 +0100)]
[LICM] Add tests for GEP reassociation (NFC)
Dmitry Makogon [Fri, 24 Mar 2023 13:34:55 +0000 (20:34 +0700)]
[Test] Regenerate test checks for some LSR tests (NFC)
Dmitry Makogon [Fri, 24 Mar 2023 12:02:25 +0000 (19:02 +0700)]
[Test] Add test to check that LCSSA is preserved by LSR (NFC)
Currently it fails as LSR doesn't preserve LCSSA in some cases.
Nicolas Vasilache [Fri, 24 Mar 2023 12:09:50 +0000 (12:09 +0000)]
[mlir][Vector][Transforms] Improve the control over individual vector lowerings and transforms
This revision adds vector transform operations that allow us to better inspect the composition
of various lowerings that were previously very opaque.
This commit is NFC in that it does not change patterns beyond adding `rewriter.notifyFailure` messages
and it does not change the tests beyond breaking them into pieces and using transforms instead of
throwaway opaque test passes.
Reviewed By: ftynse, springerm
Co-authored-by: Alex Zinenko <zinenko@google.com>
Differential Revision: https://reviews.llvm.org/D146755
Nikita Popov [Thu, 23 Mar 2023 14:23:31 +0000 (15:23 +0100)]
[SimplifyCFG] Don't merge invoke if this makes immarg non-constant (PR61265)
Don't merge invokes if this replaces constant operands with phis
in a place where this is not legal.
This also disallows converting operand bundles from constant to
non-constant, in line with the restriction we use in other
transforms.
Fixes https://github.com/llvm/llvm-project/issues/61265.
Differential Revision: https://reviews.llvm.org/D146723
Rainer Orth [Fri, 24 Mar 2023 13:24:07 +0000 (14:24 +0100)]
[flang][Driver] Fix lto-flags.f90 on Solaris
The `Flang :: Driver/lto-flags.f90` test `FAIL`s on Solaris:
/vol/llvm/src/llvm-project/dist/flang/test/Driver/lto-flags.f90:30:13: error: THIN-LTO: expected string not found in input
! THIN-LTO: "-plugin-opt=thinlto"
^
This is no wonder since the native Solaris `ld` doesn't support the linker
plugin interface at all, so this patch marks the test as `UNSUPPORTED`.
Tested on `amd64-pc-solaris2.11` and `x86_64-pc-linux-gnu`.
Differential Revision: https://reviews.llvm.org/D146807
Nikita Popov [Fri, 24 Mar 2023 13:17:26 +0000 (14:17 +0100)]
[GlobalOpt] Fix dead const handling in pointer root user cleanup (PR61674)
Rather than cleanup up dead constant expressions as we go along,
do this once at the end. This aligns it with the
CleanupConstantGlobalUsers() implementation and avoids
any invalidation issues.
Fixes https://github.com/llvm/llvm-project/issues/61674.
khei4 [Fri, 24 Mar 2023 10:21:25 +0000 (19:21 +0900)]
[AggressiveInstCombine] use m_Deferred on funnel shift(NFC)
Differential Revision: https://reviews.llvm.org/D146798
Reviewed By: nikic
Mariusz Sikora [Thu, 9 Mar 2023 10:29:33 +0000 (11:29 +0100)]
[AMDGPU] Create Subtarget Features for some of 16 bits atomic fadd instructions
Introducing Subtarget Features for instructions:
- ds_pk_add_bf16
- ds_pk_add_f16
- ds_pk_add_rtn_bf16
- ds_pk_add_rtn_f16
- flat_atomic_pk_add_f16
- flat_atomic_pk_add_bf16
- global_atomic_pk_add_f16
- global_atomic_pk_add_bf16
- buffer_atomic_pk_add_f16
Differential Revision: https://reviews.llvm.org/D146701
Nico Weber [Fri, 24 Mar 2023 12:06:37 +0000 (13:06 +0100)]
[gn] somewhat port
0c5cee779929 (lldb-server platform plugin)