Samuel Pitoiset [Wed, 21 Aug 2019 14:29:46 +0000 (16:29 +0200)]
ac: fix exclusive scans on GFX8-GFX9
This fixes a regression introduced with scan&reduce operations
on GFX10. Note that some subgroups CTS still fail on GFX10 but
I assume it's a different issue.
This fixes dEQP-VK.subgroups.arithmetic.*.subgroupexclusive*.
Fixes:
227c29a80de "amd/common/gfx10: implement scan & reduce operations"
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Tapani Pälli [Tue, 20 Aug 2019 05:59:23 +0000 (08:59 +0300)]
util: fix os_create_anonymous_file on android
Commit fixes current crashes with Vulkan applications on Android.
Fixes:
c0376a123418 "util: add anon_file.h for all memfd/temp file usage"
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Lionel Landwerlin [Thu, 8 Aug 2019 08:40:30 +0000 (11:40 +0300)]
i965: honor scanout requirement from DRI
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Kenneth Graunke [Tue, 13 Aug 2019 21:33:35 +0000 (14:33 -0700)]
gallium/noop: Implement resource_get_param
v2: Pass through to oscreen rather than faking it (review from Marek).
Fixes:
0346b700833 ("gallium/screen: Add pipe_screen::resource_get_param")
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Kenneth Graunke [Tue, 13 Aug 2019 21:32:57 +0000 (14:32 -0700)]
gallium/rbug: Wrap resource_get_param if available
Fixes:
0346b700833 ("gallium/screen: Add pipe_screen::resource_get_param")
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Kenneth Graunke [Tue, 13 Aug 2019 21:32:26 +0000 (14:32 -0700)]
gallium/trace: Wrap resource_get_param if available
Fixes:
0346b700833 ("gallium/screen: Add pipe_screen::resource_get_param")
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Kenneth Graunke [Tue, 13 Aug 2019 21:28:56 +0000 (14:28 -0700)]
gallium/ddebug: Wrap resource_get_param if available
Fixes:
0346b700833 ("gallium/screen: Add pipe_screen::resource_get_param")
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Jose Maria Casanova Crespo [Wed, 21 Aug 2019 12:16:16 +0000 (13:16 +0100)]
mesa: recover target_check before get_current_tex_objects
At compressed_tex_sub_image we only can obtain the tex_object after
compressed_subtexture_target_check is validated for TEX_MODE_CURRENT.
So if the target is wrong the error is raised to the user.
This completes the fix for the regression introduced on "mesa: refactor
compressed_tex_sub_image function" of the pending failing tests:
dEQP-GLES3.functional.negative_api.texture.compressedtexsubimage3d
dEQP-GLES31.functional.debug.negative_coverage.get_error.texture.compressedtexsubimage3d
v2: Fix warning that texObj might be used uninitialized (Gert Wollny)
Fixes:
7df233d68dc ("mesa: refactor compressed_tex_sub_image function")
Reviewed-By: Gert Wollny <gert.wollny@collabora.com>
Kevin Strasser [Fri, 25 Jan 2019 01:29:31 +0000 (17:29 -0800)]
gallium: Add buffer and configs handling or fp16 formats
Expose configs when allow_fp16_configs has been enabled and
DRI_LOADER_CAP_FP16 is set in the loader.
Also, make kms_swrast_dri respect format bpp, to allow for allocating
buffers wider than 32 bpp.
Make fp16 opt-in for gallium.
Signed-off-by: Kevin Strasser <kevin.strasser@intel.com>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
Kevin Strasser [Fri, 25 Jan 2019 01:26:31 +0000 (17:26 -0800)]
i965: Add handling for fp16 configs
Expose configs when allow_fp16_configs has been enabled and
DRI_LOADER_CAP_FP16 is set in the loader.
Also, define a new dri configuration option so users can disable exposure of
fp16 formats. Make fp16 opt-in for i965.
Signed-off-by: Kevin Strasser <kevin.strasser@intel.com>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
Kevin Strasser [Fri, 25 Jan 2019 01:32:36 +0000 (17:32 -0800)]
gbm: Add buffer handling and visuals for fp16 formats
Define and set a new loader cap DRI_LOADER_CAP_FP16, indicating that gbm can
handle fp16 formats.
Signed-off-by: Kevin Strasser <kevin.strasser@intel.com>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Kevin Strasser [Fri, 25 Jan 2019 01:10:02 +0000 (17:10 -0800)]
dri: Add fp16 formats
Add dri formats for RGBA ordered 64 bpp IEEE 754 half precision floating
point. Leverage existing offscreen render support for
MESA_FORMAT_RGBA_FLOAT16 and MESA_FORMAT_RGBX_FLOAT16.
Signed-off-by: Kevin Strasser <kevin.strasser@intel.com>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Kevin Strasser [Fri, 25 Jan 2019 00:55:33 +0000 (16:55 -0800)]
egl: Handle dri configs with floating point pixel data
In the case that __DRI_ATTRIB_FLOAT_BIT is set in the dri config, set
EGL_COLOR_COMPONENT_TYPE_FLOAT_EXT in the egl config. Add a field to the
platform driver visual to indicate if it has components that are in floating
point form.
Signed-off-by: Kevin Strasser <kevin.strasser@intel.com>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Kevin Strasser [Fri, 25 Jan 2019 00:44:06 +0000 (16:44 -0800)]
dri: Handle configs with floating point pixel data
In order to handle pixel formats that consist of floating point data, enable
floatMode field in the dri config, and set __DRI_ATTRIB_FLOAT_BIT in the
render type attribute.
Signed-off-by: Kevin Strasser <kevin.strasser@intel.com>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Kevin Strasser [Fri, 25 Jan 2019 00:36:29 +0000 (16:36 -0800)]
glx: Add fields for color shifts
glx doesn't read the masks from the dri config directly, but for consistency
add shifts to the glxconfig.
Signed-off-by: Kevin Strasser <kevin.strasser@intel.com>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
Kevin Strasser [Fri, 25 Jan 2019 00:32:48 +0000 (16:32 -0800)]
egl: Convert configs to use shifts and sizes instead of masks
Change dri2_add_config to take arrays of shifts and sizes, and compare with
those set in the dri config. Convert all platform driver masks
to shifts and sizes.
In order to handle older drivers, where shift attributes aren't available,
we fall back to the mask attributes and compute the shifts with ffs.
Signed-off-by: Kevin Strasser <kevin.strasser@intel.com>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
Kevin Strasser [Fri, 14 Jun 2019 21:27:53 +0000 (14:27 -0700)]
util: move bitcount to bitscan.h
bitcount is free from the pipe header dependencies that make u_math.h hard
to include by non-gallium specific code, so move it to bitscan.h. bitscan.h
is included by u_math.h so existing references will continue working.
Signed-off-by: Kevin Strasser <kevin.strasser@intel.com>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
Kevin Strasser [Fri, 25 Jan 2019 00:11:11 +0000 (16:11 -0800)]
dri: Add config attributes for color channel shift
The existing mask attributes can only support up to 32 bpp. Introduce
per-channel SHIFT attributes that indicate how many bits, from lsb towards
msb, the bit field is offset. A shift of -1 will indicate that there is no
bit field set for the channel.
As old loaders will still be looking for masks, we set the masks to 0 for
any formats wider than 32 bpp.
Signed-off-by: Kevin Strasser <kevin.strasser@intel.com>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
Kevin Strasser [Mon, 15 Jul 2019 20:36:31 +0000 (13:36 -0700)]
gallium: Use consistent approach for config format filtering
rgb10 uses an 'if(allowed) continue' approach, do the same for rgba_ordering.
Signed-off-by: Kevin Strasser <kevin.strasser@intel.com>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
Kevin Strasser [Fri, 12 Jul 2019 20:25:14 +0000 (13:25 -0700)]
i965: Add helper function for allowed config formats
The driver checks dri config options and loader caps to filter out certain
formats during config creation. Fold 4 call sites under a single helper
function.
Signed-off-by: Kevin Strasser <kevin.strasser@intel.com>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
Kevin Strasser [Fri, 4 Jan 2019 20:12:48 +0000 (12:12 -0800)]
drm-uapi: Update headers for fp16 formats
From drm-next commit
88ab9c76d191ad8645b483f31e2b394b0f3e280e
Signed-off-by: Kevin Strasser <kevin.strasser@intel.com>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Andres Rodriguez [Wed, 14 Aug 2019 01:49:52 +0000 (21:49 -0400)]
radv: add RADV_DEBUG=allentrypoints
This debug option allows vkGet[Instance/Device]ProcAddr() to succeed
even if the extension associated with the requested entrypoint was not
enabled.
This has come in handy in a few instances when debugging VR
applications, so I thought it would be good to have a cleaned up version
upstreamed.
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Alyssa Rosenzweig [Fri, 16 Aug 2019 17:26:03 +0000 (10:26 -0700)]
panfrost: Fix PIPE_BUFFER spacing
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Alyssa Rosenzweig [Fri, 16 Aug 2019 17:25:34 +0000 (10:25 -0700)]
panfrost: Implement depth range clipping
This should fix glDepthRangef issues. Eventually, something similar
should allow implementing the depth bounds test.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Alyssa Rosenzweig [Fri, 16 Aug 2019 17:25:05 +0000 (10:25 -0700)]
panfrost: Don't bail on PIPE_BUFFER
We can handle some of it.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Alyssa Rosenzweig [Mon, 19 Aug 2019 15:10:28 +0000 (08:10 -0700)]
pan/midgard: Identify and disassemble indirect texture/sampler
A pair of special flags can turn the texture/sampler handle fields into
register selects. This means code like:
texture(uTextures[hr28.w], ...)
can be compiled to something like:
texture ..., fsampler[hr28.w], texture[hr28.w]
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Alyssa Rosenzweig [Mon, 19 Aug 2019 15:09:57 +0000 (08:09 -0700)]
pan/midgard: Breakout texture reg select printer
This data structure is shared in other parts of the texture word, so
let's streamline printing.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Alyssa Rosenzweig [Wed, 21 Aug 2019 16:41:24 +0000 (09:41 -0700)]
panfrost: Pass stream_output_info by reference
It's a large structure, apparently.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Alyssa Rosenzweig [Wed, 21 Aug 2019 16:40:11 +0000 (09:40 -0700)]
panfrost: Guard against NULL rasterizer explicitly
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Alyssa Rosenzweig [Wed, 21 Aug 2019 16:39:04 +0000 (09:39 -0700)]
pan/bifrost: Correct file size signedness
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Alyssa Rosenzweig [Wed, 21 Aug 2019 16:37:49 +0000 (09:37 -0700)]
panfrost: Fix missing ret assignment in DRM code
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Alyssa Rosenzweig [Wed, 21 Aug 2019 16:33:39 +0000 (09:33 -0700)]
panfrost: Hoist bo != NULL check before dereference
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Alyssa Rosenzweig [Wed, 21 Aug 2019 16:32:55 +0000 (09:32 -0700)]
panfrost: Hoist job != NULL check
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Alyssa Rosenzweig [Wed, 21 Aug 2019 16:30:12 +0000 (09:30 -0700)]
panfrost: Prevent potential integer overflow in instancing
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Alyssa Rosenzweig [Wed, 21 Aug 2019 16:22:17 +0000 (09:22 -0700)]
panfrost: Clarify intention with PIPE_SWIZZLE_X check
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Alyssa Rosenzweig [Wed, 21 Aug 2019 16:21:19 +0000 (09:21 -0700)]
panfrost: Pay attention to framebuffer dimension sign
These are unsigned so the clamp-positive is redundant.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Alyssa Rosenzweig [Wed, 21 Aug 2019 16:20:17 +0000 (09:20 -0700)]
pan/midgard: Mark fallthrough explicitly
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Alyssa Rosenzweig [Wed, 21 Aug 2019 16:18:55 +0000 (09:18 -0700)]
panfrost: Don't check reads_point_coord
Useless check.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Alyssa Rosenzweig [Wed, 21 Aug 2019 16:18:12 +0000 (09:18 -0700)]
pan/midgard: Simplify contradictory check.
Coverity.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Alyssa Rosenzweig [Wed, 21 Aug 2019 16:17:03 +0000 (09:17 -0700)]
pan/midgard: Reorder bits check to fix 8-bit masks
Coverity.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Alyssa Rosenzweig [Wed, 21 Aug 2019 16:15:56 +0000 (09:15 -0700)]
pan/midgard: Represent unused nodes by ~0
This allows nodes to be unsigned and prevents a class of weird
signedness bugs identified by Coverity.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Alyssa Rosenzweig [Wed, 21 Aug 2019 16:02:40 +0000 (09:02 -0700)]
pan/bifrost: Avoid buffer overflow in disassembler
This path shouldn't be possible for in-spec shaders, but let's be
defensive. (Because security, right? Mostly because Coverity.)
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Alyssa Rosenzweig [Wed, 21 Aug 2019 15:59:57 +0000 (08:59 -0700)]
pan/decode: Remove all_zero
The checks confuse Coverity, so let's make it explicit what's going on.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Alyssa Rosenzweig [Wed, 21 Aug 2019 15:55:05 +0000 (08:55 -0700)]
pan/decode: Don't leak FBD pointer
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Alyssa Rosenzweig [Wed, 21 Aug 2019 15:53:49 +0000 (08:53 -0700)]
pan/midgard: Allocate `dependencies` on stack
It's small; this way we don't leak memory.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Alyssa Rosenzweig [Wed, 21 Aug 2019 15:50:09 +0000 (08:50 -0700)]
pan/midgard: Free liveness info
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Jason Ekstrand [Wed, 21 Aug 2019 16:47:55 +0000 (11:47 -0500)]
v3d: Use the correct opcodes for signed image min/max
Reviewed-by: Eric Anholt <eric@anholt.net>
Jason Ekstrand [Wed, 21 Aug 2019 04:10:50 +0000 (23:10 -0500)]
intel/nir: Add a helper for getting BRW_AOP from an intrinsic
So many duplicated switch statements....
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Jason Ekstrand [Wed, 21 Aug 2019 03:32:50 +0000 (22:32 -0500)]
nir: Add explicit signs to image min/max intrinsics
This better matches all the other atomic intrinsics such as those for
SSBOs and shared variables where the sign is part of the intrinsic
opcode. Both generators (GLSL and SPIR-V) know the sign from the type
of the image variable or handle. In SPIR-V, signed min/max are separate
opcodes from unsigned.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
Alyssa Rosenzweig [Wed, 21 Aug 2019 15:05:02 +0000 (08:05 -0700)]
pan/decode: Cleanup mali_attr printing
We can smush this into one-line per record as per usual. We still need
more validation and cleaning this up, especially around instancing. But
for LINEAR records, it works okay already.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Alyssa Rosenzweig [Tue, 20 Aug 2019 23:02:38 +0000 (16:02 -0700)]
pan/decode: Validate attribute/varying buffer pointer
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Alyssa Rosenzweig [Tue, 20 Aug 2019 22:59:03 +0000 (15:59 -0700)]
pan/decode: Include address in union mali_attr
No need to break it out into extra lines.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Alyssa Rosenzweig [Tue, 20 Aug 2019 22:46:39 +0000 (15:46 -0700)]
pan/decode: Use concise texture printing
This consolidates texture format and dimensionality into something simple:
tiled rgba8_unorm.rgb1: 512x512
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Alyssa Rosenzweig [Tue, 20 Aug 2019 22:36:00 +0000 (15:36 -0700)]
panfrost: Break up usage2 field
This is another bit field describing layout.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Alyssa Rosenzweig [Tue, 20 Aug 2019 22:24:45 +0000 (15:24 -0700)]
pan/decode: Pretty-print sRGB format
We can just stick an "s" in if it's sRGB.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Alyssa Rosenzweig [Tue, 20 Aug 2019 22:24:38 +0000 (15:24 -0700)]
panfrost: Remove ancient TODO
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Alyssa Rosenzweig [Tue, 20 Aug 2019 22:24:18 +0000 (15:24 -0700)]
panfrost: nr_mipmap_levels -> levels
No need to be so verbose.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Alyssa Rosenzweig [Tue, 20 Aug 2019 21:58:46 +0000 (14:58 -0700)]
pan/decode: Validate texture dimensionality
Textures of a smaller dimension don't need higher dimensions printed.
This allows us to be more compact, while enforcing verification that
higher dimensions must be zero.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Alyssa Rosenzweig [Tue, 20 Aug 2019 21:48:55 +0000 (14:48 -0700)]
pan/decode: Break out pandecode_texture function
It's massive and hugely nested indentation -- break it out so it's
legible.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Alyssa Rosenzweig [Tue, 20 Aug 2019 21:40:26 +0000 (14:40 -0700)]
pan/decode: Guard texture unknowns as zero trips
unknown3A I think I've actually seen on T6xx but.. we'll see what
happens in traces going forward. We don't want the zero noise normally,
and if they show up in the wild, we want to draw attention to them.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Alyssa Rosenzweig [Tue, 20 Aug 2019 21:34:09 +0000 (14:34 -0700)]
pan/decode: Use GLSL style formats/swizzles
This dramatically reduces visual clutter: now an entire
attribute/varying record looks something like:
rgba32f attribute_0[16].bgra;
which is equivalent to the raw structure:
{
.index = 0,
.format = MALI_FORMAT_RGBA32F,
.swizzle = (MALI_CHANNEL_BLUE << 9) | ....,
.src_offset = 16,
}
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Alyssa Rosenzweig [Tue, 20 Aug 2019 21:03:18 +0000 (14:03 -0700)]
pan/decode: Don't print the default swizzle
It's just noise.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Alyssa Rosenzweig [Tue, 20 Aug 2019 20:59:26 +0000 (13:59 -0700)]
pan/decode: Validate swizzles against format
We want to make sure we don't access a component in the swizzle that
doesn't exist in the format, since that is (as far as I know) undefined.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Alyssa Rosenzweig [Tue, 20 Aug 2019 20:58:55 +0000 (13:58 -0700)]
pan/decode: Treat RESERVED swizzles as errors
We've never seen them, so if they come up in trace, we want to draw
attention to that.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Alyssa Rosenzweig [Tue, 20 Aug 2019 20:33:39 +0000 (13:33 -0700)]
pan/decode: Handle VARYING_DISCARD
Varying discard is not used by Panfrost, but the blob uses it sometimes
to have some padding in the varyings table, probably to minimize
per-draw overhead. (...We should maybe consider this ourselves!)
Let's check for this and ensure the rest of the record is consistent
with a discarded varying.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Alyssa Rosenzweig [Tue, 20 Aug 2019 20:21:28 +0000 (13:21 -0700)]
panfrost: Don't trip the prefix magic field
What *is* this?
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Alyssa Rosenzweig [Tue, 20 Aug 2019 20:19:40 +0000 (13:19 -0700)]
pan/decode: Guard attribute unknowns
One should be zero. The other has always been seen as set, so check
this.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Alyssa Rosenzweig [Tue, 20 Aug 2019 20:14:56 +0000 (13:14 -0700)]
panfrost: Don't crash on GL_CLAMP
It's a legacy GL thing... we don't really need to handle it *right* now,
but we shouldn't crash..
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Alyssa Rosenzweig [Tue, 20 Aug 2019 20:03:07 +0000 (13:03 -0700)]
panfrost: Do not expose PIPE_CAP_TEXTURE_MIRROR_CLAMP
This CAP controls a desktop-only extension. If the corresponding support
exists in the hardware, we don't know how to use it.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Alyssa Rosenzweig [Tue, 20 Aug 2019 19:07:31 +0000 (12:07 -0700)]
panfrost: Fix scoreboarding with dependency on job #0
Subtle issue masked by how we emitted SET_VALUE jobs, but this case can
and does occur, so let's fix it.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Alyssa Rosenzweig [Tue, 20 Aug 2019 18:25:29 +0000 (11:25 -0700)]
pan/decode: Normalize final instances of XXX
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Alyssa Rosenzweig [Tue, 20 Aug 2019 18:24:32 +0000 (11:24 -0700)]
pan/decode: Normalize case matching XXX format
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Alyssa Rosenzweig [Tue, 20 Aug 2019 18:18:46 +0000 (11:18 -0700)]
pan/decode: Mark tripped zeroes with XXX
This normalizes the printed format. It also makes it easier for the
future when we may introduce semantic _warn and _error handlers.
A tripped zero is essentially a hazard to check for.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Alyssa Rosenzweig [Tue, 20 Aug 2019 18:11:46 +0000 (11:11 -0700)]
pan/decode: Check for MFBD preload chicken bit
If this bit is clear, MFBD preload will be enabled, and you.. don't want
that. (At least, when the bit is clear, the old contents of the
framebuffer will be preserved. I'm assuming this is what "MFBD preload"
refers to in kbase.)
Validate that this bit is always set.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Alyssa Rosenzweig [Tue, 20 Aug 2019 18:06:07 +0000 (11:06 -0700)]
pan/decode: Validate AFBC fields are zero when AFBC is disabled
There is no "chunknown" structure; that part of the union is an artefact
from falsely believing vertex/tiler MFBDs could have render targets
attached (they can't). These are just plain old AFBC fields, and if
there is no AFBC, it's error to set these field.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Alyssa Rosenzweig [Mon, 19 Aug 2019 22:16:01 +0000 (15:16 -0700)]
pan/decode: Do not print uniform/buffers explicitly
For our purposes of driver debugging, the contents of uniform buffers
are rarely interesting; we're more concerned about the metadata setting
them up.
We do need to be careful to validate the sizes of both uniforms and
uniform buffers.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Alyssa Rosenzweig [Mon, 19 Aug 2019 22:14:48 +0000 (15:14 -0700)]
pan/decode: Add static bounds checking utility
Many structures in the command stream have a GPU address and size
determined statically. We should check that the pointers we are passed
are valid and the buffers they point to are big enough for the given
size. If they're not, an MMU fault would be raised.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Alyssa Rosenzweig [Mon, 19 Aug 2019 21:58:36 +0000 (14:58 -0700)]
pan/decode: Don't print unreferenced attribute memory
This is a source of uninitialized memory leaking into the traces.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Alyssa Rosenzweig [Mon, 19 Aug 2019 21:47:50 +0000 (14:47 -0700)]
pan/decode: Check for a number of potential issues
Verify sizes / masks / etc against something logical to cull down the
trace space and automatically guard against a number of potential
hazards.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Alyssa Rosenzweig [Mon, 19 Aug 2019 21:30:53 +0000 (14:30 -0700)]
panfrost: Correct polygon size computations
While the algorithm for computing the header size has been correct for a
while, we used a major hack to conservatively guess the body size. Let's
scrap that and figure out the algorithm we actually need to use to be
bit-identical with what the hardware expects.
We do have to be careful to add the header size to total comptued BO
size.
It's not clear how big the polygon list needs to be in practice -- but
it has to be somewhat bigger than the polygon list itself. This needs
more investigation. If we size the polygon list exactly based on the
polygon_list_size field, we get faults like:
[ 1224.219886] panfrost
ff9a0000.gpu: Unhandled Page fault in AS0 at VA 0x000000001BDE8000
Reason: TODO
raw fault status: 0x660003C3
decoded fault status: SLAVE FAULT
exception type 0xC3: TRANSLATION_FAULT_LEVEL3
access type 0x3: WRITE
source id 0x6600
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Alyssa Rosenzweig [Mon, 19 Aug 2019 19:44:16 +0000 (12:44 -0700)]
panfrost: Remove DRY_RUN
Nobody uses this anymore anyway.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Alyssa Rosenzweig [Mon, 19 Aug 2019 19:41:18 +0000 (12:41 -0700)]
pan/decode: Print "just right" count of texture pointers
The other commented lines just add noise/entropy we don't want, and can
in fact crash the trace due to asserts failing.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Alyssa Rosenzweig [Mon, 19 Aug 2019 18:48:32 +0000 (11:48 -0700)]
pan/decode: Verify and omit polygon size
The polygon sizes are computed from the width/height/flags, so we can
reverse the computation and use our computation to verify the two
computation algorithms are bit-identical. If they are, we can omit the
computed fields.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Alyssa Rosenzweig [Mon, 19 Aug 2019 18:19:15 +0000 (11:19 -0700)]
panfrost: Move pan_tiler.c outside of Gallium
The routines in this file may be shared with Vulkan.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Alyssa Rosenzweig [Mon, 19 Aug 2019 17:56:23 +0000 (10:56 -0700)]
pan/decode: Bounds check polygon list and tiler heap
We have the BOs available; ensure that the bounds specified in the
command stream are actually the correct bounds.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Alyssa Rosenzweig [Mon, 19 Aug 2019 17:55:29 +0000 (10:55 -0700)]
pan/decode: Allow updating mmaps
This allows the caller to call track_mmap multiple times for the same
gpu_va for the purpose of updating the mmap. This is used to trace
invisible BOs with kbase and doesn't apply to native traces.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Alyssa Rosenzweig [Mon, 19 Aug 2019 17:38:25 +0000 (10:38 -0700)]
pan/decode: Express tiler structures as offsets
This allows us to catch a class of errors (for negative offsets, etc)
automatically.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Alyssa Rosenzweig [Fri, 16 Aug 2019 23:36:39 +0000 (16:36 -0700)]
pan/decode: Don't print zero exception_status
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Alyssa Rosenzweig [Fri, 16 Aug 2019 23:31:54 +0000 (16:31 -0700)]
pan/decode: Fix missing NULL terminator
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Alyssa Rosenzweig [Fri, 16 Aug 2019 23:31:34 +0000 (16:31 -0700)]
pan/decode: Silence workgroups_x_shift_2
Since we're bit-identical we can compare the computed value.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Alyssa Rosenzweig [Fri, 16 Aug 2019 23:31:00 +0000 (16:31 -0700)]
panfrost: Implement workgroups_x_shift_2 quirk
I'm not sure why this is done this way, but let's follow the blob.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Alyssa Rosenzweig [Fri, 16 Aug 2019 23:22:38 +0000 (16:22 -0700)]
pan/decode: Don't print canonical workgroup encoding
The on-the-wire representation of workgroups is not 1:1 to the decoded
Gallium-level workgroups (there are multiple valid encodings; see the
previous commit). Nevertheless, since we're now bit-identical in packing
vs the blob, we can check for a canonical form and only print the
verbose trace if we fail the canonical form.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Alyssa Rosenzweig [Fri, 16 Aug 2019 23:21:45 +0000 (16:21 -0700)]
panfrost: Set workgroups z to 32 for non-instanced graphics
This is a blob quirk; in so much as I know, the hardware doesn't care.
But we're trying to be bit-identical to take as much entropy out of
traces as possible, so let's introduce the quirk.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Alyssa Rosenzweig [Fri, 16 Aug 2019 20:57:38 +0000 (13:57 -0700)]
panfrost: Move pan_invocation to shared panfrost/
The routines in this file have no dependency on Gallium. Let's share
them so they can be used for a theoretical future Vulkan driver or, more
immediately, consulted when tracing.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Alyssa Rosenzweig [Fri, 16 Aug 2019 20:30:39 +0000 (13:30 -0700)]
pan/decode: Don't print MALI_DRAW_NONE
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Alyssa Rosenzweig [Fri, 16 Aug 2019 20:28:06 +0000 (13:28 -0700)]
pan/decode: Eliminate DYN_MEMORY_PROP
It's obvious that it's linked by virtue of us printing the struct it
links against. No need to repeat ourselves.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Alejandro Piñeiro [Thu, 17 Jan 2019 12:40:51 +0000 (13:40 +0100)]
i965: Enable OpenGL 4.6 for Gen8+
The last remaining stuff was ARB_gl_spirv and ARB_spirv_extensions.
Note that it is really likely that we can enable it for some Gen7 (as
4.5 was), but it was not tested yet.
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Alejandro Piñeiro [Sat, 9 Mar 2019 15:06:07 +0000 (16:06 +0100)]
mesa/version: uncomment SPIR-V extensions
As they are implemented on i965, so we can expose 4.6.
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Alejandro Piñeiro [Tue, 5 Dec 2017 14:29:43 +0000 (15:29 +0100)]
i965: enable ARB_gl_spirv extension and ARB_spirv_extensions for gen7+
v2: squashed the two enable patches with the docs one (Jason)
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Tomeu Vizoso [Tue, 20 Aug 2019 08:56:23 +0000 (10:56 +0200)]
panfrost/ci: Print load stats
To help make sure we are running tests in the ideal number of threads,
print load stats to make obvious when there's a problem with
utilization.
This will be specially useful when we run tests on a wider variety of
devices.
Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>