platform/upstream/llvm.git
6 years agoUnloop a for-loop so that we can comment on each symbol. NFC.
Rui Ueyama [Wed, 28 Mar 2018 22:09:40 +0000 (22:09 +0000)]
Unloop a for-loop so that we can comment on each symbol. NFC.

llvm-svn: 328736

6 years ago[Basic] Fix some Clang-tidy modernize and Include What You Use warnings; other minor...
Eugene Zelenko [Wed, 28 Mar 2018 22:09:09 +0000 (22:09 +0000)]
[Basic] Fix some Clang-tidy modernize and Include What You Use warnings; other minor fixes (NFC).

llvm-svn: 328735

6 years ago[ASan] Disable aligned_alloc-alignment.cc on Android.
Alex Shlyapnikov [Wed, 28 Mar 2018 22:00:08 +0000 (22:00 +0000)]
[ASan] Disable aligned_alloc-alignment.cc on Android.

Differential Revision: https://reviews.llvm.org/D44404

llvm-svn: 328734

6 years agoMerge nested "if"s. NFC.
Rui Ueyama [Wed, 28 Mar 2018 21:53:10 +0000 (21:53 +0000)]
Merge nested "if"s. NFC.

llvm-svn: 328733

6 years agoELF: Make required Thunk methods pure virtual and remove an unused argument. NFC.
Peter Collingbourne [Wed, 28 Mar 2018 21:33:31 +0000 (21:33 +0000)]
ELF: Make required Thunk methods pure virtual and remove an unused argument. NFC.

Also make certain Thunk methods non-const as this will be required for
an upcoming change.

Differential Revision: https://reviews.llvm.org/D44961

llvm-svn: 328732

6 years ago[ObjC++] Make parameter passing and function return compatible with ObjC
Akira Hatanaka [Wed, 28 Mar 2018 21:13:14 +0000 (21:13 +0000)]
[ObjC++] Make parameter passing and function return compatible with ObjC

ObjC and ObjC++ pass non-trivial structs in a way that is incompatible
with each other. For example:

typedef struct {
  id f0;
  __weak id f1;
} S;

// this code is compiled in c++.
extern "C" {
  void foo(S s);
}

void caller() {
  // the caller passes the parameter indirectly and destructs it.
  foo(S());
}

// this function is compiled in c.
// 'a' is passed directly and is destructed in the callee.
void foo(S a) {
}

This patch fixes the incompatibility by passing and returning structs
with __strong or weak fields using the C ABI in C++ mode. __strong and
__weak fields in a struct do not cause the struct to be destructed in
the caller and __strong fields do not cause the struct to be passed
indirectly.

Also, this patch fixes the microsoft ABI bug mentioned here:

https://reviews.llvm.org/D41039?id=128767#inline-364710

rdar://problem/38887866

Differential Revision: https://reviews.llvm.org/D44908

llvm-svn: 328731

6 years ago[X86][SkylakeServer] Remove checks for 'k', 'z', '_Int' and 'b' from scheduler regexs.
Craig Topper [Wed, 28 Mar 2018 20:40:24 +0000 (20:40 +0000)]
[X86][SkylakeServer] Remove checks for 'k', 'z', '_Int' and 'b' from scheduler regexs.

Most of these were optional matches at the end of the strings, but since the strings themselves are prefix matches by default you don't need to check for something optional at the end.

I've left the 'b' on memory instructions where it means 'broadcast' because I'm not sure those really have the same load latency and we may need to split them explicitly in the future.

llvm-svn: 328730

6 years agoFix polly build after r328717
Reid Kleckner [Wed, 28 Mar 2018 19:56:26 +0000 (19:56 +0000)]
Fix polly build after r328717

llvm-svn: 328728

6 years ago[PostRAMachineSink] preserve CFG
Jun Bum Lim [Wed, 28 Mar 2018 19:56:26 +0000 (19:56 +0000)]
[PostRAMachineSink] preserve CFG

Summary: Mark CFG is preserved  since this pass do not make any change in CFG.

Reviewers: sebpop, mzolotukhin, mcrosier

Reviewed By: mzolotukhin

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D44845

llvm-svn: 328727

6 years ago[ASan] Add aligned_alloc declaration to aligned_alloc-alignment.cc test.
Alex Shlyapnikov [Wed, 28 Mar 2018 19:53:55 +0000 (19:53 +0000)]
[ASan] Add aligned_alloc declaration to aligned_alloc-alignment.cc test.

aligned_alloc is not always defined in headers.

Differential Revision: https://reviews.llvm.org/D44404

llvm-svn: 328726

6 years ago[Hexagon] Add support for "new" circular buffer intrinsics
Krzysztof Parzyszek [Wed, 28 Mar 2018 19:40:57 +0000 (19:40 +0000)]
[Hexagon] Add support for "new" circular buffer intrinsics

These instructions have been around for a long time, but we
haven't supported intrinsics for them. The "new" vesrions use
the CSx register for the start of the buffer instead of the K
field in the Mx register.

There is a related llvm patch.

Patch by Brendon Cahoon.

llvm-svn: 328725

6 years ago[Hexagon] Add support for "new" circular buffer intrinsics
Krzysztof Parzyszek [Wed, 28 Mar 2018 19:38:29 +0000 (19:38 +0000)]
[Hexagon] Add support for "new" circular buffer intrinsics

These instructions have been around for a long time, but we
haven't supported intrinsics for them. The "new" versions use
the CSx register for the start of the buffer instead of the K
field in the Mx register.

We need to use pseudo instructions for these instructions until
after register allocation. The problem is that these instructions
allocate a M0/CS0 or M1/CS1 pair. But, we can't generate code for
the CSx set-up until after register allocation when the Mx
register has been fixed for the instruction.

There is a related clang patch.

Patch by Brendon Cahoon.

llvm-svn: 328724

6 years ago[MS] Fix bug in method vfptr location code
Reid Kleckner [Wed, 28 Mar 2018 18:23:35 +0000 (18:23 +0000)]
[MS] Fix bug in method vfptr location code

We were assuming that vbtable indices were assigned in layout order in
our comparison, which is not the case. When a virtual method, such as
the destructor, appears in multiple vftables, the vftable that appears
first in object layout order is the one that points to the main
implementation of that method. The later vftables use thunks.

In this layout, we adjusted "this" in the main implementation by the
amount that is appropriate for 'B' instead of 'A', even though the main
implementation is found in D's vftable for A:

  struct A {
    virtual ~A() {}
  };
  struct B {
    virtual ~B() {}
  };
  struct C : virtual B {};
  struct D : virtual A, C {};

D's layout looks like:
   0 D subobject (empty)
   0 C base suboject
   8 A base subobject
  16 B base subobject

With this fix, we correctly adjust by -8 in D's deleting destructor
instead of -16.

Fixes PR36921.

llvm-svn: 328723

6 years ago[ASan] Report proper ASan error on allocator failures instead of CHECK(0)-ing
Alex Shlyapnikov [Wed, 28 Mar 2018 18:22:40 +0000 (18:22 +0000)]
[ASan] Report proper ASan error on allocator failures instead of CHECK(0)-ing

Summary:
Currently many allocator specific errors (OOM, for example) are reported as
a text message and CHECK(0) termination, not stack, no details, not too
helpful nor informative. To improve the situation, ASan detailed errors were
defined and reported under the appropriate conditions.

Issue: https://github.com/google/sanitizers/issues/887

Reviewers: eugenis

Subscribers: kubamracek, delcypher, #sanitizers, llvm-commits

Differential Revision: https://reviews.llvm.org/D44404

llvm-svn: 328722

6 years agoRevert r328715. Wasn't wrong, just not the issue.
Jim Ingham [Wed, 28 Mar 2018 18:05:43 +0000 (18:05 +0000)]
Revert r328715.  Wasn't wrong, just not the issue.

llvm-svn: 328721

6 years agoOops - moved slightly too many things from Scalar to Utils. Move LoopSimplifyCFG...
David Blaikie [Wed, 28 Mar 2018 18:03:25 +0000 (18:03 +0000)]
Oops - moved slightly too many things from Scalar to Utils. Move LoopSimplifyCFG things back

llvm-svn: 328720

6 years ago[MachineOutliner] Simplify call outlining + require valid callee save info for call...
Jessica Paquette [Wed, 28 Mar 2018 17:52:31 +0000 (17:52 +0000)]
[MachineOutliner] Simplify call outlining + require valid callee save info for call outlining

This commit simplifies the call outlining logic by removing references to the
Function associated with the callee. To do this, it requires that valid
callee save info is available to the outliner.

llvm-svn: 328719

6 years agoFix for LLVM header changes
David Blaikie [Wed, 28 Mar 2018 17:45:10 +0000 (17:45 +0000)]
Fix for LLVM header changes

llvm-svn: 328718

6 years agoTransforms: Introduce Transforms/Utils.h rather than spreading the declarations among...
David Blaikie [Wed, 28 Mar 2018 17:44:36 +0000 (17:44 +0000)]
Transforms: Introduce Transforms/Utils.h rather than spreading the declarations amongst Scalar.h and IPO.h

Fixes layering - Transforms/Utils shouldn't depend on including a Scalar
or IPO header, because Scalar and IPO depend on Utils.

llvm-svn: 328717

6 years ago[llvm-ar] Support multiple dashed options
Peter Collingbourne [Wed, 28 Mar 2018 17:21:14 +0000 (17:21 +0000)]
[llvm-ar] Support multiple dashed options

This allows syntax like:
$ llvm-ar -c -r -u file.a file.o

This is in addition to the other formats that are already supported:
$ llvm-ar cru file.a file.o
$ llvm-ar -cru file.a file.o

Patch by Tom Anderson!

Differential Revision: https://reviews.llvm.org/D44452

llvm-svn: 328716

6 years agoExplicitly import subprocess
Jim Ingham [Wed, 28 Mar 2018 17:06:23 +0000 (17:06 +0000)]
Explicitly import subprocess

For some reason on one of our bots subprocess wasn't already
imported. Do so explicitly.

llvm-svn: 328715

6 years ago[X86][AVX2] Add shuffle test case from PR36933
Simon Pilgrim [Wed, 28 Mar 2018 16:48:48 +0000 (16:48 +0000)]
[X86][AVX2] Add shuffle test case from PR36933

llvm-svn: 328714

6 years ago[AMDGPU][MC] Added ds_add_src2_f32
Dmitry Preobrazhensky [Wed, 28 Mar 2018 16:21:56 +0000 (16:21 +0000)]
[AMDGPU][MC] Added ds_add_src2_f32

See bug 36833: https://bugs.llvm.org/show_bug.cgi?id=36833

Differential Revision: https://reviews.llvm.org/D44779

Reviewers: arsenm, artem.tamazov, timcorringham
llvm-svn: 328713

6 years ago[Diag] Avoid emitting a redefinition note if no location is available.
Matt Davis [Wed, 28 Mar 2018 16:05:05 +0000 (16:05 +0000)]
[Diag] Avoid emitting a redefinition note if no location is available.

Summary:
The "previous definition is here" note is not helpful if there is no location information. The note will reference nothing in such a case. This patch first checks to see if there is location data, and if so the note diagnostic is emitted.

This fixes PR15409.  The issue in the first comment seems to already be resolved. This patch addresses the second example.

Reviewers: bruno, rsmith

Reviewed By: bruno

Subscribers: cfe-commits

Differential Revision: https://reviews.llvm.org/D44901

llvm-svn: 328712

6 years ago[ORC] Restore the narrower check from before r328687.
Lang Hames [Wed, 28 Mar 2018 15:58:14 +0000 (15:58 +0000)]
[ORC] Restore the narrower check from before r328687.

This should get the builders green again while I investigate why r328706 was
insufficient.

llvm-svn: 328711

6 years ago[AMDGPU][MC] Added PCK variants of image load/store instructions
Dmitry Preobrazhensky [Wed, 28 Mar 2018 15:44:16 +0000 (15:44 +0000)]
[AMDGPU][MC] Added PCK variants of image load/store instructions

See bug 36834: https://bugs.llvm.org/show_bug.cgi?id=36834

Differential Revision: https://reviews.llvm.org/D44795

Reviewers: artem.tamazov, arsenm, timcorringham, nhaehnle
llvm-svn: 328710

6 years ago[PatternMatch] Add matchers for vector operations
Daniel Neilson [Wed, 28 Mar 2018 15:39:00 +0000 (15:39 +0000)]
[PatternMatch] Add matchers for vector operations

Summary:
There aren't any matchers for the three vector operations: insertelement, extractelement, and
shufflevector. This patch adds them as well as corresponding unit tests.

llvm-svn: 328709

6 years agoclang-cl: s/Enable/Disable/ in help text for /GX-
Hans Wennborg [Wed, 28 Mar 2018 14:57:49 +0000 (14:57 +0000)]
clang-cl: s/Enable/Disable/ in help text for /GX-

llvm-svn: 328708

6 years ago[AMDGPU][MC][GFX9] Added buffer_*_format_d16_hi_x
Dmitry Preobrazhensky [Wed, 28 Mar 2018 14:53:13 +0000 (14:53 +0000)]
[AMDGPU][MC][GFX9] Added buffer_*_format_d16_hi_x

See bug 36835: https://bugs.llvm.org/show_bug.cgi?id=36835

Differential Revision: https://reviews.llvm.org/D44825

Reviewers: artem.tamazov, arsenm, timcorringham
llvm-svn: 328707

6 years ago[ORC] Re-add the Windows check that was dropped in r328687.
Lang Hames [Wed, 28 Mar 2018 14:47:11 +0000 (14:47 +0000)]
[ORC] Re-add the Windows check that was dropped in r328687.

This check prevents the ORC execution tests from running on Windows (which is
not supported yet).

This should fix the windows bots.

llvm-svn: 328706

6 years ago[OPENMP] Codegen for ctor|dtor of declare target variables.
Alexey Bataev [Wed, 28 Mar 2018 14:28:54 +0000 (14:28 +0000)]
[OPENMP] Codegen for ctor|dtor of declare target variables.

When the declare target variables are emitted for the device,
constructors|destructors for these variables must emitted and registered
by the runtime in the offloading sections.

llvm-svn: 328705

6 years ago[AMDGPU][MC][GFX9] Added s_scratch* instructions
Dmitry Preobrazhensky [Wed, 28 Mar 2018 14:08:03 +0000 (14:08 +0000)]
[AMDGPU][MC][GFX9] Added s_scratch* instructions

See bug 36836: https://bugs.llvm.org/show_bug.cgi?id=36836

Differential Revision: https://reviews.llvm.org/D44832

Reviewers: artem.tamazov, arsenm, timcorringham
llvm-svn: 328704

6 years agoRevert "[lit] Temporarily disable shtest-timeout.py on darwin"
Dan Liew [Wed, 28 Mar 2018 13:55:13 +0000 (13:55 +0000)]
Revert "[lit] Temporarily disable shtest-timeout.py on darwin"

This reverts commit 771829b640a5494ab65c810dd6b4330522bf3a33 (rr328598)

Hopefully the test will now pass on the bots.

rdar://problem/38774530

llvm-svn: 328703

6 years ago[lit] Remove a timing senstive part of `shtest-timeout.py`
Dan Liew [Wed, 28 Mar 2018 13:55:08 +0000 (13:55 +0000)]
[lit] Remove a timing senstive part of `shtest-timeout.py`

The `shtest-timeout.py` test was failing intermittently. It looks like
the issue is that on a resource constrained system lit is unable to run
`quick_then_slow.py` twice and print out the messages the tests expects
within the one second timeout.

The underlying issue is that the test is dependent on the performance of
the host machine is a rather fragile way. This is due to hardcoding
timeout values and having assumptions that the host machine is able to
perform a certain amount of work within the hardcoded timeout values.

We could increase the timeout values but that doesn't really fix the
underlying issue. Instead this patch removes one of fragile assumptions
in the hope that this will be enough to fix the bots.
There are other fragile assumptions in this test (e.g. `quick.py` can be
executed in less than 1 second). If the bots continue to fail we'll have
to revisit this.

rdar://problem/38774530

llvm-svn: 328702

6 years ago[X86][Btver2] Moved JWriteFCmp/JWriteFCmpY classes next to each other. NFCI
Simon Pilgrim [Wed, 28 Mar 2018 13:53:21 +0000 (13:53 +0000)]
[X86][Btver2] Moved JWriteFCmp/JWriteFCmpY classes next to each other. NFCI

Renamed JWriteFPAY22 to JWriteFCmpY - we've tended to avoid latency based names

llvm-svn: 328701

6 years ago[WebAssembly] Name Config members after commandline argument. NFC
Nicholas Wilson [Wed, 28 Mar 2018 12:53:29 +0000 (12:53 +0000)]
[WebAssembly] Name Config members after commandline argument. NFC

This addresses a late review comment from D44427/rLLD328643

llvm-svn: 328700

6 years agoRevert "Reapply "[DWARFv5] Emit file 0 to the line table.""
Alexander Potapenko [Wed, 28 Mar 2018 12:36:46 +0000 (12:36 +0000)]
Revert "Reapply "[DWARFv5] Emit file 0 to the line table.""

This reverts commit r328676.

Commit r328676 broke the -no-integrated-as flag necessary to build Linux kernel with Clang:

$ cat t.c
void foo() {}
$ clang -no-integrated-as   -c  t.c -g
/tmp/t-dcdec5.s: Assembler messages:
/tmp/t-dcdec5.s:8: Error: file number less than one
clang-7.0: error: assembler command failed with exit code 1 (use -v to see invocation)

llvm-svn: 328699

6 years ago[X86][BtVer2] Fix the number of micro opcodes for AES[ENC|DEC] and other YMM instruct...
Andrea Di Biagio [Wed, 28 Mar 2018 12:12:04 +0000 (12:12 +0000)]
[X86][BtVer2] Fix the number of micro opcodes for AES[ENC|DEC] and other YMM instructions.

Similar to r328694. The number of micro opcodes should be 2 for those
instructions.

This was found when testing AVX code for BtVer2 using llvm-mca.

llvm-svn: 328698

6 years ago[MSan] Introduce ActualFnStart. NFC
Alexander Potapenko [Wed, 28 Mar 2018 11:35:09 +0000 (11:35 +0000)]
[MSan] Introduce ActualFnStart. NFC

This is a step towards the upcoming KMSAN implementation patch.
KMSAN is going to prepend a special basic block containing
tool-specific calls to each function. Because we still want to
instrument the original entry block, we'll need to store it in
ActualFnStart.

For MSan this will still be F.getEntryBlock(), whereas for KMSAN
it'll contain the second BB.

llvm-svn: 328697

6 years ago[ELF] - Linkerscript: support MIN and MAX.
George Rimar [Wed, 28 Mar 2018 11:33:00 +0000 (11:33 +0000)]
[ELF] - Linkerscript: support MIN and MAX.

Sample for the OVERLAY command from the spec
(https://access.redhat.com/documentation/en-US/Red_Hat_Enterprise_Linux/4/html/Using_ld_the_GNU_Linker/sections.html)
uses MAX command that we do not support currently:

. = 0x1000 + MAX (SIZEOF (.text0), SIZEOF (.text1));

This patch implements support for MIN and MAX.

Differential revision: https://reviews.llvm.org/D44734

llvm-svn: 328696

6 years agoRevert "[AMDGPU] For OS type AMDPAL, fixed scratch on compute shader"
Tim Renouf [Wed, 28 Mar 2018 11:21:07 +0000 (11:21 +0000)]
Revert "[AMDGPU] For OS type AMDPAL, fixed scratch on compute shader"

This reverts commit 0daf86291d3aa04d3cc280cd0ef24abdb0174981.

It was causing an assert in test/CodeGen/AMDGPU/amdpal.ll only on a
release-with-asserts build. I will resubmit the change when I have fixed
that.

Change-Id: If270594eba27a7dc4076bdeab3fa8e6bfda3288a
llvm-svn: 328695

6 years ago[X86][BtVer2] Fix the number of micro opcodes for a bunch of YMM instructions.
Andrea Di Biagio [Wed, 28 Mar 2018 10:49:33 +0000 (10:49 +0000)]
[X86][BtVer2] Fix the number of micro opcodes for a bunch of YMM instructions.

The Jaguar backend natively supports 128-bit data types. Operations on YMM
registers are split into two COPs (complex operations). Each COP consumes a slot
in the dispatch group, and in the reorder buffer.

The scheduling model for Jaguar should mark those instructions as `let
NumMicroOps = 2`.

This was found when testing AVX code for BtVer2 using llvm-mca.

llvm-svn: 328694

6 years agogdb-remote: Fix checksum verification for messages with escape chars
Pavel Labath [Wed, 28 Mar 2018 10:19:10 +0000 (10:19 +0000)]
gdb-remote: Fix checksum verification for messages with escape chars

Summary:
We've had a mismatch in the checksum computation between the sender and
receiver. The sender computed the payload checksum using the wire
encoding of the packet, while the receiver did this after expanding
un-escaping and expanding run-length-encoded sequences. This resulted in
communication breakdown if packets using these feature were sent in the
ack mode.

Normally, this did not cause any issues since the only packet we send in
the ack-mode is the QStartNoAckMode packet, but I ran into this when
debugging the lldb-server tests which (for better or worse) don't use
this mode.

According to the gdb-remote documentation "The two-digit checksum is computed as
the modulo 256 sum of all characters between the leading â€˜$’ and the
trailing â€˜#’", it seems that our sender is doing the right thing here.
Therefore, I fix the receiver the match the sender behavior and add a
test.

With this bug fixed, we can see that lldb-server is sending a stop-reply
after receiving the "k" in the same way as debugserver does (but we
weren't detecting this because at that point the connection was dead
already). I fix that expectation as well.

Reviewers: clayborg, jasonmolenda

Subscribers: mgorny, lldb-commits

Differential Revision: https://reviews.llvm.org/D44922

llvm-svn: 328693

6 years ago[MSan] Add an isStore argument to getShadowOriginPtr(). NFC
Alexander Potapenko [Wed, 28 Mar 2018 10:17:17 +0000 (10:17 +0000)]
[MSan] Add an isStore argument to getShadowOriginPtr(). NFC

This is a step towards the upcoming KMSAN implementation patch.
The isStore argument is to be used by getShadowOriginPtrKernel(),
it is ignored by getShadowOriginPtrUserspace().

Depending on whether a memory access is a load or a store, KMSAN
instruments it with different functions, __msan_metadata_ptr_for_load_X()
and __msan_metadata_ptr_for_store_X().

Those functions may return different values for a single address,
which is necessary in the case the runtime library decides to ignore
particular accesses.

llvm-svn: 328692

6 years ago[ARM] Support float literals under XO
Christof Douma [Wed, 28 Mar 2018 10:02:26 +0000 (10:02 +0000)]
[ARM] Support float literals under XO

Follow up patch of r328313 to support the UseVMOVSR constraint. Removed
some unneeded instructions from the test and removed some stray
comments.

Differential Revision: https://reviews.llvm.org/D44941

llvm-svn: 328691

6 years ago[PATCH] [RISCV] Verify the input value of -march=
Shiva Chen [Wed, 28 Mar 2018 08:29:50 +0000 (08:29 +0000)]
[PATCH] [RISCV] Verify the input value of -march=

Summary:
This patch doing more check and verify the -march= string and will issue
an error if it's a invalid combination.

Reviewers: asb, apazos

Differential Revision: https://reviews.llvm.org/D44189

Patch by Kito Cheng.

llvm-svn: 328690

6 years ago[RegisterCoalescing] Don't move COPY if it would interfere with another value
Mikael Holmen [Wed, 28 Mar 2018 06:01:30 +0000 (06:01 +0000)]
[RegisterCoalescing] Don't move COPY if it would interfere with another value

Summary:
RegisterCoalescer::removePartialRedundancy tries to hoist B = A from
BB0/BB2 to BB1:

  BB1:
       ...
  BB0/BB2:  ----
       B = A;   |
       ...      |
       A = B;   |
         |-------
         |

It does so if a number of conditions are fulfilled. However, it failed
to check if B was used by any of the terminators in BB1. Since we must
insert B = A before the terminators (since it's not a terminator itself),
this means that we could erroneously insert a new definition of B before a
use of it.

Reviewers: wmi, qcolombet

Reviewed By: wmi

Subscribers: MatzeB, llvm-commits, sdardis

Differential Revision: https://reviews.llvm.org/D44918

llvm-svn: 328689

6 years agoFix some handling of AST nodes with diagnostics.
Richard Trieu [Wed, 28 Mar 2018 04:16:13 +0000 (04:16 +0000)]
Fix some handling of AST nodes with diagnostics.

The diagnostic system for Clang can already handle many AST nodes.  Instead
of converting them to strings first, just hand the AST node directly to
the diagnostic system and let it handle the output.  Minor changes in some
diagnostic output.

llvm-svn: 328688

6 years ago[ORC] Fix ORC on platforms without indirection support.
Lang Hames [Wed, 28 Mar 2018 03:41:45 +0000 (03:41 +0000)]
[ORC] Fix ORC on platforms without indirection support.

Previously this crashed because a nullptr (returned by
createLocalIndirectStubsManagerBuilder() on platforms without
indirection support) functor was unconditionally invoked.

Patch by Andres Freund. Thanks Andres!

llvm-svn: 328687

6 years agoInitialize OffsetMap in a known location.
Rafael Espindola [Wed, 28 Mar 2018 03:20:18 +0000 (03:20 +0000)]
Initialize OffsetMap in a known location.

This is a small optimization and avoids the need to use call_once.

llvm-svn: 328686

6 years agoDefine a trivial method inline.
Rafael Espindola [Wed, 28 Mar 2018 03:14:11 +0000 (03:14 +0000)]
Define a trivial method inline.

llvm-svn: 328685

6 years agoStore live offsets as uint32_t.
Rafael Espindola [Wed, 28 Mar 2018 02:32:31 +0000 (02:32 +0000)]
Store live offsets as uint32_t.

We don't support input merge sections larger than 4gb, so these can be
uint32_t.

llvm-svn: 328684

6 years ago[AArch64] add ftrunc tests; NFC
Sanjay Patel [Wed, 28 Mar 2018 00:56:00 +0000 (00:56 +0000)]
[AArch64] add ftrunc tests; NFC

As suggested in D44909.

llvm-svn: 328683

6 years ago[PowerPC] add ftrunc vector tests; NFC
Sanjay Patel [Wed, 28 Mar 2018 00:49:12 +0000 (00:49 +0000)]
[PowerPC] add ftrunc vector tests; NFC

Baseline tests for vectors as suggested in D44909.

llvm-svn: 328682

6 years ago[asan] Add vfork to the list of reasons for stack errors.
Evgeniy Stepanov [Wed, 28 Mar 2018 00:45:20 +0000 (00:45 +0000)]
[asan] Add vfork to the list of reasons for stack errors.

Until we figure out what to do with it, vfork can cause stack-based
false positives.

llvm-svn: 328681

6 years ago[ObjC] Make C++ triviality type traits available to non-trivial C
Akira Hatanaka [Wed, 28 Mar 2018 00:12:08 +0000 (00:12 +0000)]
[ObjC] Make C++ triviality type traits available to non-trivial C
structs.

r326307 and r327870 made changes that allowed using non-trivial C
structs with fields qualified with __strong or __weak. This commit makes
the following C++ triviality type traits available to non-trivial C
structs:

__has_trivial_assign
__has_trivial_move_assign
__has_trivial_copy
__has_trivial_move_constructor
__has_trivial_constructor
__has_trivial_destructor

rdar://problem/33599681

Differential Revision: https://reviews.llvm.org/D44913

llvm-svn: 328680

6 years ago[ELF] Fix offsets in comment of tls-got.s
Fangrui Song [Wed, 28 Mar 2018 00:03:21 +0000 (00:03 +0000)]
[ELF] Fix offsets in comment of tls-got.s

llvm-svn: 328679

6 years ago[WebAssembly] Add exception and selector intrinsics
Heejin Ahn [Tue, 27 Mar 2018 23:37:07 +0000 (23:37 +0000)]
[WebAssembly] Add exception and selector intrinsics

Summary:
Since wasm EH does not use landingpad instructions, these instructions
provide exception pointer and selector values until we lower them in
WasmEHPrepare.

Reviewers: jgravelle-google

Subscribers: jfb, sbc100, jgravelle-google, sunfish, llvm-commits

Differential Revision: https://reviews.llvm.org/D44930

llvm-svn: 328678

6 years agoAMDGPU: Really implement getFrameRegister
Matt Arsenault [Tue, 27 Mar 2018 23:26:59 +0000 (23:26 +0000)]
AMDGPU: Really implement getFrameRegister

Currently this seems to only really be used for debug
info.

llvm-svn: 328677

6 years agoReapply "[DWARFv5] Emit file 0 to the line table."
Paul Robinson [Tue, 27 Mar 2018 22:40:34 +0000 (22:40 +0000)]
Reapply "[DWARFv5] Emit file 0 to the line table."

DWARF v5 specifies that the root file (also given in the DW_AT_name
attribute of the compilation unit DIE) should be emitted explicitly to
the line table's list of files.  This makes the line table more
independent of the .debug_info section.

Fixes the bug found by asan. Also XFAIL the new test for Darwin, which
is stuck on DWARF v2, and fix up other tests so they stop failing on
Windows.  Last but not least, don't break "clang -g" of an assembler
file that has .file directives in it.

Differential Revision: https://reviews.llvm.org/D44054

llvm-svn: 328676

6 years ago[MachineOutliner] AArch64: Don't outline ADRPs with un-outlinable operands
Jessica Paquette [Tue, 27 Mar 2018 22:23:48 +0000 (22:23 +0000)]
[MachineOutliner] AArch64: Don't outline ADRPs with un-outlinable operands

If an ADRP appears with, say, a CPI operand, we shouldn't outline it.

This moves the check for unsafe operands so that it occurs before the special-case
for ADRPs. Also add a test for outlining ADRPs.

llvm-svn: 328674

6 years ago[AMDGPU] For OS type AMDPAL, fixed scratch on compute shader
Tim Renouf [Tue, 27 Mar 2018 21:35:00 +0000 (21:35 +0000)]
[AMDGPU] For OS type AMDPAL, fixed scratch on compute shader

Summary:
For OS type AMDPAL, the scratch descriptor is loaded from offset 0 of
the GIT, whose 32 bit pointer is in s0 (s8 for gfx9 merged shaders).

This commit fixes that to use offset 0x10 instead of offset 0 for a
compute shader, per the PAL ABI spec.

Reviewers: kzhuravl, nhaehnle, timcorringham

Subscribers: kzhuravl, wdng, yaxunl, t-tye, llvm-commits, dstuttard, nhaehnle, arsenm

Differential Revision: https://reviews.llvm.org/D44468

Change-Id: I93dffa647758e37f613bb5e0dfca840d82e6d26f
llvm-svn: 328673

6 years ago[Driver] Add fuzzer-no-link into the list of supported Fuchsia sanitizers
Petr Hosek [Tue, 27 Mar 2018 21:33:12 +0000 (21:33 +0000)]
[Driver] Add fuzzer-no-link into the list of supported Fuchsia sanitizers

This is needed in addition to fuzzer in order to use libFuzzer.

Differential Revision: https://reviews.llvm.org/D44947

llvm-svn: 328672

6 years ago[Sema] Emit -Winteger-overflow for arguments in function calls, ObjC messages.
Volodymyr Sapsai [Tue, 27 Mar 2018 21:29:05 +0000 (21:29 +0000)]
[Sema] Emit -Winteger-overflow for arguments in function calls, ObjC messages.

rdar://problem/35539384

Reviewers: ahatanak, nicholas, rsmith, jkorous-apple

Reviewed By: jkorous-apple

Subscribers: cfe-commits, jkorous-apple

Differential Revision: https://reviews.llvm.org/D42938

llvm-svn: 328671

6 years ago[DWARF] Suppress split line tables more carefully.
Paul Robinson [Tue, 27 Mar 2018 21:28:59 +0000 (21:28 +0000)]
[DWARF] Suppress split line tables more carefully.

If a given split type unit does not have source locations, don't have
it refer to the split line table.
If no split type unit refers to the split line table, don't emit the
line table at all.

This will save a little space on rare occasions, but also refactors
things a bit to improve which class is responsible for what.

Responding to review comments on r326395.

Differential Revision: https://reviews.llvm.org/D44220

llvm-svn: 328670

6 years ago[AMDGPU] Define code object identification string used in AMDHSA runtimes.
Tony Tye [Tue, 27 Mar 2018 21:20:46 +0000 (21:20 +0000)]
[AMDGPU] Define code object identification string used in AMDHSA runtimes.

Differential Revision: https://reviews.llvm.org/D44718

llvm-svn: 328669

6 years ago[CodeGen] Fixed unreachable with -print-machineinstrs and custom pseudo source value
Tim Renouf [Tue, 27 Mar 2018 21:14:04 +0000 (21:14 +0000)]
[CodeGen] Fixed unreachable with -print-machineinstrs and custom pseudo source value

Summary:
Rev 327580 "[CodeGen] Use MIR syntax for MachineMemOperand printing"
broke -print-machineinstrs for us on AMDGPU, because we have custom
pseudo source values, and MIR serialization does not implement that.

This commit at least restores the functionality of -print-machineinstrs,
even if it does not properly implement the missing MIR serialization
functionality.

Differential Revision: https://reviews.llvm.org/D44871

Change-Id: I44961c0b90bf6d48c01484ed7a4e466fd300db66
llvm-svn: 328668

6 years agoInitialize variable added in r328617.
Sterling Augustine [Tue, 27 Mar 2018 21:11:57 +0000 (21:11 +0000)]
Initialize variable added in r328617.

llvm-svn: 328667

6 years ago[polly] [ScopInfo] Don't pre-compute the name of the Scop's region.
Eli Friedman [Tue, 27 Mar 2018 20:51:49 +0000 (20:51 +0000)]
[polly] [ScopInfo] Don't pre-compute the name of the Scop's region.

This gets very expensive for basic blocks which don't have a name: it
calls printAsOperand, which numbers the entire module. We don't
normally need the name anyway, though; it's only used for debug dumps,
so don't compute it by default.

Differential Revision: https://reviews.llvm.org/D44946

llvm-svn: 328666

6 years ago[YAML] Remove unit test of multibyte non-printable escaping that uses C++11 escapes
Graydon Hoare [Tue, 27 Mar 2018 20:46:26 +0000 (20:46 +0000)]
[YAML] Remove unit test of multibyte non-printable escaping that uses C++11 escapes

llvm-svn: 328665

6 years ago[X86] Add WriteFMOVMSK/WriteVecMOVMSK/WriteMMXMOVMSK scheduler classes
Simon Pilgrim [Tue, 27 Mar 2018 20:38:54 +0000 (20:38 +0000)]
[X86] Add WriteFMOVMSK/WriteVecMOVMSK/WriteMMXMOVMSK scheduler classes

Currently MOVMSK instructions use the WriteVecLogic class, which is a very poor choice given that MOVMSK involves a SSE->GPR transfer.

Differential Revision: https://reviews.llvm.org/D44924

llvm-svn: 328664

6 years ago[coroutines] Do not attempt to typo-correct when coroutine is looking for required...
Gor Nishanov [Tue, 27 Mar 2018 20:38:19 +0000 (20:38 +0000)]
[coroutines] Do not attempt to typo-correct when coroutine is looking for required members

When SemaCoroutine looks for await_resume, it means it. No need for helpful: "Did you mean await_ready?" messages.

Fixes PR33477 and a couple of FIXMEs in test/SemaCXX/coroutines.cpp

llvm-svn: 328663

6 years ago[DWARF][DWARF v5]: Adding support for dumping DW_RLE_offset_pair and DW_RLE_base_address
Wolfgang Pieb [Tue, 27 Mar 2018 20:27:36 +0000 (20:27 +0000)]
[DWARF][DWARF v5]: Adding support for dumping DW_RLE_offset_pair and DW_RLE_base_address

Reviewers: dblakie, aprantl

Differential Revision: https://reviews.llvm.org/D44811

llvm-svn: 328662

6 years ago[YAML] Escape non-printable multibyte UTF8 in Output::scalarString.
Graydon Hoare [Tue, 27 Mar 2018 19:52:45 +0000 (19:52 +0000)]
[YAML] Escape non-printable multibyte UTF8 in Output::scalarString.

The existing YAML Output::scalarString code path includes a partial and
incorrect implementation of YAML escaping logic. In particular, the logic put
in place in rL321283 escapes non-printable bytes only if they are not part of a
multibyte UTF8 sequence; implicitly this means that all multibyte UTF8
sequences -- printable and non -- are passed through verbatim.

The simplest solution to this is to direct the Output::scalarString method to
use the standalone yaml::escape function, and this _almost_ works, except that
the existing code in that function _over_ escapes: any multibyte UTF8 sequence
is escaped, even printable ones. While this is permitted for YAML, it is also
more aggressive (and hard to read for non-English locales) than necessary,
and the entire point of rL321283 was to back off such aggressive over-escaping.

So in this change, I have both redirected Output::scalarString to use
yaml::escape _and_ modified yaml::escape to optionally restrict its escaping to
non-printables. This preserves behaviour of any existing clients while giving
them a path to more moderate escaping should they desire.

Reviewers: JDevlieghere, thegameg, MatzeB, vladimir.plyashkun

Reviewed By: thegameg

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D44863

llvm-svn: 328661

6 years ago80-line wrap. NFC
Xin Tong [Tue, 27 Mar 2018 19:43:02 +0000 (19:43 +0000)]
80-line wrap. NFC

llvm-svn: 328660

6 years agoAMDGPU: Fix not preserving CSR VGPR if used for SGPR spills
Matt Arsenault [Tue, 27 Mar 2018 19:42:55 +0000 (19:42 +0000)]
AMDGPU: Fix not preserving CSR VGPR if used for SGPR spills

Before this was not done if the function had no calls in it. This
is still a possible issue with any callable function, regardless
of calls present.

llvm-svn: 328659

6 years agoUse the DWARF linkage name when importing C++ methods.
Davide Italiano [Tue, 27 Mar 2018 19:40:50 +0000 (19:40 +0000)]
Use the DWARF linkage name when importing C++ methods.

When importing C++ methods into clang AST nodes from the DWARF symbol
table, preserve the DW_AT_linkage_name and use it as the linker
("asm") name for the symbol.

Concretely, this enables `expression` to call into names that use the
GNU `abi_tag` extension, and enables lldb to call into code using
std::string or std::list from recent versions of libstdc++. See
https://bugs.llvm.org/show_bug.cgi?id=35310 . It also seems broadly
more robust than relying on the DWARF->clang->codegen pipeline to
roundtrip properly, but I'm not immediately aware of any other cases
in which it makes a difference.

Patch by Nelson Elhage!

Differential Revision:  https://reviews.llvm.org/D40283

llvm-svn: 328658

6 years agoAMDGPU: Update datalayout for stack alignment
Matt Arsenault [Tue, 27 Mar 2018 19:26:51 +0000 (19:26 +0000)]
AMDGPU: Update datalayout for stack alignment

llvm-svn: 328657

6 years agoAMDGPU: Set natural stack alignment in DataLayout
Matt Arsenault [Tue, 27 Mar 2018 19:26:40 +0000 (19:26 +0000)]
AMDGPU: Set natural stack alignment in DataLayout

Only 4 byte alignment is ever useful, so increasing anything
beyond this may require realigning the stack.

llvm-svn: 328656

6 years ago[DWARF] Simplify DWARFAddressRange::contains
Fangrui Song [Tue, 27 Mar 2018 19:05:02 +0000 (19:05 +0000)]
[DWARF] Simplify DWARFAddressRange::contains

This transform is valid because the ranges have been validated (LowPC <= HighPC).

Differential Revision: https://reviews.llvm.org/D44772

llvm-svn: 328655

6 years ago[Sema] Avoid crash for category implementation without interface
Shoaib Meenai [Tue, 27 Mar 2018 18:58:28 +0000 (18:58 +0000)]
[Sema] Avoid crash for category implementation without interface

When we have a category implementation without a corresponding interface
(which is an error by itself), semantic checks for property accesses
will attempt to access a null interface declaration and then segfault.
Error out in such cases instead.

Differential Revision: https://reviews.llvm.org/D44916

llvm-svn: 328654

6 years ago[PGO] Fix branch probability remarks assert
Rong Xu [Tue, 27 Mar 2018 18:55:56 +0000 (18:55 +0000)]
[PGO] Fix branch probability remarks assert

Fixed counter/weight overflow that leads to an assertion. Also fixed the help
string for pgo-emit-branch-prob option.

Differential Revision: https://reviews.llvm.org/D44809

llvm-svn: 328653

6 years agoAMDGPU: Fix crash when MachinePointerInfo invalid
Matt Arsenault [Tue, 27 Mar 2018 18:39:45 +0000 (18:39 +0000)]
AMDGPU: Fix crash when MachinePointerInfo invalid

The combine on a select of a load only triggers for
addrspace 0, and discards the MachinePointerInfo. The
conservative default needs to be used for this.

llvm-svn: 328652

6 years agoAMDGPU: Fix register name format in tests
Matt Arsenault [Tue, 27 Mar 2018 18:39:42 +0000 (18:39 +0000)]
AMDGPU: Fix register name format in tests

These were changed to match the asm output name a long time ago,
although I think the old tablegenerated names still work.

llvm-svn: 328651

6 years agoAMDGPU: Fix FP restore from being reordered with stack ops
Matt Arsenault [Tue, 27 Mar 2018 18:38:51 +0000 (18:38 +0000)]
AMDGPU: Fix FP restore from being reordered with stack ops

In a function, s5 is used as the frame base SGPR. If a function
is calling another function, during the call sequence
it is copied to a preserved SGPR and restored.

Before it was possible for the scheduler to move stack operations
before the restore of s5, since there's nothing to associate
a frame index access with the restore.

Add an implicit use of s5 to the adjcallstack pseudo which ends
the call sequence to preven this from happening. I'm not 100%
satisfied with this solution, but I'm not sure what else would be
better.

llvm-svn: 328650

6 years ago[Core] Correctly handle float division in Scalar.
Davide Italiano [Tue, 27 Mar 2018 18:37:54 +0000 (18:37 +0000)]
[Core] Correctly handle float division in Scalar.

Patch by Tom Tromey!

Differential Revision:  https://reviews.llvm.org/D44693

llvm-svn: 328649

6 years ago[Hexagon] Implement TTI::shouldMaximizeVectorBandwidth
Krzysztof Parzyszek [Tue, 27 Mar 2018 18:10:47 +0000 (18:10 +0000)]
[Hexagon] Implement TTI::shouldMaximizeVectorBandwidth

llvm-svn: 328648

6 years ago[Power9] Fix the resource list for the COPY instruction.
Stefan Pintilie [Tue, 27 Mar 2018 17:51:53 +0000 (17:51 +0000)]
[Power9] Fix the resource list for the COPY instruction.

The COPY instruction was listed as a 4 cycle instruction.
It is now listed correctly as a 2 cycle ALU instruction.

llvm-svn: 328647

6 years ago[HWASan] Make use-after-free c, not c++ test.
Alex Shlyapnikov [Tue, 27 Mar 2018 17:45:53 +0000 (17:45 +0000)]
[HWASan] Make use-after-free c, not c++ test.

To minimize testing surface (remove libstdc++ from the picture, for
one), make use-after-free c, not c++ test.

Differential Revision: https://reviews.llvm.org/D44705

llvm-svn: 328646

6 years agoAttempt to fix clangd test on Windows by wildcarding drive letters
Reid Kleckner [Tue, 27 Mar 2018 17:44:12 +0000 (17:44 +0000)]
Attempt to fix clangd test on Windows by wildcarding drive letters

llvm-svn: 328645

6 years agoRemap values in PromotedFloats
Pirama Arumuga Nainar [Tue, 27 Mar 2018 17:42:36 +0000 (17:42 +0000)]
Remap values in PromotedFloats

Summary: When a node is about to be erased from ReplacedValues, we should also remap its corresponding values in PromotedFloats.

Patch by Yan Luo (Yan.Luo2@synopsys.com)

Reviewers: pirama

Reviewed By: pirama

Subscribers: lebedev.ri, llvm-commits

Differential Revision: https://reviews.llvm.org/D44872

llvm-svn: 328644

6 years ago[WebAssembly] Add export/import for function pointer table
Nicholas Wilson [Tue, 27 Mar 2018 17:38:51 +0000 (17:38 +0000)]
[WebAssembly] Add export/import for function pointer table

This enables callback-style programming where the JavaScript environment
can call back into the Wasm environment using a function pointer
received from the module.

Differential Revision: https://reviews.llvm.org/D44427

llvm-svn: 328643

6 years agoFix a reoccuring typo in load-combine tests
Artur Pilipenko [Tue, 27 Mar 2018 17:33:50 +0000 (17:33 +0000)]
Fix a reoccuring typo in load-combine tests

   %tmp = bitcast i32* %arg to i8*
   %tmp1 = getelementptr inbounds i8, i8* %tmp, i32 0
-  %tmp2 = load i8, i8* %tmp, align 1
+  %tmp2 = load i8, i8* %tmp1, align 1

This doesn't change the semantics of the tests but makes use of %tmp1 which was originally intended.

llvm-svn: 328642

6 years agoUpdate test after r328635 in LLVM
Krzysztof Parzyszek [Tue, 27 Mar 2018 17:17:39 +0000 (17:17 +0000)]
Update test after r328635 in LLVM

llvm-svn: 328641

6 years agoForce SHF_MERGE optimizations with -r.
Rafael Espindola [Tue, 27 Mar 2018 17:09:23 +0000 (17:09 +0000)]
Force SHF_MERGE optimizations with -r.

Some tools (dwarfdump for example) get confused by the current -O0 -r
output since it has multiple copies of .debug_str.

We cannot just merge sections with the same name as they can have
different sh_entsize.

We could have duplicated logic for merging sections based on name and
sh_entsize, but it seems better to just use the existing logic by
enabling optimizations.

llvm-svn: 328640

6 years ago[Hexagon] Rudimentary support for auto-vectorization for HVX
Krzysztof Parzyszek [Tue, 27 Mar 2018 17:07:52 +0000 (17:07 +0000)]
[Hexagon] Rudimentary support for auto-vectorization for HVX

This implements a set of TTI functions that the loop vectorizer uses.
The only purpose of this is to enable testing. Auto-vectorization is
disabled by default, enabled by -hexagon-autohvx.

llvm-svn: 328639

6 years ago[AArch64] Decorate AArch64 instrs with OPERAND_PCREL
Rafael Auler [Tue, 27 Mar 2018 16:58:01 +0000 (16:58 +0000)]
[AArch64] Decorate AArch64 instrs with OPERAND_PCREL

Summary:
This is a canonical way to teach objdump to print the target
symbols for branches when disassembling AArch64 code.

Reviewers: evandro, t.p.northover, espindola

Reviewed By: t.p.northover

Differential Revision: https://reviews.llvm.org/D44851

llvm-svn: 328638

6 years ago[NFC] OptPassGate extracted from OptBisect
Fedor Sergeev [Tue, 27 Mar 2018 16:57:20 +0000 (16:57 +0000)]
[NFC] OptPassGate extracted from OptBisect

Summary:
This is an NFC refactoring of the OptBisect class to split it into an optional pass gate interface used by LLVMContext and the Optional Pass Bisector (OptBisect) used for debugging of optional passes.

This refactoring is needed for D44464, which introduces setOptPassGate() method to allow implementations other than OptBisect.

Patch by Yevgeny Rouban.

Reviewers: andrew.w.kaylor, fedor.sergeev, vsk, dberlin, Eugene.Zelenko, reames, skatkov
Reviewed By: fedor.sergeev
Differential Revision: https://reviews.llvm.org/D44821

llvm-svn: 328637

6 years ago[clang] Change std::sort to llvm::sort in response to r327219
Mandeep Singh Grang [Tue, 27 Mar 2018 16:50:00 +0000 (16:50 +0000)]
[clang] Change std::sort to llvm::sort in response to r327219

r327219 added wrappers to std::sort which randomly shuffle the container before
sorting.  This will help in uncovering non-determinism caused due to undefined
sorting order of objects having the same key.

To make use of that infrastructure we need to invoke llvm::sort instead of
std::sort.

llvm-svn: 328636

6 years agoUse .set instead of = when printing assignment in assembly output
Krzysztof Parzyszek [Tue, 27 Mar 2018 16:44:41 +0000 (16:44 +0000)]
Use .set instead of = when printing assignment in assembly output

On Hexagon "x = y" is a syntax used in most instructions, and is not
treated as a directive.

Differential Revision: https://reviews.llvm.org/D44256

llvm-svn: 328635