Jason Ekstrand [Fri, 17 Jan 2020 20:41:50 +0000 (14:41 -0600)]
iris: Plumb deref block size through to 3DSTATE_SF
Cc: "20.0" mesa-stable@lists.freedesktop.org
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3454>
Jason Ekstrand [Fri, 17 Jan 2020 20:14:03 +0000 (14:14 -0600)]
anv: Plumb deref block size through to 3DSTATE_SF
Cc: "20.0" mesa-stable@lists.freedesktop.org
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3454>
Jason Ekstrand [Fri, 17 Jan 2020 20:13:28 +0000 (14:13 -0600)]
intel/blorp: Plumb deref block size through to 3DSTATE_SF
Cc: "20.0" mesa-stable@lists.freedesktop.org
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3454>
Jason Ekstrand [Fri, 17 Jan 2020 20:10:40 +0000 (14:10 -0600)]
intel/common: Return the block size from get_urb_config
Cc: "20.0" mesa-stable@lists.freedesktop.org
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3454>
Jason Ekstrand [Thu, 16 Jan 2020 23:05:10 +0000 (17:05 -0600)]
anv: Emit URB setup earlier
Cc: "20.0" mesa-stable@lists.freedesktop.org
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3454>
Jason Ekstrand [Fri, 17 Jan 2020 19:38:52 +0000 (13:38 -0600)]
iris: Consolodate URB emit
Now that we don't have to carry a URB state emit function for BLORP we
can roll some stuff together and drop a genX helper.
Cc: "20.0" mesa-stable@lists.freedesktop.org
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3454>
Jason Ekstrand [Fri, 17 Jan 2020 18:09:13 +0000 (12:09 -0600)]
intel/blorp: Always emit URB config on Gen7+
Previously, i965/iris tried to reuse the currently programmed URB config
if it was good enough for BLORP, rather than reprogramming it each time.
However, this will make some things harder on Gen12+ and we've not seen
any performance impact from emitting URB more frequently in ANV.
This makes the blorp <-> driver interface a bit simpler on Gen7+ because
now all the driver has to do is to provide the L3$ config rather than
trying to hand off URB re-config to blorp.
Cc: "20.0" mesa-stable@lists.freedesktop.org
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3454>
Jason Ekstrand [Thu, 16 Jan 2020 23:02:26 +0000 (17:02 -0600)]
intel: Take a gen_l3_config in gen_get_urb_config
Instead of making each driver pass in the same push constant size and do
it's own L3$ config URB size calculation, just make them pass in their
L3$ configuration.
Cc: "20.0" mesa-stable@lists.freedesktop.org
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3454>
Jason Ekstrand [Fri, 17 Jan 2020 19:30:48 +0000 (13:30 -0600)]
i965: Re-emit l3 state before BLORP executes
If BLORP is the first thing to execute, we may not have set the L3$
config yet. That's not normally a problem but we're about to add code
to BLORP which will look at brw_context::l3::config and we'd like that
to be initialized. It's also just good practice.
Cc: "20.0" mesa-stable@lists.freedesktop.org
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3454>
Jason Ekstrand [Fri, 17 Jan 2020 20:22:58 +0000 (14:22 -0600)]
iris: Use the URB size from the L3$ config
Cc: "20.0" mesa-stable@lists.freedesktop.org
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3454>
Jason Ekstrand [Fri, 17 Jan 2020 17:37:31 +0000 (11:37 -0600)]
iris: Store the L3$ configs in the screen
We only calculate them based on device info and never change them so
this seems like a reasonable place to put them. We could also put them
in the context, but that's not accessible from iris_init_*_context.
Cc: "20.0" mesa-stable@lists.freedesktop.org
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3454>
Jason Ekstrand [Fri, 17 Jan 2020 17:36:52 +0000 (11:36 -0600)]
iris: Set SLMEnable based on the L3$ config
Cc: "20.0" mesa-stable@lists.freedesktop.org
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3454>
Jason Ekstrand [Fri, 17 Jan 2020 17:23:14 +0000 (11:23 -0600)]
intel/genxml: Drop SLMEnable from L3CNTLREG on Gen11
SML is no longer in the L3$ on Gen11+. It's not incredibly clear from
the docs but no Gen11 platforms are in the list of platforms on which
this bit exists. Also, we've been always setting it false on Gen11 in
ANV and i965 thanks to GEN_L3P_SLM being zero with no ill effects.
Cc: "20.0" mesa-stable@lists.freedesktop.org
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3454>
Jason Ekstrand [Thu, 16 Jan 2020 23:59:43 +0000 (17:59 -0600)]
anv,iris: Set 3DSTATE_SF::DerefBlockSize to per-poly on Gen12+
According to the BSpec, this should prevent hangs when using shaders
with large URB entries. A more precise fix can be done but it requires
re-arranging URB setup.
Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3454>
Jason Ekstrand [Thu, 16 Jan 2020 23:54:49 +0000 (17:54 -0600)]
genxml: Add a new 3DSTATE_SF field on gen12
Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3454>
Dylan Baker [Thu, 30 Jan 2020 22:43:17 +0000 (14:43 -0800)]
docs/release-calendar: 20.0.0-rc1 has been released
Brian Ho [Fri, 24 Jan 2020 23:04:50 +0000 (18:04 -0500)]
turnip: Fix vkCmdCopyQueryPoolResults with available flag
Previously, calling vkCmdCopyQueryPoolResults with the
VK_QUERY_RESULT_WITH_AVAILABILITY_BIT flag set the query result
field in the buffer to 0 if unavailable and the query result if
available. This was a misunderstanding of the Vulkan spec, and this
commit corrects the behavior to emitting a separate available
result in addition to the query result.
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3560>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3560>
Brian Ho [Fri, 24 Jan 2020 21:39:47 +0000 (16:39 -0500)]
turnip: Fix vkGetQueryPoolResults with available flag
Previously, calling vkGetQueryPoolResults with the
VK_QUERY_RESULT_WITH_AVAILABILITY_BIT flag set the query result
field in *pData to 0 if unavailable and the query result if
available. This was a misunderstanding of the Vulkan spec, and this
commit corrects the behavior to eriting a separate available result
in addition to the query result.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3560>
Brian Ho [Thu, 30 Jan 2020 16:02:29 +0000 (11:02 -0500)]
turnip: Free event->bo on vkDestroyEvent
Fixes a leak from freeing event but not event->bo.
Reviewed-by: Jonathan Marek <jonathan@marek.ca>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3639>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3639>
Kenneth Graunke [Wed, 29 Jan 2020 15:50:16 +0000 (07:50 -0800)]
loader: Fix leak of kernel driver name
This is strdup'd, it needs to be freed.
CID: 1458032
Fixes:
f93bb2fb102 ("loader: Check if the kernel driver is i915 before loading iris")
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3630>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3630>
Jan Zielinski [Thu, 30 Jan 2020 08:34:55 +0000 (09:34 +0100)]
docs: Update SWR tessellation support
Update features.txt to reflect ARB_tessellation_shader
support in SWR
Reviewed-by: Krzysztof Raszkowski <krzysztof.raszkowski@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3636>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3636>
Kenneth Graunke [Wed, 29 Jan 2020 08:22:02 +0000 (00:22 -0800)]
i965: Use brw_batch_references in tex_busy check
If the batch references the buffer, we will have to flush the batch
immediately before mapping it, at which point it will be busy.
(This bug has existed for a long time...even going back to BLT-era...)
Fixes:
779923194c6 ("i965/tex_image: Use meta for instead of the blitter PBO TexImage and GetTexImage")
Fixes:
d5d4ba9139a ("i965/tex_subimage: use meta instead of the blitter for PBO TexSubImage")
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3616>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3616>
Christian Gmeiner [Sat, 21 Dec 2019 19:54:29 +0000 (20:54 +0100)]
etnaviv: drm-shim: add GC400
These are the ETNAVIV_PARAM's returned from a GC400 found on a
STM32MP157C-DK2 Discovery Board running mainline kernel.
Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3195>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3195>
Qiang Yu [Wed, 15 Jan 2020 10:00:19 +0000 (18:00 +0800)]
lima: add noheap debug option
Disable using heap buffer when set.
Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3264>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3264>
Qiang Yu [Wed, 1 Jan 2020 12:25:45 +0000 (20:25 +0800)]
lima: create heap buffer with new interface if available
Newly added heap buffer create interface can create a
large enough buffer whose backup memory can increase
dynamically as needed.
Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com>
Tested-by: Andreas Baierl <ichgeh@imkreisrum.de>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3264>
Qiang Yu [Tue, 31 Dec 2019 06:55:35 +0000 (14:55 +0800)]
lima: sync lima_drm.h with kernel
Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com>
Tested-by: Andreas Baierl <ichgeh@imkreisrum.de>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3264>
Icenowy Zheng [Wed, 29 Jan 2020 12:45:22 +0000 (20:45 +0800)]
lima: fix lima_set_vertex_buffers()
When setting the vertex buffers, lima calls
util_set_vertex_buffers_mask() to reference and copy buffers. That
function
function adds dst with start_slot internally, so lima should not offset
the destination address again.
This is discovered when comparing with other drivers, and fixed by
removing the extra offset in lima_set_vertex_buffers().
This fixes draws that get translated in u_vbuf, because u_vbuf adds
extra vertex buffers when translating.
Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Reviewed-by: Andreas Baierl <ichgeh@imkreisrum.de>
Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3620>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3620>
Jonathan Marek [Mon, 16 Dec 2019 15:56:54 +0000 (10:56 -0500)]
turnip: hook up cmdbuffer event set/wait
Gets some basic tests under "dEQP-VK.synchronization.*event*" passing
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3123>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3123>
Christian Gmeiner [Wed, 29 Jan 2020 22:06:35 +0000 (23:06 +0100)]
etnaviv: drop default state for PE_STENCIL_CONFIG_EXT2
It gets emitted when needed.
Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Jonathan Marek <jonathan@marek.ca>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3631>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3631>
Daniel Schürmann [Wed, 29 Jan 2020 14:30:25 +0000 (15:30 +0100)]
docs: add new features for RADV/ACO.
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3627>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3627>
Samuel Pitoiset [Wed, 29 Jan 2020 14:02:26 +0000 (15:02 +0100)]
radv: refactor physical device properties
Based on ANV. This removes a bunch of duplicated code for properties.
Fixes:
1b8d99e2885 ("radv: bump conformance version to 1.2.0.0")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3626>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3626>
Rob Clark [Wed, 22 Jan 2020 00:15:28 +0000 (16:15 -0800)]
freedreno: remove flush-queue
Signed-off-by: Rob Clark <robdclark@chromium.org>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3503>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3503>
Rob Clark [Tue, 21 Jan 2020 23:59:22 +0000 (15:59 -0800)]
freedreno: add gmem_lock
The gmem state is split out now, so it does not require synchronization.
But gmem rendering still accesses vsc state from the context.
TODO maybe there is a better way? For gen's that don't do vsc resizing,
this is probably easier.. but for a6xx there isn't really a great
position for more fine grained locking. Maybe it doesn't matter since
in practice the lock shouldn't be contended.
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3503>
Rob Clark [Tue, 21 Jan 2020 22:28:06 +0000 (14:28 -0800)]
freedreno: add gmem state cache
Which also has the benefit of getting rid of fd_context::gmem.
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3503>
Rob Clark [Tue, 21 Jan 2020 19:27:14 +0000 (11:27 -0800)]
freedreno: get GMEM state from batch
Prep work to reduce churn in next patch.
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3503>
Rob Clark [Sat, 25 Jan 2020 19:18:32 +0000 (11:18 -0800)]
freedreno/a2xx: constify gmem state
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3503>
Rob Clark [Sat, 25 Jan 2020 19:17:43 +0000 (11:17 -0800)]
freedreno/a3xx: constify gmem state
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3503>
Rob Clark [Sat, 25 Jan 2020 19:16:35 +0000 (11:16 -0800)]
freedreno/a4xx: constify gmem state
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3503>
Rob Clark [Sat, 25 Jan 2020 19:14:41 +0000 (11:14 -0800)]
freedreno/a5xx: constify gmem state
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3503>
Rob Clark [Sat, 25 Jan 2020 19:13:49 +0000 (11:13 -0800)]
freedreno/a6xx: constify gmem state
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3503>
Rob Clark [Sat, 25 Jan 2020 19:10:38 +0000 (11:10 -0800)]
freedreno: constify fd_vsc_pipe
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3503>
Rob Clark [Sat, 25 Jan 2020 19:04:58 +0000 (11:04 -0800)]
freedreno: constify fd_tile
In a following patch, when we cache the gmem state, we will want to
treat the gmem state as immuatable. So start converting things to
const to make this more clear.. fd_tile is a good place to start.
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3503>
Rob Clark [Tue, 21 Jan 2020 18:47:45 +0000 (10:47 -0800)]
freedreno: consolidate GMEM state
The tile and vsc_pipe arrays are really part of the GMEM configuration.
So pull these out of fd_context and into fd_gmem_stateobj.
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3503>
Rob Clark [Tue, 21 Jan 2020 18:34:29 +0000 (10:34 -0800)]
freedreno: extract vsc pipe bo from GMEM state
Prep work for reorganizing GMEM state and extracting out of fd_context.
The vsc pipe bo was the one thing that doesn't change with GMEM/tile
config.
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3503>
Alejandro Piñeiro [Wed, 29 Jan 2020 13:20:19 +0000 (14:20 +0100)]
turnip: remove unused descriptor state dirty
It was only used to be initialized to zero. Not even updated as
descriptor sets are bind.
As far as I understand, setting the bit TU_CMD_DIRTY_DESCRIPTOR_SET on
tu_cmd_state.dirty is used instead.
Reviewed-by: Jonathan Marek <jonathan@marek.ca>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3624>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3624>
Timur Kristóf [Wed, 29 Jan 2020 12:28:58 +0000 (13:28 +0100)]
aco: Fix the meaning of is_atomic.
Previously, is_atomic really meant "is not atomic", contrary to its name.
This commit fixes it to mean what one would think it means.
Fixes:
69bed1c9186c3e24ad54089218d58c5f7b83befe
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3618>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3618>
Kenneth Graunke [Tue, 14 Jan 2020 00:14:24 +0000 (16:14 -0800)]
iris: Support multiple chained batches.
There was never much point in artificially limiting chaining to two
batches - we can trivially support arbitrary length chains.
Currently, we should only ever have 1 or 2, but this may change.
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3613>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3613>
Kenneth Graunke [Tue, 3 Sep 2019 15:03:13 +0000 (08:03 -0700)]
iris: Make iris_emit_default_l3_config pull devinfo from the batch
No need to pass it, we can just use batch->screen->devinfo.
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3613>
Kenneth Graunke [Tue, 3 Sep 2019 14:19:32 +0000 (07:19 -0700)]
iris: Drop 'engine' from iris_batch.
For the moment, everything is I915_EXEC_RENDER, so this isn't necessary.
But even should that change, I don't think we want to handle multiple
engines in this manner.
Nowadays, we have batch->name (IRIS_BATCH_RENDER, IRIS_BATCH_COMPUTE,
possibly an IRIS_BATCH_BLIT for blorp batches someday), which describes
the functional usage of the batch. We can simply check that and select
an engine for that class of work (assuming there ever is more than one).
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3613>
Eric Anholt [Wed, 29 Jan 2020 00:00:45 +0000 (16:00 -0800)]
tu: Fix binning address setup after pack macros change.
This fixes a regression in "vkcube -m headless" rendering, but upsettingly
none of my CTS tests I've been using.
Fixes:
59f29fc845ce ("turnip: Convert the rest of tu_cmd_buffer.c over to the new pack macros.")
Caught-by: Jonathan Marek <jonathan@marek.ca>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3609>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3609>
Brian Ho [Tue, 28 Jan 2020 22:18:27 +0000 (17:18 -0500)]
turnip: Enable occlusionQueryPrecise
This commit enables the occlusionQueryPrecise feature. No additonal
work is required as occlusion queries are already implemented to
track exact sample counts.
Also enables a number of extra tests on the Vulkan CTS.
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3605>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3605>
Daniel Schürmann [Thu, 23 Jan 2020 18:12:55 +0000 (19:12 +0100)]
aco: simplify gathering of MIMG address components
This patch has a slight effect on pipelinedb:
Totals from affected shaders:
SGPRS: 23616 -> 21504 (-8.94 %)
VGPRS: 15088 -> 14444 (-4.27 %)
Spilled SGPRs: 0 -> 0 (0.00 %)
Spilled VGPRs: 0 -> 0 (0.00 %)
Private memory VGPRs: 0 -> 0 (0.00 %)
Scratch size: 0 -> 0 (0.00 %) dwords per thread
Code Size: 662660 -> 664600 (0.29 %) bytes
LDS: 49 -> 49 (0.00 %) blocks
Max Waves: 3079 -> 3204 (4.06 %)
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3602>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3602>
Daniel Schürmann [Thu, 23 Jan 2020 14:38:53 +0000 (15:38 +0100)]
aco: simplify adjust_sample_index_using_fmask() & get_image_coords()
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3602>
Daniel Schürmann [Tue, 21 Jan 2020 11:11:12 +0000 (12:11 +0100)]
aco: fix register allocation with multiple live-range splits
This patch fixes register allocation if multiple live-range splits
occur to the same variable within one instruction.
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3602>
Daniel Schürmann [Thu, 16 Jan 2020 15:54:35 +0000 (16:54 +0100)]
aco: reorder VMEM operands in ACO IR
For all VMEM instructions, the resource constant is now
in operands[0]. For MIMG instructions, the sampler shares
operands[1] with write data in case this instruction writes memory.
Moving the VADDR to be the last operand for MIMG is the first step to
support Navi NSA encoding.
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3602>
Caio Marcelo de Oliveira Filho [Wed, 15 Jan 2020 19:51:58 +0000 (11:51 -0800)]
nir: Make nir_deref_path_init skip trivial casts
In a NIR generated using SPIR-V initializers to variables, copy
propagation can end up transforming
vec1 32 ssa_33 = deref_var &@1 (shared mat2x4)
vec1 32 ssa_35 = mov ssa_33
vec1 32 ssa_7 = deref_cast (mat2x4 *)ssa_35 (shared mat2x4) /* ptr_stride=0 */
into
vec1 32 ssa_33 = deref_var &@1 (shared mat2x4)
vec1 32 ssa_7 = deref_cast (mat2x4 *)ssa_33 (shared mat2x4) /* ptr_stride=0 */
Before the optimization, the "head" of a path of deref that uses ssa_7
will be the cast. After, it will be the variable in ssa_33. Since
the types are the same, this is a trivial cast that would be picked up
by nir_opt_deref.
If we need to compare such deref-chain after optimization with another
deref-chain for the same variable, the compare function will get
confused by the cast in the middle.
One alternative would be to add nir_opt_deref to places that compare
derefs, but that might not scale well, so skip the trivial casts when
generating the paths instead.
Motivated by the discussion in
https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3047#note_383660.
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3420>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3420>
Rhys Perry [Mon, 20 Jan 2020 17:40:13 +0000 (17:40 +0000)]
aco: fix exec mask consistency issues
There seems to be more, these are just the ones found in
Detroit: Become Human shaders.
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3257>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3257>
Rhys Perry [Mon, 20 Jan 2020 16:22:56 +0000 (16:22 +0000)]
aco: parallelcopy exec mask before s_wqm
It can be used later and we want any uses to not be fixed to exec, so it's
definition can't be fixed to exec because of how exec masks interact with
register demand calculation.
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3257>
Rhys Perry [Mon, 20 Jan 2020 15:57:21 +0000 (15:57 +0000)]
aco: fill reg_demand with sensible information in add_coupling_code()
process_block() will use this to determine the register demand of the
before the current instruction. Previously, it was filled with zeroes
which could result in process_block() only using the register demand
of after the current instruction.
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3257>
Rhys Perry [Fri, 10 Jan 2020 16:16:43 +0000 (16:16 +0000)]
aco: improve assertion at the end of spiller
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3257>
Rhys Perry [Tue, 7 Jan 2020 16:33:47 +0000 (16:33 +0000)]
aco: set exec_potentially_empty after continues/breaks in nested IFs
Fixes:
93c8ebfa ('aco: Initial commit of independent AMD compiler')
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3257>
Rhys Perry [Wed, 8 Jan 2020 16:13:03 +0000 (16:13 +0000)]
aco: error when block has no logical preds but VGPRs are live at the start
This would have caught the liveness error fixed in the previous commit.
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3257>
Rhys Perry [Tue, 7 Jan 2020 19:13:08 +0000 (19:13 +0000)]
aco: don't always add logical edges from continue_break blocks to headers
Otherwise, code like this will be broken:
loop {
if (...) {
break;
} else {
break;
}
}
The continue_or_break block doesn't have any logical predecessors but it's
a logical predecessor of the header block. This liveness error breaks the
spiller in init_live_in_vars() (under "keep variables spilled on all
incoming paths") and eventually creates garbage reloads.
Fixes:
93c8ebfa ('aco: Initial commit of independent AMD compiler')
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3257>
Rhys Perry [Mon, 6 Jan 2020 15:17:21 +0000 (15:17 +0000)]
aco: only create parallelcopy to restore exec at loop exit if needed
The operand isn't fixed to exec, which can mess up the spiller. This also
adds a new situation where a phi is needed.
Fixes dEQP-VK.ssbo.layout.random.descriptor_indexing.2 and an assertion
when compiling a Detroit: Become Human shader.
Fixes:
93c8ebfa ('aco: Initial commit of independent AMD compiler')
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3257>
Rhys Perry [Thu, 2 Jan 2020 14:57:02 +0000 (14:57 +0000)]
aco: don't update demand in add_coupling_code() for loop headers
We don't need to update it since it won't be used later.
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3257>
Rhys Perry [Thu, 2 Jan 2020 14:54:31 +0000 (14:54 +0000)]
aco: don't consider loop header blocks branch blocks in add_coupling_code
Loops without continues create header blocks with only 1 predecessor.
CC: <mesa-stable@lists.freedesktop.org>
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3257>
Rhys Perry [Thu, 2 Jan 2020 15:36:49 +0000 (15:36 +0000)]
aco: fix target calculation when vgpr spilling introduces sgpr spilling
A shader might require vgpr spilling but not require sgpr spilling. In
that case, the spiller lowers the sgpr target by 5 which could mean sgpr
spilling is then required. Then the vgpr target has to be lowered to make
space for the linear vgprs. Previously, space wasn't make for the linear
vgprs.
Found while testing the spiller on the pipeline-db with a lowered limit
Fixes:
a7ff1bb5b9a78cf57073b5e2e136daf0c85078d6
('aco: simplify calculation of target register pressure when spilling')
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3257>
Samuel Pitoiset [Mon, 13 Jan 2020 08:49:49 +0000 (09:49 +0100)]
radv/gfx10: re-enable NGG GS
Now that NGG GS queries are implemented, it should be safe enough
to enable NGG GS by default. It can be disabled with RADV_DEBUG=nongg
if necessary.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3380>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3380>
Samuel Pitoiset [Mon, 13 Jan 2020 17:30:50 +0000 (18:30 +0100)]
radv/gfx10: implement NGG GS queries
The number of generated primitives is only counted by the hardware
if GS uses the legacy path. For NGG GS, we need to accumulate that
value in the NGG GS itself. To achieve that, we use a plain GDS
atomic operation.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3380>
Samuel Pitoiset [Tue, 14 Jan 2020 08:14:07 +0000 (09:14 +0100)]
radv/gfx10: add a separate flag for creating a GDS OA buffer
For implementing NGG GS queries, we decided to use GDS but GDS OA
is only required for NGG streamout.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3380>
Michel Dänzer [Tue, 28 Jan 2020 10:12:24 +0000 (11:12 +0100)]
winsys/amdgpu: Close KMS handles for other DRM file descriptions
When a BO or amdgpu_screen_winsys is destroyed.
Should fix leaking such BOs in other DRM file descriptions.
v2:
* Pass the correct file descriptor to drmIoctl (Pierre-Eric
Pelloux-Prayer)
* Use _mesa_hash_table_remove
v3:
* Close handles in amdgpu_winsys_unref as well
v4:
* Adapt to amdgpu_winsys::sws_list_lock.
Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2270
Fixes:
11a3679e3aba "winsys/amdgpu: Make KMS handles valid for original
DRM file descriptor"
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3582>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3582>
Michel Dänzer [Tue, 28 Jan 2020 10:07:15 +0000 (11:07 +0100)]
winsys/amdgpu: Re-use amdgpu_screen_winsys when possible
Namely, if os_same_file_description determined that the DRM file
descriptor references the same file description.
v2:
* Adapt to amdgpu_winsys::sws_list_lock.
v3:
* Fix comparison of amdgpu_screen_winsys file descriptions, see
https://gitlab.freedesktop.org/mesa/mesa/issues/2413 .
* Lock amdgpu_winsys::sws_list_lock for traversing the sws_list in
amdgpu_winsys_create.
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3582>
Jason Ekstrand [Wed, 29 Jan 2020 04:25:48 +0000 (22:25 -0600)]
anv: Rename a variable
The name "desc" shadows another variable. Name it "desc_data" like all
of the other descriptor data variables in this file.
Jason Ekstrand [Tue, 28 Jan 2020 23:42:31 +0000 (17:42 -0600)]
anv/block_pool: Ensure allocations have contiguous maps
Because softpin block pools are made up of a set of BOs with different
maps, it was possible for a single state to end up straddling blocks.
To fix this, we pass a contiguous size to anv_block_pool_grow and it
ensures that the next allocation in the pool will have at least that
size.
We also add an assert in anv_block_pool_map to ensure we always get
contiguous maps. Prior to the changes to anv_block_pool_grow, the unit
tests failed with this assert. With this patch, the tests pass.
This was causing problems on Gen12 where we allocate the pages for the
AUX table from the dynamic state pool. The first chunk, which gets
allocated very early in the pool's history, is 1MB which was enough that
it was getting multiple BOs. This caused the gen_aux_map code to write
outside of the map and overwrite the instruction state pool buffer which
lead to GPU hangs.
Fixes:
731c4adcf9b "anv/allocator: Add support for non-userptr"
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Jason Ekstrand [Tue, 28 Jan 2020 22:21:56 +0000 (16:21 -0600)]
anv: Re-use one old BT block in reset_batch_bo_chain
We intentionally throw away all but one BT block but then we set
cmd_buffer->bt_block to ANV_STATE_NULL instead of the one we hung on to.
This causes the command buffer to immediately re-emit STATE_BASE_ADDRESS
the first time a BT is needed for no good reason.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Jason Ekstrand [Tue, 28 Jan 2020 22:20:35 +0000 (16:20 -0600)]
anv: Set actual state pool sizes when we have softpin
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Rhys Perry [Wed, 9 Oct 2019 14:27:07 +0000 (15:27 +0100)]
nir/algebraic: add some half packing optimizations
pipeline-db (ACO):
Totals from affected shaders:
SGPRS: 29200 -> 29200 (0.00 %)
VGPRS: 17372 -> 17372 (0.00 %)
Spilled SGPRs: 105 -> 105 (0.00 %)
Spilled VGPRs: 0 -> 0 (0.00 %)
Private memory VGPRs: 0 -> 0 (0.00 %)
Scratch size: 0 -> 0 (0.00 %) dwords per thread
Code Size: 1406576 -> 1389256 (-1.23 %) bytes
LDS: 83 -> 83 (0.00 %) blocks
Max Waves: 3976 -> 3976 (0.00 %)
pipeline-db (LLVM):
Totals from affected shaders:
SGPRS: 21320 -> 21320 (0.00 %)
VGPRS: 17056 -> 17036 (-0.12 %)
Spilled SGPRs: 22 -> 22 (0.00 %)
Spilled VGPRs: 503 -> 487 (-3.18 %)
Private memory VGPRs: 0 -> 0 (0.00 %)
Scratch size: 396 -> 396 (0.00 %) dwords per thread
Code Size: 1441244 -> 1423292 (-1.25 %) bytes
LDS: 463 -> 463 (0.00 %) blocks
Max Waves: 3609 -> 3611 (0.06 %)
v2: add pattern for ishr
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2271>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2271>
Rhys Perry [Wed, 9 Oct 2019 14:03:45 +0000 (15:03 +0100)]
nir/algebraic: add patterns for a >> #b << #b
Fixes compilation of a Battlefront 2 shader with ACO by removing VGPR
spilling. The reassociation makes it worse on LLVM though.
pipeline-db (ACO):
Totals from affected shaders:
SGPRS: 10704 -> 10688 (-0.15 %)
VGPRS: 18736 -> 18528 (-1.11 %)
Spilled SGPRs: 70 -> 70 (0.00 %)
Spilled VGPRs: 0 -> 0 (0.00 %)
Private memory VGPRs: 0 -> 0 (0.00 %)
Scratch size: 0 -> 0 (0.00 %) dwords per thread
Code Size: 909696 -> 885796 (-2.63 %) bytes
LDS: 225 -> 225 (0.00 %) blocks
Max Waves: 1115 -> 1129 (1.26 %)
pipeline-db (LLVM):
Totals from affected shaders:
SGPRS: 8472 -> 8424 (-0.57 %)
VGPRS: 14284 -> 14368 (0.59 %)
Spilled SGPRs: 0 -> 0 (0.00 %)
Spilled VGPRs: 442 -> 503 (13.80 %)
Private memory VGPRs: 0 -> 0 (0.00 %)
Scratch size: 268 -> 396 (47.76 %) dwords per thread
Code Size: 862568 -> 853028 (-1.11 %) bytes
LDS: 0 -> 0 (0.00 %) blocks
Max Waves: 971 -> 964 (-0.72 %)
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2271>
Samuel Pitoiset [Wed, 29 Jan 2020 08:18:20 +0000 (09:18 +0100)]
aco: fix VS input loads with MUBUF on GFX6
Only MTBUF supports vec3.
Fixes:
03a0d39366d ("aco: use MUBUF in some situations instead of splitting vertex fetches")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3615>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3615>
Rhys Perry [Mon, 13 Jan 2020 14:53:56 +0000 (14:53 +0000)]
aco: run p_wqm instructions in WQM
If the p_wqm ends up creating copies, these need to be in WQM. Helps (but
doesn't completely fix) artifacts in Strange Brigade. The actual issue
still exists and is harder to fix.
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Fixes:
93c8ebfa780 ('aco: Initial commit of independent AMD compiler')
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3273>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3273>
Rhys Perry [Thu, 2 Jan 2020 19:13:53 +0000 (19:13 +0000)]
aco: ensure predecessors' p_logical_end is in WQM when a p_phi is in WQM
We want any copies to be in WQM. I don't know if this fixes any real
application, but I can create a vkrunner test than reproduces the issue.
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Fixes:
93c8ebfa780 ('aco: Initial commit of independent AMD compiler')
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3273>
Icecream95 [Sun, 26 Jan 2020 01:59:24 +0000 (14:59 +1300)]
pan/midgard: Fix a liveness info leak
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3566>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3566>
Jonathan Marek [Sat, 4 Jan 2020 19:17:15 +0000 (14:17 -0500)]
etnaviv: implement UBOs
At the same time, use pre-HALTI2 to use address register for indirect
uniform loads, since integers/LOAD instruction isn't always available.
Passes all dEQP-GLES3.functional.ubo.* on GC7000L. GC3000 with an extra
flush hack passes most of them, but still fails on some of the cases with
many loads.
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3389>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3389>
Rob Clark [Sat, 25 Jan 2020 22:44:55 +0000 (14:44 -0800)]
freedreno/a6xx: convert blend state to stateobj
And move to new register builders while we are at it.
Signed-off-by: Rob Clark <robdclark@chromium.org>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3565>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3565>
Rob Clark [Sat, 25 Jan 2020 21:44:59 +0000 (13:44 -0800)]
freedreno/a6xx: remove special handling based on MRT format
Logicop in particular is supposed to work for integer formats.. but
maybe this situation doesn't happen in gles. The only thing that isn't
required for integer formats is blending.
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3565>
Rob Clark [Fri, 17 Jan 2020 22:00:13 +0000 (14:00 -0800)]
mesa/st: random whitespace cleanup
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3565>
Rob Clark [Fri, 17 Jan 2020 21:58:44 +0000 (13:58 -0800)]
freedreno: use PIPE_CAP_RGB_OVERRIDE_DST_ALPHA_BLEND
This lets us drop a bunch of special handling for xRGB blend.
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3565>
Thomas Hellstrom [Tue, 28 Jan 2020 12:04:23 +0000 (13:04 +0100)]
gallium/util: Increase the debug_flush map depth
Some piglit tests trigger a map depth assert when debug_flush is active.
Fix this by increasing the map depth from 16 to 32.
Signed-off-by: Thomas Hellstrom <thellstrom@vmware.com>
Reviewed-by: Charmaine Lee <charmainel@vmware.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3614>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3614>
Thomas Hellstrom [Tue, 28 Jan 2020 11:49:30 +0000 (12:49 +0100)]
svga: Avoid discard DMA uploads
Newer versions of the device code will make discard DMA uploads
sub-optimal. Disable them for guest-backed aware code, where we previously
had them conditionally enabled.
Signed-off-by: Thomas Hellstrom <thellstrom@vmware.com>
Reviewed-by: Charmaine Lee <charmainel@vmware.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3614>
Thomas Hellstrom [Tue, 21 Jan 2020 09:58:25 +0000 (10:58 +0100)]
winsys/svga: Enable transhuge pages for buffer objects
If the kernel supports it, enable transhuge pages for graphics buffer
objects. Except for the syscall itself, this is never expected to cause
any negative performance implications.
Signed-off-by: Thomas Hellstrom <thellstrom@vmware.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3614>
Roland Scheidegger [Thu, 24 Oct 2019 04:10:46 +0000 (06:10 +0200)]
winsys/svga: use new ioctl for logging
Use the new ioctl for logging (rather than duplicating what the kernel
is doing). This way it's also independent from the actual guest/host
mechanism to do the logging.
Signed-off-by: Roland Scheidegger <sroland@vmware.com>
Reviewed-by: Thomas Hellstrom <thellstrom@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3614>
Samuel Pitoiset [Tue, 28 Jan 2020 13:49:16 +0000 (14:49 +0100)]
radv: remove the non conformant VK implementation warning on GFX10
It's no longer true.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3597>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3597>
Samuel Pitoiset [Tue, 28 Jan 2020 10:34:06 +0000 (11:34 +0100)]
radv: bump conformance version to 1.2.0.0
https://www.khronos.org/conformance/adopters/conformant-products#submission_472
https://www.khronos.org/conformance/adopters/conformant-products#submission_473
https://www.khronos.org/conformance/adopters/conformant-products#submission_474
Fixes dEQP-VK.api.driver_properties.conformance_version.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3597>
Samuel Pitoiset [Mon, 27 Jan 2020 10:08:26 +0000 (11:08 +0100)]
radv: implement VK_AMD_shader_explicit_vertex_parameter
Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2402
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3578>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3578>
Samuel Pitoiset [Mon, 27 Jan 2020 10:07:42 +0000 (11:07 +0100)]
radv: gather which input PS variables use an explicit interpolation mode
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3578>
Samuel Pitoiset [Mon, 27 Jan 2020 11:16:41 +0000 (12:16 +0100)]
aco: implement VK_AMD_shader_explicit_vertex_parameter
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3578>
Samuel Pitoiset [Fri, 24 Jan 2020 09:18:06 +0000 (10:18 +0100)]
ac/llvm: implement VK_AMD_shader_explicit_vertex_parameter
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3578>
Samuel Pitoiset [Fri, 24 Jan 2020 09:55:55 +0000 (10:55 +0100)]
spirv: implement SPV_AMD_shader_explicit_vertex_parameter
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3578>
Samuel Pitoiset [Mon, 27 Jan 2020 10:34:00 +0000 (11:34 +0100)]
nir: lower interp_deref_at_vertex to load_input_vertex
This introduces a new NIR intrinsic for loading inputs at a specific
vertex index.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3578>
Samuel Pitoiset [Fri, 24 Jan 2020 15:01:04 +0000 (16:01 +0100)]
nir: add nir_intrinsic_interp_deref_at_vertex
From the SPV_AMD_shader_explicit_vertex_parameter extension:
"Returns the value of the input <interpolant> without any
interpolation, i.e. the raw output value of previous shader
stage."
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3578>
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