Ben Skeggs [Tue, 8 May 2018 10:39:47 +0000 (20:39 +1000)]
drm/nouveau/kms/nv50: handle SetControlOutputResource from head
Removes duplicated code from OR-specific functions.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Tue, 8 May 2018 10:39:47 +0000 (20:39 +1000)]
drm/nouveau/kms/nv50-: abstract head interfaces so the code can be split
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Tue, 8 May 2018 10:39:47 +0000 (20:39 +1000)]
drm/nouveau/kms/nv50: modify core allocation so the code can be split
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Tue, 8 May 2018 10:39:47 +0000 (20:39 +1000)]
drm/nouveau/kms/nv50-: modify base allocation so the code can be split
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Tue, 8 May 2018 10:39:47 +0000 (20:39 +1000)]
drm/nouveau/kms/nv50-: modify cursor allocation so the code can be split
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Tue, 8 May 2018 10:39:47 +0000 (20:39 +1000)]
drm/nouveau/kms/nv50-: modify overlay allocation so the code can be split
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Tue, 8 May 2018 10:39:47 +0000 (20:39 +1000)]
drm/nouveau/kms/nv50-: move fb ctxdma tracking into windows
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Tue, 8 May 2018 10:39:47 +0000 (20:39 +1000)]
drm/nouveau/kms/nv50-: fix i2c-over-aux on anx9805
We don't support address-only transactions there.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Tue, 8 May 2018 10:39:47 +0000 (20:39 +1000)]
drm/nouveau/kms/nv50-: move code underneath dispnv50/
The code is about to be split up, and this matches dispnv04.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Tue, 8 May 2018 10:39:47 +0000 (20:39 +1000)]
drm/nouveau/kms: move display class instantiation to library
This function is useful outside of DRM code.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Tue, 8 May 2018 10:39:47 +0000 (20:39 +1000)]
drm/nouveau/drm/nv50-: remove allocation of sw class
Hasn't been required for a long time.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Tue, 8 May 2018 10:39:47 +0000 (20:39 +1000)]
drm/nouveau: no need to create ctxdma for push buffers on fermi and up
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Tue, 8 May 2018 10:39:47 +0000 (20:39 +1000)]
drm/nouveau: remove fence wait code from deferred client work handler
Fences attached to deferred client work items now originate from channels
belonging to the client, meaning we can be certain they've been signalled
before we destroy a client.
This closes a race that could happen if the dma_fence_wait_timeout() call
didn't succeed. When the fence was later signalled, a use-after-free was
possible.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Tue, 8 May 2018 10:39:47 +0000 (20:39 +1000)]
drm/nouveau/gem: tie deferred unmapping of buffers to VMA fence completion
As VMAs are per-client, unlike buffers, this allows us to avoid referencing
foreign fences (those that belong to another client/driver) from the client
deferred work handler, and prevent some not-fun race conditions that can be
triggered when a fence stalls.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Tue, 8 May 2018 10:39:47 +0000 (20:39 +1000)]
drm/nouveau/gem: attach fences to VMAs to track GPU usage
An upcoming patch will use these to fix issues related to the deferred
unmapping of GEM objects.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Tue, 8 May 2018 10:39:47 +0000 (20:39 +1000)]
drm/nouveau/gem: lookup VMAs for buffers referenced by pushbuf ioctl
We previously only did this for push buffers, but an upcoming patch will
need to attach fences to all VMAs to resolve another issue.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Tue, 8 May 2018 10:39:47 +0000 (20:39 +1000)]
drm/nouveau/gr/gp102-: setup stencil zbc
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Tue, 8 May 2018 10:39:47 +0000 (20:39 +1000)]
drm/nouveau/gr/gp100-: use correct registers for zbc colour/depth setup
These were missed the first time around due to the driver version I traced
using the older registers still.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Tue, 8 May 2018 10:39:47 +0000 (20:39 +1000)]
drm/nouveau/gr/gp100-: fix attrib cb setup
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Tue, 8 May 2018 10:39:47 +0000 (20:39 +1000)]
drm/nouveau/gr/gp100-: fix pagepool setup
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Tue, 8 May 2018 10:39:47 +0000 (20:39 +1000)]
drm/nouveau/gr/gf100-gm10x: update register lists
There are differences on GM200 and newer too, but we can't fix them there
as they come from firmware packages.
A request has been made to NVIDIA to release updated firmware.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Tue, 8 May 2018 10:39:47 +0000 (20:39 +1000)]
drm/nouveau/gr/gf100-: swap bundle and pagepool
Makes it easier to diff against RM traces.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Tue, 8 May 2018 10:39:47 +0000 (20:39 +1000)]
drm/nouveau/gr/gf100-: calculate and use sm mapping table
There's a number of places that require this data, so let's separate out
the calculations to ensure they remain consistent.
This is incorrect for GM200 and newer, but will produce the same results
as we did before.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Tue, 8 May 2018 10:39:47 +0000 (20:39 +1000)]
drm/nouveau/gr/gf100-: port zcull tile mapping calculations from NVGPU
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Tue, 8 May 2018 10:39:47 +0000 (20:39 +1000)]
drm/nouveau/gr/gf100-: port tile mapping calculations from NVGPU
There's also a couple of hardcoded tables for a couple of very specific
configurations that NVGPU's algorithm didn't work for.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Tue, 8 May 2018 10:39:47 +0000 (20:39 +1000)]
drm/nouveau/gr/gf100-: virtualise trap_mp
Required to support Volta.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Tue, 8 May 2018 10:39:47 +0000 (20:39 +1000)]
drm/nouveau/gr/gf100-: add missing reset sequence before golden context init
RM and NVGPU both have a variant of this, we probably should too.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Tue, 8 May 2018 10:39:47 +0000 (20:39 +1000)]
drm/nouveau/gr/gf100-: delete duplicated grctx init code
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Tue, 8 May 2018 10:39:47 +0000 (20:39 +1000)]
drm/nouveau/gr/gf100-: update r408840 where required
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Tue, 8 May 2018 10:39:47 +0000 (20:39 +1000)]
drm/nouveau/gr/gf100-: update 419a3c where required
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Tue, 8 May 2018 10:39:47 +0000 (20:39 +1000)]
drm/nouveau/gr/gf100-: virtualise r418e94
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Tue, 8 May 2018 10:39:47 +0000 (20:39 +1000)]
drm/nouveau/gr/gf100-: virtualise r419e00
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Tue, 8 May 2018 10:39:47 +0000 (20:39 +1000)]
drm/nouveau/gr/gf100-: update 419eb0 where required
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Tue, 8 May 2018 10:39:47 +0000 (20:39 +1000)]
drm/nouveau/gr/gf100-: note missing 418800 modifications
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Tue, 8 May 2018 10:39:47 +0000 (20:39 +1000)]
drm/nouveau/gr/gf100-gf119: update 419cb8 where required
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Tue, 8 May 2018 10:39:47 +0000 (20:39 +1000)]
drm/nouveau/gr/gf100-: support firmware-provided bundle/method everywhere
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Tue, 8 May 2018 10:39:46 +0000 (20:39 +1000)]
drm/nouveau/gr/gf100-: virtualise tpc_mask + apply fixes from traces
We weren't placing higher TPC IDs in the right place on some configurations.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Tue, 8 May 2018 10:39:46 +0000 (20:39 +1000)]
drm/nouveau/gr/gf100-: virtualise r419f78 + apply fixes from traces
Removed from GK110[B]/GK208 as RM traces show it not being touched.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Tue, 8 May 2018 10:39:46 +0000 (20:39 +1000)]
drm/nouveau/gr/gf100-: virtualise gpc_tpc_nr
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Tue, 8 May 2018 10:39:46 +0000 (20:39 +1000)]
drm/nouveau/gr/gf100-: virtualise r406500
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Tue, 8 May 2018 10:39:46 +0000 (20:39 +1000)]
drm/nouveau/gr/gf100-: virtualise dist_skip_table + improve algorithm
The algorithm for GM200 and newer matches RM for all the boards I have, but
I don't have enough data to try and figure something out for earlier boards,
so these will still write zeroes to the table as we did before.
The code in NVGPU isn't helpful here, it appears to handle specific cases.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Tue, 8 May 2018 10:39:46 +0000 (20:39 +1000)]
drm/nouveau/gr/gf100-gf119: modify max_ways_evict where required
I don't think this is done after Fermi, NVGPU used to do it but removed
the code, and I've not seen RM traces touching it either.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Tue, 8 May 2018 10:39:46 +0000 (20:39 +1000)]
drm/nouveau/gr/gf100-: virtualise alpha_beta_tables + improve algorithms
I haven't yet been able to find a fully programatic way of calculating the
same mapping as NVIDIA for GF100-GF119, so the algorithm partially depends
on data tables for specific configurations.
I couldn't find traces for every possibility, so the algorithm will switch
to a mapping similar to what GK104-GM10x use if it encounters one. We did
the wrong thing before anyway, so shouldn't matter too much.
The algorithm used in the GK104 implementation was ported from NVGPU.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Tue, 8 May 2018 10:39:46 +0000 (20:39 +1000)]
drm/nouveau/gr/gf100-: virtualise rop_mapping
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Tue, 8 May 2018 10:39:46 +0000 (20:39 +1000)]
drm/nouveau/gr/gf100-: virtualise r4060a8 + apply fixes from traces
Also fixes some GPUs where we write too many registers.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Tue, 8 May 2018 10:39:46 +0000 (20:39 +1000)]
drm/nouveau/gr/gf100-: virtualise tpc_per_gpc
GM20B now also shares the same code, as NVGPU shows it doesn't need
special treatment.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Tue, 8 May 2018 10:39:46 +0000 (20:39 +1000)]
drm/nouveau/gr/gf100-: virtualise sm_id/tpc_nr
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Tue, 8 May 2018 10:39:46 +0000 (20:39 +1000)]
drm/nouveau/gr/gf100-: virtualise patch_ltc, noting missing init
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Tue, 8 May 2018 10:39:46 +0000 (20:39 +1000)]
drm/nouveau/gr/gf100-: support firmware-provided sw_ctx everywhere
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Tue, 8 May 2018 10:39:46 +0000 (20:39 +1000)]
drm/nouveau/gr/gf100-: delete duplicated init code
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Tue, 8 May 2018 10:39:46 +0000 (20:39 +1000)]
drm/nouveau/gr/gf100-: virtualise init_400054
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Tue, 8 May 2018 10:39:46 +0000 (20:39 +1000)]
drm/nouveau/gr/gf100-: apply be exception fixes from traces
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Tue, 8 May 2018 10:39:46 +0000 (20:39 +1000)]
drm/nouveau/gr/gf100-: virtualise init_shader_exceptions
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Tue, 8 May 2018 10:39:46 +0000 (20:39 +1000)]
drm/nouveau/gr/gf100-: virtualise init_504430
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Tue, 8 May 2018 10:39:46 +0000 (20:39 +1000)]
drm/nouveau/gr/gf100-: virtualise init_tex_hww_esr
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Tue, 8 May 2018 10:39:46 +0000 (20:39 +1000)]
drm/nouveau/gr/gf100-: virtualise init_ppc_exceptions
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Tue, 8 May 2018 10:39:46 +0000 (20:39 +1000)]
drm/nouveau/gr/gf100-: virtualise init_419c9c + apply fixes from traces
Deliberately removed from non-GP100, as RM doesn't touch it.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Tue, 8 May 2018 10:39:46 +0000 (20:39 +1000)]
drm/nouveau/gr/gf100-: virtualise init_419eb4 + apply fixes from traces
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Tue, 8 May 2018 10:39:46 +0000 (20:39 +1000)]
drm/nouveau/gr/gf100-: virtualise init_419cc0 + apply fixes from traces
Pulled some init out of main per-GPC/TPC loops to match RM.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Tue, 8 May 2018 10:39:46 +0000 (20:39 +1000)]
drm/nouveau/gr/gf100-: virtualise init_sked_hww_esr
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Tue, 8 May 2018 10:39:46 +0000 (20:39 +1000)]
drm/nouveau/gr/gf100-: virtualise init_40601c
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Tue, 8 May 2018 10:39:46 +0000 (20:39 +1000)]
drm/nouveau/gr/gf100-: virtualise init_ds_hww_esr_2
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Tue, 8 May 2018 10:39:46 +0000 (20:39 +1000)]
drm/nouveau/gr/gf100-: virtualise init_fecs_exceptions + apply fixes from traces
The value for GF100 has changed here, but it matches RM now.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Tue, 8 May 2018 10:39:46 +0000 (20:39 +1000)]
drm/nouveau/gr/gf100: write 0x400124 during init
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Tue, 8 May 2018 10:39:46 +0000 (20:39 +1000)]
drm/nouveau/gr/gf100-: virtualise init_swdx_pes_mask
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Tue, 8 May 2018 10:39:46 +0000 (20:39 +1000)]
drm/nouveau/gr/gf100-: implement another chunk of bios-provided init
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Tue, 8 May 2018 10:39:46 +0000 (20:39 +1000)]
drm/nouveau/gr/gf100-: virtualise init_rop_active_fbps
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Tue, 8 May 2018 10:39:46 +0000 (20:39 +1000)]
drm/nouveau/gr/gf100-: virtualise init_num_active_ltcs
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Tue, 8 May 2018 10:39:46 +0000 (20:39 +1000)]
drm/nouveau/gr/gf100-: virtualise init_zcull
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Tue, 8 May 2018 10:39:46 +0000 (20:39 +1000)]
drm/nouveau/gr/gf100-: virtualise init_vsc_stream_master
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Tue, 8 May 2018 10:39:46 +0000 (20:39 +1000)]
drm/nouveau/gr/gf100-: virtualise init_bios
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Tue, 8 May 2018 10:39:46 +0000 (20:39 +1000)]
drm/nouveau/gr/gf100-: support clkgate_pack everywhere
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Tue, 8 May 2018 10:39:46 +0000 (20:39 +1000)]
drm/nouveau/gr/gf100-: virtualise r405a14
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Tue, 8 May 2018 10:39:46 +0000 (20:39 +1000)]
drm/nouveau/gr/gf100-: support firmware-provided sw_nonctx everywhere
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Tue, 8 May 2018 10:39:46 +0000 (20:39 +1000)]
drm/nouveau/gr/gf100-: virtualise init_gpc_mmu + apply fixes from traces
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Tue, 8 May 2018 10:39:46 +0000 (20:39 +1000)]
drm/nouveau/fifo/gp100-: force individual channels into a channel group
RM does this for some reason, and is enforced in HW on Volta.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Tue, 8 May 2018 10:39:46 +0000 (20:39 +1000)]
drm/nouveau/fifo/gm107-: write instance address in channel runlist entry
RM does this for some reason.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Tue, 8 May 2018 10:39:46 +0000 (20:39 +1000)]
drm/nouveau/fifo/gk208-: write pbdma timeout regs during initialisation
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Tue, 8 May 2018 10:39:46 +0000 (20:39 +1000)]
drm/nouveau/fifo/gk110-: support writing channel group runlist entries
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Tue, 8 May 2018 10:39:46 +0000 (20:39 +1000)]
drm/nouveau/fifo/gk104-: poll for runlist update completion
Newer HW doesn't appear to send this event, which will cause long delays
in runlist updates if they don't complete immediately.
RM doesn't use these events anywhere, and an NVGPU commit message notes
that polling is the preferred method even on HW that supports the event.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Tue, 8 May 2018 10:39:46 +0000 (20:39 +1000)]
drm/nouveau/fifo/gk104-: add interfaces to support different runlist layouts
This will be required to support features on newer hardware.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Tue, 8 May 2018 10:39:46 +0000 (20:39 +1000)]
drm/nouveau/fifo/gk104-: simplify definition of channel classes
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Tue, 8 May 2018 10:39:46 +0000 (20:39 +1000)]
drm/nouveau/fifo/gk104-: require explicit runlist selection for channel allocation
We didn't used to be aware that runlist/engine IDs weren't the same thing,
or that there was such variability in configuration between GPUs.
By exposing this information to a client, and giving it explicit control
of which runlist it's allocating a channel on, we're able to make better
choices.
The immediate effect of this is that on GPUs where CE0 is the "GRCE", we
will now be allocating a copy engine running asynchronously to GR for BO
migrations - as intended.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Tue, 8 May 2018 10:39:46 +0000 (20:39 +1000)]
drm/nouveau/fifo/gk104-: support querying engines available on each runlist
Will be used to improve channel runlist selection.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Tue, 8 May 2018 10:39:46 +0000 (20:39 +1000)]
drm/nouveau/fifo/gk104-: allow fault recovery code to be called by other subdevs
This will be required to support Volta.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Tue, 8 May 2018 10:39:46 +0000 (20:39 +1000)]
drm/nouveau/fifo/gk104-: accept engine contexts for CE3 and up
These can exist on GP100 and newer.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Tue, 8 May 2018 10:39:46 +0000 (20:39 +1000)]
drm/nouveau/fifo: support channel count query
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Tue, 8 May 2018 10:39:46 +0000 (20:39 +1000)]
drm/nouveau/device: support querying available engines of a specific type
Will be used for fifo runlist selection.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Tue, 8 May 2018 10:39:46 +0000 (20:39 +1000)]
drm/nouveau/device: implement a generic method to query device-specific properties
We have a need to fetch data from GPU-specific sub-devices that is not
tied to any particular engine object.
This commit provides the framework to support such queries.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Tue, 8 May 2018 10:39:46 +0000 (20:39 +1000)]
drm/nouveau/disp/nv50-: pass nvkm_memory objects for channel push buffers
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Tue, 8 May 2018 10:39:46 +0000 (20:39 +1000)]
drm/nouveau/disp/nv50-: add channel interfaces to control error interrupts
This will be required to support Volta, but also allows us to remove code
that's duplicated for each channel type already.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Tue, 8 May 2018 10:39:46 +0000 (20:39 +1000)]
drm/nouveau/disp/nv50-: add channel interfaces to determine the user area
This will be required to support Volta.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Tue, 8 May 2018 10:39:46 +0000 (20:39 +1000)]
drm/nouveau/disp/nv50-: merge handling of pio and dma channels
Unnecessarily complicated, and a barrier to cleanly supporting Volta.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Tue, 8 May 2018 10:39:46 +0000 (20:39 +1000)]
drm/nouveau/disp/nv50-: simplify definiton of core channels
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Tue, 8 May 2018 10:39:46 +0000 (20:39 +1000)]
drm/nouveau/disp/nv50-: simplify definition of cursor channels
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Tue, 8 May 2018 10:39:46 +0000 (20:39 +1000)]
drm/nouveau/disp/nv50-: simplify definition of base channels
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Tue, 8 May 2018 10:39:46 +0000 (20:39 +1000)]
drm/nouveau/disp/nv50-: simplify definition of overlay immediate channels
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Tue, 8 May 2018 10:39:46 +0000 (20:39 +1000)]
drm/nouveau/disp/nv50-: simplify definition of overlay channels
Introduces a new method of defining channels available from the display,
common to all channel types, allowing for more flexibility in available
channel types/counts, and reducing the amount of boiler-plate required.
This will be required to support Volta.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Tue, 8 May 2018 10:39:46 +0000 (20:39 +1000)]
drm/nouveau/disp/nv50-: replace user object with engine pointer in channels
More simplification.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Tue, 8 May 2018 10:39:46 +0000 (20:39 +1000)]
drm/nouveau/disp/nv50-: initialise from the engine, rather than the user object
Engines are initialised on an as-needed basis, so this results in the
same behaviour, whilst allowing us to simplify things a bit.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
projects / platform / kernel / linux-rpi.git / log