Daniel Sanders [Tue, 18 Feb 2020 21:12:28 +0000 (13:12 -0800)]
Fix assertion on `!eq(?, 0)`
Instead of asserting, emit a proper error message
Thomas Lively [Thu, 6 Feb 2020 06:35:01 +0000 (22:35 -0800)]
[WebAssembly] Implement multivalue call_indirects
Summary:
Unlike normal calls, call_indirects have immediate arguments that
caused a MachineVerifier failure without a small tweak to loosen the
verifier's requirements for variadicOpsAreDefs instructions.
One nice thing about the new call_indirects is that they do not need
to participate in the PCALL_INDIRECT mechanism because their post-isel
hook handles moving the function pointer argument and adding the flags
and typeindex arguments itself.
Reviewers: aheejin
Subscribers: dschuff, sbc100, jgravelle-google, hiraditya, sunfish, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D74191
Thomas Lively [Thu, 6 Feb 2020 02:17:45 +0000 (18:17 -0800)]
Reland "[WebAssembly] Split and recombine multivalue calls for ISel"
This reverts commit
8acedb595d039f68ad15f9e5f2e6cb79729307e4 and
relands a prerequisite for the patch series culminating in
https://reviews.llvm.org/D74192.
Thomas Lively [Thu, 6 Feb 2020 02:17:11 +0000 (18:17 -0800)]
Reland "[WebAssembly][InstrEmitter] Foundation for multivalue call lowering"
This reverts commit
649aba93a27170cb03a4b17c98a19b9237a880b8, now that
the approach started there has been shown to be workable in the patch
series culminating in https://reviews.llvm.org/D74192.
Davide Italiano [Tue, 18 Feb 2020 21:39:37 +0000 (13:39 -0800)]
[TestTargetCommand] Remove another reference to a stale rdar.
The test passes, and the rdar is closed.
Davide Italiano [Tue, 18 Feb 2020 21:38:27 +0000 (13:38 -0800)]
[TestTargetCommand] `target var` without a process doesn't work on arm64e.
lldb needs to know about chains of authenticated relocations.
<rdar://problem/
37773624>
Davide Italiano [Tue, 18 Feb 2020 21:31:14 +0000 (13:31 -0800)]
[TestGlobalVariables] Remove a reference to a stale rdar.
The bug has been fixed and the rdar is closed. No need to
clutter the test.
Davide Italiano [Tue, 18 Feb 2020 21:30:35 +0000 (13:30 -0800)]
[TestGlobalVariables] `target var` without a process doesn't work on arm64e.
lldb needs to know about chains of authenticated relocations.
<rdar://problem/
37773624>
Jonas Devlieghere [Tue, 18 Feb 2020 20:49:03 +0000 (12:49 -0800)]
[lldb/Plugin] Reject WASM and Hexagon in DynamicLoaderStatic
The WASM and Hexagon plugin check the ArchType rather than the OSType,
so explicitly reject those in the DynamicLoaderStatic.
Differential revision: https://reviews.llvm.org/D74780
MaheshRavishankar [Tue, 18 Feb 2020 17:50:47 +0000 (09:50 -0800)]
[mlir][Linalg] Allow specifiying zero-rank shaped type operands to linalg.generic ops.
Fixing a bug where using a zero-rank shaped type operand to
linalg.generic ops hit an unrelated assert. This also meant that
lowering the operation to loops was not supported. Adding roundtrip
tests and lowering to loops test for zero-rank shaped type operand
with fixes to make the test pass.
Differential Revision: https://reviews.llvm.org/D74638
Alex Zinenko [Tue, 18 Feb 2020 15:55:52 +0000 (16:55 +0100)]
[mlir] NFC: rename LLVMOpLowering to ConvertToLLVMPattern
This better reflects the nature of the class and matches the current
naming scheme.
Differential Revision: https://reviews.llvm.org/D74774
David Tenty [Tue, 18 Feb 2020 21:02:43 +0000 (16:02 -0500)]
[clang][XCOFF] Indicate that XCOFF does not support COMDATs
Summary: XCOFF doesn't support COMDATs, so clang shouldn't emit them.
Reviewers: stevewan, sfertile, Xiangling_L
Reviewed By: sfertile
Subscribers: dschuff, aheejin, dexonsmith, cfe-commits, llvm-commits
Tags: #clang, #llvm
Differential Revision: https://reviews.llvm.org/D74631
Reid Kleckner [Tue, 18 Feb 2020 20:59:34 +0000 (12:59 -0800)]
Remove "ELF Only" from -f*-sections help text
-ffunction-sections and -fdata-sections are well supported by many
object file formats:
- ELF
- COFF
- XCOFF
- wasm
Only MachO ignores this flag.
While here, remove it from -funique-section-names. Wasm honors this
option.
Addresses PR44910.
Reviewed By: hans, aaron.ballman
Differential Revision: https://reviews.llvm.org/D74634
Karasev Nikita [Tue, 18 Feb 2020 20:32:03 +0000 (15:32 -0500)]
Fix PR#44620 'readability-redundant-string-cstr quick-fix causes invalid code'
static void f2(std::string&&) {}
static void f() {
std::string const s;
f2(s.c_str()); // readability-redundant-string-cstr previously warning
}
Skips the problematic AST pattern in the matcher.
Sid Manning [Tue, 18 Feb 2020 19:35:00 +0000 (13:35 -0600)]
[Hexagon] clang driver should consider --sysroot option
Hexagon's clang driver should consider --sysroot option when setting
up include paths.
Differential Revision: https://reviews.llvm.org/D74776
Louis Dionne [Tue, 18 Feb 2020 20:04:33 +0000 (15:04 -0500)]
[libc++] Fix overly complicated test of std::span's extent
Thanks to Billy O'Neal for the patch.
Differential Revision: https://reviews.llvm.org/D73138
Jorge Gorbe Moya [Tue, 18 Feb 2020 19:48:02 +0000 (11:48 -0800)]
[libunwind] Fix memory leak in handling of DW_CFA_remember_state and DW_CFA_restore_state
parseInstructions() doesn't always process the whole set of DWARF
instructions for a frame. It will stop once the target PC is reached, or
if malformed instructions are found. So, for example, if we have an
instruction sequence like this:
```
<start>
...
DW_CFA_remember_state
...
DW_CFA_advance_loc past the location we're unwinding at (pcoffset in parseInstructions() main loop)
...
DW_CFA_restore_state
<end>
```
... the saved state will never be freed, even though the
DW_CFA_remember_state opcode has a matching DW_CFA_restore_state later
in the sequence.
This change adds code to free whatever is left on rememberStack after
parsing the CIE and the FDE instructions.
Differential Revision: https://reviews.llvm.org/D66904
serge-sans-paille [Tue, 18 Feb 2020 19:56:02 +0000 (20:56 +0100)]
Revert "Support -fuse-ld=lld for riscv"
This reverts commit
dd230142d8a00f5f30c3930a2407000e845dcfbf.
Failures:
http://lab.llvm.org:8011/builders/llvm-clang-win-x-armv7l/builds/4749
http://lab.llvm.org:8011/builders/llvm-clang-win-x-aarch64/builds/4752
Simon Pilgrim [Tue, 18 Feb 2020 16:52:01 +0000 (16:52 +0000)]
[TargetLowering] Add SimplifyMultipleUseDemandedBits 'all elements' helper wrapper. NFC.
Yaxun (Sam) Liu [Tue, 18 Feb 2020 19:28:45 +0000 (14:28 -0500)]
Revert "[CUDA][HIP][OpenMP] Add lib/Sema/UsedDeclVisitor.h after D70172"
This reverts commit
c7fa409bcadaf4ddba1862b2e52349e0ab03d1b4.
Yaxun (Sam) Liu [Tue, 18 Feb 2020 19:23:59 +0000 (14:23 -0500)]
Revert "[CUDA][HIP][OpenMP] Emit deferred diagnostics by a post-parsing AST travese"
This reverts commit
1b978ddba05cb15e22b4e75adb5e7362ad861987.
River Riddle [Tue, 18 Feb 2020 19:36:53 +0000 (11:36 -0800)]
[mlir] Add a TypeRange class that functions similar to ValueRange.
Summary: This class wraps around the various different ways to construct a range of Type, without forcing the materialization of that range into a contiguous vector.
Differential Revision: https://reviews.llvm.org/D74646
Jonas Devlieghere [Tue, 18 Feb 2020 19:25:42 +0000 (11:25 -0800)]
[lldb/Plugin] Generate LLDB_PLUGIN_DECLARE with CMake
Generate the LLDB_PLUGIN_DECLARE macros with CMake and a def file. I'm
landing D73067 in pieces so I can bisect what exactly is breaking the
Windows bot.
Alexandre Ganea [Tue, 18 Feb 2020 19:25:08 +0000 (14:25 -0500)]
Craig Topper [Tue, 18 Feb 2020 19:10:01 +0000 (11:10 -0800)]
[X86] Add a helper function to pull some repeated code out of combineGatherScatter. NFC
Fangrui Song [Tue, 18 Feb 2020 01:43:09 +0000 (17:43 -0800)]
[JumpThreading] Skip unconditional PredBB when threading jumps through two basic blocks
Fixes https://bugs.llvm.org/show_bug.cgi?id=44922 (caused by
4698bf145d583e26ed438026ef7fde031ef322b1)
ThreadThroughTwoBasicBlocks assumes PredBBBranch is conditional. The following code can segfault.
AddPHINodeEntriesForMappedBlock(PredBBBranch->getSuccessor(1), PredBB, NewBB,
ValueMapping);
We can also allow unconditional PredBB, but the produced code is not
better.
Reviewed By: kazu
Differential Revision: https://reviews.llvm.org/D74747
LLVM GN Syncbot [Tue, 18 Feb 2020 18:45:25 +0000 (18:45 +0000)]
[gn build] Port
c9e93c84f61
Tyker [Tue, 18 Feb 2020 18:06:30 +0000 (19:06 +0100)]
Add Query API for llvm.assume holding attributes
Reviewers: jdoerfert, sstefan1, uenoku
Reviewed By: jdoerfert
Subscribers: mgorny, hiraditya, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D72885
Huihui Zhang [Tue, 18 Feb 2020 18:35:36 +0000 (10:35 -0800)]
[NFC] Silence compiler warning [-Wmissing-braces].
Stanislav Mekhanoshin [Tue, 18 Feb 2020 01:22:28 +0000 (17:22 -0800)]
[AMDGPU] Use generated RegisterPressureSets enum
Differential Revision: https://reviews.llvm.org/D74671
Matt Arsenault [Tue, 18 Feb 2020 18:01:55 +0000 (13:01 -0500)]
CodeGen: Move undef_tied_input declaration
This doesn't belong in ARM specific code since it's generally
recognized by tablegen.
Jonas Devlieghere [Tue, 18 Feb 2020 18:29:23 +0000 (10:29 -0800)]
[lldb/Plugin] Unconditionally initialize DynamicLoaderDarwinKernel
Other plugins depend on DynamicLoaderDarwinKernel and which means we
cannot conditionally enable/build this plugin based on the target
platform. This means that it will be past of the list of plugins
initialized once that's autogenerated.
Nico Weber [Tue, 18 Feb 2020 18:29:13 +0000 (13:29 -0500)]
[gn build] (manually) port
fc69967a4b9
Stanislav Mekhanoshin [Fri, 14 Feb 2020 21:05:34 +0000 (13:05 -0800)]
[TBLGEN] Emit register pressure set enum
Differential Revision: https://reviews.llvm.org/D74649
Kostya Kortchinsky [Sun, 16 Feb 2020 23:29:46 +0000 (15:29 -0800)]
[scudo][standalone] Shift some data from dynamic to static
Summary:
Most of our larger data is dynamically allocated (via `map`) but it
became an hindrance with regard to init time, for a cost to benefit
ratio that is not great. So change the `TSD`s, `RegionInfo`, `ByteMap`
to be static.
Additionally, for reclaiming, we used mapped & unmapped a buffer each
time, which is costly. It turns out that we can have a static buffer,
and that there isn't much contention on it.
One of the other things changed here, is that we hard set the number
of TSDs on Android to the maximum number, as there could be a
situation where cores are put to sleep and we could miss some.
Subscribers: mgorny, #sanitizers, llvm-commits
Tags: #sanitizers, #llvm
Differential Revision: https://reviews.llvm.org/D74696
Miloš Stojanović [Tue, 18 Feb 2020 17:30:50 +0000 (18:30 +0100)]
Revert "[llvm-exegesis] Improve error reporting in Assembler.cpp"
This reverts https://reviews.llvm.org/rG63bb9fee525f
due to buildbot failures:
http://lab.llvm.org:8011/builders/clang-ppc64le-rhel/builds/1389
Mikhail Maltsev [Tue, 18 Feb 2020 17:31:21 +0000 (17:31 +0000)]
[ARM,MVE] Add vbrsrq intrinsics family
Summary:
This patch adds a new MVE intrinsics family, `vbrsrq`: vector bit
reverse and shift right. The intrinsics are compiled into the VBRSR
instruction. Two new LLVM IR intrinsics were also added: arm.mve.vbrsr
and arm.mve.vbrsr.predicated.
Reviewers: simon_tatham, dmgreen, ostannard, MarkMurrayARM
Reviewed By: simon_tatham
Subscribers: kristof.beyls, hiraditya, cfe-commits, llvm-commits
Tags: #clang, #llvm
Differential Revision: https://reviews.llvm.org/D74721
Florian Hahn [Tue, 18 Feb 2020 16:23:01 +0000 (17:23 +0100)]
[SLPVectorizer] Do not assume extracelement idx is a ConstantInt.
The index of an ExtractElementInst is not guaranteed to be a
ConstantInt. It can be any integer value. Check explicitly for
ConstantInts.
The new test cases illustrate scenarios where we crash without
this patch. I've also added another test case to check the matching
of extractelement vector ops works.
Reviewers: RKSimon, ABataev, dtemirbulatov, vporpo
Reviewed By: ABataev
Differential Revision: https://reviews.llvm.org/D74758
Jan Kratochvil [Tue, 18 Feb 2020 17:08:10 +0000 (18:08 +0100)]
[lldb] [nfc] Separate DIERef vs. user_id_t: GetForwardDeclClangTypeToDie()
Reasons are the same as for D74637.
Differential Revision: https://reviews.llvm.org/D74690
Nikita Popov [Mon, 17 Feb 2020 20:59:46 +0000 (21:59 +0100)]
[VectorUtils] Accept IRBuilderBase; NFC
Nikita Popov [Mon, 17 Feb 2020 21:23:24 +0000 (22:23 +0100)]
[SimplifyLibCalls] Accept IRBuilderBase; NFC
Nikita Popov [Mon, 17 Feb 2020 20:56:28 +0000 (21:56 +0100)]
[LoopUtils] Accept IRBuilderBase; NFC
Nikita Popov [Mon, 17 Feb 2020 20:52:11 +0000 (21:52 +0100)]
[BuildLibCalls] Accept IRBuilderBase; NFC
Accept IRBuilderBase instead of IRBuilder<>. Remove dependency
on IRBuilder from header.
Nikita Popov [Sat, 11 Jan 2020 15:58:01 +0000 (16:58 +0100)]
[InstCombine] Fix worklist management when simplifying demanded bits
When simplifying demanded bits, we currently only report the
instruction on which SimplifyDemandedBits was called as changed.
However, this is a recursive call, and the actually modified
instruction will usually be further up the chain. Additionally,
all the intermediate instructions should also be revisited,
as additional combines may be possible after the demanded bits
simplification. We fix this by explicitly adding them back to the
worklist.
Differential Revision: https://reviews.llvm.org/D72944
Nikita Popov [Sun, 16 Feb 2020 10:00:22 +0000 (11:00 +0100)]
[InstCombine] Fix multi-use handling in cttz transform
The select-of-cttz transform can currently duplicate cttz intrinsics
and zext/trunc ops. The cause is that it unnecessarily duplicates
the intrinsic and the zext/trunc when setting the "undef_on_zero"
flag to false. However, it's always legal to set the flag from true
to false, so we can make this replacement even if there are extra users.
Differential Revision: https://reviews.llvm.org/D74685
Sean Fertile [Tue, 18 Feb 2020 16:19:16 +0000 (11:19 -0500)]
[PowerPC][NFC] Add defines to help creating the SpillSlot arrays.
Create preprocessor defines for callee saved floating-point register spill
slots, vector register spill slots, and both 32-bit and 64-bit general
purpose register spill slots. This is an NFC refactor to prepare for
adding ABI compliant callee saves and restores for AIX.
Nikita Popov [Sun, 9 Feb 2020 08:57:59 +0000 (09:57 +0100)]
[InstCombine] Relax preconditions for ashr+and+icmp fold (PR44754)
Fix for https://bugs.llvm.org/show_bug.cgi?id=44754. We already have
a fold that converts icmp (and (ashr X, C3), C2), C1 into
icmp (and C2'), C1', but it imposed overly strict requirements on the
transform.
Relax this by checking that both C2 and C1 don't shift out bits
(in a signed sense) when forming the new constants.
Alive proofs (https://rise4fun.com/Alive/PTz0):
Name: ashr_legal
Pre: ((C2 << C3) >> C3) == C2 && ((C1 << C3) >> C3) == C1
%a = ashr i16 %x, C3
%b = and i16 %a, C2
%c = icmp i16 %b, C1
=>
%d = and i16 %x, C2 << C3
%c = icmp i16 %d, C1 << C3
Name: ashr_shiftout_eq
Pre: ((C2 << C3) >> C3) == C2 && ((C1 << C3) >> C3) != C1
%a = ashr i16 %x, C3
%b = and i16 %a, C2
%c = icmp eq i16 %b, C1
=>
%c = false
Note that >> corresponds to ashr here. The case of an equality
comparison has some special handling in this transform, because
it will form to a true/false result if the condition on the comparison
constant it violated.
Differential Revision: https://reviews.llvm.org/D74294
Nikita Popov [Sun, 9 Feb 2020 08:52:38 +0000 (09:52 +0100)]
[InstCombine] Add more tests for icmp+and+ashr; NFC
Alexey Romanov [Tue, 18 Feb 2020 16:42:32 +0000 (11:42 -0500)]
Cover cases like (b && c && b) in the redundant expression check.
readability-redundant-expression now detects expressions where a logical
or bitwise operator had equivalent LHS and RHS where the equivalent
operands were separated by more operands.
Aaron Ballman [Tue, 18 Feb 2020 16:37:39 +0000 (11:37 -0500)]
Hopefully fixing a failing build bot.
Should fix the changes from
260b91f379c8f86d3d6008648b3f2a945a007888.
Jacques Pienaar [Mon, 17 Feb 2020 21:16:24 +0000 (13:16 -0800)]
[mlir] Add short readme.txt to docs directory
Summary:
Refer folks to the main website and make it explicit that the rendered
output is what is of interest and that the GitHub viewing experience may
not match (even though we are trying to keep it as close as possible, the
renderers do differ).
Differential Revision: https://reviews.llvm.org/D74739
John Marshall [Tue, 18 Feb 2020 16:18:35 +0000 (11:18 -0500)]
Use getLocation() in "too few/too many arguments" diagnostic
Use the more accurate location when emitting the location of the
function being called's prototype in diagnostics emitted when calling
a function with an incorrect number of arguments.
In particular, avoids showing a trace of irrelevant macro expansions
for "MY_EXPORT static int AwesomeFunction(int, int);". Fixes PR#23564.
Benjamin Kramer [Tue, 18 Feb 2020 16:04:42 +0000 (17:04 +0100)]
Drop a constexpr in favor of const, MSVC complains.
lib\Target\Hexagon\HexagonGenDFAPacketizer.inc(109): error C2131: expression did not evaluate to a constant
Andrew Wei [Tue, 18 Feb 2020 15:53:26 +0000 (23:53 +0800)]
[RISCV] Implement mayBeEmittedAsTailCall for tail call optimization
Implement TargetLowering callback mayBeEmittedAsTailCall for riscv in CodeGenPrepare,
which will duplicate return instructions to enable tailcall optimization.
Differential Revision: https://reviews.llvm.org/D73699
Sander de Smalen [Tue, 18 Feb 2020 14:32:26 +0000 (14:32 +0000)]
Add OffsetIsScalable to getMemOperandWithOffset
Summary:
Making `Scale` a `TypeSize` in AArch64InstrInfo::getMemOpInfo,
has the effect that all places where this information is used
(notably, TargetInstrInfo::getMemOperandWithOffset) will need
to consider Scale - and derived, Offset - possibly being scalable.
This patch adds a new operand `bool &OffsetIsScalable` to
TargetInstrInfo::getMemOperandWithOffset and fixes up all
the places where this function is used, to consider the
offset possibly being scalable.
In most cases, this means bailing out because the algorithm does not
(or cannot) support scalable offsets in places where it does some
form of alias checking for example.
Reviewers: rovka, efriedma, kristof.beyls
Reviewed By: efriedma
Subscribers: wuzish, kerbowa, MatzeB, arsenm, nemanjai, jvesely, nhaehnle, hiraditya, kbarton, javed.absar, asb, rbar, johnrusso, simoncook, sabuasal, niosHD, jrtc27, MaskRay, zzheng, edward-jones, rogfer01, MartinMosbeck, brucehoult, the_o, PkmX, jocewei, jsji, Jim, lenary, s.egerton, pzheng, sameer.abuasal, apazos, luismarques, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D72758
Louis Dionne [Tue, 18 Feb 2020 15:49:19 +0000 (10:49 -0500)]
[libc++] Add ABI list for 9.0 release
I just took a snapshot of the current ABI lists on master, since I don't
think they changed since the actual 9.0 release.
Djordje Todorovic [Tue, 18 Feb 2020 15:37:16 +0000 (16:37 +0100)]
Revert "Reland "[DebugInfo] Enable the debug entry values feature by default""
This reverts commit rGa82d3e8a6e67.
serge-sans-paille [Sat, 15 Feb 2020 07:58:40 +0000 (08:58 +0100)]
Prevent gcc from issuing a warning upon coffnamecpy
This is a follow up to
d1262a6e9, more explicit to cope with GCC smartness.
Differential Revision: https://reviews.llvm.org/D74666
Kazushi (Jam) Marukawa [Tue, 18 Feb 2020 15:09:02 +0000 (16:09 +0100)]
[VE] TLS codegen
Summary:
Codegen and tests for thread-local storage.
This implements only the general dynamic model due to limitations in nld 2.26.
Reviewed By: arsenm
Differential Revision: https://reviews.llvm.org/D74718
Alex Zinenko [Tue, 18 Feb 2020 14:49:13 +0000 (15:49 +0100)]
[mlir] NFC: Rename LLVMOpLowering::lowering to LLVMOpLowering::typeConverter
The existing name is an artifact dating back to the times when we did not have
a dedicated TypeConverter infrastructure. It is also confusing with with the
name of classes using it.
Differential revision: https://reviews.llvm.org/D74707
Luke Geeson [Tue, 11 Feb 2020 16:57:25 +0000 (16:57 +0000)]
[AArch64] Add Cortex-A34 Support for clang and llvm
This patch upstreams support for the AArch64 Armv8-A cpu Cortex-A34.
In detail adding support for:
- mcpu option in clang
- AArch64 Target Features in clang
- llvm AArch64 TargetParser definitions
details of the cpu can be found here:
https://developer.arm.com/ip-products/processors/cortex-a/cortex-a34
Reviewers: SjoerdMeijer
Reviewed By: SjoerdMeijer
Subscribers: SjoerdMeijer, kristof.beyls, hiraditya, cfe-commits,
llvm-commits
Tags: #clang, #llvm
Differential Revision: https://reviews.llvm.org/D74483
Change-Id: Ida101fc544ca183a0a0e61a1277c8957855fde0b
Melanie Blower [Tue, 18 Feb 2020 11:55:31 +0000 (03:55 -0800)]
Reland D74436 "Change clang option -ffp-model=precise to select ffp-contract=on""
Change clang option -ffp-model=precise, the default, to select ffp-contract=on
The patch caused some problems for PowerPC but ibm has made
adjustments so I am resubmitting this patch. Additionally, Andy looked
at the performance regressions on LNT and it looks like a loop
unrolling decision that could be adjusted.
Reviewers: rjmccall, Andy Kaylor
Differential Revision: https://reviews.llvm.org/D74436
evgeny [Tue, 18 Feb 2020 14:49:54 +0000 (17:49 +0300)]
[Assembler] Emit summary index flags
Differential revision: https://reviews.llvm.org/D74420
Matt Arsenault [Sat, 15 Feb 2020 02:47:37 +0000 (21:47 -0500)]
AMDGPU/GlobalISel: Adjust branch target when lowering loop intrinsic
This needs to steal the branch target like the other control flow
intrinsics.
Pavel Labath [Tue, 18 Feb 2020 14:19:08 +0000 (15:19 +0100)]
[lldb] Merge RangeArray and RangeVector
The two classes are equivalent, except:
- the former uses a llvm::SmallVector (with a configurable size), while
the latter uses std::vector.
- the former has a typo in one of the functions name
This patch just leaves one class, using llvm::SmallVector, and defaults
the small size to zero. This is the same thing we did with the
RangeDataVector class in D56170.
Yitzhak Mandelbaum [Tue, 18 Feb 2020 14:04:44 +0000 (09:04 -0500)]
[libTooling] Add option for `buildAST` to report diagnostics.
Summary:
Currently, `buildAST[WithArgs]` either succeeds or fails. This patch adds
support for the caller to pass a `DiagnosticConsumer` to receive all relevant
diagnostics.
Reviewers: gribozavr
Subscribers: cfe-commits
Tags: #clang
Differential Revision: https://reviews.llvm.org/D74763
Louis Dionne [Tue, 18 Feb 2020 14:05:36 +0000 (09:05 -0500)]
[libc++] Remove XFAILs for macOS 10.15, which were fixed in later dot releases
Djordje Todorovic [Tue, 18 Feb 2020 12:27:25 +0000 (13:27 +0100)]
Reland "[DebugInfo] Enable the debug entry values feature by default"
This patch enables the debug entry values feature.
- Remove the (CC1) experimental -femit-debug-entry-values option
- Enable it for x86, arm and aarch64 targets
- Resolve the test failures
- Leave the llc experimental option for targets that do not
support the CallSiteInfo yet
Differential Revision: https://reviews.llvm.org/D73534
Benjamin Kramer [Tue, 18 Feb 2020 13:36:56 +0000 (14:36 +0100)]
Move DFA tables into the read-only data segmant.
Miloš Stojanović [Mon, 10 Feb 2020 15:30:32 +0000 (16:30 +0100)]
[llvm-exegesis] Improve error reporting in Assembler.cpp
Followup to D74085.
Replace the use of `report_fatal_error()` with returning the error to
`llvm-exegesis.cpp` and handling it there.
Differential Revision: https://reviews.llvm.org/D74325
Brian Gesiak [Tue, 18 Feb 2020 04:10:30 +0000 (23:10 -0500)]
[IR] Set name when inserting 'llvm::Value*'
Summary:
I noticed a small regression in a toy project of mine after applying
D73835, in which instruction names weren't being set properly. In the
example test case included with this patch,
`llvm::IRBuilderBase::CreateAdd` returns an `llvm::Value *` that is then
passed as an argument to `llvm::IRBuilderBase::Insert`. The overloaded
function that is selected for that call then ignores the `Name`
parameter that is given. This patch addresses that issue.
Reviewers: nikic, Meinersbur, nhaehnle, fhahn, thakis, teemperor
Reviewed By: nikic, fhahn
Subscribers: llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D74754
James Clarke [Tue, 18 Feb 2020 13:21:23 +0000 (13:21 +0000)]
Use SETNE directly rather than SUB/SETNE 0 for stack guard check
Summary:
Backends should fold the subtraction into the comparison, but not all
seem to. Moreover, on targets where pointers are not integers, such as
CHERI, an integer subtraction is not appropriate. Instead we should just
compare the two pointers directly, as this should work everywhere and
potentially generate more efficient code.
Reviewers: bogner, lebedev.ri, efriedma, t.p.northover, uweigand, sunfish
Reviewed By: lebedev.ri
Subscribers: dschuff, sbc100, arichardson, jgravelle-google, hiraditya, aheejin, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D74454
Cristian Adam [Tue, 18 Feb 2020 12:42:19 +0000 (14:42 +0200)]
llvm: Use quotes around MSVC_DIA_SDK_DIR CMake variable
MSVC_DIA_SDK_DIR variable will point to a path which contains spaces,
and without quotes it will fail to configure the project.
Raphael Isemann [Tue, 18 Feb 2020 12:25:08 +0000 (13:25 +0100)]
[lldb] Fix another instance where we pass a nullptr as TypeSourceInfo to NonTypeTemplateParmDecl::Create
Summary:
Follow up to an issue pointed out in the review of D73808. We shouldn't just pass in a nullptr TypeSourceInfo
in case Clang decided to access it.
Reviewers: shafik, vsk
Reviewed By: shafik, vsk
Subscribers: kristof.beyls, JDevlieghere, lldb-commits
Tags: #lldb
Differential Revision: https://reviews.llvm.org/D73946
Tatyana Krasnukha [Tue, 18 Feb 2020 12:02:58 +0000 (15:02 +0300)]
[lldb][test] Remove expected failure decorator from test_copy_from_dummy_target (TestScriptedResolver)
This test case doesn't check that breakpoint's locations are resolved, and it passes on Windows too.
Florian Hahn [Mon, 17 Feb 2020 15:35:57 +0000 (16:35 +0100)]
[CGP] Add uaddo test with math used, SPARC/AArch64 variants.
Georgii Rymar [Wed, 12 Feb 2020 13:12:09 +0000 (16:12 +0300)]
[llvm-readobj] - Report a warning when an unexpected DT_SYMENT tag value is met.
There was a short discussion about this:
https://reviews.llvm.org/D73484#inline-676942
To summarize:
It is a bit unclear to me why the `DT_SYMENT` tag exist.
LLD has the code that does:
"addInt(DT_SYMENT, sizeof(Elf_Sym));" and I guess other linkers has the same logic.
It is unclear why it can be possible to have other values rather than values of
a size of platform symbol. Seems it is not possible, and atm for me it looks that
this tag should not be used. This patch starts reporting the warning when the
value it contains differs from a symbol size for a 32/64 bit platform for safety.
It keeps the rest of the logic we have unchanged. Before this patch we did not handle
the tag at all.
Differential review: https://reviews.llvm.org/D74479
serge-sans-paille [Tue, 18 Feb 2020 11:31:11 +0000 (12:31 +0100)]
Fix riscv/lld test interaction
Fix for
dd230142d8a00f5f30c3930a2407000e845dcfbf, in case ld.lld is not
available.
Djordje Todorovic [Tue, 18 Feb 2020 08:08:10 +0000 (09:08 +0100)]
[CSInfo][TailDuplicator] Delete the call site info when removing dead MBBs
This is needed for the debug entry values feature.
Differential Revision: https://reviews.llvm.org/D74702
Tatyana Krasnukha [Wed, 12 Feb 2020 13:16:57 +0000 (16:16 +0300)]
[lldb][NFC] Remove unused parameter
Rename search-filter's CopyForBreakpoint to CreateCopy, since they don't
do anything with breakpoints.
Tatyana Krasnukha [Thu, 13 Feb 2020 12:51:13 +0000 (15:51 +0300)]
[lldb] Make shared_from_this-related code safer
Pass TargetSP to filters' CreateFromStructuredData, don't let them guess
whether target object is managed by a shared_ptr.
Make Breakpoint sure that m_target.shared_from_this() is safe by passing TargetSP
to all its static Create*** member-functions. This should be enough, since Breakpoint's
constructors are private/protected and never called directly (except by Target itself).
Tatyana Krasnukha [Thu, 13 Feb 2020 13:48:38 +0000 (16:48 +0300)]
[lldb] Don't call CopyForBreakpoint from a Breakpoint's constructor
Some implementations (BreakpointResolverScripted) try calling the breakpoint's shared_from_this(),
that makes LLDB crash.
Kerry McLaughlin [Tue, 18 Feb 2020 10:08:41 +0000 (10:08 +0000)]
[AArch64][SVE] Add remaining SVE2 intrinsics for widening DSP operations
Summary:
Implements the following intrinsics:
- llvm.aarch64.sve.[s|u]mullb_lane
- llvm.aarch64.sve.[s|u]mullt_lane
- llvm.aarch64.sve.sqdmullb_lane
- llvm.aarch64.sve.sqdmullt_lane
- llvm.aarch64.sve.[s|u]addwb
- llvm.aarch64.sve.[s|u]addwt
- llvm.aarch64.sve.[s|u]shllb
- llvm.aarch64.sve.[s|u]shllt
- llvm.aarch64.sve.[s|u]subwb
- llvm.aarch64.sve.[s|u]subwt
Reviewers: sdesmalen, dancgr, efriedma, c-rhodes, rengolin
Reviewed By: sdesmalen
Subscribers: tschuett, kristof.beyls, hiraditya, rkruppe, psnobl, cameron.mcinally, cfe-commits, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D73903
Raphael Isemann [Tue, 18 Feb 2020 10:24:48 +0000 (11:24 +0100)]
[lldb][NFC] Fix compilation of SymbolFilePDBTests.cpp after FindNamespace API change
Since
f9568a95493aea3ea813bd37cb8c084ec4294e38 this function takes a
CompilerDeclContext reference instead of a pointer. It overlooked this function
when I fixed the compilation for FindTypes.
serge-sans-paille [Mon, 17 Feb 2020 12:42:00 +0000 (13:42 +0100)]
Support -fuse-ld=lld for riscv
Differential Revision: https://reviews.llvm.org/D74704
Mikhail Maltsev [Tue, 18 Feb 2020 10:22:37 +0000 (10:22 +0000)]
[ARM,CDE] Cosmetic changes, additonal driver tests
Summary:
This is a follow-up patch addressing post-commit comments in
https://reviews.llvm.org/D74044:
* Add more Clang driver tests (-march=armv8.1m.main and -march=armv8.1m.main+mve.fp)
* Clang-format a chunk in ARMAsmParser.cpp
* Add a missing copyright header to ARMInstrCDE.td
Reviewers: SjoerdMeijer, simon_tatham, dmgreen
Reviewed By: SjoerdMeijer
Subscribers: kristof.beyls, hiraditya, cfe-commits, llvm-commits
Tags: #clang, #llvm
Differential Revision: https://reviews.llvm.org/D74732
Raphael Isemann [Tue, 18 Feb 2020 10:19:02 +0000 (11:19 +0100)]
[lldb] Don't model std::atomic as a transparent data structure in the data formatter
Summary:
Currently the data formatter is treating `std::atomic` variables as transparent wrappers
around their underlying value type. This causes that when printing `std::atomic<A *>`, the data
formatter will forward all requests for the children of the atomic variable to the `A *` pointer type
which will then return the respective members of `A`. If `A` in turn has a member that contains
the original atomic variable, this causes LLDB to infinitely recurse when printing an object with
such a `std::atomic` pointer member.
We could implement a workaround similar to whatever we do for pointer values but this patch
just implements the `std::atomic` formatter in the same way as we already implement other
formatters (e.g. smart pointers or `std::optional`) that just model the contents of the as a child
"Value". This way LLDB knows when it actually prints a pointer and can just use its normal
workaround if "Value" is a recursive pointer.
Fixes rdar://
59189235
Reviewers: JDevlieghere, jingham, shafik
Reviewed By: shafik
Subscribers: shafik, christof, jfb, abidh, lldb-commits
Tags: #lldb
Differential Revision: https://reviews.llvm.org/D74310
Pavel Labath [Mon, 17 Feb 2020 16:29:55 +0000 (17:29 +0100)]
[lldb/DWARF] Support the debug_str_offsets section in dwp files
Summary:
In dwp files a constant (from the debug_cu_index section) needs to be
added to each reference into the debug_str_offsets section.
I've tried to implement this to roughly match the llvm flow: I've
changed the DWARFormValue to stop resolving the indirect string
references directly -- instead, it calls into DWARFUnit, which resolves
this for it (similar to how it already resolves indirect range and
location list references). I've also done a small refactor of the string
offset base computation code in DWARFUnit in order to make it easier to
access the debug_cu_index base offset.
Reviewers: JDevlieghere, aprantl, clayborg
Subscribers: lldb-commits
Tags: #lldb
Differential Revision: https://reviews.llvm.org/D74723
Sven van Haastregt [Tue, 18 Feb 2020 10:02:06 +0000 (10:02 +0000)]
[OpenCL] Add Arm dot product builtin functions
Add the Arm dot product builtin functions from the OpenCL extension
available at
https://www.khronos.org/registry/OpenCL/extensions/arm/cl_arm_integer_dot_product.txt
Patch by Pierre Gondois and Sven van Haastregt.
Raphael Isemann [Tue, 18 Feb 2020 09:51:13 +0000 (10:51 +0100)]
[lldb] Fix compilation of SymbolFilePDBTests.cpp after FindTypes API change
Since
f9568a95493aea3ea813bd37cb8c084ec4294e38 this function takes a
CompilerDeclContext reference instead of a pointer.
Pavel Labath [Tue, 18 Feb 2020 09:37:04 +0000 (10:37 +0100)]
[lldb] Remove DataExtractor::GetPointer
This function is equivalent to GetAddress, but getAddress is also
present on the llvm version of the data extractor.
Simon Tatham [Mon, 17 Feb 2020 17:06:20 +0000 (17:06 +0000)]
[ARM,MVE] Add the vmovnbq,vmovntq intrinsic family.
Summary:
These are in some sense the inverse of vmovl[bt]q: they take a vector
of n wide elements and truncate each to half its width. So they only
write half a vector's worth of output data, and therefore they also
take an 'inactive' parameter to provide the other half of the data in
the output vector. So vmovnb overwrites the even lanes of 'inactive'
with the narrowed values from the main input, and vmovnt overwrites
the odd lanes.
LLVM had existing codegen which generates these MVE instructions in
response to IR that takes two vectors of wide elements, or two vectors
of narrow ones. But in this case, we have one vector of each. So my
clang codegen strategy is to narrow the input vector of wide elements
by simply reinterpreting it as the output type, and then we have two
narrow vectors and can represent the operation as a vector shuffle
that interleaves lanes from both of them.
Even so, not all the cases I needed ended up being selected as a
single MVE instruction, so I've added a couple more patterns that spot
combinations of the 'MVEvmovn' and 'ARMvrev32' SDNodes which can be
generated as a VMOVN instruction with operands swapped.
This commit adds the unpredicated forms only.
Reviewers: dmgreen, miyuki, MarkMurrayARM, ostannard
Reviewed By: dmgreen
Subscribers: kristof.beyls, hiraditya, cfe-commits, llvm-commits
Tags: #clang, #llvm
Differential Revision: https://reviews.llvm.org/D74337
Simon Tatham [Mon, 17 Feb 2020 17:06:05 +0000 (17:06 +0000)]
[ARM,MVE] Add the vmovlbq,vmovltq intrinsic family.
Summary:
These intrinsics take a vector of 2n elements, and return a vector of
n wider elements obtained by sign- or zero-extending every other
element of the input vector. They're represented in IR as a
shufflevector that extracts the odd or even elements of the input,
followed by a sext or zext.
Existing LLVM codegen already matches this pattern and generates the
VMOVLB instruction (which widens the even-index input lanes). But no
existing isel rule was generating VMOVLT, so I've added some. However,
the new rules currently only work in little-endian MVE, because the
pattern they expect from isel lowering includes a bitconvert which
doesn't have the right semantics in big-endian.
The output of one existing codegen test is improved by those new
rules.
This commit adds the unpredicated forms only.
Reviewers: dmgreen, miyuki, MarkMurrayARM, ostannard
Reviewed By: dmgreen
Subscribers: kristof.beyls, hiraditya, cfe-commits, llvm-commits
Tags: #clang, #llvm
Differential Revision: https://reviews.llvm.org/D74336
Simon Tatham [Mon, 17 Feb 2020 17:05:52 +0000 (17:05 +0000)]
[ARM] Allow `ARMVectorRegCast` to match bitconverts too. (NFC)
Summary:
When we start putting instances of `ARMVectorRegCast` in complex isel
patterns, it will be awkward that they're often turned into the more
standard `bitconvert` in little-endian mode. We'd rather not have to
write separate isel patterns for the two endiannesses, matching
different but equivalent cast operations.
This change aims to fix that awkwardness in advance, by turning the
Tablegen record `ARMVectorRegCast` from a simple `SDNode` instance
into a `PatFrags` that can match either kind of cast – with a
predicate that prevents it matching a bitconvert in the big-endian
case, where bitconvert isn't semantically identical.
No existing code generation should be affected by this change, but it
will enable the patterns introduced by D74336 to work in both
endiannesses.
Reviewers: dmgreen
Reviewed By: dmgreen
Subscribers: kristof.beyls, hiraditya, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D74716
Simon Tatham [Mon, 17 Feb 2020 17:05:39 +0000 (17:05 +0000)]
[ARM,MVE] Add intrinsics vclzq and vclsq.
Summary:
vclzq maps nicely to the existing target-independent @llvm.ctlz IR
intrinsic. But vclsq ('count leading sign bits') has no corresponding
target-independent intrinsic, so I've made up @llvm.arm.mve.vcls.
This commit adds the unpredicated forms only.
Reviewers: dmgreen, miyuki, MarkMurrayARM, ostannard
Reviewed By: miyuki
Subscribers: kristof.beyls, hiraditya, cfe-commits, llvm-commits
Tags: #clang, #llvm
Differential Revision: https://reviews.llvm.org/D74335
Simon Tatham [Mon, 17 Feb 2020 17:05:26 +0000 (17:05 +0000)]
[ARM,MVE] Add the vrev16q, vrev32q, vrev64q family.
Summary:
These intrinsics just reorder the lanes of a vector, so the natural IR
representation is as a shufflevector operation. Existing LLVM codegen
already recognizes those particular shufflevectors and generates the
MVE VREV instruction.
This commit adds the unpredicated forms only.
Reviewers: dmgreen, miyuki, MarkMurrayARM, ostannard
Reviewed By: dmgreen
Subscribers: kristof.beyls, cfe-commits
Tags: #clang
Differential Revision: https://reviews.llvm.org/D74334
Simon Tatham [Mon, 17 Feb 2020 17:05:13 +0000 (17:05 +0000)]
[ARM,MVE] Add intrinsics for FP rounding operations.
Summary:
This adds the unpredicated forms of six different MVE intrinsics which
all round a vector of floating-point numbers to integer values,
leaving them still in FP format, differing only in rounding mode and
exception settings.
Five of them map to existing target-independent intrinsics in LLVM IR,
such as @llvm.trunc and @llvm.rint. The sixth, mapping to the `vrintn`
instruction, is done by inventing a target-specific intrinsic.
(`vrintn` behaves the same as `vrintx` in terms of the output value:
the side effects on the FPSCR flags are the only difference between
the two. But ACLE specifies separate user-callable intrinsics for the
two, so the side effects matter enough to make sure we generate the
right one of the two instructions in each case.)
Reviewers: dmgreen, miyuki, MarkMurrayARM, ostannard
Reviewed By: miyuki
Subscribers: kristof.beyls, hiraditya, cfe-commits, llvm-commits
Tags: #clang, #llvm
Differential Revision: https://reviews.llvm.org/D74333
Simon Tatham [Mon, 17 Feb 2020 17:04:21 +0000 (17:04 +0000)]
[ARM,MVE] Add intrinsics for int <-> float conversion.
Summary:
This adds the unpredicated versions of the family of vcvtq intrinsics
that convert between a vector of floats and a vector of the same size
of integer. These are represented in IR using the standard fptosi,
fptoui, sitofp and uitofp operations, which existing LLVM codegen
already handles.
Reviewers: dmgreen, miyuki, MarkMurrayARM, ostannard
Reviewed By: MarkMurrayARM
Subscribers: kristof.beyls, cfe-commits
Tags: #clang
Differential Revision: https://reviews.llvm.org/D74332
Simon Tatham [Mon, 17 Feb 2020 17:03:52 +0000 (17:03 +0000)]
[ARM,MVE] Add intrinsics for abs, neg and not operations.
Summary:
This commit adds the unpredicated intrinsics for the unary operations
vabsq (absolute value), vnegq (arithmetic negation), vmvnq (bitwise
complement), vqabsq and vqnegq (saturating versions of abs and neg for
signed integers, in the sense that they give INT_MAX if an input lane
is INT_MIN).
This is done entirely in clang: all of these operations have existing
isel patterns and existing tests for them on the LLVM side, so I've
just made clang emit the same IR that those patterns already match.
Reviewers: dmgreen, miyuki, MarkMurrayARM, ostannard
Reviewed By: MarkMurrayARM
Subscribers: kristof.beyls, cfe-commits
Tags: #clang
Differential Revision: https://reviews.llvm.org/D74331
Raphael Isemann [Tue, 18 Feb 2020 09:32:00 +0000 (10:32 +0100)]
[lldb][NFC] Documention that OptionDefinition::completion_type contains enum values
This should be just the enum type but that's a larger refactoring, so document that
this is not just an integer until we can make this just the type of the enum.