Dirk Behme [Sun, 14 Dec 2008 08:47:11 +0000 (09:47 +0100)]
OMAP3: Add pin mux, clock and cpu headers
Add pin mux, clock and cpu header files for OMAP3.
Signed-off-by: Dirk Behme <dirk.behme@googlemail.com>
Maxim Artamonov [Wed, 3 Dec 2008 02:38:17 +0000 (05:38 +0300)]
bugfix for i.mx31 CCM_UPCTL reg
Signed-off-by: Maxim Artamonov <scn1874 at yandex.ru>
Wolfgang Denk [Sat, 24 Jan 2009 01:17:02 +0000 (02:17 +0100)]
Merge branch 'master' of git://git.denx.de/u-boot-mpc85xx
Wolfgang Denk [Sat, 24 Jan 2009 01:08:31 +0000 (02:08 +0100)]
Merge branch 'master' of git://git.denx.de/u-boot-mpc83xx
Mike Frysinger [Tue, 30 Dec 2008 08:15:38 +0000 (03:15 -0500)]
easylogo: add optional gzip support
Some images can be quite large, so add an option to compress the
image data with gzip in the U-Boot image. Then at runtime, the
board can decompress it with the normal zlib functions.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Bryan Wu [Sat, 3 Jan 2009 01:47:45 +0000 (20:47 -0500)]
fat: fix unaligned errors
A couple of buffers in the fat code are declared as an array of bytes.
But it is then cast up to a structure with 16bit and 32bit members.
Since GCC assumes structure alignment here, we have to force the
buffers to be aligned according to the structure usage.
Signed-off-by: Bryan Wu <bryan.wu@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Brad Bozarth [Fri, 2 Jan 2009 03:45:47 +0000 (22:45 -0500)]
spi flash: fix crash due to spi flash miscommunication
Higher spi flash layers expect to be given back a pointer that was
malloced so that it can free the result, but the lower layers return
a pointer that is in the middle of the malloced memory. Reorder the
members of the lower spi structures so that things work out.
Signed-off-by: Brad Bozarth <bflinux@yumbrad.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Acked-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
Yuri Tikhonov [Sat, 20 Dec 2008 11:54:21 +0000 (14:54 +0300)]
FPU POST: fix warnings when building with 2.18 binutils
When compile u-boot with the 2.18 binutils the following
warning messages for each object file in post/lib_ppc/fpu/ is
produced at the linking stage:
post/libpost.a(acc1.o) uses hard float, u-boot uses soft-float
...
This is because of the fact that, in general, the soft-float and
hard-float ABIs are incompatible; the 2.18 binutils do checking
of the Tag_GNU_Power_ABI_FP attribute of the files to be linked, and
produce the worning like above if these are not compatible.
The incompatibility of ABIs is concerned only the float values:
e.g. the soft-float ABI assumes the float argument passing in the
pair of rX registers, and the hard-float ABI assumes passing of
the float argument in the fX register. When we don't pass the float
arguments between the functions compiled with different floatness,
then such an application will work correctly.
This is the case for the FPU POST: u-boot (compiled with soft-float)
doesn't pass to (and doesn't get from) the FPU POST functions any
floats; there are no functions exported from the post/lib_ppc/fpu/
objects which would work with float parameters/returns too. So, we
can reassure the linker not to worry about the difference in ABI
attributes of linking files just by setting the 'soft-float'
attribute for the objects in post/lib_ppc/fpu. And this patch does
this.
Also, to avoid passing both soft- and hard-float options in CFLAGS
when compiling the files from post/lib_ppc/fpu (which is OK, but
looks rather dirty) this patch removes the soft-float string from
CFLAGS in post/lib_ppc/fpu/Makefile.
Signed-off-by: Yuri Tikhonov <yur@emcraft.com>
Peter Tyser [Wed, 17 Dec 2008 22:36:22 +0000 (16:36 -0600)]
Add support for Maxim's DS4510 I2C device
Initial support for the DS4510, a CPU supervisor with
integrated EEPROM, SRAM, and 4 programmable non-volatile
GPIO pins. The CONFIG_DS4510 define enables support
for the device while the CONFIG_CMD_DS4510 define
enables the ds4510 command. The additional
CONFIG_DS4510_INFO, CONFIG_DS4510_MEM, and
CONFIG_DS4510_RST defines add additional sub-commands
to the ds4510 command when defined.
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Dirk Eibach [Tue, 16 Dec 2008 13:51:56 +0000 (14:51 +0100)]
common: Iteration limit for memory test.
The iteration limit is passed to mtest as a fourth parameter:
[start [end [pattern [iterations]]]]
If no fourth parameter is supplied, there is no iteration limit and the
test will loop forever.
Signed-off-by: Dirk Eibach <eibach@gdsys.de>
Stefan Roese [Mon, 15 Dec 2008 14:40:12 +0000 (15:40 +0100)]
serial: Rename driver vcth to vct to support other board variants
Moved driver vcth.c to vct.c to better reflect the VCT board series.
This driver is now used by the VCT platforms:
vct_premium
vct_platinum
vct_platinumsvc
Signed-off-by: Stefan Roese <sr@denx.de>
Shinya Kuribayashi [Thu, 11 Dec 2008 15:45:27 +0000 (00:45 +0900)]
nios: Move README.nios_CONFIG_SYS_NIOS_CPU to doc/ dir
Signed-off-by: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
Peter Korsgaard [Wed, 10 Dec 2008 15:24:16 +0000 (16:24 +0100)]
common/main: support bootdelay=0 for CONFIG_AUTOBOOT_KEYED
Support bootdelay=0 in abortboot for the CONFIG_AUTOBOOT_KEYED case
similar to the CONFIG_ZERO_BOOTDELAY_CHECK support for the
!CONFIG_AUTOBOOT_KEYED case.
Do this by reversing the loop so we do at least one iteration before
checking for timeout.
Signed-off-by: Peter Korsgaard <jacmet@sunsite.dk>
Niklaus Giger [Mon, 8 Dec 2008 16:24:08 +0000 (17:24 +0100)]
Added legacy flash ST Micro M29W040B
Graeme Russ [Mon, 8 Dec 2008 09:04:51 +0000 (20:04 +1100)]
Fixed off-by-one errors in lib_m68k/interrupts.c
Signed-off-by: Graeme Russ <graeme.russ@gmail.com>
Graeme Russ [Sat, 6 Dec 2008 23:29:05 +0000 (10:29 +1100)]
Removed all references to CONFIG_SYS_RESET_GENERIC
Generic i386 reset - #define made redundant by weak function
Signed-off-by: Graeme Russ <graeme.russ@gmail.com>
Graeme Russ [Sat, 6 Dec 2008 23:29:04 +0000 (10:29 +1100)]
Remove #ifdef CONFIG_SC520 in source code
CONFIG_SC520 is now used for conditional compile
Signed-off-by: Graeme Russ <graeme.russ@gmail.com>
Graeme Russ [Sat, 6 Dec 2008 23:29:03 +0000 (10:29 +1100)]
Added MMCR reset functionality
Reset function specific to AMD SC520 microcontroller - Is more of a
'hard reset' that the triple fault.
Requires CONFIG_SYS_RESET_SC520 to be defined in config
I would have liked to add this to a new file (cpu/i386/sc520/reset.c)
but ld requires that a object file in a library arhive MUST contain
at least one function which does not override a weak function (and is
called from outside the object file) in order for that object file to
be extracted from the archive. This would be the only function on the
new file, and hence, will never get linked in.
Signed-off-by: Graeme Russ <graeme.russ@gmail.com>
Graeme Russ [Sat, 6 Dec 2008 23:29:02 +0000 (10:29 +1100)]
Moved generic (triple fault) reset code
Moved from interrupts.c to cpu.c and made into a weak function to
allow vendor specific override
Vendor specific CPU reset (like the AMD SC520 MMCR reset) can now be
added to the vendor specific code without the need to remember to
#undef usage of the generic method and if you forget to include your
custom reset method, you will always get the default.
Signed-off-by: Graeme Russ <graeme.russ@gmail.com>
Graeme Russ [Sat, 6 Dec 2008 23:29:01 +0000 (10:29 +1100)]
Moved definition of set_vector() to new header file
This allows for future tidy ups and functionality that will require
set_vector ()
Signed-off-by: Graeme Russ <graeme.russ@gmail.com>
Graeme Russ [Sat, 6 Dec 2008 23:29:00 +0000 (10:29 +1100)]
Moved sc520 specific code into new cpu/i386/sc520 folder
Signed-off-by: Graeme Russ <graeme.russ@gmail.com>
Signed-off-by: Wolfgang Denk <wd@denx.de>
Graeme Russ [Sat, 6 Dec 2008 23:28:58 +0000 (10:28 +1100)]
Renamed cpu/i386/reset.S to resetvec.S
Brings i386 in line with other CPUs with a reset vector and frees up reset.c
for CPU reset functions
Signed-off-by: Graeme Russ <graeme.russ@gmail.com>
Wolfgang Denk [Sat, 24 Jan 2009 00:01:49 +0000 (01:01 +0100)]
Makefile: keep lists sorted.
Signed-off-by: Wolfgang Denk <wd@denx.de>
Graeme Russ [Sat, 6 Dec 2008 23:28:57 +0000 (10:28 +1100)]
Added initial eNET board support
Signed-off-by: Graeme Russ <graeme.russ@gmail.com>
Kim Phillips [Fri, 23 Jan 2009 23:48:24 +0000 (17:48 -0600)]
Merge branch 'next'
Gary Jennejohn [Thu, 20 Nov 2008 10:37:26 +0000 (11:37 +0100)]
POWERPC 82xx: add the SCC as an HDLC controller
Right now this is only used by keymile.
Signed-off-by: Gary Jennejohn <garyj@denx.de>
Heiko Schocher [Thu, 20 Nov 2008 08:59:09 +0000 (09:59 +0100)]
powerpc, keymile boards: extract identical config options
This patch extracts the identical config options for the
keymile boards mgcoge, mgsuvd and kmeter1 in a new
common config file keymile-common.h.
Signed-off-by: Heiko Schocher <hs@denx.de>
Heiko Schocher [Fri, 21 Nov 2008 07:29:40 +0000 (08:29 +0100)]
powerpc: keymile: Add a check for the PIGGY debug board
Check the presence of the PIGGY on the keymile boards mgcoge,
mgsuvd and kmeter1. If the PIGGY is not present, dont register
this Ethernet device.
Signed-off-by: Heiko Schocher <hs@denx.de>
Acked-by: Ben Warren <biggerbadderben@gmail.com>
Heiko Schocher [Thu, 20 Nov 2008 08:57:47 +0000 (09:57 +0100)]
powerpc: 83xx: add support for the kmeter1 board
This patch adds support for the kmeter1 board from Keymile,
based on a Freescale MPC8360 CPU.
- serial console on UART 1
- 256 MB DDR2 RAM
- 64 MB NOR Flash
- Ethernet RMII Mode over UCC4
- PHY SMSC LAN8700
Signed-off-by: Heiko Schocher <hs@denx.de>
Sergei Poselenov [Tue, 4 Nov 2008 12:51:18 +0000 (13:51 +0100)]
Add a do_div() wrapper macro, lldiv().
Add a do_div() wrapper, lldiv(). The new inline function doesn't modify
the dividend and returns the result of division, so it is useful
in complex expressions, i.e. "return(a/b)" -> "return(lldiv(a,b))"
Signed-off-by: Sergei Poselenov <sposelenov@emcraft.com>
Kumar Gala [Fri, 23 Jan 2009 20:22:14 +0000 (14:22 -0600)]
85xx: Add a 36-bit physical configuration for MPC8572DS
We move all IO addressed (CCSR, localbus, PCI) above the 4G boundary
to allow for larger memory sizes.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Kumar Gala [Fri, 23 Jan 2009 20:22:13 +0000 (14:22 -0600)]
85xx: Handle eLBC difference w/36-bit physical
The eLBC only handles 32-bit physical address in systems with 36-bit
physical. The previos generation of LBC handled 34-bit physical
address in 36-bit systems. Added a new CONFIG option to convey
the difference between the LBC and eLBC.
Also added defines for XAM bits used in LBC for the extended 34-bit
support.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Kumar Gala [Fri, 23 Jan 2009 20:22:12 +0000 (14:22 -0600)]
85xx: Use BR_ADDR macro for NAND chipselects
Use the new BR_ADDR macro to properly setup the address field of the
localbus chipselects used by NAND.
This allows us to deal with 36-bit phys on these boards in the future.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Haiying Wang [Thu, 15 Jan 2009 16:58:35 +0000 (11:58 -0500)]
Add secondary CPUs processor frequency for e500 core
This patch updates e500 freqProcessor to array based on CONFIG_NUM_CPUS,
and prints each CPU's frequency separately. It also fixes up each CPU's
frequency in "clock-frequency" of fdt blob.
Signed-off-by: James Yang <James.Yang@freescale.com>
Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
Dave Liu [Fri, 21 Nov 2008 08:31:53 +0000 (16:31 +0800)]
85xx: enable the auto self refresh for wake up ARP
The wake up ARP feature need use the memory to process
wake up packet, we enable auto self refresh to support it.
Signed-off-by: Dave Liu <daveliu@freescale.com>
Acked-by: Andy Fleming <afleming@freescale.com>
Dave Liu [Fri, 21 Nov 2008 08:31:43 +0000 (16:31 +0800)]
fsl-ddr: use the 1T timing as default configuration
For light loaded system, we use the 1T timing to gain better
memory performance, but for some heavily loaded system,
you have to add the 2T timing options to board files.
Signed-off-by: Dave Liu <daveliu@freescale.com>
Acked-by: Andy Fleming <afleming@freescale.com>
Dave Liu [Fri, 21 Nov 2008 08:31:35 +0000 (16:31 +0800)]
fsl-ddr: make the self refresh idle threshold configurable
Some 85xx processors have the advanced power management feature,
such as wake up ARP, that needs enable the automatic self refresh.
If the DDR controller pass the SR_IT (self refresh idle threshold)
idle cycles, it will automatically enter self refresh. However,
anytime one transaction is issued to the DDR controller, it will
reset the counter and exit self refresh state.
Signed-off-by: Dave Liu <daveliu@freescale.com>
Acked-by: Andy Fleming <afleming@freescale.com>
Dave Liu [Fri, 21 Nov 2008 08:31:29 +0000 (16:31 +0800)]
fsl-ddr: clean up the ddr code for DDR3 controller
- The DDR3 controller is expanding the bits for timing config
- Add the DDR3 32-bit bus mode support
Signed-off-by: Dave Liu <daveliu@freescale.com>
Acked-by: Andy Fleming <afleming@freescale.com>
Dave Liu [Fri, 21 Nov 2008 08:31:22 +0000 (16:31 +0800)]
fsl-ddr: update the bit mask for DDR3 controller
According to the latest 8572 UM, the DDR3 controller
is expanding the bit mask, and we use the extend ACTTOPRE
mode when tRAS more than 19 MCLK.
Signed-off-by: Dave Liu <daveliu@freescale.com>
Kumar Gala [Tue, 2 Dec 2008 22:08:40 +0000 (16:08 -0600)]
85xx: Introduce CONFIG_SYS_PCI*_IO_VIRT for FSL boards
Introduce a new define to seperate out the virtual address that PCI
IO space is at from the physical address. In most situations these are
mapped 1:1. However any code accessing the bus should use VIRT.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Acked-by: Andy Fleming <afleming@freescale.com>
Kumar Gala [Tue, 2 Dec 2008 22:08:39 +0000 (16:08 -0600)]
85xx: Introduce CONFIG_SYS_PCI*_MEM_VIRT for FSL boards
Introduce a new define to seperate out the virtual address that PCI
memory is at from the physical address. In most situations these are
mapped 1:1. However any code accessing the bus should use VIRT.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Acked-by: Andy Fleming <afleming@freescale.com>
Kumar Gala [Tue, 2 Dec 2008 22:08:38 +0000 (16:08 -0600)]
85xx: Use CONFIG_SYS_{PCI*,RIO*}_MEM_PHYS for physical address on FSL boards
Use the _MEM_PHYS defines instead of _MEM_BUS for LAW and real address fields
of TLBs. This is what we should have always been using from the start.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Acked-by: Andy Fleming <afleming@freescale.com>
Kumar Gala [Tue, 2 Dec 2008 22:08:37 +0000 (16:08 -0600)]
85xx: Convert CONFIG_SYS_PCI*_IO_BASE to _IO_BUS for FSL boards
Use CONFIG_SYS_PCI*_IO_BUS for the bus relative address instead
of _IO_BASE so we are more explicit.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Kumar Gala [Tue, 2 Dec 2008 22:08:36 +0000 (16:08 -0600)]
85xx: Convert CONFIG_SYS_{PCI*,RIO*}_MEM_BASE to _MEM_BUS for FSL boards
Use CONFIG_SYS_{PCI,RIO}_MEM_BUS for the bus relative address instead
of _MEM_BASE so we are more explicit.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Acked-by: Andy Fleming <afleming@freescale.com>
Kumar Gala [Tue, 2 Dec 2008 20:19:34 +0000 (14:19 -0600)]
85xx: separate FLASH BASE virtual from physical address
Added a CONFIG_SYS_FLASH_BASE_PHYS for use as the physical address and
maintain CONFIG_SYS_FLASH_BASE as the virtual address of the flash.
This allows us to deal with 36-bit phys on these boards in the future.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Acked-by: Andy Fleming <afleming@freescale.com>
Kumar Gala [Tue, 2 Dec 2008 20:19:33 +0000 (14:19 -0600)]
85xx: separate PIXIS virtual from physical address
Added a PIXIS_BASE_PHYS for use as the physical address and maintain
PIXIS_BASE as the virtual address of the PIXIS fpga registers.
This allows us to deal with 36-bit phys on these boards in the future.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Acked-by: Andy Fleming <afleming@freescale.com>
Haiying Wang [Tue, 11 Nov 2008 13:52:09 +0000 (08:52 -0500)]
Add README file for MPC8572DS board
Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
Acked-by: Andy Fleming <afleming@freescale.com>
Mike Frysinger [Mon, 20 Oct 2008 20:15:04 +0000 (16:15 -0400)]
Blackfin: use common strmhz() in system output
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Wolfgang Denk [Fri, 23 Jan 2009 21:48:06 +0000 (22:48 +0100)]
Merge branch 'master' of git://git.denx.de/u-boot-nand-flash
Wolfgang Denk [Fri, 23 Jan 2009 21:47:25 +0000 (22:47 +0100)]
Merge branch 'master' of git://git.denx.de/u-boot-microblaze
Ron Madrid [Thu, 22 Jan 2009 23:05:24 +0000 (15:05 -0800)]
mpc83xx: New board support for SIMPC8313
This patch will create a new board, SIMPC8313, from Sheldon Instruments. This
board boots from NAND devices and is configureable for either large or small
page devices. The board supports non-soldered DDR2, one ethernet port, a
Marvell 88E1118 PHY, and PCI host support. The board also has a FPGA connected
to the eLBC providing glue logic to a TMS320C67xx DSP.
Signed-off-by: Ron Madrid <ron_madrid@sbcglobal.net>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Mike Frysinger [Mon, 19 Jan 2009 00:46:06 +0000 (19:46 -0500)]
nand: fixup printf modifiers to match types used
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Signed-off-by: Scott Wood <scottwood@freescale.com>
Schlaegl Manfred jun [Tue, 20 Jan 2009 15:57:55 +0000 (16:57 +0100)]
nand read.jffs2 (nand_legacy) in common/cmd_nand.c
Error with CONFIG_NAND_LEGACY in common/cmd_nand.c:
With current code "nand read.jffs2s" (read and skip bad blocks) is always interpreted as
"nand read.jffs2" (read and fill bad blocks with 0xff). This is because ".jffs2" is
tested before ".jffs2s" and only the first two characters are compared.
Correction:
Test for ".jffs2s" first and compare the first 7 characters.
Signed-off-by: Scott Wood <scottwood@freescale.com>
Wolfgang Grandegger [Fri, 16 Jan 2009 17:55:54 +0000 (18:55 +0100)]
NAND: rename NAND_MAX_CHIPS to CONFIG_SYS_NAND_MAX_CHIPS
This patch renames NAND_MAX_CHIPS to CONFIG_SYS_NAND_MAX_CHIPS and
changes the default from 8 to 1 for the legacy and the new MTD
NAND layer. This allows to remove all NAND_MAX_CHIPS definitions
in the board config files because none of the boards use multi
chip support (NAND_MAX_CHIPS > 1) so far. The bamboo and the DU440
define
#define NAND_MAX_CHIPS CONFIG_SYS_MAX_NAND_DEVICE
but that's bogus and did not work anyhow.
Signed-off-by: Wolfgang Grandegger <wg@grandegger.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
Dave Liu [Tue, 2 Dec 2008 03:48:51 +0000 (11:48 +0800)]
NAND: Fix cache and memory inconsistency issue
We load the secondary stage u-boot image from NAND to
system memory by nand_load, but we did not flush d-cache
to memory, nor invalidate i-cache before we jump to RAM.
When the system has cache enabled and the TLB/page attribute
of system memory is cacheable, it will cause issues.
- 83xx family is using the d-cache lock, so all of d-cache
access is cache-inhibited. so you can't see the issue.
- 85xx family is using d-cache, i-cache enable, partial
cache lock. you will see the issue.
This patch fixes the cache issue.
Signed-off-by: Dave Liu <daveliu@freescale.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
Nishanth Menon [Sat, 13 Dec 2008 15:43:06 +0000 (09:43 -0600)]
NAND: Enable nand lock, unlock feature
Enable nand lock, unlock and status of lock feature.
Not every device and platform requires this, hence,
it is under define for CONFIG_CMD_NAND_LOCK_UNLOCK
Nand unlock and status operate on block boundary instead
of page boundary. Details in:
http://www.micron.com/products/partdetail?part=MT29C2G24MAKLAJG-6%20IT
Intial solution provided by Vikram Pandita <vikram.pandita@ti.com>
Includes preliminary suggestions from Scott Wood
Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
Mike Frysinger [Sat, 6 Dec 2008 07:40:55 +0000 (02:40 -0500)]
NAND: move board_nand_init to nand.h
Rather than putting the function prototype for board_nand_init() in the one
place where it gets called, put it into nand.h so that every place that also
defines it gets the prototype. Otherwise, errors can go silently unnoticed
such as using the wrong return value (void rather than int) when defining
the function.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Signed-off-by: Scott Wood <scottwood@freescale.com>
Stefan Roese [Tue, 2 Dec 2008 10:06:47 +0000 (11:06 +0100)]
OneNAND: Additional sync with 2.6.27
- Add subpage write support
- Add onenand_oob_64/32 ecclayout
This has been missing and without it UBI has some incompatibilies issues
with the current (>= 2.6.27) Linux kernel version. vid_hdr_offset is
placed differently (2048 instead of 512) without this fix.
Signed-off-by: Stefan Roese <sr@denx.de>
Signed-off-by: Scott Wood <scottwood@freescale.com>
Kyungmin Park [Thu, 13 Nov 2008 06:14:33 +0000 (15:14 +0900)]
Add markbad function
Add missing markbad function
If not, it's hang when it entered the mtd->mark_bad().
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Stefan Roese [Wed, 12 Nov 2008 12:47:24 +0000 (13:47 +0100)]
OneNAND: Bad block aware read/write command support
Update OneNAND command to support bad block awareness.
Also change the OneNAND command style to better match the
NAND version.
Signed-off-by: Stefan Roese <sr@denx.de>
Acked-by: Kyungmin Park <kyungmin.park@samsung.com>
Stefan Roese [Tue, 11 Nov 2008 09:29:09 +0000 (10:29 +0100)]
OneNAND: Save version_id in onenand_chip struct
The version (ver_id) was not stored in the onenand_chip structure and
because of this the continuous locking scheme could be enabled on some
chips.
Signed-off-by: Stefan Roese <sr@denx.de>
Stefan Roese [Tue, 11 Nov 2008 09:28:53 +0000 (10:28 +0100)]
OneNAND: Fix compiler warnings
Signed-off-by: Stefan Roese <sr@denx.de>
Dave Liu [Tue, 4 Nov 2008 06:55:06 +0000 (14:55 +0800)]
mpc83xx: enable eLBC NAND support for MPC8315ERDB board
Signed-off-by: Dave Liu <daveliu@freescale.com>
Kyungmin Park [Tue, 4 Nov 2008 00:24:07 +0000 (09:24 +0900)]
Sync with 2.6.27
Sync with OneNAND kernel codes
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Michal Simek [Mon, 5 Jan 2009 12:35:31 +0000 (13:35 +0100)]
microblaze: Use cache functions (especially cache status)
in systems which are configured without flash
Michal Simek [Mon, 5 Jan 2009 12:29:32 +0000 (13:29 +0100)]
microblaze: Add cache flush
Michal Simek [Mon, 5 Jan 2009 12:28:40 +0000 (13:28 +0100)]
microblaze: Add bootup messages to board.c
Michal Simek [Fri, 19 Dec 2008 12:25:55 +0000 (13:25 +0100)]
microblaze: Change microblaze-generic config file
Signed-off-by: Michal Simek <monstr@monstr.eu>
Michal Simek [Fri, 19 Dec 2008 12:14:05 +0000 (13:14 +0100)]
microblaze: Rename ml401 to microblaze-generic
Signed-off-by: Michal Simek <monstr@monstr.eu>
Haavard Skinnemoen [Thu, 22 Jan 2009 10:11:09 +0000 (11:11 +0100)]
Merge branch 'fixes'
Scott Wood [Tue, 20 Jan 2009 17:56:11 +0000 (11:56 -0600)]
83xx: Use the proper sequence for updating IMMR.
This ensures that subsequent accesses properly hit the new window.
The dcbi during the NAND loop was accidentally working around this;
it's no longer necessary, as the cache is not enabled.
Reported-by: Suchit Lepcha <Suchit.Lepcha@freescale.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Anton Vorontsov [Thu, 8 Jan 2009 01:26:19 +0000 (04:26 +0300)]
mpc83xx: Add PCI-E support for MPC837XEMDS boards
MPC837XEMDS boards can support PCI-E via "PCI-E riser card". The card
provides two PCI-E (x2) ports. Though, only one port can be used in x2
mode. Two ports can function simultaneously in x1 mode.
PCI-E x1/x2 modes can be switched via "pex_x2" environment variable.
Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Anton Vorontsov [Thu, 8 Jan 2009 01:26:17 +0000 (04:26 +0300)]
mpc83xx: Add PCI-E support for MPC8315ERDB boards
MPC8315ERDB boards features PCI-E x1 and Mini PCI-E x1 ports. Let's
support them.
Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Anton Vorontsov [Thu, 8 Jan 2009 01:26:12 +0000 (04:26 +0300)]
mpc83xx: Add support for MPC83xx PCI-E controllers
This patch adds support for MPC83xx PCI-E controllers in Root Complex
mode.
The patch is based on Tony Li and Dave Liu work[1].
Though unlike the original patch, by default we don't register PCI-E
buses for use in U-Boot, we only configure the controllers for future
use in other OSes (Linux). This is done because we don't have enough
of spare BATs to map all the PCI-E regions.
To actually use PCI-E in U-Boot, users should explicitly define
CONFIG_83XX_GENERIC_PCIE_REGISTER_HOSES symbol in the board file. And
only then U-Boot will able to access PCI-E, but at the cost of disabled
address translation.
[1] http://lists.denx.de/pipermail/u-boot/2008-January/027630.html
Signed-off-by: Tony Li <tony.li@freescale.com>
Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Acked-by: Dave Liu <daveliu@freescale.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Ira Snyder [Mon, 12 Jan 2009 21:33:17 +0000 (13:33 -0800)]
MPC8349EMDS: do not setup unused PCI clock outputs in PCI agent mode
When running in PCI agent mode, the PCI_CLK_OUT signals are not used, so do
not enable them. See the MPC8349EA Reference Manual, Section 4.4.2
"Clocking in PCI Agent Mode".
Signed-off-by: Ira W. Snyder <iws@ovro.caltech.edu>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Ira Snyder [Mon, 12 Jan 2009 21:32:26 +0000 (13:32 -0800)]
83xx: PCI agent mode fixes for multi-board systems
When running a system with 2 or more MPC8349EMDS boards in PCI agent mode,
the boards will lock up the PCI bus by scanning against each other.
The boards lock against each other by trying to access the PCI bus before
clearing their configuration lock bit. Both boards end up in a loop,
sending and receiving "Target Not Ready" messages forever.
When running in PCI agent mode, the scanning now takes place after the
boards have cleared their configuration lock bit.
Also, add a missing declaration to the mpc83xx.h header file, fixing a
build warning.
Signed-off-by: Ira W. Snyder <iws@ovro.caltech.edu>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Ron Madrid [Fri, 12 Dec 2008 21:12:45 +0000 (13:12 -0800)]
mpc83xx: Size optimization of start.S
Currently there are in excess of 100 bytes located at the beginning of the image
built by start.S that are not being utilized. This patch moves a few functions
into this part of the image. This will create a greater number of *available*
bytes that can be used by board specific code in NAND builds and will decrease
the size of the assembled code in other builds.
Signed-off-by: Ron Madrid <ron_madrid@sbcglobal.net>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Kim Phillips [Thu, 22 Jan 2009 00:38:51 +0000 (18:38 -0600)]
Merge branch 'master' into next
Wolfgang Denk [Wed, 21 Jan 2009 22:08:12 +0000 (23:08 +0100)]
Prepare v2009.01
Signed-off-by: Wolfgang Denk <wd@denx.de>
Wolfgang Denk [Sun, 18 Jan 2009 20:37:48 +0000 (21:37 +0100)]
Prepare 2009.01-rc3
Update CHANGELOG
Signed-off-by: Wolfgang Denk <wd@denx.de>
Wolfgang Denk [Sun, 18 Jan 2009 20:11:05 +0000 (21:11 +0100)]
Merge branch 'master' of /home/wd/git/u-boot/custodians
Mike Frysinger [Sat, 17 Jan 2009 18:32:42 +0000 (13:32 -0500)]
build system: treat all Darwin's alike
The x86 based version of Darwin behaves the same quirky way as the powerpc
Darwin, so only check HOSTOS when setting up Darwin workarounds.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Peter Korsgaard [Wed, 14 Jan 2009 12:52:24 +0000 (13:52 +0100)]
fdt_resize(): fix actualsize calculations with unaligned blobs
The code in fdt_resize() to extend the fdt size to end on a page boundary
is wrong for fdt's not located at an address aligned on a page boundary.
What's even worse, the code would make actualsize shrink rather than grow
if (blob & 0xfff) was bigger than the amount of padding added by ALIGN(),
causing fdt_add_mem_rsv to fail.
Fix it by aligning end address (blob + size) to a page boundary instead.
For aligned fdt's this is equivalent to what we had before.
Signed-off-by: Peter Korsgaard <jacmet@sunsite.dk>
Mike Frysinger [Fri, 9 Jan 2009 09:38:17 +0000 (04:38 -0500)]
ncb: use socklen_t
The recvfrom() function takes a socklen_t, not an int.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Wolfgang Denk [Fri, 16 Jan 2009 08:22:25 +0000 (09:22 +0100)]
Merge branch 'master' of git://git.denx.de/u-boot-sh
Wolfgang Denk [Fri, 16 Jan 2009 08:17:53 +0000 (09:17 +0100)]
Merge branch 'master' of git://git.denx.de/u-boot-ppc4xx
Jean-Christophe PLAGNIOL-VILLARD [Sun, 11 Jan 2009 15:35:16 +0000 (16:35 +0100)]
sh: serial: use readx/writex accessors
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Jean-Christophe PLAGNIOL-VILLARD [Sun, 11 Jan 2009 15:35:15 +0000 (16:35 +0100)]
sh: serial: coding style cleanup
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Nobuhiro Iwamatsu [Sun, 11 Jan 2009 08:48:56 +0000 (17:48 +0900)]
sh: Fix compile error on lowlevel_init file
lowlevel_init of SH was corrected to use the write/readXX macro.
However, there was a problem that was not able to be compiled partially.
This patch corrected this.
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Kieran Bingham [Tue, 30 Dec 2008 01:16:03 +0000 (01:16 +0000)]
sh: Fix up rsk7203 target for out of tree build
Fix up rsk7203 target to build successfully using out-of-tree build.
Signed-off-by: Kieran Bingham <kbingham@mpc-data.co.uk>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Jean-Christophe PLAGNIOL-VILLARD [Sat, 20 Dec 2008 18:29:49 +0000 (19:29 +0100)]
sh: use write{8,16,32} in all lowlevel_init
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Jean-Christophe PLAGNIOL-VILLARD [Sat, 20 Dec 2008 18:29:48 +0000 (19:29 +0100)]
sh: lowlevel_init coding style cleanup
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Jean-Christophe PLAGNIOL-VILLARD [Sat, 20 Dec 2008 14:27:45 +0000 (15:27 +0100)]
sh: update sh2/sh2a timer coding style
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Jean-Christophe PLAGNIOL-VILLARD [Sat, 20 Dec 2008 14:25:22 +0000 (15:25 +0100)]
sh: update sh timer coding style
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Wolfgang Denk [Wed, 14 Jan 2009 22:26:05 +0000 (23:26 +0100)]
Prepare 2009.01-rc2
Update CHANGELOG.
Signed-off-by: Wolfgang Denk <wd@denx.de>
Wolfgang Denk [Wed, 14 Jan 2009 21:35:30 +0000 (22:35 +0100)]
cpu/mpc824x/Makefile: fix warning with parallel builds
Parallel builds would occasionally issue this build warning:
ln: creating symbolic link `cpu/mpc824x/bedbug_603e.c': File exists
Use "ln -sf" as quick work around for the issue.
Signed-off-by: Wolfgang Denk <wd@denx.de>
Matthias Fuchs [Fri, 2 Jan 2009 11:18:49 +0000 (12:18 +0100)]
ppc4xx: Add loadpci command to esd's CPCI4052 and CPCI405AB boards
This patch adds esd's loadpci BSP command to CPCI4052 and
CPCI405AB board. This requires CONFIG_CMD_BSP and CONFIG_PRAM.
Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Matthias Fuchs [Fri, 2 Jan 2009 11:18:12 +0000 (12:18 +0100)]
ppc4xx: Disable pci node in device tree on CPCI405 pci adapters
Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Matthias Fuchs [Fri, 2 Jan 2009 11:17:36 +0000 (12:17 +0100)]
ppc4xx: Cleanup CPCI405 board code
This patch cleans up CPCI405 board support:
- wrap long lines
- unification of spaces in function calls
- remove dead code
Use correct io accessors on peripherals.
Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Matthias Fuchs [Fri, 2 Jan 2009 11:16:35 +0000 (12:16 +0100)]
ppc4xx: Enable auto RS485 mode on PLU405 boards
This patch turns on the auto RS485 mode in the 2nd external
uart on PLU405 boards. This is a special mode of the used
Exar XR16C2850 uart. Because these boards only have a 485 physical
layer connected it's a good idea to turn it on by default.
Signed-off-by: Matthias Fuchs <mf@esd.eu>
Signed-off-by: Stefan Roese <sr@denx.de>