Arnd Bergmann [Fri, 17 Jul 2020 13:36:23 +0000 (15:36 +0200)]
Merge tag 'renesas-arm-dt-for-v5.9-tag2' of git://git./linux/kernel/git/geert/renesas-devel into arm/dt
Renesas ARM DT updates for v5.9 (take two)
- SPI Multi I/O Bus Controller (RPC-IF) support for R-Car V3H and V3M,
including QSPI support for the Condor, Eagle, V3HSK, and V3MSK
boards,
- Initial support for the RZ/G2H SoC on the HopeRun HiHope RZ/G2H
board,
- Initial support for the Beacon EmbeddedWorks RZ/G2M board,
- Minor fixes and improvements.
* tag 'renesas-arm-dt-for-v5.9-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel: (34 commits)
ARM: dts: sh73a0: Add missing clocks to sound node
arm64: dts: renesas: r8a774e1: Add CAN[FD] support
arm64: dts: renesas: r8a774e1: Add RWDT node
arm64: dts: renesas: r8a774e1: Add MSIOF nodes
arm64: dts: renesas: r8a774e1: Add I2C and IIC-DVFS support
arm64: dts: renesas: r8a774e1: Add SDHI nodes
arm64: dts: renesas: r8a774e1: Add SCIF and HSCIF nodes
arm64: dts: renesas: r8a774e1: Add TMU device nodes
arm64: dts: renesas: r8a774e1: Add CMT device nodes
arm64: dts: renesas: r8a774e1: Add RZ/G2H thermal support
arm64: dts: renesas: r8a774e1: Add operating points
arm64: dts: renesas: Introduce r8a774a1-beacon-rzg2m-kit
arm64: dts: renesas: r8a774e1: Add Ethernet AVB node
arm64: dts: renesas: r8a774e1: Add GPIO device nodes
arm64: dts: renesas: r8a774e1: Add SYS-DMAC device nodes
arm64: dts: renesas: r8a774e1: Add IPMMU device nodes
ARM: dts: gose: Fix ports node name for adv7612
ARM: dts: renesas: Fix SD Card/eMMC interface device node names
arm64: dts: renesas: Fix SD Card/eMMC interface device node names
arm64: dts: renesas: add full-pwr-cycle-in-suspend into eMMC nodes
...
Link: https://lore.kernel.org/r/20200717112427.26032-2-geert+renesas@glider.be
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Geert Uytterhoeven [Tue, 19 May 2020 07:55:25 +0000 (09:55 +0200)]
ARM: dts: sh73a0: Add missing clocks to sound node
The device node for the FIFO-buffered Serial Interface sound node lacks
the "clocks" property, as the DTS file didn't describe any clocks yet at
its introduction.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20200519075525.24742-1-geert+renesas@glider.be
Lad Prabhakar [Wed, 15 Jul 2020 11:09:10 +0000 (12:09 +0100)]
arm64: dts: renesas: r8a774e1: Add CAN[FD] support
Add CAN[01] and CANFD support to RZ/G2H (R8A774E1) SoC specific dtsi.
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@bp.renesas.com>
Link: https://lore.kernel.org/r/1594811350-14066-21-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Lad Prabhakar [Wed, 15 Jul 2020 11:09:07 +0000 (12:09 +0100)]
arm64: dts: renesas: r8a774e1: Add RWDT node
Add a device node for the Watchdog Timer (RWDT) controller on the Renesas
RZ/G2H (r8a774e1) SoC.
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@bp.renesas.com>
Link: https://lore.kernel.org/r/1594811350-14066-18-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Lad Prabhakar [Wed, 15 Jul 2020 11:09:05 +0000 (12:09 +0100)]
arm64: dts: renesas: r8a774e1: Add MSIOF nodes
Add the DT nodes needed by MSIOF[0123] interfaces to the SoC dtsi.
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@bp.renesas.com>
Link: https://lore.kernel.org/r/1594811350-14066-16-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Lad Prabhakar [Wed, 15 Jul 2020 11:09:03 +0000 (12:09 +0100)]
arm64: dts: renesas: r8a774e1: Add I2C and IIC-DVFS support
Add the I2C[0-6] and IIC Bus Interface for DVFS (IIC for DVFS)
devices nodes to the r8a774e1 device tree.
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@bp.renesas.com>
Link: https://lore.kernel.org/r/1594811350-14066-14-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Lad Prabhakar [Wed, 15 Jul 2020 11:09:00 +0000 (12:09 +0100)]
arm64: dts: renesas: r8a774e1: Add SDHI nodes
Add SDHI[0-2] device nodes to R8A774E1 SoC.
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@bp.renesas.com>
Link: https://lore.kernel.org/r/1594811350-14066-11-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Lad Prabhakar [Wed, 15 Jul 2020 11:08:59 +0000 (12:08 +0100)]
arm64: dts: renesas: r8a774e1: Add SCIF and HSCIF nodes
Add the device nodes for RZ/G2H SCIF and HSCIF serial ports,
including clocks, power domains and DMAs.
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@bp.renesas.com>
Link: https://lore.kernel.org/r/1594811350-14066-10-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Marian-Cristian Rotariu [Wed, 15 Jul 2020 11:08:58 +0000 (12:08 +0100)]
arm64: dts: renesas: r8a774e1: Add TMU device nodes
This patch adds TMU[01234] device tree nodes to the r8a774e1
SoC specific DT.
Signed-off-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@bp.renesas.com>
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/1594811350-14066-9-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Marian-Cristian Rotariu [Wed, 15 Jul 2020 11:08:56 +0000 (12:08 +0100)]
arm64: dts: renesas: r8a774e1: Add CMT device nodes
This patch adds the CMT[0123] device tree nodes to the
r8a774e1 SoC specific DT.
Signed-off-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@bp.renesas.com>
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/1594811350-14066-7-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Marian-Cristian Rotariu [Wed, 15 Jul 2020 11:08:54 +0000 (12:08 +0100)]
arm64: dts: renesas: r8a774e1: Add RZ/G2H thermal support
Add thermal support for R8A774E1 (RZ/G2H) SoC.
Based on the work done for r8a774a1 SoC.
Signed-off-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@bp.renesas.com>
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/1594811350-14066-5-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Marian-Cristian Rotariu [Wed, 15 Jul 2020 11:08:51 +0000 (12:08 +0100)]
arm64: dts: renesas: r8a774e1: Add operating points
The RZ/G2H (r8a774e1) comes with two clusters of processors, similarly to
the r8a774a1. The first cluster is made of A57s, the second cluster is made
of A53s.
The operating points for the cluster with the A57s are:
Frequency | Voltage
----------|---------
500 MHz | 0.82V
1.0 GHz | 0.82V
1.5 GHz | 0.82V
The operating points for the cluster with the A53s are:
Frequency | Voltage
----------|---------
800 MHz | 0.82V
1.0 GHz | 0.82V
1.2 GHz | 0.82V
This patch adds the definitions for the operating points to the SoC
specific DT.
Signed-off-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@bp.renesas.com>
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/1594811350-14066-2-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Adam Ford [Wed, 15 Jul 2020 14:06:21 +0000 (09:06 -0500)]
arm64: dts: renesas: Introduce r8a774a1-beacon-rzg2m-kit
Beacon EmebeddedWorks, formerly Logic PD is introducing a new
SOM and development kit based on the RZ/G2M SoC from Renesas.
The SOM supports eMMC, WiFi and Bluetooth, along with a Cat-M1
cellular radio.
The Baseboard has Ethernet, USB, HDMI, stereo audio in and out,
along with a variety of push buttons and LED's, and support for
a parallel RGB and an LVDS display.
Signed-off-by: Adam Ford <aford173@gmail.com>
Link: https://lore.kernel.org/r/20200715140622.1295370-1-aford173@gmail.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Marian-Cristian Rotariu [Mon, 13 Jul 2020 21:35:20 +0000 (22:35 +0100)]
arm64: dts: renesas: r8a774e1: Add Ethernet AVB node
This patch adds the SoC specific part of the Ethernet AVB
device tree node.
Signed-off-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@bp.renesas.com>
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/1594676120-5862-10-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Marian-Cristian Rotariu [Mon, 13 Jul 2020 21:35:18 +0000 (22:35 +0100)]
arm64: dts: renesas: r8a774e1: Add GPIO device nodes
Add GPIO device nodes to the DT of the r8a774e1 SoC.
Signed-off-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@bp.renesas.com>
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/1594676120-5862-8-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Marian-Cristian Rotariu [Mon, 13 Jul 2020 21:35:16 +0000 (22:35 +0100)]
arm64: dts: renesas: r8a774e1: Add SYS-DMAC device nodes
Add sys-dmac[0-2] device nodes for RZ/G2H (R8A774E1) SoC.
Signed-off-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@bp.renesas.com>
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/1594676120-5862-6-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Marian-Cristian Rotariu [Mon, 13 Jul 2020 21:35:14 +0000 (22:35 +0100)]
arm64: dts: renesas: r8a774e1: Add IPMMU device nodes
Add RZ/G2H (R8A774E1) IPMMU nodes.
Signed-off-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@bp.renesas.com>
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/1594676120-5862-4-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Niklas Söderlund [Mon, 13 Jul 2020 11:10:16 +0000 (13:10 +0200)]
ARM: dts: gose: Fix ports node name for adv7612
When adding the adv7612 device node the ports node was misspelled as
port, fix this.
Fixes:
bc63cd87f3ce924f ("ARM: dts: gose: add HDMI input")
Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Link: https://lore.kernel.org/r/20200713111016.523189-1-niklas.soderlund+renesas@ragnatech.se
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Yoshihiro Shimoda [Fri, 10 Jul 2020 12:08:56 +0000 (21:08 +0900)]
ARM: dts: renesas: Fix SD Card/eMMC interface device node names
Fix the device node names as "mmc@".
Fixes:
66474697923c ("ARM: dts: r7s72100: add sdhi to device tree")
Fixes:
a49f76cddaee ("ARM: dts: r7s9210: Add SDHI support")
Fixes:
43304a5f5106 ("ARM: shmobile: r8a73a4: tidyup DT node naming")
Fixes:
7d907894bfe3 ("ARM: shmobile: r8a7740: tidyup DT node naming")
Fixes:
3ab2ea5fd1ce ("ARM: dts: r8a7742: Add SDHI nodes")
Fixes:
63ce8a617b51 ("ARM: dts: r8a7743: Add SDHI controllers")
Fixes:
b591e323b271 ("ARM: dts: r8a7744: Add SDHI nodes")
Fixes:
d83010f87ab3 ("ARM: dts: r8a7744: Initial SoC device tree")
Fixes:
7079131ef9b9 ("ARM: dts: r8a7745: Add SDHI controllers")
Fixes:
0485da788028 ("ARM: dts: r8a77470: Add SDHI1 support")
Fixes:
15aa5a95e820 ("ARM: dts: r8a77470: Add SDHI0 support")
Fixes:
f068cc816015 ("ARM: dts: r8a77470: Add SDHI2 support")
Fixes:
14e1d9147d96 ("ARM: shmobile: r8a7778: tidyup DT node naming")
Fixes:
2624705ceb7b ("ARM: shmobile: r8a7779: tidyup DT node naming")
Fixes:
b718aa448378 ("ARM: shmobile: r8a7790: tidyup DT node naming")
Fixes:
b7ed8a0dd4f1 ("ARM: shmobile: Add SDHI devices to r8a7791 DTSI")
Fixes:
ce01b14ecf19 ("ARM: dts: r8a7792: add SDHI support")
Fixes:
fc9ee228f500 ("ARM: dts: r8a7793: Add SDHI controllers")
Fixes:
b8e8ea127d00 ("ARM: shmobile: r8a7794: add SDHI DT support")
Fixes:
33f6be3bf6b7 ("ARM: shmobile: sh73a0: tidyup DT node naming")
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Link: https://lore.kernel.org/r/1594382936-14114-1-git-send-email-yoshihiro.shimoda.uh@renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Yoshihiro Shimoda [Fri, 10 Jul 2020 12:03:54 +0000 (21:03 +0900)]
arm64: dts: renesas: Fix SD Card/eMMC interface device node names
Fix the device node names as "mmc@".
Fixes:
663386c3e1aa ("arm64: dts: renesas: r8a774a1: Add SDHI nodes")
Fixes:
9b33e3001b67 ("arm64: dts: renesas: Initial r8a774b1 SoC device tree")
Fixes:
77223211f44d ("arm64: dts: renesas: r8a774c0: Add SDHI nodes")
Fixes:
d9d67010e0c6 ("arm64: dts: r8a7795: Add SDHI support to dtsi")
Fixes:
a513cf1e6457 ("arm64: dts: r8a7796: add SDHI nodes")
Fixes:
111cc9ace2b5 ("arm64: dts: renesas: r8a77961: Add SDHI nodes")
Fixes:
f51746ad7d1f ("arm64: dts: renesas: Add Renesas R8A77961 SoC support")
Fixes:
df863d6f95f5 ("arm64: dts: renesas: initial R8A77965 SoC device tree")
Fixes:
9aa3558a02f0 ("arm64: dts: renesas: ebisu: Add and enable SDHI device nodes")
Fixes:
83f18749c2f6 ("arm64: dts: renesas: r8a77995: Add SDHI (MMC) support")
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Link: https://lore.kernel.org/r/1594382634-13714-1-git-send-email-yoshihiro.shimoda.uh@renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Yoshihiro Shimoda [Fri, 10 Jul 2020 12:03:32 +0000 (21:03 +0900)]
arm64: dts: renesas: add full-pwr-cycle-in-suspend into eMMC nodes
Add full-pwr-cycle-in-suspend property to do a graceful shutdown of
the eMMC device in system suspend.
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Link: https://lore.kernel.org/r/1594382612-13664-1-git-send-email-yoshihiro.shimoda.uh@renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Marian-Cristian Rotariu [Wed, 8 Jul 2020 17:48:31 +0000 (18:48 +0100)]
arm64: dts: renesas: Add HiHope RZ/G2H sub board support
The HiHope RZ/G2H sub board sits below the HiHope RZ/G2H main board.
These boards are identical with the ones for RZ/G2M[N].
Signed-off-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@bp.renesas.com>
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/1594230511-24790-9-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Marian-Cristian Rotariu [Wed, 8 Jul 2020 17:48:30 +0000 (18:48 +0100)]
arm64: dts: renesas: Add HiHope RZ/G2H main board support
Basic support for the HiHope RZ/G2H main board:
- Memory,
- Main crystal,
- Serial console
- eMMC
Signed-off-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@bp.renesas.com>
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/1594230511-24790-8-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Marian-Cristian Rotariu [Wed, 8 Jul 2020 17:48:29 +0000 (18:48 +0100)]
arm64: dts: renesas: Initial r8a774e1 SoC device tree
Basic support for the RZ/G2H SoC.
Signed-off-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@bp.renesas.com>
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/1594230511-24790-7-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Marian-Cristian Rotariu [Wed, 8 Jul 2020 17:48:28 +0000 (18:48 +0100)]
arm64: defconfig: Enable R8A774E1 SoC
Enable the Renesas RZ/G2H (R8A774E1) SoC in the ARM64 defconfig.
Signed-off-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@bp.renesas.com>
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/1594230511-24790-6-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Geert Uytterhoeven [Fri, 17 Jul 2020 08:57:49 +0000 (10:57 +0200)]
Merge tag 'renesas-r8a774e1-dt-binding-defs-tag' into renesas-arm-dt-for-v5.9
Renesas RZ/G2H DT Binding Definitions
Clock and Power Domain definitions for the Renesas RZ/G2H (R8A774E1)
SoC, shared by driver and DT source files.
Arnd Bergmann [Thu, 16 Jul 2020 20:37:43 +0000 (22:37 +0200)]
Merge tag 'v5.8-next-dts64' of git://git./linux/kernel/git/matthias.bgg/linux into arm/dt
mt8173:
- update dmips for Cortex A53
mt8183:
- add pericfg
- fix unit names
- add nodes for USB support
- add basic support for Lenovo IdeaPad Duet 10.1" Chromebook
* tag 'v5.8-next-dts64' of git://git.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux:
arm64: dts: mt8183: Add krane-sku176 board
arm64: dts: mt8183: Add USB3.0 support
arm64: dts: mt8183-evb: Fix unit name warnings
arm64: dts: mt8183: Fix unit name warnings
arm64: dts: mt8183: Add MediaTek's peripheral configuration controller
arm64: dts: mt6358: Add the compatible for the regulators
dt-bindings: arm64: dts: mediatek: Add mt8183-kukui-krane-sku176
arm64: dts: mt8173: Re-measure capacity-dmips-mhz
Link: https://lore.kernel.org/r/0b7109c7-7bd2-7373-6032-e9a452d2ebc9@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Thu, 16 Jul 2020 20:36:35 +0000 (22:36 +0200)]
Merge tag 'omap-for-v5.9/dt-pt2-signed' of git://git./linux/kernel/git/tmlind/linux-omap into arm/dt
More dts changes for omaps for v5.9
A series of changes to configure IPU and DSP remoteproc for omap4 & 5.
And a change to configure the default mux for am335x-pocketbeagle, and
a change to use https for external links.
* tag 'omap-for-v5.9/dt-pt2-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
Replace HTTP links with HTTPS ones: OMAP DEVICE TREE SUPPORT
ARM: dts: omap5-uevm: Add watchdog timers for IPU and DSP
ARM: dts: omap4-panda-common: Add watchdog timers for IPU and DSP
ARM: dts: omap5-uevm: Add system timers to DSP and IPU
ARM: dts: omap5-uevm: Add CMA pools and enable IPU & DSP
ARM: dts: omap5: Add aliases for rproc nodes
ARM: dts: omap5: Add DSP and IPU nodes
ARM: dts: omap4-panda-common:: Add system timers to DSP and IPU
ARM: dts: omap4-panda-common: Add CMA pools and enable IPU & DSP
ARM: dts: omap4: Add aliases for rproc nodes
ARM: dts: omap4: Add IPU DT node
ARM: dts: omap4: Update the DSP node
ARM: dts: omap5: Add timer_sys_ck clocks for timers
ARM: dts: omap4: Add timer_sys_ck clocks for timers
ARM: dts: am335x-pocketbeagle: set default mux for gpio pins
Link: https://lore.kernel.org/r/pull-1594838111-649880@atomide.com-3
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Thu, 16 Jul 2020 20:13:53 +0000 (22:13 +0200)]
Merge tag 'omap-for-v5.9/ti-sysc-drop-pdata-take2-signed' of git://git./linux/kernel/git/tmlind/linux-omap into arm/dt
Drop more legacy platform data for omaps for v5.9
A series of changes to drop remaining USB platform data for omap4/5,
and am4, and dra7.
And a patch to drop AES platform data for omap3.
* tag 'omap-for-v5.9/ti-sysc-drop-pdata-take2-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: OMAP2+: Drop legacy platform data for omap5 usb host
ARM: OMAP2+: Drop legacy platform data for omap4 usb
ARM: OMAP2+: Drop legacy platform data for dra7 dwc3
ARM: OMAP2+: Drop legacy platform data for omap5 dwc3
ARM: OMAP2+: Drop legacy platform data for am4 dwc3
bus: ti-sysc: Add missing quirk flags for usb_host_hs
ARM: dts: omap3: Migrate AES from hwmods to sysc-omap2
Link: https://lore.kernel.org/r/pull-1594838111-649880@atomide.com-2
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Geert Uytterhoeven [Mon, 6 Jul 2020 15:40:15 +0000 (17:40 +0200)]
arm64: dts: renesas: Restructure Makefile
Make the Makefile for building Renesas DTB files easier to read and
maintain:
- Get rid of line continuations,
- Use a single entry per line,
- Sort SoCs and boards alphabetically,
- Separate SoCs by blank lines.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Link: https://lore.kernel.org/r/20200706154015.29257-1-geert+renesas@glider.be
Geert Uytterhoeven [Mon, 6 Jul 2020 15:14:00 +0000 (17:14 +0200)]
arm64: dts: renesas: cat875: Drop superfluous phy-mode
The PHY mode already defaults to RGMII in the RZ/G2E base SoC DTS file,
so there is no need to specify the same value in board files.
Fixes:
6b170cd3ed02949f ("arm64: dts: renesas: cat875: Add ethernet support")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/20200706151400.23105-1-geert+renesas@glider.be
Niklas Söderlund [Sat, 4 Jul 2020 15:58:56 +0000 (17:58 +0200)]
ARM: dts: renesas: Remove unused remote property from adv7180 nodes
The remote property is never read by the driver, remove it.
Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Link: https://lore.kernel.org/r/20200704155856.3037010-3-niklas.soderlund+renesas@ragnatech.se
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Niklas Söderlund [Sat, 4 Jul 2020 15:58:55 +0000 (17:58 +0200)]
ARM: dts: gose: Fix ports node name for adv7180
When adding the adv7180 device node the ports node was misspelled as
port, fix this.
Fixes:
8cae359049a88b75 ("ARM: dts: gose: add composite video input")
Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Link: https://lore.kernel.org/r/20200704155856.3037010-2-niklas.soderlund+renesas@ragnatech.se
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Tony Lindgren [Mon, 13 Jul 2020 16:59:49 +0000 (09:59 -0700)]
ARM: OMAP2+: Drop legacy platform data for omap5 usb host
We can now probe devices with ti-sysc interconnect driver and dts
data. Let's drop the related platform data and custom ti,hwmods
dts property.
As we're just dropping data, and the early platform data init
is based on the custom ti,hwmods property, we want to drop both
the platform data and ti,hwmods property in a single patch.
Signed-off-by: Tony Lindgren <tony@atomide.com>
Tony Lindgren [Mon, 13 Jul 2020 16:59:49 +0000 (09:59 -0700)]
ARM: OMAP2+: Drop legacy platform data for omap4 usb
We can now probe devices with ti-sysc interconnect driver and dts
data. Let's drop the related platform data and custom ti,hwmods
dts property.
As we're just dropping data, and the early platform data init
is based on the custom ti,hwmods property, we want to drop both
the platform data and ti,hwmods property in a single patch.
Signed-off-by: Tony Lindgren <tony@atomide.com>
Tony Lindgren [Mon, 13 Jul 2020 16:59:48 +0000 (09:59 -0700)]
ARM: OMAP2+: Drop legacy platform data for dra7 dwc3
We can now probe devices with ti-sysc interconnect driver and dts
data. Let's drop the related platform data and custom ti,hwmods
dts property.
As we're just dropping data, and the early platform data init
is based on the custom ti,hwmods property, we want to drop both
the platform data and ti,hwmods property in a single patch.
Signed-off-by: Tony Lindgren <tony@atomide.com>
Tony Lindgren [Mon, 13 Jul 2020 16:59:48 +0000 (09:59 -0700)]
ARM: OMAP2+: Drop legacy platform data for omap5 dwc3
We can now probe devices with ti-sysc interconnect driver and dts
data. Let's drop the related platform data and custom ti,hwmods
dts property.
As we're just dropping data, and the early platform data init
is based on the custom ti,hwmods property, we want to drop both
the platform data and ti,hwmods property in a single patch.
Signed-off-by: Tony Lindgren <tony@atomide.com>
Alexander A. Klimov [Wed, 8 Jul 2020 09:34:51 +0000 (11:34 +0200)]
Replace HTTP links with HTTPS ones: OMAP DEVICE TREE SUPPORT
Rationale:
Reduces attack surface on kernel devs opening the links for MITM
as HTTPS traffic is much harder to manipulate.
Deterministic algorithm:
For each file:
If not .svg:
For each line:
If doesn't contain `\bxmlns\b`:
For each link, `\bhttp://[^# \t\r\n]*(?:\w|/)`:
If neither `\bgnu\.org/license`, nor `\bmozilla\.org/MPL\b`:
If both the HTTP and HTTPS versions
return 200 OK and serve the same content:
Replace HTTP with HTTPS.
Signed-off-by: Alexander A. Klimov <grandmaster@al2klimov.de>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Suman Anna [Thu, 9 Jul 2020 23:19:54 +0000 (18:19 -0500)]
ARM: dts: omap5-uevm: Add watchdog timers for IPU and DSP
The watchdog timers have been added for the IPU and DSP remoteproc
devices for the OMAP5 uEVM board. The following timers (same as the
timers on OMAP4 Panda boards) are used as the watchdog timers,
DSP : GPT6
IPU : GPT9 & GPT11 (one for each Cortex-M4 core)
The MPU-side drivers will use this data to initialize the watchdog
timers, and listen for any watchdog triggers. The BIOS-side code
needs to configure and refresh these timers properly to not throw
a watchdog error.
These timers can be changed or removed as per the system integration
needs, alongside appropriate equivalent changes on the firmware side.
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Suman Anna [Thu, 9 Jul 2020 23:19:53 +0000 (18:19 -0500)]
ARM: dts: omap4-panda-common: Add watchdog timers for IPU and DSP
The watchdog timers have been added for the IPU and DSP remoteproc
devices on all the OMAP4-based Panda boards. The following timers
are used as the watchdog timers,
DSP : GPT6
IPU : GPT9 & GPT11 (one for each Cortex-M3 core)
The MPU-side drivers will use this data to initialize the watchdog
timers, and listen for any watchdog triggers. The BIOS-side code
needs to configure and refresh these timers properly to not throw
a watchdog error.
These timers can be changed or removed as per the system integration
needs, alongside appropriate equivalent changes on the firmware side.
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Suman Anna [Thu, 9 Jul 2020 23:19:52 +0000 (18:19 -0500)]
ARM: dts: omap5-uevm: Add system timers to DSP and IPU
The BIOS System Tick timers have been added for the IPU and DSP
remoteproc devices for the OMAP5 uEVM boards. The following timers
(same as the timers on OMAP4 Panda boards) are chosen:
IPU : GPT3 (SMP-mode)
DSP : GPT5
IPU has two Cortex-M4 processors, and is currently expected to be
running in SMP-mode, so only a single timer suffices to provide
the BIOS tick timer. An additional timer should be added for the
second processor in IPU if it were to be run in non-SMP mode. The
timer value also needs to be unique from the ones used by other
processors so that they can be run simultaneously.
The timers are optional, but are mandatory to support device
management features such as power management and watchdog support.
The above are added to successfully boot and execute firmware images
configured with the respective timers, images that use internal
processor subsystem timers are not affected. The timers can be
changed or removed as per the system integration needs, alongside
equivalent changes on the firmware side.
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Suman Anna [Thu, 9 Jul 2020 23:19:51 +0000 (18:19 -0500)]
ARM: dts: omap5-uevm: Add CMA pools and enable IPU & DSP
The CMA reserved memory nodes have been added for the IPU and DSP
remoteproc devices on the OMAP5 uEVM board. These nodes are assigned
to the respective rproc device nodes, and both the IPU and DSP remote
processors are enabled for this board.
The current CMA pools and sizes are defined statically for each device.
The starting addresses are fixed to meet current dependencies on the
remote processor firmwares, and will go away when the remote-side
code has been improved to gather this information runtime during
its initialization.
An associated pair of the rproc node and its CMA node can be disabled
later on if there is no use-case defined to use that remote processor.
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Suman Anna [Thu, 9 Jul 2020 23:19:50 +0000 (18:19 -0500)]
ARM: dts: omap5: Add aliases for rproc nodes
Add aliases for the DSP and IPU remoteproc processor
nodes common to all OMAP5 boards. The aliases uses
the stem "rproc", and are identical to the values
chosen on OMAP4 boards.
The aliases can be overridden, if needed, in the
respective board files.
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Suman Anna [Thu, 9 Jul 2020 23:19:49 +0000 (18:19 -0500)]
ARM: dts: omap5: Add DSP and IPU nodes
OMAP5, like OMAP4, also has two remote processor subsystems,
DSP and IPU. The IPU subsystem though has dual Cortex-M4
processors instead of the dual Cortex-M3 processors in OMAP4,
but otherwise has almost the same set of features. Add the
DT nodes for these two processor sub-systems for all OMAP5
SoCs.
The nodes have the 'iommus', 'clocks', 'resets', 'firmware' and
'mboxes' properties added, and are disabled for now. The IPU node
has its L2 RAM memory specified through the 'reg' and 'reg-names'
properties. The DSP node doesn't have these since it doesn't have
any L2 RAM memories, but has an additional 'ti,bootreg' property
instead as it has a specific boot register that needs to be
programmed for booting.
These nodes should be enabled as per the individual product
configuration in the corresponding board dts files.
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Suman Anna [Thu, 9 Jul 2020 23:19:48 +0000 (18:19 -0500)]
ARM: dts: omap4-panda-common:: Add system timers to DSP and IPU
The BIOS System Tick timers have been added for the IPU and DSP
remoteproc devices on all the OMAP4-based Panda boards. The
following DMTimers are chosen:
IPU : GPT3 (SMP-mode)
DSP : GPT5
IPU has two Cortex-M3 processors, and is currently expected to be
running in SMP-mode, so only a single timer suffices to provide
the BIOS tick timer. An additional timer should be added for the
second processor in IPU if it were to be run in non-SMP mode. The
timer value also needs to be unique from the ones used by other
processors so that they can be run simultaneously.
The timers are optional, but are mandatory to support device
management features such as power management and watchdog support.
The above are added to successfully boot and execute firmware images
configured with the respective timers, images that use internal
processor subsystem timers are not affected. The timers can be
changed or removed as per the system integration needs, alongside
equivalent changes on the firmware side.
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Suman Anna [Thu, 9 Jul 2020 23:19:47 +0000 (18:19 -0500)]
ARM: dts: omap4-panda-common: Add CMA pools and enable IPU & DSP
The CMA reserved memory nodes have been added for the IPU and DSP
remoteproc devices on all the OMAP4-based Panda boards. These nodes
are assigned to the respective rproc device nodes, and both the
IPU and DSP remote processors are enabled for all these boards.
The current CMA pools and sizes are defined statically for each device.
The starting addresses are fixed to meet current dependencies on the
remote processor firmwares, and will go away when the remote-side
code has been improved to gather this information runtime during
its initialization.
An associated pair of the rproc node and its CMA node can be disabled
later on if there is no use-case defined to use that remote processor.
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Suman Anna [Thu, 9 Jul 2020 23:19:46 +0000 (18:19 -0500)]
ARM: dts: omap4: Add aliases for rproc nodes
Add aliases for the DSP and IPU remoteproc processor
nodes common to all OMAP4 boards. The aliases uses
the stem "rproc".
The aliases can be overridden, if needed, in the
respective board files.
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Suman Anna [Thu, 9 Jul 2020 23:19:45 +0000 (18:19 -0500)]
ARM: dts: omap4: Add IPU DT node
The DT node for the Dual-Cortex M3 IPU processor sub-system has
been added for OMAP4 SoCs. The L2RAM memory region information
has been added to the node through the 'reg' and 'reg-names'
properties. The node has the 'iommus', 'clocks', 'resets',
'mboxes' and 'firmware' properties also added, and is disabled
for now. It should be enabled as per the individual product
configuration in the corresponding board dts files.
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Suman Anna [Thu, 9 Jul 2020 23:19:44 +0000 (18:19 -0500)]
ARM: dts: omap4: Update the DSP node
The compatible property for the DSP node is updated to match
the OMAP remoteproc bindings. The node is moved from the soc
node to the ocp node to better reflect the connectivity from
MPU side.
The node is updated with the 'ti,bootreg', 'clocks', 'resets',
'iommus', 'mboxes' and 'firmware' properties. Note that the
node does not have any 'reg' or 'reg-names' properties since
it doesn't have any L2 RAM memory, but only Unicaches.
The node is disabled for now, and should be enabled as per
the individual product configuration in the corresponding
board dts files.
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Suman Anna [Thu, 9 Jul 2020 23:19:43 +0000 (18:19 -0500)]
ARM: dts: omap5: Add timer_sys_ck clocks for timers
The commit
d41e53040926 ("clk: ti: omap5: cleanup unnecessary clock
aliases") has cleaned up all timer_sys_ck clock aliases and retained
only the timer_32k_ck clock alias. The OMAP clocksource timer driver
though still uses this clock alias when reconfiguring the parent
clock source for the timer functional clocks, so add these clocks
to all the timer nodes except for the always-on timers 1 and 12.
This is required by the OMAP remoteproc driver to successfully
acquire a timer and configure the source clock to be driven from
timer_sys_ck clock.
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Suman Anna [Thu, 9 Jul 2020 23:19:42 +0000 (18:19 -0500)]
ARM: dts: omap4: Add timer_sys_ck clocks for timers
The commit
1c7de9f27a65 ("clk: ti: omap4: cleanup unnecessary clock
aliases") has cleaned up all timer_sys_ck clock aliases and retained
only the timer_32k_ck clock alias. The OMAP clocksource timer driver
though still uses this clock alias when reconfiguring the parent
clock source for the timer functional clocks, so add these clocks
to all the timer nodes.
This is required by the OMAP remoteproc driver to successfully
acquire a timer and configure the source clock to be driven from
timer_sys_ck clock.
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Drew Fustini [Sun, 12 Jul 2020 10:37:19 +0000 (12:37 +0200)]
ARM: dts: am335x-pocketbeagle: set default mux for gpio pins
These pins on the PocketBeagle P1 and P2 headers are connected to AM3358
balls with gpio lines, and these pins are not used for any other
peripherals by default. These GPIO lines are unclaimed and could be used
by userspace program through the gpiod ABI.
This patch adds a "default" state in the am33xx_pinmux node and sets the
mux for those pins to gpio (mode 7) and input enable.
The "pinctrl-single,bias-pullup" and "pinctrl-single,bias-pulldown"
pinconf properties are also set for each pin per the ball reset state in
section 4.2 of the datasheet [0].
This is the AM335x pin control register format in Table 9-60 [1]:
bit attribute value
----------------------------------
31-7 reserved 0 on reset
6 slew { 0: fast, 1: slow }
5 rx_active { 0: rx disable, 1: rx enabled }
4 pu_typesel { 0: pulldown select, 1: pullup select }
3 puden { 0: pud enable, 1: disabled }
2 mode 3 bits to selec mode 0 to 7
1 mode
0 mode
The values for the bias pinconf properties are derived as follows:
pinctrl-single,bias-pullup = <[input] [enabled] [disable] [mask]>;
pinctrl-single,bias-pullup = < 0x10 0x10 0x10 0x18 >;
2^5 2^4 2^3 2^2 2^1 2^0 |
0x20 0x10 0x08 0x04 0x02 0x01 |
--------------------------------------------------|
input x 1 0 x x x | 0x10
enabled x 1 0 x x x | 0x10
disabled x 0 0 x x x | 0x00
mask x 1 1 x x x | 0x18
pinctrl-single,bias-pulldown = <[input] [enabled] [disable] [mask]>;
pinctrl-single,bias-pulldown = < 0x0 0x0 0x10 0x18 >;
2^5 2^4 2^3 2^2 2^1 2^0 |
0x20 0x10 0x08 0x04 0x02 0x01 |
--------------------------------------------------|
input x 0 0 x x x | 0x00
enabled x 0 0 x x x | 0x00
disabled x 1 0 x x x | 0x10
mask x 1 1 x x x | 0x18
[0] http://www.ti.com/lit/ds/symlink/am3358.pdf
[1] https://www.ti.com/lit/ug/spruh73q/spruh73q.pdf
Signed-off-by: Drew Fustini <drew@beagleboard.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Tony Lindgren [Mon, 13 Jul 2020 16:59:48 +0000 (09:59 -0700)]
ARM: OMAP2+: Drop legacy platform data for am4 dwc3
We can now probe devices with ti-sysc interconnect driver and dts
data. Let's drop the related platform data and custom ti,hwmods
dts property.
As we're just dropping data, and the early platform data init
is based on the custom ti,hwmods property, we want to drop both
the platform data and ti,hwmods property in a single patch.
[tony@atomide.com: fixed typo for am3 vs am4]
Signed-off-by: Tony Lindgren <tony@atomide.com>
Tony Lindgren [Mon, 13 Jul 2020 16:59:47 +0000 (09:59 -0700)]
bus: ti-sysc: Add missing quirk flags for usb_host_hs
Similar to what we have for the legacy platform data, we need to
configure SWSUP_SIDLE and SWSUP_MSTANDBY quirks for usb_host_hs.
These are needed to drop the legacy platform data for usb_host_hs.
Signed-off-by: Tony Lindgren <tony@atomide.com>
Arnd Bergmann [Mon, 13 Jul 2020 13:23:07 +0000 (15:23 +0200)]
Merge tag 'arm-soc/for-5.9/devicetree' of https://github.com/Broadcom/stblinux into arm/dt
This pull request contains Broadcom ARM-based SoCs Device Tree changes
for 5.9 please pull the following:
- Rafal specifies the switch ports for various Luxul devices (XAP-1410,
XAP-1510, XAP-1610, XWC-1000, XWC-2000, XWR-1200, XWR-3100, XWR-3150)
- Krzysztof fixes the L2 cache controller node name to conform to
dtschema
- Maxime introduces two new clock providers for Raspberry Pi 4, one to
support firmware based clocks and another one for the DVP block
feeding into the two HDMI blocks.
* tag 'arm-soc/for-5.9/devicetree' of https://github.com/Broadcom/stblinux:
ARM: dts: bcm: Align L2 cache-controller nodename with dtschema
ARM: dts: BCM5301X: Specify switch ports for Luxul devices
ARM: dts: bcm2711: Add HDMI DVP
ARM: dts: bcm2711: Add firmware clocks node
Link: https://lore.kernel.org/r/20200707045759.17562-1-f.fainelli@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Mon, 13 Jul 2020 13:08:42 +0000 (15:08 +0200)]
Merge tag 'omap-for-v5.9/dt-signed' of git://git./linux/kernel/git/tmlind/linux-omap into arm/dt
Device tree changes for omaps for v5.9 merge window
This series of changes configures the GPIO line names for am335x beaglebone
black and pocketbeagle to make it easier to configure the pins. To make use
of the pins, we also add the gpio-ranges for am335x.
We also enable IPU and DSP repmoteproc for am5729-beaglebone-ai, and then
there are two non-urgent dtschema validator warning fixes.
* tag 'omap-for-v5.9/dt-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: dts: am335x-pocketbeagle: add gpio-line-names
ARM: dts: am335x-boneblack: add gpio-line-names
ARM: dts: am33xx-l4: add gpio-ranges
ARM: dts: am5729-beaglebone-ai: Disable ununsed mailboxes
ARM: dts: am5729-beaglebone-ai: Enable IPU & DSP rprocs
ARM: dts: am: Align L2 cache-controller nodename with dtschema
ARM: dts: omap: Align L2 cache-controller nodename with dtschema
Link: https://lore.kernel.org/r/pull-1594402929-762188@atomide.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Mon, 13 Jul 2020 13:07:44 +0000 (15:07 +0200)]
Merge tag 'uniphier-dt64-v5.9' of git://git./linux/kernel/git/masahiroy/linux-uniphier into arm/dt
UniPhier ARM64 SoC DT updates for v5.9
- add missing interrupts property to support card serial
- fix node names to follow the DT schema
- add clock-names and reset-names to pcie-phy
* tag 'uniphier-dt64-v5.9' of git://git.kernel.org/pub/scm/linux/kernel/git/masahiroy/linux-uniphier:
arm64: dts: uniphier: Add missing clock-names and reset-names to pcie-phy
arm64: dts: uniphier: Rename ethphy node to ethernet-phy
arm64: dts: uniphier: give fixed port number to support card serial
arm64: dts: uniphier: add interrupts to support card serial
Link: https://lore.kernel.org/r/CAK7LNARK4SKhSW-xwgc3vq7FO7N864jPgzm8NtsGOv8wVFVyBQ@mail.gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Mon, 13 Jul 2020 13:00:36 +0000 (15:00 +0200)]
Merge tag 'uniphier-dt-v5.9' of git://git./linux/kernel/git/masahiroy/linux-uniphier into arm/dt
UniPhier ARM SoC DT updates for v5.9
- add missing interrupts property to support card serial
- fix node names to follow the DT schema
- add PCIe endpoint and PHY nodes for Pro5 SoC
- simplify device hierarchy of support-card.dtsi
* tag 'uniphier-dt-v5.9' of git://git.kernel.org/pub/scm/linux/kernel/git/masahiroy/linux-uniphier:
ARM: dts: uniphier: simplify support-card node structure
ARM: dts: uniphier: Add PCIe endpoint and PHY node for Pro5
ARM: dts: uniphier: Rename ethphy node to ethernet-phy
ARM: dts: uniphier: give fixed port number to support card serial
ARM: dts: uniphier: rename support card serial node to fix schema warning
ARM: dts: uniphier: add interrupts to support card serial
Link: https://lore.kernel.org/r/CAK7LNARGDcCKxV3-H7WmuZAVe49n0QF+672-KN0tsP0och0a_A@mail.gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Sergei Shtylyov [Fri, 19 Jun 2020 20:22:32 +0000 (23:22 +0300)]
arm64: dts: renesas: r8a77970: eagle/v3msk: Add QSPI flash support
Define the Eagle/V3MSK board dependent parts of the RPC-IF device node.
Add device nodes for Spansion S25FS512S SPI flash and MTD partitions on it.
Based on the original patches by Dmitry Shifrin.
Signed-off-by: Dmitry Shifrin <dmitry.shifrin@cogentembedded.com>
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Link: https://lore.kernel.org/r/fca1d012-29bf-eead-1c0d-4dd837c0bc68@cogentembedded.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Sergei Shtylyov [Fri, 19 Jun 2020 20:21:37 +0000 (23:21 +0300)]
arm64: dts: renesas: r8a77970: Add RPC-IF support
Describe RPC-IF in the R8A77970 device tree.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Link: https://lore.kernel.org/r/ba8bb326-7e77-6ab7-668f-fdc22010c8ef@cogentembedded.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Sergei Shtylyov [Tue, 19 May 2020 20:14:06 +0000 (23:14 +0300)]
arm64: dts: renesas: r8a77980: condor/v3hsk: Add QSPI flash support
Define the Condor/V3HSK board dependent parts of the RPC-IF device node.
Add device nodes for Spansion S25FS512S SPI flash and MTD partitions on it.
Based on the original patches by Dmitry Shifrin.
Signed-off-by: Dmitry Shifrin <dmitry.shifrin@cogentembedded.com>
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Link: https://lore.kernel.org/r/322ca212-a45f-cd2c-f1eb-737f0aa42d22@cogentembedded.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Sergei Shtylyov [Tue, 19 May 2020 20:13:19 +0000 (23:13 +0300)]
arm64: dts: renesas: r8a77980: Add RPC-IF support
Describe RPC-IF in the R8A77980 device tree.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Link: https://lore.kernel.org/r/f18853d9-8ef9-717a-9039-2191b26e579f@cogentembedded.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Marian-Cristian Rotariu [Tue, 7 Jul 2020 16:18:09 +0000 (17:18 +0100)]
clk: renesas: Add r8a774e1 CPG Core Clock Definitions
Add all RZ/G2H Clock Pulse Generator Core Clock Outputs, as listed in
Table 11.2 ("List of Clocks [RZ/G2H]") of the RZ/G2H Hardware User's
Manual.
Signed-off-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@bp.renesas.com>
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/1594138692-16816-10-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Marian-Cristian Rotariu [Tue, 7 Jul 2020 16:18:04 +0000 (17:18 +0100)]
dt-bindings: power: Add r8a774e1 SYSC power domain definitions
This patch adds power domain indices for the RZ/G2H (r8a774e1) SoC.
Signed-off-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@bp.renesas.com>
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/1594138692-16816-5-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Enric Balletbo i Serra [Thu, 25 Jun 2020 10:17:57 +0000 (12:17 +0200)]
arm64: dts: mt8183: Add krane-sku176 board
Also known as the Lenovo IdeaPad Duet Chromebook.
There are different krane boards with shared resources, hence a
mt8183-kukui-krane.dtsi was created for easily introduce future new
boards. The same happens with the baseboard codenamed kukui where
different variants, apart from kukui variant can take advantage of the
shared resources.
Signed-off-by: Ben Ho <Ben.Ho@mediatek.com>
[originally created by Ben Ho but adapted and ported to mainline]
Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Tested-by: Hsin-Yi Wang <hsinyi@chromium.org>
Link: https://lore.kernel.org/r/20200625101757.101775-8-enric.balletbo@collabora.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
Enric Balletbo i Serra [Thu, 25 Jun 2020 10:17:56 +0000 (12:17 +0200)]
arm64: dts: mt8183: Add USB3.0 support
Add the USB3.0 phyter and controller for the MediaTek's MT8183 SoC.
Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Tested-by: Hsin-Yi Wang <hsinyi@chromium.org>
Link: https://lore.kernel.org/r/20200625101757.101775-7-enric.balletbo@collabora.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
Enric Balletbo i Serra [Thu, 25 Jun 2020 10:17:55 +0000 (12:17 +0200)]
arm64: dts: mt8183-evb: Fix unit name warnings
Remove the unit address from the DT nodes that doesn't have a reg
property. This fixes the following unit name warnings:
Warning (unit_address_vs_reg): /soc/pinctrl@
10005000/mmc0@0: node has a unit name, but no reg or ranges property
Warning (unit_address_vs_reg): /soc/pinctrl@
10005000/mmc1@0: node has a unit name, but no reg or ranges property
Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Tested-by: Hsin-Yi Wang <hsinyi@chromium.org>
Link: https://lore.kernel.org/r/20200625101757.101775-6-enric.balletbo@collabora.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
Enric Balletbo i Serra [Thu, 25 Jun 2020 10:17:54 +0000 (12:17 +0200)]
arm64: dts: mt8183: Fix unit name warnings
Remove the unit address from the DT nodes that doesn't have a reg
property. This fixes the following unit name warnings:
Warning (unit_address_vs_reg): /cpus/idle-states/cluster-sleep@0: node has a unit name, but no reg or ranges property
Warning (unit_address_vs_reg): /cpus/idle-states/cluster-sleep@1: node has a unit name, but no reg or ranges property
Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Tested-by: Hsin-Yi Wang <hsinyi@chromium.org>
Link: https://lore.kernel.org/r/20200625101757.101775-5-enric.balletbo@collabora.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
Enric Balletbo i Serra [Thu, 25 Jun 2020 10:17:53 +0000 (12:17 +0200)]
arm64: dts: mt8183: Add MediaTek's peripheral configuration controller
The MediaTek's peripheral configuration controller is present on the
MT8183 SoC. Add the node for that controller.
Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Tested-by: Hsin-Yi Wang <hsinyi@chromium.org>
Link: https://lore.kernel.org/r/20200625101757.101775-4-enric.balletbo@collabora.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
Enric Balletbo i Serra [Thu, 25 Jun 2020 10:17:52 +0000 (12:17 +0200)]
arm64: dts: mt6358: Add the compatible for the regulators
The regulators are expected to be instantiated with matching the
device-tree compatible, so add the proper compatible name under the
regulators node.
Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Tested-by: Hsin-Yi Wang <hsinyi@chromium.org>
Link: https://lore.kernel.org/r/20200625101757.101775-3-enric.balletbo@collabora.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
Enric Balletbo i Serra [Thu, 25 Jun 2020 10:17:51 +0000 (12:17 +0200)]
dt-bindings: arm64: dts: mediatek: Add mt8183-kukui-krane-sku176
The krane-sku176 is the Lenovo IdeaPad Duet Chromebook. A 2-in-1
detachable device using the MediaTek MT8183 SoC.
Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Link: https://lore.kernel.org/r/20200625101757.101775-2-enric.balletbo@collabora.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
Hsin-Yi Wang [Mon, 6 Jul 2020 08:37:05 +0000 (16:37 +0800)]
arm64: dts: mt8173: Re-measure capacity-dmips-mhz
Re measure capacity-dmips-mhz on elm and hana:
cpu 1: 9502 DMIPS @ 1703 Mhz
cpu 3: 16250 DMIPS @ 2106 Mhz
==> 740 : 1024
Signed-off-by: Hsin-Yi Wang <hsinyi@chromium.org>
Link: https://lore.kernel.org/r/20200706083705.2343150-1-hsinyi@chromium.org
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
Masahiro Yamada [Fri, 10 Jul 2020 07:43:23 +0000 (16:43 +0900)]
ARM: dts: uniphier: simplify support-card node structure
This device hierarchy is needlessly complex.
Remove the support-card node level, and move the ethernet and serial
nodes right under the system-bus node.
This also fixes the following warning from 'make ARCH=arm dtbs_check':
support-card@1,1f00000: $nodename:0: 'support-card@1,1f00000' does not match '^(bus|soc|axi|ahb|apb)(@[0-9a-f]+)?$'
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Kunihiko Hayashi [Wed, 8 Jul 2020 08:56:18 +0000 (17:56 +0900)]
arm64: dts: uniphier: Add missing clock-names and reset-names to pcie-phy
This adds missing clock-names and reset-names to pcie-phy node according to
Documentation/devicetree/bindings/phy/socionext,uniphier-pcie.yaml.
Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Kunihiko Hayashi [Wed, 8 Jul 2020 08:54:11 +0000 (17:54 +0900)]
arm64: dts: uniphier: Rename ethphy node to ethernet-phy
This renames the node name "ethphy" to "ethernet-phy" according to
Documentation/devicetree/bindings/net/mdio.yaml.
Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Kunihiko Hayashi [Wed, 8 Jul 2020 08:52:00 +0000 (17:52 +0900)]
ARM: dts: uniphier: Add PCIe endpoint and PHY node for Pro5
This adds PCIe endpoint controller and PHY nodes for Pro5 SoC,
and also adds pinctrl node for PCIe.
Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Kunihiko Hayashi [Wed, 8 Jul 2020 08:54:10 +0000 (17:54 +0900)]
ARM: dts: uniphier: Rename ethphy node to ethernet-phy
This renames the node name "ethphy" to "ethernet-phy" according to
Documentation/devicetree/bindings/net/mdio.yaml.
Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamada [Tue, 7 Jul 2020 10:33:22 +0000 (19:33 +0900)]
arm64: dts: uniphier: give fixed port number to support card serial
Add this to the aliases node to make it more convenient.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamada [Tue, 7 Jul 2020 10:33:11 +0000 (19:33 +0900)]
ARM: dts: uniphier: give fixed port number to support card serial
Add this to the aliases node to make it more convenient.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamada [Tue, 23 Jun 2020 11:46:12 +0000 (20:46 +0900)]
arm64: dts: uniphier: add interrupts to support card serial
Since commit
e69f5dc623f9 ("dt-bindings: serial: Convert 8250 to
json-schema"), the schema for "ns16550a" is checked.
Since then, 'make ARCH=arm64 dtbs_check' is so noisy because the
required property 'interrupts' is missing.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamada [Tue, 23 Jun 2020 11:46:13 +0000 (20:46 +0900)]
ARM: dts: uniphier: rename support card serial node to fix schema warning
Since commit
e69f5dc623f9 ("dt-bindings: serial: Convert 8250 to
json-schema"), the schema for "ns16550a" is checked.
'make ARCH=arm dtbs_check' emits the following warning:
uart@b0000: $nodename:0: 'uart@b0000' does not match '^serial(@[0-9a-f,]+)*$'
Rename the node to follow the pattern defined in
Documentation/devicetree/bindings/serial/serial.yaml
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamada [Tue, 23 Jun 2020 11:46:11 +0000 (20:46 +0900)]
ARM: dts: uniphier: add interrupts to support card serial
Since commit
e69f5dc623f9 ("dt-bindings: serial: Convert 8250 to
json-schema"), the schema for "ns16550a" is checked.
Since then, 'make ARCH=arm dtbs_check' is so noisy because the
required property 'interrupts' is missing.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Florian Fainelli [Tue, 7 Jul 2020 04:56:00 +0000 (21:56 -0700)]
Merge tag 'tags/bcm2835-dt-next-2020-07-06' into devicetree/next
Maxime Ripard introduces two new clock providers into RPi4's device tree:
- The first one based on the enhancements made to clk-raspberrypi, which
is now registered trough DT and provides control over the whole range
of firmware based clocks.
- The second one based on the new clk-bcm2711-dvp driver, which gates
the clocks and reset signals that feed into RPi4's HDMI0/1 blocks.
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Krzysztof Kozlowski [Fri, 26 Jun 2020 08:06:46 +0000 (10:06 +0200)]
ARM: dts: bcm: Align L2 cache-controller nodename with dtschema
Fix dtschema validator warnings like:
l2-cache@22000: $nodename:0:
'l2-cache@22000' does not match '^(cache-controller|cpu)(@[0-9a-f,]+)*$'
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Acked-by: Scott Branden <scott.branden@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Rafał Miłecki [Mon, 8 Jun 2020 09:37:33 +0000 (11:37 +0200)]
ARM: dts: BCM5301X: Specify switch ports for Luxul devices
All those devices use standard BCM53011 (rev 5) or BCM53012 (rev 0).
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Maxime Ripard [Thu, 11 Jun 2020 09:23:17 +0000 (11:23 +0200)]
ARM: dts: bcm2711: Add HDMI DVP
Now that we have a driver for the DVP, let's add its DT node.
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Signed-off-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
Link: https://lore.kernel.org/r/e22222ca7f41b960e9bb1a31e0dd2de95b8c0cd1.1591867332.git-series.maxime@cerno.tech
Arnd Bergmann [Mon, 6 Jul 2020 15:41:24 +0000 (17:41 +0200)]
Merge tag 'renesas-arm-dt-for-v5.9-tag1' of git://git./linux/kernel/git/geert/renesas-devel into arm/dt
Renesas ARM DT updates for v5.9
- Increase support for the Renesas RZ/G1H SoC on the iWave RainboW
Qseven board (G21D), and its camera expansion board,
- IPMMU support for R-Car M3-W+,
- Support for Rev.3.0/4.0 of the HopeRun HiHope RZ/G2M and RZ/G2N
boards,
- Minor fixes and improvements.
* tag 'renesas-arm-dt-for-v5.9-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel: (36 commits)
ARM: dts: r8a7778: Enable IRLM setup via DT
arm64: dts: renesas: Add HiHope RZ/G2N Rev2.0/3.0/4.0 board with idk-1110wr display
arm64: dts: renesas: Add HiHope RZ/G2N Rev.3.0/4.0 sub board support
arm64: dts: renesas: Add HiHope RZ/G2N Rev.3.0/4.0 main board support
arm64: dts: renesas: Add HiHope RZ/G2M Rev.3.0/4.0 board with idk-1110wr display
arm64: dts: renesas: hihope-rzg2-ex: Separate out lvds specific nodes into common file
arm64: dts: renesas: Add HiHope RZ/G2M Rev.3.0/4.0 sub board support
arm64: dts: renesas: Add HiHope RZ/G2M Rev.3.0/4.0 main board support
arm64: dts: renesas: Add HiHope RZ/G2M[N] Rev.3.0/4.0 specific into common file
arm64: dts: renesas: hihope-common: Separate out Rev.2.0 specific into hihope-rev2.dtsi file
arm64: dts: renesas: r8a774b1-hihope-rzg2n[-ex]: Rename HiHope RZ/G2N boards
arm64: dts: renesas: r8a774a1-hihope-rzg2m[-ex/-ex-idk-1110wr]: Rename HiHope RZ/G2M boards
arm64: dts: renesas: r8a77961: Add IPMMU nodes
ARM: dts: r8a7742: Add MSIOF[0123] support
ARM: dts: r8a7742-iwg21d-q7-dbcm-ca: Add device tree for camera DB
ARM: dts: r8a7742: Add CMT SoC specific support
ARM: dts: r8a7742: Add thermal device to DT
ARM: dts: r8a7742-iwg21d-q7: Sound DMA support via DVC on DTS
ARM: dts: r8a7742-iwg21d-q7: Enable SGTL5000 audio codec
ARM: dts: r8a7742: Add audio support
...
Link: https://lore.kernel.org/r/20200703120642.5128-3-geert+renesas@glider.be
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Drew Fustini [Thu, 18 Jun 2020 18:29:21 +0000 (20:29 +0200)]
ARM: dts: am335x-pocketbeagle: add gpio-line-names
The BeagleBoard.org PocketBeagle has P1 and P2 headers [0] which expose
many of the TI AM3358 SoC balls to stacking expansion boards called
"capes", or to other external connections like jumper wires connected
to a breadboard.
Note: the AM3358 die is actually embedded inside of the OSD335x-SM
System-in-Package (SiP) [1] but that is irrelevant to the gpio driver.
Many of the P1 and P2 header pins can muxed to a GPIO line. The
gpio-line-names describe which P1 or P2 pin that line goes to and the
default mux for that P1 or P2 pin if it is not GPIO.
Some GPIO lines are named "[NC]" as the corresponding balls are not
routed to anything on the PCB.
The goal for these names is to make it easier for a user viewing the
output of gpioinfo to determine which P1 or P2 pin is connected to a
GPIO line. The output of gpioinfo on a PocketBeagle would be:
gpiochip0 - 32 lines:
line 0: "[NC]" unused input active-high
line 1: "[NC]" unused input active-high
line 2: "P1.08 [SPI0_CLK]" unused input active-high
line 3: "P1.10 [SPI0_MISO]" unused input active-high
line 4: "P1.12 [SPI0_MOSI]" unused input active-high
line 5: "P1.06 [SPI0_CS]" unused input active-high
line 6: "[MMC0_CD]" "cd" input active-low [used]
line 7: "P2.29 [SPI1_CLK]" unused input active-high
line 8: "[SYSBOOT]" unused input active-high
line 9: "[SYSBOOT]" unused input active-high
line 10: "[SYSBOOT]" unused input active-high
line 11: "[SYSBOOT]" unused input active-high
line 12: "P1.26 [I2C2_SDA]" unused input active-high
line 13: "P1.28 [I2C2_SCL]" unused input active-high
line 14: "P2.11 [I2C1_SDA]" unused input active-high
line 15: "P2.09 [I2C1_SCL]" unused input active-high
line 16: "[NC]" unused input active-high
line 17: "[NC]" unused input active-high
line 18: "[NC]" unused input active-high
line 19: "P2.31 [SPI1_CS]" unused input active-high
line 20: "P1.20 [PRU0.16]" unused input active-high
line 21: "[NC]" unused input active-high
line 22: "[NC]" unused input active-high
line 23: "P2.03" unused input active-high
line 24: "[NC]" unused input active-high
line 25: "[NC]" unused input active-high
line 26: "P1.34" unused input active-high
line 27: "P2.19" unused input active-high
line 28: "[NC]" unused input active-high
line 29: "[NC]" unused input active-high
line 30: "P2.05 [UART4_RX]" unused input active-high
line 31: "P2.07 [UART4_TX]" unused input active-high
gpiochip1 - 32 lines:
line 0: "[NC]" unused input active-high
line 1: "[NC]" unused input active-high
line 2: "[NC]" unused input active-high
line 3: "[NC]" unused input active-high
line 4: "[NC]" unused input active-high
line 5: "[NC]" unused input active-high
line 6: "[NC]" unused input active-high
line 7: "[NC]" unused input active-high
line 8: "[NC]" unused input active-high
line 9: "P2.25 [SPI1_MOSI]" unused input active-high
line 10: "P1.32 [UART0_RX]" unused input active-high
line 11: "P1.30 [UART0_TX]" unused input active-high
line 12: "P2.24" unused input active-high
line 13: "P2.33" unused input active-high
line 14: "P2.22" unused input active-high
line 15: "P2.18" unused input active-high
line 16: "[NC]" unused input active-high
line 17: "[NC]" unused input active-high
line 18: "P2.01 [PWM1A]" unused input active-high
line 19: "[NC]" unused input active-high
line 20: "P2.10" unused input active-high
line 21: "[USR LED 0]" "beaglebone:green:usr0" output active-high [used]
line 22: "[USR LED 1]" "beaglebone:green:usr1" output active-high [used]
line 23: "[USR LED 2]" "beaglebone:green:usr2" output active-high [used]
line 24: "[USR LED 3]" "beaglebone:green:usr3" output active-high [used]
line 25: "P2.06" unused input active-high
line 26: "P2.04" unused input active-high
line 27: "P2.02" unused input active-high
line 28: "P2.08" unused input active-high
line 29: "[NC]" unused input active-high
line 30: "[NC]" unused input active-high
line 31: "[NC]" unused input active-high
gpiochip2 - 32 lines:
line 0: "P2.20" unused input active-high
line 1: "P2.17" unused input active-high
line 2: "[NC]" unused input active-high
line 3: "[NC]" unused input active-high
line 4: "[NC]" unused input active-high
line 5: "[EEPROM_WP]" unused input active-high
line 6: "[SYSBOOT]" unused input active-high
line 7: "[SYSBOOT]" unused input active-high
line 8: "[SYSBOOT]" unused input active-high
line 9: "[SYSBOOT]" unused input active-high
line 10: "[SYSBOOT]" unused input active-high
line 11: "[SYSBOOT]" unused input active-high
line 12: "[SYSBOOT]" unused input active-high
line 13: "[SYSBOOT]" unused input active-high
line 14: "[SYSBOOT]" unused input active-high
line 15: "[SYSBOOT]" unused input active-high
line 16: "[SYSBOOT]" unused input active-high
line 17: "[SYSBOOT]" unused input active-high
line 18: "[NC]" unused input active-high
line 19: "[NC]" unused input active-high
line 20: "[NC]" unused input active-high
line 21: "[NC]" unused input active-high
line 22: "P2.35 [AIN5]" unused input active-high
line 23: "P1.02 [AIN6]" unused input active-high
line 24: "P1.35 [PRU1.10]" unused input active-high
line 25: "P1.04 [PRU1.11]" unused input active-high
line 26: "[MMC0_DAT3]" unused input active-high
line 27: "[MMC0_DAT2]" unused input active-high
line 28: "[MMC0_DAT1]" unused input active-high
line 29: "[MMC0_DAT0]" unused input active-high
line 30: "[MMC0_CLK]" unused input active-high
line 31: "[MMC0_CMD]" unused input active-high
gpiochip3 - 32 lines:
line 0: "[NC]" unused input active-high
line 1: "[NC]" unused input active-high
line 2: "[NC]" unused input active-high
line 3: "[NC]" unused input active-high
line 4: "[NC]" unused input active-high
line 5: "[I2C0_SDA]" unused input active-high
line 6: "[I2C0_SCL]" unused input active-high
line 7: "[JTAG]" unused input active-high
line 8: "[JTAG]" unused input active-high
line 9: "[NC]" unused input active-high
line 10: "[NC]" unused input active-high
line 11: "[NC]" unused input active-high
line 12: "[NC]" unused input active-high
line 13: "P1.03 [USB1]" unused input active-high
line 14: "P1.36 [PWM0A]" unused input active-high
line 15: "P1.33 [PRU0.1]" unused input active-high
line 16: "P2.32 [PRU0.2]" unused input active-high
line 17: "P2.30 [PRU0.3]" unused input active-high
line 18: "P1.31 [PRU0.4]" unused input active-high
line 19: "P2.34 [PRU0.5]" unused input active-high
line 20: "P2.28 [PRU0.6]" unused input active-high
line 21: "P1.29 [PRU0.7]" unused input active-high
line 22: "[NC]" unused input active-high
line 23: "[NC]" unused input active-high
line 24: "[NC]" unused input active-high
line 25: "[NC]" unused input active-high
line 26: "[NC]" unused input active-high
line 27: "[NC]" unused input active-high
line 28: "[NC]" unused input active-high
line 29: "[NC]" unused input active-high
line 30: "[NC]" unused input active-high
line 31: "[NC]" unused input active-high
[0] https://github.com/beagleboard/pocketbeagle/wiki/System-Reference-Manual#71_Expansion_Header_Connectors
[1] https://octavosystems.com/app_notes/osd335x-family-pin-assignments/
Reviewed-by: Jason Kridner <jason@beagleboard.org>
Reviewed-by: Robert Nelson <robertcnelson@gmail.com>
Signed-off-by: Drew Fustini <drew@beagleboard.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Drew Fustini [Thu, 21 May 2020 20:09:26 +0000 (22:09 +0200)]
ARM: dts: am335x-boneblack: add gpio-line-names
The BeagleBone Black has P8 and P9 headers [0] which expose many of the
AM3358 ZCZ SoC balls to stacking expansion boards called "capes", or to
other external connections like jumper wires connected to a breadboard.
BeagleBone users will often refer to the "Cape Exanpsion Headers" pin
diagram [1] as it is in the "Bone101" getting started tutorial. [2]
Most of the P8 and P9 header pins can muxed to a GPIO line. The
gpio-line-names describe which P8 or P9 pin that line goes to and the
default mux for that P8 or P9 pin if it is not GPIO.
For example, gpiochip 1 line 0 is connected to P8 header pin 25 (P8_25)
however the default device tree has the corresponding BGA ball (ZCZ U7)
muxed to mmc1_dat0 as it is used for the on-board eMMC chip. For that
GPIO line to be used, one would need to modify the device tree to
disable the eMMC and change the pin mux for that ball to GPIO mode.
Some of the AM3358 ZCZ balls corresponding to GPIO lines are not routed
to a P8 or P9 header, but are instead wired to some peripheral device
like on-board eMMC, HDMI framer IC, or status LEDs. Those names are in
brackets to denote those GPIO lines can not be used.
Some GPIO lines are named "[NC]" as the corresponding balls are not
routed to anything on the PCB.
The goal for these names is to make it easier for a user viewing the
output of gpioinfo to determine which P8 or P9 pin is connected to a
GPIO line. The output of gpioinfo on a BeagleBone Black would be:
gpiochip0 - 32 lines:
line 0: "[ethernet]" unused input active-high
line 1: "[ethernet]" unused input active-high
line 2: "P9_22 [spi0_sclk]" unused input active-high
line 3: "P9_21 [spi0_d0]" unused input active-high
line 4: "P9_18 [spi0_d1]" unused input active-high
line 5: "P9_17 [spi0_cs0]" unused input active-high
line 6: "[sd card]" "cd" input active-low [used]
line 7: "P9_42A [ecappwm0]" unused input active-high
line 8: "P8_35 [hdmi]" unused input active-high
line 9: "P8_33 [hdmi]" unused input active-high
line 10: "P8_31 [hdmi]" unused input active-high
line 11: "P8_32 [hdmi]" unused input active-high
line 12: "P9_20 [i2c2_sda]" unused input active-high
line 13: "P9_19 [i2c2_scl]" unused input active-high
line 14: "P9_26 [uart1_rxd]" unused input active-high
line 15: "P9_24 [uart1_txd]" unused input active-high
line 16: "[ethernet]" unused input active-high
line 17: "[ethernet]" unused input active-high
line 18: "[usb]" unused input active-high
line 19: "[hdmi]" unused input active-high
line 20: "P9_41B" unused input active-high
line 21: "[ethernet]" unused input active-high
line 22: "P8_19 [ehrpwm2a]" unused input active-high
line 23: "P8_13 [ehrpwm2b]" unused input active-high
line 24: "[NC]" unused input active-high
line 25: "[NC]" unused input active-high
line 26: "P8_14" unused input active-high
line 27: "P8_17" unused input active-high
line 28: "[ethernet]" unused input active-high
line 29: "[ethernet]" unused input active-high
line 30: "P9_11 [uart4_rxd]" unused input active-high
line 31: "P9_13 [uart4_txd]" unused input active-high
gpiochip1 - 32 lines:
line 0: "P8_25 [emmc]" unused input active-high
line 1: "[emmc]" unused input active-high
line 2: "P8_5 [emmc]" unused input active-high
line 3: "P8_6 [emmc]" unused input active-high
line 4: "P8_23 [emmc]" unused input active-high
line 5: "P8_22 [emmc]" unused input active-high
line 6: "P8_3 [emmc]" unused input active-high
line 7: "P8_4 [emmc]" unused input active-high
line 8: "[NC]" unused input active-high
line 9: "[NC]" unused input active-high
line 10: "[NC]" unused input active-high
line 11: "[NC]" unused input active-high
line 12: "P8_12" unused input active-high
line 13: "P8_11" unused input active-high
line 14: "P8_16" unused input active-high
line 15: "P8_15" unused input active-high
line 16: "P9_15A" unused input active-high
line 17: "P9_23" unused input active-high
line 18: "P9_14 [ehrpwm1a]" unused input active-high
line 19: "P9_16 [ehrpwm1b]" unused input active-high
line 20: "[emmc]" unused input active-high
line 21: "[usr0 led]" "beaglebone:green:heartbeat" output active-high [used]
line 22: "[usr1 led]" "beaglebone:green:mmc0" output active-high [used]
line 23: "[usr2 led]" "beaglebone:green:usr2" output active-high [used]
line 24: "[usr3 led]" "beaglebone:green:usr3" output active-high [used]
line 25: "[hdmi]" "interrupt" input active-high [used]
line 26: "[usb]" unused input active-high
line 27: "[hdmi audio]" "enable" output active-high [used]
line 28: "P9_12" unused input active-high
line 29: "P8_26" unused input active-high
line 30: "P8_21 [emmc]" unused input active-high
line 31: "P8_20 [emmc]" unused input active-high
gpiochip2 - 32 lines:
line 0: "P9_15B" unused input active-high
line 1: "P8_18" unused input active-high
line 2: "P8_7" unused input active-high
line 3: "P8_8" unused input active-high
line 4: "P8_10" unused input active-high
line 5: "P8_9" unused input active-high
line 6: "P8_45 [hdmi]" unused input active-high
line 7: "P8_46 [hdmi]" unused input active-high
line 8: "P8_43 [hdmi]" unused input active-high
line 9: "P8_44 [hdmi]" unused input active-high
line 10: "P8_41 [hdmi]" unused input active-high
line 11: "P8_42 [hdmi]" unused input active-high
line 12: "P8_39 [hdmi]" unused input active-high
line 13: "P8_40 [hdmi]" unused input active-high
line 14: "P8_37 [hdmi]" unused input active-high
line 15: "P8_38 [hdmi]" unused input active-high
line 16: "P8_36 [hdmi]" unused input active-high
line 17: "P8_34 [hdmi]" unused input active-high
line 18: "[ethernet]" unused input active-high
line 19: "[ethernet]" unused input active-high
line 20: "[ethernet]" unused input active-high
line 21: "[ethernet]" unused input active-high
line 22: "P8_27 [hdmi]" unused input active-high
line 23: "P8_29 [hdmi]" unused input active-high
line 24: "P8_28 [hdmi]" unused input active-high
line 25: "P8_30 [hdmi]" unused input active-high
line 26: "[emmc]" unused input active-high
line 27: "[emmc]" unused input active-high
line 28: "[emmc]" unused input active-high
line 29: "[emmc]" unused input active-high
line 30: "[emmc]" unused input active-high
line 31: "[emmc]" unused input active-high
gpiochip3 - 32 lines:
line 0: "[ethernet]" unused input active-high
line 1: "[ethernet]" unused input active-high
line 2: "[ethernet]" unused input active-high
line 3: "[ethernet]" unused input active-high
line 4: "[ethernet]" unused input active-high
line 5: "[i2c0]" unused input active-high
line 6: "[i2c0]" unused input active-high
line 7: "[emu]" unused input active-high
line 8: "[emu]" unused input active-high
line 9: "[ethernet]" unused input active-high
line 10: "[ethernet]" unused input active-high
line 11: "[NC]" unused input active-high
line 12: "[NC]" unused input active-high
line 13: "[usb]" unused input active-high
line 14: "P9_31 [spi1_sclk]" unused input active-high
line 15: "P9_29 [spi1_d0]" unused input active-high
line 16: "P9_30 [spi1_d1]" unused input active-high
line 17: "P9_28 [spi1_cs0]" unused input active-high
line 18: "P9_42B [ecappwm0]" unused input active-high
line 19: "P9_27" unused input active-high
line 20: "P9_41A" unused input active-high
line 21: "P9_25" unused input active-high
line 22: "[NC]" unused input active-high
line 23: "[NC]" unused input active-high
line 24: "[NC]" unused input active-high
line 25: "[NC]" unused input active-high
line 26: "[NC]" unused input active-high
line 27: "[NC]" unused input active-high
line 28: "[NC]" unused input active-high
line 29: "[NC]" unused input active-high
line 30: "[NC]" unused input active-high
line 31: "[NC]" unused input active-high
[0] https://git.io/JfgOd
[1] https://beagleboard.org/capes
[1] https://beagleboard.org/Support/bone101
[2] https://beagleboard.org/static/images/cape-headers.png
Reviewed-by: Jason Kridner <jason@beagleboard.org>
Reviewed-by: Robert Nelson <robertcnelson@gmail.com>
Signed-off-by: Drew Fustini <drew@beagleboard.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Drew Fustini [Wed, 10 Jun 2020 11:02:58 +0000 (13:02 +0200)]
ARM: dts: am33xx-l4: add gpio-ranges
Add gpio-ranges properties to the gpio controller nodes.
These gpio-ranges were created based on "Table 9-10. CONTROL_MODULE
REGISTERS" in the "AM335x Technical Reference Manual" [0] and "Table
4-2. Pin Attributes" in the "AM335x Sitara Processor datasheet" [1].
A csv file with this data is available for reference [2].
These mappings are valid for all SoC's that are using am33xx-l4.dtsi.
In addition, the only TI AM33xx parts that actually exist are [0]:
AM3351, AM3352, AM3354, AM3356, AM3357, AM3358, AM3359
These gpio-ranges properties should be added as they describe the
relationship between a gpio line and pin control register that exists
in the hardware. For example, GPMC_A0 pin has mode 7 which is labeled
gpio1_16. conf_gpmc_a0 register is at offset 840h which makes it pin 16.
[0] https://www.ti.com/lit/ug/spruh73q/spruh73q.pdf
[1] http://www.ti.com/lit/ds/symlink/am3358.pdf
[2] https://gist.github.com/pdp7/
6ffaddc8867973c1c3e8612cfaf72020
[3] http://www.ti.com/processors/sitara-arm/am335x-cortex-a8/overview.html
Signed-off-by: Drew Fustini <drew@beagleboard.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Suman Anna [Thu, 11 Jun 2020 15:29:45 +0000 (10:29 -0500)]
ARM: dts: am5729-beaglebone-ai: Disable ununsed mailboxes
The IPU and DSP remote processors use sub-mailbox nodes only from a
limited set of System Mailboxes 5 and 6 to achieve the Remote Processor
Messaging (RPMsg) communication stack between the MPU host processor
and the respective remote processor. These are all defined and enabled
through the inherited common dra74-ipu-dsp-common.dtsi file.
The other System Mailboxes do not define any actual sub-mailboxes, so
they serve no purpose and can all be safely dropped.
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Suman Anna [Thu, 11 Jun 2020 15:29:44 +0000 (10:29 -0500)]
ARM: dts: am5729-beaglebone-ai: Enable IPU & DSP rprocs
Assign the previously added CMA reserved memory nodes to the respective
IPU and DSP rproc device nodes, and enable these rproc nodes so that
these remote processors can be booted on the AM5729 BeagleBone AI board.
The addresses and sizes of the CMA pools are identical to those used on
various other TI AM572x/AM574x based boards. The mailboxes, timers and
watchdog-timers for all these remoteprocs are inherited by including the
common dra72-ipu-dsp-common.dtsi file.
An associated pair of the rproc node and its CMA node can be disabled
later on if there is no use-case defined to use that remote processor.
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Krzysztof Kozlowski [Fri, 26 Jun 2020 08:06:51 +0000 (10:06 +0200)]
ARM: dts: am: Align L2 cache-controller nodename with dtschema
Fix dtschema validator warnings like:
l2-cache-controller@
48242000: $nodename:0: 'l2-cache-controller@
48242000'
does not match '^(cache-controller|cpu)(@[0-9a-f,]+)*$'
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Krzysztof Kozlowski [Fri, 26 Jun 2020 08:06:19 +0000 (10:06 +0200)]
ARM: dts: omap: Align L2 cache-controller nodename with dtschema
Fix dtschema validator warnings like:
l2-cache-controller@
48242000: $nodename:0:
'l2-cache-controller@
48242000' does not match '^(cache-controller|cpu)(@[0-9a-f,]+)*$'
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Adam Ford [Wed, 17 Jun 2020 10:58:40 +0000 (05:58 -0500)]
ARM: dts: omap3: Migrate AES from hwmods to sysc-omap2
Various OMAP3 boards have two AES blocks, but only one is currently
available, because the hwmods are only configured for one.
This patch migrates the hwmods for the AES engine to sysc-omap2
which allows the second AES crypto engine to become available.
omap-aes
480a6000.aes1: OMAP AES hw accel rev: 2.6
omap-aes
480a6000.aes1: will run requests pump with realtime priority
omap-aes
480c5000.aes2: OMAP AES hw accel rev: 2.6
omap-aes
480c5000.aes2: will run requests pump with realtime priority
Signed-off-by: Adam Ford <aford173@gmail.com>
[tony@atomide.com: updated to disable both aes_targets on hs boards]
Signed-off-by: Tony Lindgren <tony@atomide.com>
Ulrich Hecht [Tue, 8 Sep 2015 15:42:23 +0000 (17:42 +0200)]
ARM: dts: r8a7778: Enable IRLM setup via DT
Make use of the IRLM setup feature in the renesas-intc-irqpin driver.
Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com>
Tested-by: Simon Horman <horms+renesas@verge.net.au>
Link: https://lore.kernel.org/r/1441726946-30131-3-git-send-email-ulrich.hecht+renesas@gmail.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Lad Prabhakar [Wed, 24 Jun 2020 13:12:10 +0000 (14:12 +0100)]
arm64: dts: renesas: Add HiHope RZ/G2N Rev2.0/3.0/4.0 board with idk-1110wr display
The HiHope RZ/G2N variants are advertised as compatible with panel
idk-1110wr from Advantech, however the panel isn't sold alongside the
board. New dts's, enabling the lvds node to get the panel to work with
all the HiHope RZ/G2N variants.
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@bp.renesas.com>
Link: https://lore.kernel.org/r/1593004330-5039-12-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Lad Prabhakar [Wed, 24 Jun 2020 13:12:09 +0000 (14:12 +0100)]
arm64: dts: renesas: Add HiHope RZ/G2N Rev.3.0/4.0 sub board support
The HiHope RZ/G2N sub board sits below the HiHope RZ/G2N Rev.3.0/4.0 main
board.
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@bp.renesas.com>
Link: https://lore.kernel.org/r/1593004330-5039-11-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Lad Prabhakar [Wed, 24 Jun 2020 13:12:08 +0000 (14:12 +0100)]
arm64: dts: renesas: Add HiHope RZ/G2N Rev.3.0/4.0 main board support
Add support for HiHope RZ/G2N Rev.3.0/4.0 main board support based on
r8a774b1 SoC.
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@bp.renesas.com>
Link: https://lore.kernel.org/r/1593004330-5039-10-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Lad Prabhakar [Wed, 24 Jun 2020 13:12:07 +0000 (14:12 +0100)]
arm64: dts: renesas: Add HiHope RZ/G2M Rev.3.0/4.0 board with idk-1110wr display
Add support for idk-1110wr display as similarly done for Rev.2.0
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@bp.renesas.com>
Link: https://lore.kernel.org/r/1593004330-5039-9-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
projects / platform / kernel / linux-rpi.git / log